1. OpenTitan
  3. Getting Started
  4. Getting Started
  5. Workflows
    ❱
    1. Design Verification
    2. Formal Verification
    3. Building (and Testing) Software
    4. Building Documentation
    5. Using OpenOCD
  7. Tools Setup
    ❱
    1. FPGA Setup
    2. Verilator Setup
    3. Installing Vivado
  9. Unofficial Guides
    ❱
    1. RedHat/Fedora
  12. Hardware
  13. Introduction
  14. Top Earlgrey
    ❱
    1. Datasheet
    2. Design
    3. Design Verification
      ❱
      1. Chip Testplan
    5. Analog Sensor Top
      ❱
      1. Interfaces
    7. Alert Handler
      ❱
      1. Theory of Operation
      2. Design Verification
        ❱
        1. Testplan
      4. Programmer's Guide
      5. Interface and Registers
      6. Device Interface Functions
      7. Checklist
    9. Interrupt Controller
      ❱
      1. Theory of Operation
      2. Design Verification
        ❱
        1. Testplan
      4. Programmer's Guide
      5. Interface and Registers
      6. Device Interface Functions
      7. Checklist
    11. OTP Controller
      ❱
      1. Theory of Operation
      2. Design Verification
        ❱
        1. Testplan
      4. Programmer's Guide
      5. Hardware Interfaces
      6. Registers
      7. Device Interface Functions
      8. Checklist
    13. Sensor Control
      ❱
      1. Theory of Operation
      2. Programmer's Guide
      3. Hardware Interfaces
      4. Registers
      5. Device Interface Functions
      6. Checklist
    15. TL-UL Checklist
    16. Pinmux Targets
      ❱
      1. ASIC Target Pinout and Pinmux Connectivity
      2. CW310 Target Pinout and Pinmux Connectivity
      3. CW340 Target Pinout and Pinmux Connectivity
  16. Top Darjeeling
    ❱
    1. Datasheet
    2. OTP Controller
      ❱
      1. Theory of Operation
      2. Design Verification
        ❱
        1. Testplan
      4. Programmer's Guide
      5. Hardware Interfaces
      6. Registers
      7. Device Interface Functions
      8. Checklist
  18. Cores
    ❱
    1. Ibex RISC-V Core Wrapper
      ❱
      1. Theory of Operation
      2. Design Verification
      3. Programmer's Guide
      4. Hardware Interfaces
      5. Registers
      6. Checklist
    3. OTBN
      ❱
      1. Theory of Operation
      2. Introduction to OTBN
      3. Developing OTBN
      4. ISA Guide
      5. Design Verification
        ❱
        1. Random Instruction Generator
          ❱
          1. Internals
          2. Configuration
        3. memutil wrapper
        4. OTBN Simulation Software
        5. Tracer
        6. Formal Masking Verification Using Alma
      7. Functional Coverage
      8. Programmer's Guide
      9. Hardware Interfaces
      10. Registers
      11. Checklist
  20. Hardware IP Blocks
    ❱
    1. Analog to Digital Converter Control
      ❱
      1. Theory of Operation
      2. Design Verification
        ❱
        1. Testplan
      4. Programmer's Guide
      5. Hardware Interfaces
      6. Registers
      7. Checklist
    3. AES
      ❱
      1. Theory of Operation
      2. Design Verification
        ❱
        1. Testplan
      4. Programmer's Guide
      5. Hardware Interfaces
      6. Registers
      7. Device Interface Functions
      8. Checklist
    5. AON Timer
      ❱
      1. Theory of Operation
      2. Design Verification
        ❱
        1. Testplan
      4. Programmer's Guide
      5. Hardware Interfaces
      6. Registers
      7. Device Interface Functions
      8. Checklist
    7. Ascon
      ❱
      1. Background
      2. Theory of Operation
      3. Programmer's Guide
      4. Hardware Interfaces
      5. Registers
      6. Checklist
    9. Clock Manager
      ❱
      1. Theory of Operation
      2. Design Verification
        ❱
        1. Testplan
      4. Programmer's Guide
      5. Hardware Interfaces
      6. Registers
      7. Device Interface Functions
      8. Checklist
    11. CSRNG
      ❱
      1. Theory of Operation
      2. Design Verification
        ❱
        1. Testplan
      4. Programmer's Guide
      5. Hardware Interfaces
      6. Registers
      7. Device Interface Functions
      8. Checklist
    13. DMA
      ❱
      1. Theory of Operation
      2. Design Verification
        ❱
        1. Testplan
      4. Programmer's Guide
      5. Hardware Interfaces
      6. Registers
      7. Device Interface Functions
      8. Checklist
    15. EDN
      ❱
      1. Theory of Operation
      2. Design Verification
        ❱
        1. Testplan
      4. Programmer's Guide
      5. Hardware Interfaces
      6. Registers
      7. Device Interface Functions
      8. Checklist
    17. Entropy Source
      ❱
      1. Theory of Operation
      2. Design Verification
        ❱
        1. Testplan
      4. Programmer's Guide
      5. Hardware Interfaces
      6. Registers
      7. Device Interface Functions
      8. Checklist
    19. Flash Controller
      ❱
      1. Theory of Operation
      2. Design Verification
        ❱
        1. Testplan
      4. Programmer's Guide
      5. Hardware Interfaces
      6. Registers
      7. Device Interface Functions
      8. Checklist
    21. GPIO
      ❱
      1. Theory of Operation
      2. Design Verification
        ❱
        1. Testplan
      4. Programmer's Guide
      5. Hardware Interfaces
      6. Registers
      7. Device Interface Functions
      8. Checklist
    23. HMAC
      ❱
      1. Theory of Operation
      2. Design Verification
        ❱
        1. Testplan
      4. Programmer's Guide
      5. Hardware Interfaces
      6. Registers
      7. Device Interface Functions
      8. Checklist
    25. I2C
      ❱
      1. Theory of Operation
      2. Design Verification
        ❱
        1. Testplan
      4. Programmer's Guide
      5. Hardware Interfaces
      6. Registers
      7. Device Interface Functions
      8. Checklist
    27. Key Manager
      ❱
      1. Theory of Operation
      2. Design Verification
        ❱
        1. Testplan
      4. Programmer's Guide
      5. Hardware Interfaces
      6. Registers
      7. Device Interface Functions
      8. Checklist
    29. Key Manager DPE
      ❱
      1. Theory of Operation
      2. Design Verification
        ❱
        1. Testplan
      4. Programmer's Guide
      5. Hardware Interfaces
      6. Registers
      7. Device Interface Functions
      8. Checklist
    31. KMAC
      ❱
      1. Theory of Operation
      2. Design Verification
        ❱
        1. Testplan
      4. Programmer's Guide
      5. Hardware Interfaces
      6. Registers
      7. Device Interface Functions
      8. Checklist
    33. Life Cycle Controller
      ❱
      1. Theory of Operation
      2. Design Verification
        ❱
        1. Testplan
      4. Programmer's Guide
      5. Hardware Interfaces
      6. Registers
      7. Device Interface Functions
      8. Checklist
    35. Mailbox
      ❱
      1. Theory of Operation
      2. Design Verification
        ❱
        1. Testplan
      4. Programmer's Guide
      5. Hardware Interfaces
      6. Registers
      7. Device Interface Functions
      8. Checklist
    37. Pattern Generator
      ❱
      1. Theory of Operation
      2. Design Verification
        ❱
        1. Testplan
      4. Programmer's Guide
      5. Hardware Interfaces
      6. Registers
      7. Device Interface Functions
      8. Checklist
    39. Pinmux
      ❱
      1. Theory of Operation
      2. Design Verification
        ❱
        1. Testplan
      4. Programmer's Guide
      5. Hardware Interfaces
      6. Registers
      7. Device Interface Functions
      8. Checklist
    41. Pulse Width Modulator
      ❱
      1. Theory of Operation
      2. Design Verification
        ❱
        1. Testplan
      4. Programmer's Guide
      5. Hardware Interfaces
      6. Registers
      7. Device Interface Functions
      8. Checklist
    43. Power Management
      ❱
      1. Theory of Operation
      2. Design Verification
        ❱
        1. Testplan
      4. Programmer's Guide
      5. Hardware Interfaces
      6. Registers
      7. Device Interface Functions
      8. Checklist
    45. ROM Control
      ❱
      1. Theory of Operation
      2. Design Verification
        ❱
        1. Testplan
      4. Programmer's Guide
      5. Hardware Interfaces
      6. Registers
      7. Device Interface Functions
      8. Checklist
    47. Reset Manager
      ❱
      1. Theory of Operation
      2. Design Verification
        ❱
        1. Testplan
      4. Programmer's Guide
      5. Hardware Interfaces
      6. Registers
      7. Device Interface Functions
      8. Checklist
    49. RISC-V Debug Manager
      ❱
      1. Theory of Operation
      2. Design Verification
        ❱
        1. Testplan
      4. Programmer's Guide
      5. Hardware Interfaces
      6. Registers
      7. Checklist
    51. SPI Device
      ❱
      1. Theory of Operation
      2. Design Verification
        ❱
        1. Testplan
      4. Programmer's Guide
      5. Hardware Interfaces
      6. Registers
      7. Device Interface Functions
      8. Checklist
    53. SPI Host
      ❱
      1. Theory of Operation
      2. Design Verification
        ❱
        1. Testplan
      4. Programmer's Guide
      5. Hardware Interfaces
      6. Registers
      7. Device Interface Functions
      8. Checklist
    55. SRAM Controller
      ❱
      1. Theory of Operation
      2. Design Verification
        ❱
        1. Testplan
      4. Programmer's Guide
      5. Hardware Interfaces
      6. Registers
      7. Device Interface Functions
      8. Checklist
    57. System Reset Controller
      ❱
      1. Theory of Operation
      2. Design Verification
        ❱
        1. Testplan
      4. Hardware Interfaces
      5. Registers
      6. Device Interface Functions
      7. Checklist
    59. Timer
      ❱
      1. Theory of Operation
      2. Design Verification
        ❱
        1. Testplan
      4. Programmer's Guide
      5. Hardware Interfaces
      6. Registers
      7. Device Interface Functions
      8. Checklist
    61. TL-UL Bus
      ❱
      1. Design Verification
        ❱
        1. Testplan
        2. Protocol Checker
    63. UART
      ❱
      1. Theory of Operation
      2. Design Verification
        ❱
        1. Testplan
      4. Programmer's Guide
      5. Hardware Interfaces
      6. Registers
      7. Device Interface Functions
      8. Checklist
    65. USB 2.0
      ❱
      1. Theory of Operation
      2. Design Verification
        ❱
        1. Testplan
      4. Programmer's Guide
      5. Suspending and Resuming
      6. Hardware Interfaces
      7. Registers
      8. Device Interface Functions
      9. Checklist
    67. lowRISC Hardware Primitives
      ❱
      1. Flash Wrapper
      2. Keccak Permutation
      3. Linear Feedback Shift Register
      4. Packer
      5. Packer FIFO
      6. Present Scrambler
      7. Prince Scrambler
      8. SRAM Scrambler
      9. Pseudo Random Number Generator
  22. Common SystemVerilog and UVM Components
    ❱
    1. ALERT_ESC Agent
    2. Bus Params Package
    3. Comportable IP Testbench Architecture
    4. Common Interfaces
    5. CSR Utils
    6. CSRNG Agent
    7. DV Library Classes
    8. DV Utils
    9. FLASH_PHY_PRIM Agent
    10. I2C Agent
    11. JTAG Agent
    12. JTAG DMI Agent
    13. JTAG RISCV Agent
    14. KEY_SIDELOAD Agent
    15. KMAC_APP Agent
    16. Memory Backdoor Scoreboard
    17. Memory Backdoor Utility
    18. Memory Model
    19. PATTGEN Agent
    20. PUSH_PULL Agent
    21. PWM Monitor
    22. RNG Agent
    23. Scoreboard
    24. Simulation SRAM
    25. SPI Agent
    26. String Utils
    27. Test Vectors
    28. Tile Link Agent
    29. UART Agent
    30. USB20 Agent
  25. Software
  26. Introduction
  27. Build Software
    ❱
    1. External dependencies
    2. RISC-V toolchain
  29. Device Software
    ❱
    1. Build & Test Rules
      ❱
      1. Top selection
      2. FPGA Bitstreams
      3. OTP Preload Image Generator
    3. Device Libraries
      ❱
      1. DIF Library
        ❱
        1. ADC Checklist
        2. AES Checklist
        3. Alert Handler Checklist
        4. Always-On Timer Checklist
        5. Clock Manager Checklist
        6. CSRNG Checklist
        7. DMA Checklist
        8. EDN Checklist
        9. Entropy Source Checklist
        10. Flash Controller Checklist
        11. GPIO Checklist
        12. HMAC Checklist
        13. I2C Checklist
        14. Key Manager Checklist
        15. Key Manager DPE Checklist
        16. KMAC Checklist
        17. Lifecycle Checklist
        18. Mailbox Checklist
        19. OTBN Checklist
        20. OTP Controller Checklist
        21. Pattern Generator Checklist
        22. Pin Multiplexer Checklist
        23. PWM Checklist
        24. Power Manager Checklist
        25. ROM Checklist
        26. Reset Manager Checklist
        27. RV Core Ibex Checklist
        28. PLIC Checklist
        29. RV Timer Checklist
        30. Sensor Controller Checklist
        31. SPI Device Checklist
        32. SPI Host Checklist
        33. SRAM Controller Checklist
        34. System Reset Controller Checklist
        35. UART Checklist
        36. USB Checklist
      3. Top-Level Test Libraries
        ❱
        1. On-Device Test Framework
      5. OpenTitan Standard Library
        ❱
        1. Freestanding C Headers
    5. Silicon Creator Software
      ❱
      1. Manufacturing Firmware
        ❱
        1. Test Plan
      3. ROM
        ❱
        1. ROM Specification
        2. Bootstrap
        3. Memory Protection
        4. E2E tests
        5. Root Keys
        6. Signature Verification
        7. Test Plan
        8. Signoff Test Plan
        9. Shutdown Specification
      5. ROM_EXT
        ❱
        1. ROM_EXT for Silicon Validation
        2. ROM_EXT Ownership Transfer
        3. ROM_EXT Rescue Protocol
      7. Manifest Format
      8. Boot Log
    7. Top-Level Tests
      ❱
      1. Manufacturer Test Hooks
      2. Cryptotest
    9. Silicon Validation
      ❱
      1. Developer Guide
  31. Host Software
    ❱
    1. OpenTitanLib
    2. OpenTitanTool
    3. OpenTitanSession
    4. OpenTitan Certificate Generator
    5. Hardware Security Module (HSM) tool
      ❱
      1. Requirements
      2. Signing Guide
    7. TPM2 Test Server
  34. Tooling
  35. Tools Overview
  36. Design-Related Tooling
  37. dvsim
    ❱
    1. Design Document
    2. Testplanner
    3. Glossary
  39. fpvgen: Initial FPV Testbench Generation
  40. reggen & regtool: Register Generator
    ❱
    1. Setup and use of regtool
  42. ralgen: FuseSoC UVM RAL Generator
  43. uvmdvgen: Initial Testbench Auto-generation
  44. tlgen: Crossbar Generation
  45. ipgen: Generate IP Blocks from IP Templates
  46. topgen: Top Generator
  47. vendor: Vendoring In Tool
  48. i2csvg: Generate SVGs of I2C Commands
  50. Contributing
  51. Contributing
    ❱
    1. Detailed Contribution Guide
    2. Directory Structure
    3. Contributing to Documentation
      ❱
      1. An Example IP Block's Documentation
    5. Continuous Intergration
    6. Top-Level Design and Targets
    7. GitHub Notes
    8. Bazel Notes
    9. Using the Container
  53. Contributing to Hardware
    ❱
    1. Comportability
    2. Hardware Design
    3. Design Methodology
    4. Vendoring in Hardware
    5. Linting
    6. Synthesis Flow
  55. Contributing to Verification
    ❱
    1. Verification Methodology
    2. Security Countermeasure Verification Framework
    3. Assertions
  57. Contributing to Software
    ❱
    1. Device Interface Functions
    2. Writing and Building Software for OTBN
  59. Style Guides
    ❱
    1. HJSON
    2. Python
    3. C & C++
    4. Markdown
    5. RISC-V Assembly
    6. OTBN Assembly
    7. Guidance for Volatile
  61. Developing on an FPGA
    ❱
    1. Get a Board
    2. FPGA Reference Manual
    3. Debugging with an ILA
  64. Project Governance
  65. Introduction
  66. Committers
  67. RFC Process
  68. Generalized Priority Definitions
  69. Generalized Project Milestone Definitions
  70. OpenTitan Technical Committee
  71. Hardware Development Stages
  72. Signoff Checklist
  74. Security
  75. Security
  76. Cryptography Library
    ❱
    1. API Documentation
    2. Contributing
  78. Implementation Guidelines
    ❱
    1. Secure Hardware Design Guidelines
    2. Reset vs. Non-Reset Flops
  80. Logical Security Model
  81. Security Model Specification
    ❱
    1. Device Attestation
    2. Device Life Cycle
    3. Device Provisioning
    4. Firmware Update
    5. Identities and Root Keys
    6. Ownership Transfer
    7. Secure Boot
  83. Lightweight Threat Model
  85. Use Cases
  86. Use Cases
  87. Platform Integrity Module
  88. Trusted Platform Module
  89. Universal 2nd-Factor Security Key
  91. Rust for C Developers
  92. Rust for Embedded C Programmers
  94. Appendix
  95. Glossary