2. OpenTitan Introduction
  3. Introduction
    ❱
    1. Product Architecture
    2. Use Cases
      ❱
      1. Platform Integrity Module
      2. Trusted Platform Module
      3. Universal 2nd-Factor Security Key
    4. OpenTitan updates - RFCs
  5. Glossary
  6. Update this documentation
  8. OpenTitan Contributions
  9. Getting Started
    ❱
    1. Workflows
    2. Design Verification
    3. Formal Verification
    4. Building (and Testing) Software
    5. Building Documentation
    6. Using OpenOCD
    7. Tools Setup
    8. FPGA Setup
    9. Verilator Setup
    10. Installing Vivado
    11. Unofficial Guides
    12. RedHat/Fedora
  11. Contributing
    ❱
    1. Detailed Contribution Guide
    2. Directory Structure
    3. Contributing to Documentation
      ❱
      1. An Example IP Block's Documentation
    5. Continuous Integration
    6. Top-Level Design and Targets
    7. GitHub Notes
    8. Bazel Notes
    9. Using the Container
    10. Contributing to Hardware
    11. Comportability
    12. RACL
    13. Hardware Design
    14. Design Methodology
    15. Vendoring in Hardware
    16. Linting
    17. Synthesis Flow
    18. Contributing to Verification
    19. Verification Methodology
    20. Security Countermeasure Verification Framework
    21. Assertions
    22. Contributing to Software
    23. Device Interface Functions
    24. Committers
    25. RFC Process
  13. Contributor Guides
    ❱
    1. HJSON
    2. Python
    3. C & C++
    4. Markdown
    5. RISC-V Assembly
    6. OTBN Assembly
    7. Guidance for Volatile
    8. Developing on an FPGA
    9. Get a Board
    10. FPGA Reference Manual
    11. Debugging with an ILA
    12. Generalized Priority Definitions
    13. Generalized Project Milestone Definitions
    14. Hardware Development Stages
    15. Signoff Checklist
    16. Rust for Embedded C Programmers
  16. OpenTitan Hardware
  17. Introduction
  18. Earl Grey Top-Level Design
    ❱
    1. Datasheet
    2. Memory Map
    3. Design
    4. Pinout / Pinmux Tables
      ❱
      1. ASIC
      2. CW340
    6. Design Verification
      ❱
      1. Chip Testplan
    8. Alert Handler
      ❱
      1. Theory of Operation
      2. Design Verification
        ❱
        1. Testplan
      4. Programmer's Guide
      5. Interface and Registers
      6. Device Interface Functions
      7. Checklist
    10. Analog Sensor Top
      ❱
      1. Interfaces
    12. Clock Manager
      ❱
      1. Theory of Operation
      2. Design Verification
        ❱
        1. Testplan
      4. Programmer's Guide
      5. Hardware Interfaces
      6. Registers
      7. Device Interface Functions
      8. Checklist
    14. GPIO
      ❱
      1. Theory of Operation
      2. Design Verification
        ❱
        1. Testplan
      4. Programmer's Guide
      5. Hardware Interfaces
      6. Registers
      7. Device Interface Functions
      8. Checklist
    16. Ibex RISC-V Core Wrapper
      ❱
      1. Theory of Operation
      2. Boot, ROM execution and Patching
      3. Design Verification
      4. Programmer's Guide
      5. Hardware Interfaces
      6. Registers
      7. Checklist
    18. Interrupt Controller
      ❱
      1. Theory of Operation
      2. Design Verification
        ❱
        1. Testplan
      4. Programmer's Guide
      5. Interface and Registers
      6. Device Interface Functions
      7. Checklist
    20. OTP Controller
      ❱
      1. Theory of Operation
      2. Design Verification
        ❱
        1. Testplan
      4. Programmer's Guide
      5. Hardware Interfaces
      6. Registers
      7. Device Interface Functions
      8. Checklist
    22. Pinmux
      ❱
      1. Theory of Operation
      2. Design Verification
        ❱
        1. Testplan
      4. Programmer's Guide
      5. Hardware Interfaces
      6. Registers
      7. Device Interface Functions
      8. Checklist
    24. Power Management
      ❱
      1. Theory of Operation
      2. Design Verification
        ❱
        1. Testplan
      4. Programmer's Guide
      5. Hardware Interfaces
      6. Registers
      7. Device Interface Functions
      8. Checklist
    26. Reset Manager
      ❱
      1. Theory of Operation
      2. Design Verification
        ❱
        1. Testplan
      4. Programmer's Guide
      5. Hardware Interfaces
      6. Registers
      7. Device Interface Functions
      8. Checklist
    28. Sensor Control
      ❱
      1. Theory of Operation
      2. Programmer's Guide
      3. Hardware Interfaces
      4. Registers
      5. Device Interface Functions
      6. Checklist
    30. TL-UL Checklist
  20. Darjeeling Top-Level Design
    ❱
    1. Datasheet
    2. Memory Map
    3. Pinout / Pinmux Tables
      ❱
      1. ASIC
    5. AC Range Check
      ❱
      1. Theory of Operation
      2. Design Verification
        ❱
        1. Testplan
      4. Hardware Interfaces
      5. Registers
      6. Checklist
    7. Alert Handler
      ❱
      1. Theory of Operation
      2. Design Verification
        ❱
        1. Testplan
      4. Programmer's Guide
      5. Interface and Registers
      6. Device Interface Functions
      7. Checklist
    9. Clock Manager
      ❱
      1. Theory of Operation
      2. Design Verification
        ❱
        1. Testplan
      4. Programmer's Guide
      5. Hardware Interfaces
      6. Registers
      7. Device Interface Functions
      8. Checklist
    11. GPIO
      ❱
      1. Theory of Operation
      2. Design Verification
        ❱
        1. Testplan
      4. Programmer's Guide
      5. Hardware Interfaces
      6. Registers
      7. Device Interface Functions
      8. Checklist
    13. Ibex RISC-V Core Wrapper
      ❱
      1. Theory of Operation
      2. Boot, ROM execution and Patching
      3. Design Verification
      4. Programmer's Guide
      5. Hardware Interfaces
      6. Registers
      7. Checklist
    15. Interrupt Controller
      ❱
      1. Theory of Operation
      2. Design Verification
        ❱
        1. Testplan
      4. Programmer's Guide
      5. Interface and Registers
      6. Device Interface Functions
    17. OTP Controller
      ❱
      1. Theory of Operation
      2. Design Verification
        ❱
        1. Testplan
      4. Programmer's Guide
      5. Hardware Interfaces
      6. Registers
      7. Device Interface Functions
      8. Checklist
    19. Pinmux
      ❱
      1. Theory of Operation
      2. Design Verification
        ❱
        1. Testplan
      4. Programmer's Guide
      5. Hardware Interfaces
      6. Registers
      7. Device Interface Functions
      8. Checklist
    21. Power Management
      ❱
      1. Theory of Operation
      2. Design Verification
        ❱
        1. Testplan
      4. Programmer's Guide
      5. Hardware Interfaces
      6. Registers
      7. Device Interface Functions
      8. Checklist
    23. RACL Control
      ❱
      1. RACL Configuration
      2. Hardware Interfaces
      3. Registers
    25. Reset Manager
      ❱
      1. Theory of Operation
      2. Design Verification
        ❱
        1. Testplan
      4. Programmer's Guide
      5. Hardware Interfaces
      6. Registers
      7. Device Interface Functions
      8. Checklist
  22. Cores
    ❱
    1. Ibex RISC-V Core Wrapper
      ❱
      1. Theory of Operation
      2. Boot, ROM execution and Patching
      3. Design Verification
      4. Programmer's Guide
      5. Hardware Interfaces
      6. Registers
      7. Checklist
    3. OTBN
      ❱
      1. Introduction to OTBN
      2. Theory of Operation
      3. ISA Guide
      4. Design Verification
      5. Random Instruction Generator
        ❱
        1. Internals
        2. Configuration
      7. memutil wrapper
      8. OTBN Simulation Software
      9. Tracer
      10. Formal Masking Verification Using Alma
      11. Functional Coverage
      12. Developer's Guide
      13. Hardware Interfaces
      14. Registers
      15. Checklist
  24. Hardware IP Blocks
    ❱
    1. Analog to Digital Converter Control
      ❱
      1. Theory of Operation
      2. Design Verification
      3. Testplan
      4. Programmer's Guide
      5. Hardware Interfaces
      6. Registers
      7. Checklist
    3. AES
      ❱
      1. Theory of Operation
      2. Design Verification
      3. Testplan
      4. Programmer's Guide
      5. Hardware Interfaces
      6. Registers
      7. Device Interface Functions
      8. Checklist
    5. AON Timer
      ❱
      1. Theory of Operation
      2. Design Verification
      3. Testplan
      4. Programmer's Guide
      5. Hardware Interfaces
      6. Registers
      7. Device Interface Functions
      8. Checklist
    7. Ascon
      ❱
      1. Background
      2. Theory of Operation
      3. Programmer's Guide
      4. Hardware Interfaces
      5. Registers
      6. Checklist
    9. CHERIoT Memory Subsystem
      ❱
      1. Theory of Operation
      2. Design Verification
      3. Testplan
      4. Programmer's Guide
      5. Hardware Interfaces
      6. Registers
      7. Checklist
    11. CSRNG
      ❱
      1. Theory of Operation
      2. Design Verification
      3. Testplan
      4. Programmer's Guide
      5. Hardware Interfaces
      6. Registers
      7. Device Interface Functions
      8. Checklist
    13. DMA
      ❱
      1. Theory of Operation
      2. Design Verification
      3. Testplan
      4. Programmer's Guide
      5. Hardware Interfaces
      6. Registers
      7. Device Interface Functions
      8. Checklist
    15. EDN
      ❱
      1. Theory of Operation
      2. Design Verification
      3. Testplan
      4. Programmer's Guide
      5. Hardware Interfaces
      6. Registers
      7. Device Interface Functions
      8. Checklist
    17. Entropy Source
      ❱
      1. Theory of Operation
      2. Design Verification
      3. Testplan
      4. Programmer's Guide
      5. Hardware Interfaces
      6. Registers
      7. Device Interface Functions
      8. Checklist
    19. HMAC
      ❱
      1. Theory of Operation
      2. Design Verification
      3. Testplan
      4. Programmer's Guide
      5. Hardware Interfaces
      6. Registers
      7. Device Interface Functions
      8. Checklist
    21. I2C
      ❱
      1. Theory of Operation
      2. Design Verification
      3. Testplan
      4. Programmer's Guide
      5. Hardware Interfaces
      6. Registers
      7. Device Interface Functions
      8. Checklist
    23. I3C
      ❱
      1. Theory of Operation
      2. Design Parameters
      3. Integration Notes
      4. Design Verification
        ❱
        1. Testplan
      6. Programmer's Guide
      7. Hardware Interfaces
      8. Registers
      9. Device Interface Functions
      10. Checklist
    25. Key Manager
    26. Key Manager DPE
      ❱
      1. Theory of Operation
      2. Design Verification
      3. Testplan
      4. Programmer's Guide
      5. Hardware Interfaces
      6. Registers
      7. Device Interface Functions
      8. Checklist
    28. KMAC
      ❱
      1. Theory of Operation
      2. Design Verification
      3. Testplan
      4. Programmer's Guide
      5. Hardware Interfaces
      6. Registers
      7. Device Interface Functions
      8. Checklist
    30. Life Cycle Controller
      ❱
      1. Theory of Operation
      2. Design Verification
      3. Testplan
      4. Programmer's Guide
      5. Hardware Interfaces
      6. Registers
      7. Device Interface Functions
      8. Checklist
    32. Mailbox
      ❱
      1. Theory of Operation
      2. Design Verification
      3. Testplan
      4. Programmer's Guide
      5. Hardware Interfaces
      6. Registers
      7. Device Interface Functions
      8. Checklist
    34. Pattern Generator
      ❱
      1. Theory of Operation
      2. Design Verification
      3. Testplan
      4. Programmer's Guide
      5. Hardware Interfaces
      6. Registers
      7. Device Interface Functions
      8. Checklist
    36. ROM Control
      ❱
      1. Theory of Operation
      2. Design Verification
      3. Testplan
      4. Programmer's Guide
      5. Hardware Interfaces
      6. Registers
      7. Device Interface Functions
      8. Checklist
    38. RRAM Controller
      ❱
      1. Theory of Operation
      2. Testplan
      3. Programmer's Guide
      4. Hardware Interfaces
      5. Registers
      6. Device Interface Functions
      7. Checklist
    40. RRAM Macro
    41. RISC-V Debug Manager
      ❱
      1. Theory of Operation
      2. Design Verification
      3. Testplan
      4. Programmer's Guide
      5. Hardware Interfaces
      6. Registers
      7. Checklist
    43. SoC Debug Access Control
      ❱
      1. Theory of Operation
      2. Design Verification
      3. Testplan
      4. Programmer's Guide
      5. Hardware Interfaces
      6. Registers
      7. Checklist
    45. SPI Device
      ❱
      1. Theory of Operation
      2. Design Verification
      3. Testplan
      4. Programmer's Guide
      5. Hardware Interfaces
      6. Registers
      7. Device Interface Functions
      8. Checklist
    47. SPI Host
      ❱
      1. Theory of Operation
      2. Design Verification
      3. Testplan
      4. Programmer's Guide
      5. Hardware Interfaces
      6. Registers
      7. Device Interface Functions
      8. Checklist
    49. SRAM Controller
      ❱
      1. Theory of Operation
      2. Design Verification
      3. Testplan
      4. Programmer's Guide
      5. Hardware Interfaces
      6. Registers
      7. Device Interface Functions
      8. Checklist
    51. System Reset Controller
      ❱
      1. Theory of Operation
      2. Design Verification
      3. Testplan
      4. Hardware Interfaces
      5. Registers
      6. Device Interface Functions
      7. Checklist
    53. Timer
      ❱
      1. Theory of Operation
      2. Design Verification
      3. Testplan
      4. Programmer's Guide
      5. Hardware Interfaces
      6. Registers
      7. Device Interface Functions
      8. Checklist
    55. TL-UL Bus
      ❱
      1. Design Verification
      2. Testplan
      3. Protocol Checker
    57. UART
      ❱
      1. Theory of Operation
      2. Design Verification
      3. Testplan
      4. Programmer's Guide
      5. Hardware Interfaces
      6. Registers
      7. Device Interface Functions
      8. Checklist
    59. USB 2.0
      ❱
      1. Theory of Operation
      2. Design Verification
      3. Testplan
      4. Programmer's Guide
      5. Suspending and Resuming
      6. Hardware Interfaces
      7. Registers
      8. Device Interface Functions
      9. Checklist
  26. lowRISC Hardware Primitives
    ❱
    1. Flash Wrapper
    2. Keccak Permutation
    3. Linear Feedback Shift Register
    4. Packer
    5. Packer FIFO
    6. Present Scrambler
    7. Prince Scrambler
    8. Pseudo Random Number Generator
    9. SRAM Scrambler
  28. Common SystemVerilog and UVM Components
    ❱
    1. Alert agent
    2. Bus Params Package
    3. Comportable IP Testbench Architecture
    4. Common Interfaces
    5. CSR Utils
    6. CSRNG Agent
    7. DV Library Classes
    8. DV Utils
    9. Escalation agent
    10. FLASH_PHY_PRIM Agent
    11. I2C Agent
    12. JTAG Agent
    13. JTAG DMI Agent
    14. JTAG RISCV Agent
    15. KEY_SIDELOAD Agent
    16. KMAC_APP Agent
    17. Memory Backdoor Scoreboard
    18. Memory Backdoor Utility
    19. Memory Model
    20. PATTGEN Agent
    21. PUSH_PULL Agent
    22. PWM Monitor
    23. RNG Agent
    24. Scoreboard
    25. Simulation SRAM
    26. SPI Agent
    27. String Utils
    28. Test Vectors
    29. Tile Link Agent
    30. UART Agent
    31. USB20 Agent
  31. OpenTitan Security
  32. Introduction
  33. Cryptography Library
    ❱
    1. API Documentation
    2. Security Hardening
    3. Contributing
  35. Implementation Guidelines
    ❱
    1. Secure Hardware Design Guidelines
    2. Reset vs. Non-Reset Flops
  37. Logical Security Model
  38. Security Model Specification
    ❱
    1. Device Attestation
    2. Device Life Cycle
    3. Device Provisioning
    4. Firmware Update
    5. Identities and Root Keys
    6. Ownership Transfer
    7. Secure Boot
  40. Lightweight Threat Model
  41. Penetration test Framework
  43. OpenTitan Software
  44. Introduction
  45. Build Software
    ❱
    1. External dependencies
    2. RISC-V toolchain
    3. Build & Test Rules
    4. Top selection
    5. Creating a new top
    6. FPGA Bitstreams
  47. Device Software
    ❱
    1. Device Libraries
      ❱
      1. DIF Library
        ❱
        1. ADC Checklist
        2. AES Checklist
        3. Alert Handler Checklist
        4. Always-On Timer Checklist
        5. Clock Manager Checklist
        6. CSRNG Checklist
        7. DMA Checklist
        8. EDN Checklist
        9. Entropy Source Checklist
        10. Flash Controller Checklist
        11. GPIO Checklist
        12. HMAC Checklist
        13. I2C Checklist
        14. Key Manager DPE Checklist
        15. KMAC Checklist
        16. Lifecycle Checklist
        17. Mailbox Checklist
        18. OTBN Checklist
        19. OTP Controller Checklist
        20. Pattern Generator Checklist
        21. Pin Multiplexer Checklist
        22. PWM Checklist
        23. Power Manager Checklist
        24. ROM Checklist
        25. Reset Manager Checklist
        26. RV Core Ibex Checklist
        27. PLIC Checklist
        28. RV Timer Checklist
        29. Sensor Controller Checklist
        30. SPI Device Checklist
        31. SPI Host Checklist
        32. SRAM Controller Checklist
        33. System Reset Controller Checklist
        34. UART Checklist
        35. USB Checklist
      3. OpenTitan Standard Library
        ❱
        1. Freestanding C Headers
      5. Top-Level Test Libraries
    3. Silicon Creator Software
      ❱
      1. Manufacturing Firmware
        ❱
        1. Test Plan
      3. ROM
        ❱
        1. ROM Specification
        2. Bootstrap
        3. Memory Protection
        4. E2E tests
        5. Root Keys
        6. Signature Verification
        7. Test Plan
        8. Signoff Test Plan
        9. Shutdown Specification
      5. ROM_EXT
        ❱
        1. ROM_EXT for Silicon Validation
        2. ROM_EXT Ownership Transfer
        3. ROM_EXT Rescue Protocol
        4. Manifest Format
      7. Boot Log
    5. Top-Level Tests
      ❱
      1. On-Device Test Framework
      2. Manufacturer Test Hooks
      3. Cryptotest
      4. Silicon Validation
        ❱
        1. Developer Guide
  49. Host Software
    ❱
    1. OpenTitanLib
      ❱
      1. Bitbanging
    3. OpenTitanTool
    4. OpenTitanSession
    5. OpenTitan Certificate Generator
    6. Signing Guide
    7. TPM2 Test Server
  51. Tooling
    ❱
    1. Design-Related Tooling
    2. fpvgen: Initial FPV Testbench Generation
    3. reggen & regtool: Register Generator
    4. Setup and use of regtool
    5. ralgen: FuseSoC UVM RAL Generator
    6. uvmdvgen: Initial Testbench Auto-generation
    7. tlgen: Crossbar Generation
    8. ipgen: Generate IP Blocks from IP Templates
    9. topgen: Top Generator
    10. vendor: Vendoring In Tool
    11. i2csvg: Generate SVGs of I2C Commands
    12. dtgen: Generate Device Tables