Ibex Processor Core Checklist
This checklist is for Hardware Stage transitions for the Ibex Processor Core. All checklist items refer to the content in the Checklist.
Design Checklist
D1
| Type | Item | Resolution | Note/Collaterals |
|---|---|---|---|
| Documentation | SPEC_COMPLETE | Done | RV_CORE_IBEX Design Spec |
| Documentation | CSR_DEFINED | Done | Registers |
| RTL | CLKRST_CONNECTED | Done | |
| RTL | IP_TOP | Done | rv_core_ibex.sv |
| RTL | IP_INSTANTIABLE | Done | Elaborates cleanly in EarlGrey |
| RTL | PHYSICAL_MACROS_DEFINED_80 | Done | ICache SRAMs via prim_ram_1p |
| RTL | FUNC_IMPLEMENTED | Done | |
| RTL | ASSERT_KNOWN_ADDED | Done | |
| Code Quality | LINT_SETUP | Done | |
| Security | SEC_CM_SCOPED | Done | Security countermeasures |
D2
| Type | Item | Resolution | Note/Collaterals |
|---|---|---|---|
| Documentation | NEW_FEATURES | Not Started | |
| Documentation | BLOCK_DIAGRAM | Not Started | |
| Documentation | DOC_INTERFACE | Not Started | |
| Documentation | DOC_INTEGRATION_D2 | Not Started | |
| Documentation | MISSING_FUNC | Not Started | |
| Documentation | FEATURE_FROZEN | Not Started | |
| RTL | FEATURE_COMPLETE | Not Started | |
| RTL | PORT_FROZEN | Not Started | |
| RTL | ARCHITECTURE_FROZEN | Not Started | |
| RTL | REVIEW_TODO | Not Started | |
| RTL | STYLE_X | Not Started | |
| RTL | CDC_SYNCMACRO | Not Started | |
| Code Quality | LINT_PASS | Not Started | |
| Code Quality | CDC_SETUP | Not Started | |
| Code Quality | RDC_SETUP | Not Started | |
| Code Quality | AREA_CHECK | Not Started | |
| Code Quality | TIMING_CHECK | Not Started | |
| Security | SEC_CM_DOCUMENTED | Not Started |
D2S
| Type | Item | Resolution | Note/Collaterals |
|---|---|---|---|
| Security | SEC_CM_ASSETS_LISTED | Not Started | |
| Security | SEC_CM_IMPLEMENTED | Not Started | |
| Security | SEC_CM_RND_CNST | Not Started | |
| Security | SEC_CM_NON_RESET_FLOPS | Not Started | |
| Security | SEC_CM_SHADOW_REGS | Not Started | |
| Security | SEC_CM_RTL_REVIEWED | Not Started | |
| Security | SEC_CM_COUNCIL_REVIEWED | Not Started |
D3
| Type | Item | Resolution | Note/Collaterals |
|---|---|---|---|
| Documentation | NEW_FEATURES_D3 | Not Started | |
| Documentation | DOC_INTEGRATION_D3 | Not Started | |
| RTL | TODO_COMPLETE | Not Started | |
| Code Quality | LINT_COMPLETE | Not Started | |
| Code Quality | CDC_COMPLETE | Not Started | |
| Code Quality | RDC_COMPLETE | Not Started | |
| Review | REVIEW_RTL | Not Started | |
| Review | REVIEW_DELETED_FF | Not Started | |
| Review | REVIEW_SW_CHANGE | Not Started | |
| Review | REVIEW_SW_ERRATA | Not Started | |
| Review | Reviewer(s) | Not Started | |
| Review | Signoff date | Not Started |
Verification Checklist
Ibex verification is tracked in the Ibex documentation. Ibex is at V0.
The verification checklist for the previously taped-out Ibex version (verification stage V2S, v2.1.0) used in Earl Grey v1.0.0 can be found in the Ibex documentation tagged earlgrey_1.0.0.
Features specific to rv_core_ibex do not have block-level verification. Top-level testing suffices for these, see the rv_core_ibex DV document for more details.
V1
The V1 checklist may be found in the Ibex documentation.
V2
The V2 checklist may be found in the Ibex documentation.
V2S
The V2S checklist may be found in the Ibex documentation.
V3
The V3 checklist may be found in the Ibex documentation.