Hardware Interfaces

Referring to the Comportable guideline for peripheral device functionality, the module sysrst_ctrl has the following hardware interfaces defined

  • Primary Clock: clk_i
  • Other Clocks: clk_aon_i
  • Bus Device Interfaces (TL-UL): tl
  • Bus Host Interfaces (TL-UL): none

Peripheral Pins for Chip IO

Pin nameDirectionDescription
ac_presentinputA/C power is present
key0_ininputVolUp button in tablet; column output from the EC in a laptop
key1_ininputVolDown button in tablet; row input from keyboard matrix in a laptop
key2_ininputTBD button in tablet; row input from keyboard matrix in a laptop
pwrb_ininputPower button in both tablet and laptop
lid_openinputLid is open
bat_disableoutputBattery is disconnected
key0_outoutputPassthrough from key0_in, can be configured to invert
key1_outoutputPassthrough from key1_in, can be configured to invert
key2_outoutputPassthrough from key2_in, can be configured to invert
pwrb_outoutputPassthrough from pwrb_in, can be configured to invert
z3_wakeupoutputTo enter Z3 mode and exit from Z4 sleep mode
ec_rst_linoutec_rst_l as an inout to/from the open drain IO
flash_wp_linoutflash_wp_l as an inout to/from the open drain IO

Inter-Module Signals

Port NamePackage::StructTypeActWidthDescription
wkup_reqlogicunireq1
rst_reqlogicunireq1
tltlul_pkg::tlreq_rsprsp1

Interrupts

Interrupt NameTypeDescription
event_detectedStatusCommon interrupt triggered by combo or keyboard events.

Security Alerts

Alert NameDescription
fatal_faultThis fatal alert is triggered when a fatal TL-UL bus integrity fault is detected.

Security Countermeasures

Countermeasure IDDescription
SYSRST_CTRL.BUS.INTEGRITYEnd-to-end bus integrity scheme.