KEYMGR Checklist
This checklist is for Hardware Stage transitions for the KEYMGR_DPE peripheral. All checklist items refer to the content in the Checklist.
Design Checklist
D1
Type | Item | Resolution | Note/Collaterals |
---|---|---|---|
Documentation | SPEC_COMPLETE | WIP | KEYMGR_DPE Design Spec |
Documentation | CSR_DEFINED | Done | |
RTL | CLKRST_CONNECTED | Done | |
RTL | IP_TOP | Done | |
RTL | IP_INSTANTIABLE | WIP | |
RTL | PHYSICAL_MACROS_DEFINED_80 | Not Started | |
RTL | FUNC_IMPLEMENTED | WIP | |
RTL | ASSERT_KNOWN_ADDED | Not Started | |
Code Quality | LINT_SETUP | Not Started | |
Security | SEC_CM_SCOPED | Not Started |
D2
Type | Item | Resolution | Note/Collaterals |
---|---|---|---|
Documentation | NEW_FEATURES | Not Started | |
Documentation | BLOCK_DIAGRAM | Not Started | |
Documentation | DOC_INTERFACE | Not Started | |
Documentation | DOC_INTEGRATION_GUIDE | Not Started | |
Documentation | MISSING_FUNC | Not Started | |
Documentation | FEATURE_FROZEN | Not Started | |
RTL | FEATURE_COMPLETE | Not Started | |
RTL | PORT_FROZEN | Not Started | |
RTL | ARCHITECTURE_FROZEN | Not Started | |
RTL | REVIEW_TODO | Not Started | |
RTL | STYLE_X | Not Started | |
RTL | CDC_SYNCMACRO | Not Started | |
Code Quality | LINT_PASS | Not Started | |
Code Quality | CDC_SETUP | Not Started | |
Code Quality | RDC_SETUP | Not Started | |
Code Quality | AREA_CHECK | Not Started | |
Code Quality | TIMING_CHECK | Not Started | |
Security | SEC_CM_DOCUMENTED | Not Started |
D2S
Type | Item | Resolution | Note/Collaterals |
---|---|---|---|
Security | SEC_CM_ASSETS_LISTED | Not Started | |
Security | SEC_CM_IMPLEMENTED | Not Started | |
Security | SEC_CM_RND_CNST | Not Started | |
Security | SEC_CM_NON_RESET_FLOPS | Not Started | |
Security | SEC_CM_SHADOW_REGS | Not Started | |
Security | SEC_CM_RTL_REVIEWED | Not Started | |
Security | SEC_CM_COUNCIL_REVIEWED | Not Started |
D3
Type | Item | Resolution | Note/Collaterals |
---|---|---|---|
Documentation | NEW_FEATURES_D3 | Not Started | |
RTL | TODO_COMPLETE | Not Started | |
Code Quality | LINT_COMPLETE | Not Started | |
Code Quality | CDC_COMPLETE | Not Started | |
Code Quality | RDC_COMPLETE | Not Started | |
Review | REVIEW_RTL | Not Started | |
Review | REVIEW_DELETED_FF | Not Started | |
Review | REVIEW_SW_CHANGE | Not Started | |
Review | REVIEW_SW_ERRATA | Not Started | |
Review | Reviewer(s) | Not Started | |
Review | Signoff date | Not Started |
Verification Checklist
V1
Type | Item | Resolution | Note/Collaterals |
---|---|---|---|
Documentation | DV_DOC_DRAFT_COMPLETED | Not Started | |
Documentation | TESTPLAN_COMPLETED | Not Started | |
Testbench | TB_TOP_CREATED | Not Started | |
Testbench | PRELIMINARY_ASSERTION_CHECKS_ADDED | Not Started | |
Testbench | SIM_TB_ENV_CREATED | Not Started | |
Testbench | SIM_RAL_MODEL_GEN_AUTOMATED | Not Started | |
Testbench | CSR_CHECK_GEN_AUTOMATED | Not Started | |
Testbench | TB_GEN_AUTOMATED | Not Started | |
Tests | SIM_SMOKE_TEST_PASSING | Not Started | |
Tests | SIM_CSR_MEM_TEST_SUITE_PASSING | Not Started | |
Tests | FPV_MAIN_ASSERTIONS_PROVEN | Not Started | |
Tool Setup | SIM_ALT_TOOL_SETUP | Not Started | |
Regression | SIM_SMOKE_REGRESSION_SETUP | Not Started | |
Regression | SIM_NIGHTLY_REGRESSION_SETUP | Not Started | |
Regression | FPV_REGRESSION_SETUP | Not Started | |
Coverage | SIM_COVERAGE_MODEL_ADDED | Not Started | |
Code Quality | TB_LINT_SETUP | Not Started | |
Integration | PRE_VERIFIED_SUB_MODULES_V1 | Not Started | |
Review | DESIGN_SPEC_REVIEWED | Not Started | |
Review | TESTPLAN_REVIEWED | Not Started | |
Review | STD_TEST_CATEGORIES_PLANNED | Not Started | |
Review | V2_CHECKLIST_SCOPED | Not Started |
V2
Type | Item | Resolution | Note/Collaterals |
---|---|---|---|
Documentation | DESIGN_DELTAS_CAPTURED_V2 | Not Started | |
Documentation | DV_DOC_COMPLETED | Not Started | |
Testbench | FUNCTIONAL_COVERAGE_IMPLEMENTED | Not Started | |
Testbench | ALL_INTERFACES_EXERCISED | Not Started | |
Testbench | ALL_ASSERTION_CHECKS_ADDED | Not Started | |
Testbench | SIM_TB_ENV_COMPLETED | Not Started | |
Tests | SIM_ALL_TESTS_PASSING | Not Started | |
Tests | FPV_ALL_ASSERTIONS_WRITTEN | Not Started | |
Tests | FPV_ALL_ASSUMPTIONS_REVIEWED | Not Started | |
Tests | SIM_FW_SIMULATED | Not Started | |
Regression | SIM_NIGHTLY_REGRESSION_V2 | Not Started | |
Coverage | SIM_CODE_COVERAGE_V2 | Not Started | |
Coverage | SIM_FUNCTIONAL_COVERAGE_V2 | Not Started | |
Coverage | FPV_CODE_COVERAGE_V2 | Not Started | |
Coverage | FPV_COI_COVERAGE_V2 | Not Started | |
Integration | PRE_VERIFIED_SUB_MODULES_V2 | Not Started | |
Issues | NO_HIGH_PRIORITY_ISSUES_PENDING | Not Started | |
Issues | ALL_LOW_PRIORITY_ISSUES_ROOT_CAUSED | Not Started | |
Review | DV_DOC_TESTPLAN_REVIEWED | Not Started | |
Review | V3_CHECKLIST_SCOPED | Not Started |
V2S
Type | Item | Resolution | Note/Collaterals |
---|---|---|---|
Documentation | SEC_CM_TESTPLAN_COMPLETED | Not Started | |
Tests | FPV_SEC_CM_VERIFIED | Not Started | |
Tests | SIM_SEC_CM_VERIFIED | Not Started | |
Coverage | SIM_COVERAGE_REVIEWED | Not Started | |
Review | SEC_CM_DV_REVIEWED | Not Started |
V3
Type | Item | Resolution | Note/Collaterals |
---|---|---|---|
Documentation | DESIGN_DELTAS_CAPTURED_V3 | Not Started | |
Tests | X_PROP_ANALYSIS_COMPLETED | Not Started | |
Tests | FPV_ASSERTIONS_PROVEN_AT_V3 | Not Started | |
Regression | SIM_NIGHTLY_REGRESSION_AT_V3 | Not Started | |
Coverage | SIM_CODE_COVERAGE_AT_100 | Not Started | |
Coverage | SIM_FUNCTIONAL_COVERAGE_AT_100 | Not Started | |
Coverage | FPV_CODE_COVERAGE_AT_100 | Not Started | |
Coverage | FPV_COI_COVERAGE_AT_100 | Not Started | |
Code Quality | ALL_TODOS_RESOLVED | Not Started | |
Code Quality | NO_TOOL_WARNINGS_THROWN | Not Started | |
Code Quality | TB_LINT_COMPLETE | Not Started | |
Integration | PRE_VERIFIED_SUB_MODULES_V3 | Not Started | |
Issues | NO_ISSUES_PENDING | Not Started | |
Review | Reviewer(s) | Not Started | |
Review | Signoff date | Not Started |