Hardware Interfaces

Referring to the Comportable guideline for peripheral device functionality, the module spi_host has the following hardware interfaces defined

  • Primary Clock: clk_i
  • Other Clocks: none
  • Bus Device Interfaces (TL-UL): tl
  • Bus Host Interfaces (TL-UL): none

Peripheral Pins for Chip IO

Pin nameDirectionDescription
sckoutputSPI Clock
csboutputChip Select# (One hot, active low). The size of this port should match NumCS.
sd[3:0]inoutSPI data bus

Inter-Module Signals

Port NamePackage::StructTypeActWidthDescription


Interrupt NameTypeDescription
errorEventError-related interrupts, see ERROR_ENABLE register for more information.
spi_eventStatusEvent-related interrupts, see EVENT_ENABLE register for more information.

Security Alerts

Alert NameDescription
fatal_faultThis fatal alert is triggered when a fatal TL-UL bus integrity fault is detected.

Security Countermeasures

Countermeasure IDDescription
SPI_HOST.BUS.INTEGRITYEnd-to-end bus integrity scheme.