Registers

Summary

INTR_STATE

Interrupt State Register

• Offset: 0x0
• Reset default: 0x0
• Reset mask: 0x1

Fields

{"reg": [{"name": "deny_cnt_reached", "bits": 1, "attr": ["rw1c"], "rotate": -90}, {"bits": 31}], "config": {"lanes": 1, "fontsize": 10, "vspace": 180}}

INTR_ENABLE

Interrupt Enable Register

• Offset: 0x4
• Reset default: 0x0
• Reset mask: 0x1

Fields

{"reg": [{"name": "deny_cnt_reached", "bits": 1, "attr": ["rw"], "rotate": -90}, {"bits": 31}], "config": {"lanes": 1, "fontsize": 10, "vspace": 180}}

INTR_TEST

Interrupt Test Register

• Offset: 0x8
• Reset default: 0x0
• Reset mask: 0x1

Fields

{"reg": [{"name": "deny_cnt_reached", "bits": 1, "attr": ["wo"], "rotate": -90}, {"bits": 31}], "config": {"lanes": 1, "fontsize": 10, "vspace": 180}}

ALERT_TEST

Alert Test Register

• Offset: 0xc
• Reset default: 0x0
• Reset mask: 0x3

Fields

{"reg": [{"name": "recov_ctrl_update_err", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "fatal_fault", "bits": 1, "attr": ["wo"], "rotate": -90}, {"bits": 30}], "config": {"lanes": 1, "fontsize": 10, "vspace": 230}}

ALERT_STATUS

Status of hardware alerts.

• Offset: 0x10
• Reset default: 0x0
• Reset mask: 0xf

Fields

{"reg": [{"name": "SHADOWED_UPDATE_ERR", "bits": 1, "attr": ["rc"], "rotate": -90}, {"name": "SHADOWED_STORAGE_ERR", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "REG_INTG_ERR", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "COUNTER_ERR", "bits": 1, "attr": ["ro"], "rotate": -90}, {"bits": 28}], "config": {"lanes": 1, "fontsize": 10, "vspace": 220}}

LOG_CONFIG

• Offset: 0x14
• Reset default: 0x0
• Reset mask: 0x3ff

Fields

{"reg": [{"name": "log_enable", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "log_clear", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "deny_cnt_threshold", "bits": 8, "attr": ["rw"], "rotate": -90}, {"bits": 22}], "config": {"lanes": 1, "fontsize": 10, "vspace": 200}}

LOG_STATUS

The LOG_STATUS register stores the number of denied accesses and gives more detailed diagnostics to the first denied request. All fields of LOG_STATUS (other than deny_cnt) are only valid if deny_cnt > 0.

• Offset: 0x18
• Reset default: 0x0
• Reset mask: 0xfffffff

Fields

{"reg": [{"name": "deny_cnt", "bits": 8, "attr": ["ro"], "rotate": 0}, {"name": "denied_read_access", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "denied_write_access", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "denied_execute_access", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "denied_no_match", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "denied_racl_read", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "denied_racl_write", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "denied_source_role", "bits": 4, "attr": ["ro"], "rotate": -90}, {"name": "denied_ctn_uid", "bits": 5, "attr": ["ro"], "rotate": -90}, {"name": "deny_range_index", "bits": 5, "attr": ["ro"], "rotate": -90}, {"bits": 4}], "config": {"lanes": 1, "fontsize": 10, "vspace": 230}}

LOG_ADDRESS

First denied request address (if logging is enabled) gets written into that register.

• Offset: 0x1c
• Reset default: 0x0
• Reset mask: 0xffffffff

Fields

{"reg": [{"name": "log_address", "bits": 32, "attr": ["ro"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}}

RANGE_REGWEN

This register exists per range and provides a regwen signal for the RANGE_BASE_x, RANGE_LIMIT_x, RANGE_ATTR_x, and RANGE_RACL_POLICY_SHADOWED_x register. When cleared to Mubi4::False, the corresponding range configuration registers are locked and cannot be changed until the next reset.

• Reset default: 0x6
• Reset mask: 0xf

Instances

Fields

{"reg": [{"name": "regwen", "bits": 4, "attr": ["rw0c"], "rotate": 0}, {"bits": 28}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}}

RANGE_BASE

Base address for the range check. The range base register exists per range and holds the base address for the range check. The minimum granularity of the range is 4 bytes. Therefore, the lowest 2 bits of the 32-bit base and limit registers are tied to zero.

• Reset default: 0x0
• Reset mask: 0xfffffffc
• Register enable: RANGE_REGWEN

Instances

Fields

{"reg": [{"bits": 2}, {"name": "base", "bits": 30, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}}

RANGE_LIMIT

The (exclusive) limit address register used for the address matching.

• Reset default: 0x0
• Reset mask: 0xfffffffc
• Register enable: RANGE_REGWEN

Instances

Fields

{"reg": [{"bits": 2}, {"name": "limit", "bits": 30, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}}

RANGE_ATTR

Attributes of the range. This register exists per range and determines attributes (including permissions) of the particular range. A range and its attributes are only considered if its enable field in this register is not set to Mubi4::False.

• Reset default: 0x69999
• Reset mask: 0xfffff
• Register enable: RANGE_REGWEN

Instances

Fields

{"reg": [{"name": "enable", "bits": 4, "attr": ["rw"], "rotate": 0}, {"name": "read_access", "bits": 4, "attr": ["rw"], "rotate": -90}, {"name": "write_access", "bits": 4, "attr": ["rw"], "rotate": -90}, {"name": "execute_access", "bits": 4, "attr": ["rw"], "rotate": -90}, {"name": "log_denied_access", "bits": 4, "attr": ["rw"], "rotate": -90}, {"bits": 12}], "config": {"lanes": 1, "fontsize": 10, "vspace": 190}}

RANGE_RACL_POLICY_SHADOWED

The RACL policy register allows the system to further restrict the access to specific source roles. The default value for both the read and write permission bitmaps is to deny access for all roles. This register is protected against fault attacks by using a shadow register implementation.

• Reset default: 0x0
• Reset mask: 0xffffffff
• Register enable: RANGE_REGWEN

Instances

Fields

{"reg": [{"name": "read_perm", "bits": 16, "attr": ["rw"], "rotate": 0}, {"name": "write_perm", "bits": 16, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}}