Hardware Interfaces

Referring to the Comportable guideline for peripheral device functionality, the module racl_ctrl has the following hardware interfaces defined

  • Primary Clock: clk_i
  • Other Clocks: none
  • Bus Device Interfaces (TL-UL): tl
  • Bus Host Interfaces (TL-UL): none
  • Peripheral Pins for Chip IO: none

Inter-Module Signals

Port NamePackage::StructTypeActWidthDescription
racl_policiestop_racl_pkg::racl_policy_vecunireq1Policy vector distributed to the subscribing RACL IPs.
racl_errortop_racl_pkg::racl_error_logunircvNumSubscribingIpsError log information from all IPs. Only one IP can raise an error at a time.
racl_error_externaltop_racl_pkg::racl_error_logunircvNumExternalSubscribingIpsError log information from all external IPs. Only one IP can raise an error at a time.
tltlul_pkg::tlreq_rsprsp1

Interrupts

Interrupt NameTypeDescription
racl_errorStatusRACL error has occurred.

Security Alerts

Alert NameDescription
fatal_faultThis fatal alert is triggered when a fatal TL-UL bus integrity fault is detected.
recov_ctrl_update_errThis recoverable alert is triggered upon detecting an update error in the shadowed Control Register.

Security Countermeasures

Countermeasure IDDescription
RACL_CTRL.BUS.INTEGRITYEnd-to-end bus integrity scheme.
RACL_CTRL.RACL_POLICY.CONFIG.SHADOWRACL policy registers are shadowed.