Testplan

Testpoints

Stage V1 Testpoints

`InSel0_A`

Test: pinmux_assert

When register periph_insel is set to 0, which means the selected input is constant zero, the corresponding mio_to_periph_o must be 0.

`InSel1_A`

Test: pinmux_assert

When register periph_insel is set to 1, which means the selected input is constant one, the corresponding mio_to_periph_o must be 1.

When register periph_insel is set to any value between 2 and (2 + number of MioPads) and the select index is not jtag, the corresponding mio_to_periph_o must be equal to the related mio_in_i value.

`InSelOOB_A`

Test: pinmux_assert

When register periph_insel is set to any value larger than (2 + number of MioPads), the corresponding mio_to_periph_o must be 0.

`DioInSelN_A`

Test: pinmux_assert

This assertion checks that dio_to_periph_o is directly connected to dio_in_i.

`OutSel0_A`

Test: pinmux_assert

When register mio_outsel is set to 0 and is not in sleep mode or jtag, which means the selected output is constant zero, the corresponding mio_out_o must be 0.

`OutSel1_A`

Test: pinmux_assert

When register mio_outsel is set to 1 and is not in sleep mode or jtag, which means the selected output is constant one, the corresponding mio_out_o must be 1.

`OutSel2_A`

Test: pinmux_assert

When register mio_outsel is set to 2 and is not in sleep mode or jtag, which means the selected output is driving high-Z, the corresponding mio_out_o must be 0.

`OutSelN_A`

Test: pinmux_assert

When register mio_outsel is set to any value between 3 and (3 + Number of periph out) and is not in sleep mode or jtag, the corresponding mio_out_o must be equal to the related periph_to_mio_i value.

`OutSelOOB_A`

Test: pinmux_assert

When register mio_outsel is set to any value larger than (3 + Number of periph out) and is not in sleep mode, the corresponding mio_out_o must be 0.

`OutSelOe0_A`

Test: pinmux_assert

When register mio_outsel is set to 0 and is not in sleep mode or jtag, the corresponding mio_oe_o must be 1.

`OutSelOe1_A`

Test: pinmux_assert

When register mio_outsel is set to 1 and is not in sleep mode or jtag, the corresponding mio_oe_o must be 1.

`OutSelOe2_A`

Test: pinmux_assert

When register mio_outsel is set to 2 and is not in sleep mode or jtag, which indicates driving high-Z to the selected output, the corresponding mio_oe_o must be 0.

`OutSelOeN_A`

Test: pinmux_assert

When register mio_outsel is set to any value between 3 and (3 + Number of periph out) and is not in sleep mode or jtag, the corresponding mio_oe_o must be equal to the related periph_to_mio_oe_i value.

`OutSelOeOOB_A`

Test: pinmux_assert

When register mio_outsel is set to any value larger than (3 + Number of periph out) and is not in sleep mode, the corresponding mio_oe_o must be 0.

`MioSleepMode0_A`

Test: pinmux_assert

At posedge of sleep_en_i, if register mio_pad_sleep_en is 1 and mio_pad_sleep_mode is 0, which means the pad is driven zero in deep sleep mode. If, in the meantime, register mio_pad_sleep_status is not written via TLUL interface to clear the sleep status, the corresponding mio_out_o must be 0.

`MioSleepMode1_A`

Test: pinmux_assert

At posedge of sleep_en_i, if register mio_pad_sleep_en is 1 and mio_pad_sleep_mode is 1, which means the pad is driven one in deep sleep mode. In the meantime, if register mio_pad_sleep_status is not written via TLUL interface to clear the sleep status, the corresponding mio_out_o must be 1.

`MioSleepMode2_A`

Test: pinmux_assert

At posedge of sleep_en_i, if register mio_pad_sleep_en is 1 and mio_pad_sleep_mode is 2, which means the pad is driven high-Z in deep sleep mode. In the meantime, if register mio_pad_sleep_status is not written via TLUL interface to clear the sleep status, the corresponding mio_out_o must be 0.

`MioSleepMode3_A`

Test: pinmux_assert

At posedge of sleep_en_i, if register mio_pad_sleep_en is 1 and mio_pad_sleep_mode is 3, which means the pad keeps last driven value in deep sleep mode. In the meantime, if register mio_pad_sleep_status is not written via TLUL interface to clear the sleep status, the corresponding mio_out_o should be stable.

`MioSleepStable_A`

Test: pinmux_assert

If not at posedge of sleep_en_i, and in the meantime register mio_pad_sleep_status is not written via TLUL interface to clear the sleep status, the corresponding mio_out_o should be stable.

`MioOeSleepMode0_A`

Test: pinmux_assert

At posedge of sleep_en_i, if register mio_pad_sleep_en is 1 and mio_pad_sleep_mode is 0, which means the pad is driven zero in deep sleep mode. In the meantime, if register mio_pad_sleep_status is not written via TLUL interface to clear the sleep status, the corresponding mio_oe_o must be 1.

`MioOeSleepMode1_A`

Test: pinmux_assert

`MioOeSleepMode2_A`

Test: pinmux_assert

`MioOeSleepMode3_A`

Test: pinmux_assert

`MioOeSleepStable_A`

Test: pinmux_assert

If not at posedge of sleep_en_i, and in the meantime, if register mio_pad_sleep_status is not written via TLUL interface to clear the sleep status, the corresponding mio_oe_o should be stable.

`DOutSelN_A`

Test: pinmux_assert

dio_out_o is connected to periph_to_dio_i if not in sleep mode.

`DOutSelOeN_A`

Test: pinmux_assert

dio_oe_o is connected to periph_to_dio_oe_i if not in sleep mode.

`DioSleepMode0_A`

Test: pinmux_assert

At posedge of sleep_en_i, if register dio_pad_sleep_en is 1 and dio_pad_sleep_mode is 0, which means the pad is driven zero in deep sleep mode. In the meantime, if register dio_pad_sleep_status is not written via TLUL interface to clear the sleep status, the corresponding dio_out_o must be 0.

`DioSleepMode1_A`

Test: pinmux_assert

At posedge of sleep_en_i, if register dio_pad_sleep_en is 1 and dio_pad_sleep_mode is 1, which means the pad is driven one in deep sleep mode. In the meantime, if register dmio_pad_sleep_status is not written via TLUL interface to clear the sleep status, the corresponding dio_out_o must be 1.

`DioSleepMode2_A`

Test: pinmux_assert

At posedge of sleep_en_i, if register dio_pad_sleep_en is 1 and dio_pad_sleep_mode is 2, which means the pad is driven high-Z in deep sleep mode. In the meantime, if register dio_pad_sleep_status is not written via TLUL interface to clear the sleep status, the corresponding dio_out_o must be 0.

`DioSleepMode3_A`

Test: pinmux_assert

At posedge of sleep_en_i, if register dio_pad_sleep_en is 1 and dio_pad_sleep_mode is 3, which means the pad keeps last driven value in deep sleep mode. In the meantime, if register dio_pad_sleep_status is not written via TLUL interface to clear the sleep status, the corresponding dio_out_o should be stable.

`DioSleepStable_A`

Test: pinmux_assert

If not at posedge of sleep_en_i, and in the meantime, if register dio_pad_sleep_status is not written via TLUL interface to clear the sleep status, the corresponding dio_out_o should be stable.

`DioOeSleepMode0_A`

Test: pinmux_assert

`DioOeSleepMode1_A`

Test: pinmux_assert

At posedge of sleep_en_i, if register dio_pad_sleep_en is 1 and dio_pad_sleep_mode is 1, which means the pad is driven one in deep sleep mode. In the meantime, if register dio_pad_sleep_status is not written via TLUL interface to clear the sleep status, the corresponding dio_oe_o must be 1.

`DioOeSleepMode2_A`

Test: pinmux_assert

`DioOeSleepMode3_A`

Test: pinmux_assert

`DioOeSleepStable_A`

Test: pinmux_assert

If not at posedge of sleep_en_i, and in the meantime, if register dio_pad_sleep_status is not written via TLUL interface to clear the sleep status, the corresponding dio_oe_o should be stable.

`MioAttrO_A`

Test: pinmux_assert

mio_attr_o should be equal to corresponding mio_pad_attr register value and TargetCfg’s mio_pad_type configuration.

`MioJtagAttrO_A`

Test: pinmux_assert

If jtag is enabled, the jtag mio_attr_o index should be equal to 0.

`DioAttrO_A`

Test: pinmux_assert

dio_attr_o should be equal to corresponding dio_pad_attr register value and TargetCfg’s dio_pad_type configuration.

`WkupPosedge_A`

Test: pinmux_assert

When register wkup_detector_en is set to 1 and wkup_detector.mode is set to 0, which means rising edge is used to detect wakeup. If variable final_pin_val is at posedge then wkup_cause register’s de attribute should be set to 1.

`WkupNegedge_A`

Test: pinmux_assert

When register wkup_detector_en is set to 1 and wkup_detector.mode is set to 1, which means falling edge is used to detect wakeup. If variable final_pin_val is at negedge, then wkup_cause register’s de attribute should be set to 1.

`WkupEdge_A`

Test: pinmux_assert

When register wkup_detector_en is set to 1 and wkup_detector.mode is set to 2, which means either rising or falling edge is used to detect wakeup. If variable final_pin_val is at posedge or negedge, then wkup_cause register’s de attribute should be set to 1.

`WkupTimedHigh_A`

Test: pinmux_assert

When register wkup_detector_en is set to 1 and wkup_detector.mode is set to 3, which means postive pulse cycles are used to detect wakeup. If variable final_pin_val stays high longer than the threshold, then wkup_cause register’s de attribute should be set to 1.

`WkupTimedLow_A`

Test: pinmux_assert

When register wkup_detector_en is set to 1 and wkup_detector.mode is set to 4, which means negative pulse cycles are used to detect wakeup. If variable final_pin_val stays low longer than the threshold, then wkup_cause register’s de attribute should be set to 1.

`WkupCauseQ_A`

Test: pinmux_assert

When wkup_cause register’s de attribute is set to 1 and user is not writing to wkup_cause at the same cycle, then wkup_cause.q should be set to 1.

`AonWkupO_A`

Test: pinmux_assert

When register wkup_cause is 1, pin_wkup_req_o should also be 1. pin_wkup_req_o is 0 only when all wkup_cause registers are 0.

`LcJtagWoScanmode_A`

Test: pinmux_assert

Not in scanmode, when tap_strap select LC_tap, lc_jtag_o must be equal to the corresponding mio_in_i pins based on the TargetCfg configuration.

`LcJtagWScanmode_A`

Test: pinmux_assert

In scanmode, when tap_strap select LC_tap, lc_jtag_o must be equal to the corresponding mio_in_i pins based on the TargetCfg configuration except the jtag_trst pin, which must be equal to rst_ni.

`LcJtagODefault_A`

Test: pinmux_assert

lc_jtag_o should stay 0 if tap_strap did not select LC_tap.

`RvJtagWoScanmode_A`

Test: pinmux_assert

Not in scanmode, when tap_strap select RV_tap and lc_hw_debug_en_i input is On for the past two clock cycles due to the synchronizer, then rv_jtag_o must be equal to the corresponding mio_in_i pins based on the TargetCfg configuration.

`RvJtagWScanmode_A`

Test: pinmux_assert

In scanmode, When tap_strap select RV_tap and lc_hw_debug_en_i is On for the past two clock cycles due to the synchronizer, then rv_jtag_o must be equal to the corresponding mio_in_i pins based on the TargetCfg configuration except the jtag_trst pin, which must be equal to rst_ni.

`RvJtagODefault_A`

Test: pinmux_assert

rv_jtag_o should stay 0 if tap_strap did not select RV_tap or lc_hw_debug_en_i input is Off for the past two clock cycles due to the synchronizer.

`DftJtagWoScanmode_A`

Test: pinmux_assert

Not in scanmode, when tap_strap select DFT_tap and lc_dft_en_i is On for the past two clock cycles due to the synchronizer, lc_jtag_o must be equal to the corresponding mio_in_i pins based on the TargetCfg configuration.

`DftJtagWScanmode_A`

Test: pinmux_assert

In scanmode, when tap_strap select DFT_tap and lc_dft_en_i is On for the past two clock cycles due to the synchronizer, lc_jtag_o must be equal to the corresponding mio_in_i pins based on the TargetCfg configuration except the jtag_trst pin, which must be equal to rst_ni.

`DftJtagODefault_A`

Test: pinmux_assert

dft_jtag_o should stay 0 if tap_strap did not select DFT_tap or the lc_dft_en_i input is Off for the past two clock cycles due to the synchronizer.

`TapStrap_A`

Test: pinmux_assert

If dft_hold_tap_sel_i is 0 and lc_dft_en_i is On for the past two clock cycles due to the synchronizer, or strap_en_i is 1. And in the meantime, if lc_hw_debug_en_i is On for the past two clock cycles due to the synchronizer, then tap_strap must be equal to the past value of corresponding mio_in_i.

`TapStrap0_A`

Test: pinmux_assert

If dft_hold_tap_sel_i is 0 and lc_dft_en_i is On for the past two clock cycles due to the synchronizer, or strap_en_i is 1. Then tap_strap[0] must be equal to the past value of corresponding mio_in_i.

`LcJtagI_A`

Test: pinmux_assert

When Lc tap is selected, the corresponding mio_out_o and mio_out_oe should be equal to lc_jtag_i.

`RvJtagI_A`

Test: pinmux_assert

When Rv tap is selected and lc_hw_debug_en_i is On for the past two clock cycles due to the synchronizer, the corresponding mio_out_o and mio_out_oe should be equal to rv_jtag_i.

`DftJtagI_A`

Test: pinmux_assert

When Dft tap is selected and lc_dft_en_i is On for the past two clock cycles due to the synchronizer, the corresponding mio_out_o and mio_out_oe should be equal to dft_jtag_i.

`DftStrapTestO_A`

Test: pinmux_assert

When lc_dft_en_i is On for the past two clock cycles due to the synchronizer, dft_strap_test_o.valid must be 1, and dft_strap_test_o.straps should be equal to the corresponding mio_in_i index.

`DftStrapTestOValidStable_A`

Test: pinmux_assert

dft_strap_test_o.valid once set to 1 will stay high until reset.

`DftStrapTestOStrapStable_A`

Test: pinmux_assert

dft_strap_test_o.valid once set, dft_strap_test_o.straps should stay stable.

`UsbSleepEnI_A`

Test: pinmux_assert

sleep_en_i should be connected directly to usbdev’s low_power_alw_i.

`UsbDppullupEnUpwrI_A`

Test: pinmux_assert

usb_dppullup_en_upwr_i should be connected directly to usbdev’s usb_dppullup_en_upwr_i.

`UsbDnpullupEnUpwrI_A`

Test: pinmux_assert

usb_dnpullup_en_upwr_i should be connected directly to usbdev’s usb_dnpullup_en_upwr_i.

`UsbDppullupEnO_A`

Test: pinmux_assert

usb_dppullup_en_o should be connected directly to usbdev’s usb_dppullup_en_o.

`UsbDnpullupEnO_A`

Test: pinmux_assert

usb_dnpullup_en_o should be connected directly to usbdev’s usb_dnpullup_en_o.

`UsbOutOfRstI_A`

Test: pinmux_assert

usb_out_of_rst_i should be connected directly to usbdev’s usb_out_of_rst_upwr_i.

`UsbAonWakeEnUpwrI_A`

Test: pinmux_assert

usb_aon_wake_en_i should be connected directly to usbdev’s usb_aon_wake_en_upwr_i.

`UsbAonWakeAckUpwrI_A`

Test: pinmux_assert

usb_aon_wake_ack_i should be connected directly to usbdev’s usb_aon_woken_upwr_i.

`UsbSuspendI_A`

Test: pinmux_assert

usb_suspend_i should be connected directly to usbdev’s usb_suspended_upwr_i.

`UsbWkupReqO_A`

Test: pinmux_assert

usb_wkup_req_o should be connected directly to usbdev’s wake_rep_alw_o.

`UsbBusResetO_A`

Test: pinmux_assert

usb_bus_reset_o should be connected directly to usbdev’s bus_reset_alw_o.

`UsbSenseLostO_A`

Test: pinmux_assert

usb_sense_lost_o should be connected directly to usbdev’s bus_lost_alw_o.

`UsbStateDebugO_A`

Test: pinmux_assert

usb_state_debug_o should be connected directly to usbdev’s bus_debug_o.

Stage V2 Testpoints

`MioToPeriph0Backward_A`

Test: pinmux_assert

mio_to_periph_o should output 0 only if one of the following conditions meets:

Register periph_insel is set to 0.
The corresponding mio_in_i is 0.
Jtag is enabled.

`MioToPeriph1Backward_A`

Test: pinmux_assert

mio_to_periph_o should output 1 only if one of the following conditions meets:

Register periph_insel is set to 1.
The corresponding mio_in_i is 1.
Jtag is enabled.

`MioOut0Backward_A`

Test: pinmux_assert

mio_out_o should output 0 only if one of the following conditions meets:

Register mio_insel is set to 0 or 2.
The corresponding periph_to_mio_i is 0.
Sleep mode is enabled.

`MioOut1Backward_A`

Test: pinmux_assert

mio_out_o should output 1 only if one of the following conditions meets:

Register mio_insel is set to 1.
The corresponding periph_to_mio_i is 1.
Sleep mode is enabled.

`MioOe0Backward_A`

Test: pinmux_assert

mio_oe_o should output 0 only if one of the following conditions meets:

Register mio_insel is set to 2.
The corresponding periph_to_mio_oe_i is 0.
Sleep mode is enabled.

`MioOe1Backward_A`

Test: pinmux_assert

mio_oe_o should output 1 only if one of the following conditions meets:

Register mio_insel is set to 0 or 1.
The corresponding periph_to_mio_oe_i is 1.
Sleep mode is enabled.

`MioSleep0Backward_A`

Test: pinmux_assert

mio_out_o should output 0 only if one of the following conditions meets:

In sleep mode, register mio_pad_sleep_mode is set to 0 or 2.
In sleep mode, previous mio_out_o is 0 and mio_pad_sleep_mode is set to 3.
In sleep mode, previous mio_out_o is 0 and input sleep_en_i is not at posedge.

`MioSleep1Backward_A`

Test: pinmux_assert

mio_out_o should output 1 only if one of the following conditions meets:

In sleep mode, register mio_pad_sleep_mode is set to 1.
In sleep mode, previous mio_out_o is 1 and mio_pad_sleep_mode is set to 3.
In sleep mode, previous mio_out_o is 1 and input sleep_en_i is not at posedge.

`MioOeSleep0Backward_A`

Test: pinmux_assert

mio_oe_o should output 0 only if one of the following conditions meets:

In sleep mode, register mio_pad_sleep_mode is set to 2.
In sleep mode, previous mio_oe_o is 0 and mio_pad_sleep_mode is set to 3.
In sleep mode, previous mio_oe_o is 0 and input sleep_en_i is not at posedge.

`MioOeSleep1Backward_A`

Test: pinmux_assert

mio_oe_o should output 1 only if one of the following conditions meets:

In sleep mode, register mio_pad_sleep_mode is set to 0 or 1.
In sleep mode, previous mio_oe_o is 1 and mio_pad_sleep_mode is set to 3.
In sleep mode, previous mio_oe_o is 1 and input sleep_en_i is not at posedge.

`Dio0Backward_A`

Test: pinmux_assert

dio_out_o should output 0 only if one of the following conditions meets:

The corresponding periph_to_dio_i is 0.
In sleep mode, register dio_pad_sleep_mode is set to 0 or 2.
In sleep mode, previous dio_out_o is 0 and dio_pad_sleep_mode is set to 3.
In sleep mode, previous dio_out_o is 0 and input sleep_en_i is not at posedge.

`Dio1Backward_A`

Test: pinmux_assert

dio_out_o should output 1 only if one of the following conditions meets:

The corresponding periph_to_dio_i is 1.
In sleep mode, register dio_pad_sleep_mode is set to 1.
In sleep mode, previous dio_out_o is 1 and dio_pad_sleep_mode is set to 3.
In sleep mode, previous dio_out_o is 1 and input sleep_en_i is not at posedge.

`DioOe0Backward_A`

Test: pinmux_assert

dio_oe_o should output 0 only if one of the following conditions meets:

The corresponding periph_to_dio_i is 0.
In sleep mode, register dio_pad_sleep_mode is set to 2.
In sleep mode, previous dio_oe_o is 0 and dio_pad_sleep_mode is set to 3.
In sleep mode, previous dio_oe_o is 0 and input sleep_en_i is not at posedge.

`DioOe1Backward_A`

Test: pinmux_assert

dio_oe_o should output 1 only if one of the following conditions meets:

The corresponding periph_to_dio_i is 1.
In sleep mode, register dio_pad_sleep_mode is set to 0 or 1.
In sleep mode, previous dio_oe_o is 1 and dio_pad_sleep_mode is set to 3.
In sleep mode, previous dio_oe_o is 1 and input sleep_en_i is not at posedge.

`WkupCause0_A`

Test: pinmux_assert

`WkupCause1_A`

Test: pinmux_assert

`LcJtagOBackward_A`

Test: pinmux_assert

lc_jtag_o pins are equal to the corresponding mio_in_i inputs if one of the following conditions are met:

Lc Jtag is disabled and the corresponding pins are 0.
Lc Jtag is enabled.

`RvJtagOBackward_A`

Test: pinmux_assert

rv_jtag_o pins are equal to the corresponding mio_in_i inputs if one of the following conditions are met:

Rv Jtag is disabled and the corresponding pins are 0.
Rv Jtag is enabled.

`DftJtagOBackward_A`

Test: pinmux_assert

dft_jtag_o pins are equal to the corresponding mio_in_i inputs if one of the following conditions are met:

Dft Jtag is disabled and the corresponding pins are 0.
Dft Jtag is enabled.

`DftJtagO1Backward_A`

Test: pinmux_assert

dft_jtag_o pins are ones if one of the following conditions are met:

Dft Jtag is enabled and the corresponding pins are 1.

`fpv_csr_rw`

Test: pinmux_fpv_csr_rw

Write assertions to verify all the CSRs from the TileLink. Each CSR will include a read assertion to ensure the read value from the TileLink is expected, and a write assertion to ensure the write value is updated correctly to DUT according to the register’s access.