// Copyright lowRISC contributors (OpenTitan project). // Licensed under the Apache License, Version 2.0, see LICENSE for details. // SPDX-License-Identifier: Apache-2.0 { name: “pinmux” import_testplans: [“hw/dv/tools/dvsim/testplans/fpv_csr_testplan.hjson”] testpoints: [ // mio_to_periph_o tests. // Symbolic variable periph_sel_i is used to select a specific mio_to_periph_o pin. { name: InSel0_A desc: ‘’‘When register periph_insel is set to 0, which means the selected input is constant zero, the corresponding mio_to_periph_o must be 0.’‘’ stage: V1 tests: [“pinmux_assert”] } { name: InSel1_A desc: ‘’‘When register periph_insel is set to 1, which means the selected input is constant one, the corresponding mio_to_periph_o must be 1.’‘’ stage: V1 tests: [“pinmux_assert”] } { name: InSelN_A desc: ‘’‘When register periph_insel is set to any value between 2 and (2 + number of MioPads) and the select index is not jtag, the corresponding mio_to_periph_o must be equal to the related mio_in_i value.’‘’ stage: V1 tests: [“pinmux_assert”] } { name: InSelOOB_A desc: ‘’‘When register periph_insel is set to any value larger than (2 + number of MioPads), the corresponding mio_to_periph_o must be 0.’‘’ stage: V1 tests: [“pinmux_assert”] }

// `mio_to_periph_o` backward tests
// Symbolic variable `periph_sel_i` is used to select a specific `mio_to_periph_o` pin.
{
  name: MioToPeriph0Backward_A
  desc: '''`mio_to_periph_o` should output 0 only if one of the following conditions meets:
        - Register `periph_insel` is set to 0.
        - The corresponding `mio_in_i` is 0.
        - Jtag is enabled.
        '''
  stage: V2
  tests: ["pinmux_assert"]
}
{
  name: MioToPeriph1Backward_A
  desc: '''`mio_to_periph_o` should output 1 only if one of the following conditions meets:
        - Register `periph_insel` is set to 1.
        - The corresponding `mio_in_i` is 1.
        - Jtag is enabled.
        '''
  stage: V2
  tests: ["pinmux_assert"]
}

// `dio_to_periph_o` tests
// Symbolic variable `dio_sel_i` is used to select a specific `dio_to_periph_o` pin.
{
  name: DioInSelN_A
  desc: "This assertion checks that `dio_to_periph_o` is directly connected to `dio_in_i`."
  stage: V1
  tests: ["pinmux_assert"]
}

// `mio_out_o` not in sleep_mode tests
// Symbolic variable `mio_sel_i` is used to select a specific `mio_out_o` pin.
{
  name: OutSel0_A
  desc: '''When register `mio_outsel` is set to 0 and is not in sleep mode or jtag, which means
        the selected output is constant zero, the corresponding `mio_out_o` must be 0.'''
  stage: V1
  tests: ["pinmux_assert"]
}
{
  name: OutSel1_A
  desc: '''When register `mio_outsel` is set to 1 and is not in sleep mode or jtag, which means
        the selected output is constant one, the corresponding `mio_out_o` must be 1.'''
  stage: V1
  tests: ["pinmux_assert"]
}
{
  name: OutSel2_A
  desc: '''When register `mio_outsel` is set to 2 and is not in sleep mode or jtag, which means
        the selected output is driving high-Z, the corresponding `mio_out_o` must be 0.'''
  stage: V1
  tests: ["pinmux_assert"]
}
{
  name: OutSelN_A
  desc: '''When register `mio_outsel` is set to any value between 3 and
        (3 + Number of periph out) and is not in sleep mode or jtag, the corresponding
        `mio_out_o` must be equal to the related `periph_to_mio_i` value.'''
  stage: V1
  tests: ["pinmux_assert"]
}
{
  name: OutSelOOB_A
  desc: '''When register `mio_outsel` is set to any value larger than
        (3 + Number of periph out) and is not in sleep mode, the corresponding `mio_out_o` must
        be 0.'''
  stage: V1
  tests: ["pinmux_assert"]
}

// `mio_out_o` backward tests
// Symbolic variable `mio_sel_i` is used to select a specific `mio_out_o` pin.
{
  name: MioOut0Backward_A
  desc: '''`mio_out_o` should output 0 only if one of the following conditions meets:
        - Register `mio_insel` is set to 0 or 2.
        - The corresponding `periph_to_mio_i` is 0.
        - Sleep mode is enabled.
        '''
  stage: V2
  tests: ["pinmux_assert"]
}
{
  name: MioOut1Backward_A
  desc: '''`mio_out_o` should output 1 only if one of the following conditions meets:
        - Register `mio_insel` is set to 1.
        - The corresponding `periph_to_mio_i` is 1.
        - Sleep mode is enabled.
        '''
  stage: V2
  tests: ["pinmux_assert"]
}

// `mio_oe_o` not in sleep_mode tests
// Symbolic variable `mio_sel_i` is used to select a specific `mio_out_o` pin.
{
  name: OutSelOe0_A
  desc: '''When register `mio_outsel` is set to 0 and is not in sleep mode or jtag, the
        corresponding `mio_oe_o` must be 1.'''
  stage: V1
  tests: ["pinmux_assert"]
}
{
  name: OutSelOe1_A
  desc: '''When register `mio_outsel` is set to 1 and is not in sleep mode or jtag, the
        corresponding `mio_oe_o` must be 1.'''
  stage: V1
  tests: ["pinmux_assert"]
}
{
  name: OutSelOe2_A
  desc: '''When register `mio_outsel` is set to 2 and is not in sleep mode or jtag, which
        indicates driving high-Z to the selected output, the corresponding `mio_oe_o` must
        be 0.'''
  stage: V1
  tests: ["pinmux_assert"]
}
{
  name: OutSelOeN_A
  desc: '''When register `mio_outsel` is set to any value between 3 and
        (3 + Number of periph out) and is not in sleep mode or jtag, the corresponding
        `mio_oe_o` must be equal to the related `periph_to_mio_oe_i` value.'''
  stage: V1
  tests: ["pinmux_assert"]
}
{
  name: OutSelOeOOB_A
  desc: '''When register `mio_outsel` is set to any value larger than
        (3 + Number of periph out) and is not in sleep mode, the corresponding `mio_oe_o` must
        be 0.'''
  stage: V1
  tests: ["pinmux_assert"]
}

// `mio_oe_o` backward tests
// Symbolic variable `mio_sel_i` is used to select a specific `mio_oe_o` pin.
{
  name: MioOe0Backward_A
  desc: '''`mio_oe_o` should output 0 only if one of the following conditions meets:
        - Register `mio_insel` is set to 2.
        - The corresponding `periph_to_mio_oe_i` is 0.
        - Sleep mode is enabled.
        '''
  stage: V2
  tests: ["pinmux_assert"]
}
{
  name: MioOe1Backward_A
  desc: '''`mio_oe_o` should output 1 only if one of the following conditions meets:
        - Register `mio_insel` is set to 0 or 1.
        - The corresponding `periph_to_mio_oe_i` is 1.
        - Sleep mode is enabled.
        '''
  stage: V2
  tests: ["pinmux_assert"]
}

// `mio_out_o` in sleep mode tests
// Symbolic variable `mio_sel_i` is used to select a specific `mio_out_o` pin.
{
  name: MioSleepMode0_A
  desc: '''At posedge of `sleep_en_i`, if register `mio_pad_sleep_en` is 1 and
        `mio_pad_sleep_mode` is 0, which means the pad is driven zero in deep sleep mode.
        If, in the meantime, register `mio_pad_sleep_status` is not written via TLUL interface
        to clear the sleep status, the corresponding `mio_out_o` must be 0.'''
  stage: V1
  tests: ["pinmux_assert"]
}
{
  name: MioSleepMode1_A
  desc: '''At posedge of `sleep_en_i`, if register `mio_pad_sleep_en` is 1 and
        `mio_pad_sleep_mode` is 1, which means the pad is driven one in deep sleep mode.
        In the meantime, if register `mio_pad_sleep_status` is not written via TLUL interface
        to clear the sleep status, the corresponding `mio_out_o` must be 1.'''
  stage: V1
  tests: ["pinmux_assert"]
}
{
  name: MioSleepMode2_A
  desc: '''At posedge of `sleep_en_i`, if register `mio_pad_sleep_en` is 1 and
        `mio_pad_sleep_mode` is 2, which means the pad is driven high-Z in deep sleep mode.
        In the meantime, if register `mio_pad_sleep_status` is not written via TLUL interface
        to clear the sleep status, the corresponding `mio_out_o` must be 0.'''
  stage: V1
  tests: ["pinmux_assert"]
}
{
  name: MioSleepMode3_A
  desc: '''At posedge of `sleep_en_i`, if register `mio_pad_sleep_en` is 1 and
        `mio_pad_sleep_mode` is 3, which means the pad keeps last driven value in deep sleep
        mode.
        In the meantime, if register `mio_pad_sleep_status` is not written via TLUL interface
        to clear the sleep status, the corresponding `mio_out_o` should be stable.
        '''
  stage: V1
  tests: ["pinmux_assert"]
}
{
  name: MioSleepStable_A
  desc: '''If not at posedge of `sleep_en_i`, and in the meantime register
        `mio_pad_sleep_status` is not written via TLUL interface to clear the sleep status, the
        corresponding `mio_out_o` should be stable.
        '''
  stage: V1
  tests: ["pinmux_assert"]
}

// `mio_oe_o` in sleep mode tests
// Symbolic variable `mio_sel_i` is used to select a specific `mio_oe_o` pin.
{
  name: MioOeSleepMode0_A
  desc: '''At posedge of `sleep_en_i`, if register `mio_pad_sleep_en` is 1 and
        `mio_pad_sleep_mode` is 0, which means the pad is driven zero in deep sleep mode.
        In the meantime, if register `mio_pad_sleep_status` is not written via TLUL interface
        to clear the sleep status, the corresponding `mio_oe_o` must be 1.'''
  stage: V1
  tests: ["pinmux_assert"]
}
{
  name: MioOeSleepMode1_A
  desc: '''At posedge of `sleep_en_i`, if register `mio_pad_sleep_en` is 1 and
        `mio_pad_sleep_mode` is 1, which means the pad is driven one in deep sleep mode.
        In the meantime, if register `mio_pad_sleep_status` is not written via TLUL interface
        to clear the sleep status, the corresponding `mio_oe_o` must be 1.'''
  stage: V1
  tests: ["pinmux_assert"]
}
{
  name: MioOeSleepMode2_A
  desc: '''At posedge of `sleep_en_i`, if register `mio_pad_sleep_en` is 1 and
        `mio_pad_sleep_mode` is 2, which means the pad is driven high-Z in deep sleep mode.
        In the meantime, if register `mio_pad_sleep_status` is not written via TLUL interface
        to clear the sleep status, the corresponding `mio_oe_o` must be 0.'''
  stage: V1
  tests: ["pinmux_assert"]
}
{
  name: MioOeSleepMode3_A
  desc: '''At posedge of `sleep_en_i`, if register `mio_pad_sleep_en` is 1 and
        `mio_pad_sleep_mode` is 3, which means the pad keeps last driven value in deep sleep
        mode.
        In the meantime, if register `mio_pad_sleep_status` is not written via TLUL interface
        to clear the sleep status, the corresponding `mio_oe_o` should be stable.
        '''
  stage: V1
  tests: ["pinmux_assert"]
}
{
  name: MioOeSleepStable_A
  desc: '''If not at posedge of `sleep_en_i`, and in the meantime, if register
        `mio_pad_sleep_status` is not written via TLUL interface to clear the sleep status, the
        corresponding `mio_oe_o` should be stable.
        '''
  stage: V1
  tests: ["pinmux_assert"]
}

// `mio_out_o` sleep mode related backward tests
// Symbolic variable `mio_sel_i` is used to select a specific `mio_out_o` pin.
{
  name: MioSleep0Backward_A
  desc: '''`mio_out_o` should output 0 only if one of the following conditions meets:
        - In sleep mode, register `mio_pad_sleep_mode` is set to 0 or 2.
        - In sleep mode, previous `mio_out_o` is 0 and `mio_pad_sleep_mode` is set to 3.
        - In sleep mode, previous `mio_out_o` is 0 and input `sleep_en_i` is not at posedge.
        '''
  stage: V2
  tests: ["pinmux_assert"]
}
{
  name: MioSleep1Backward_A
  desc: '''`mio_out_o` should output 1 only if one of the following conditions meets:
        - In sleep mode, register `mio_pad_sleep_mode` is set to 1.
        - In sleep mode, previous `mio_out_o` is 1 and `mio_pad_sleep_mode` is set to 3.
        - In sleep mode, previous `mio_out_o` is 1 and input `sleep_en_i` is not at posedge.
        '''
  stage: V2
  tests: ["pinmux_assert"]
}

// `mio_oe_o` sleep mode related backward tests
// Symbolic variable `mio_sel_i` is used to select a specific `mio_oe_o` pin.
{
  name: MioOeSleep0Backward_A
  desc: '''`mio_oe_o` should output 0 only if one of the following conditions meets:
        - In sleep mode, register `mio_pad_sleep_mode` is set to 2.
        - In sleep mode, previous `mio_oe_o` is 0 and `mio_pad_sleep_mode` is set to 3.
        - In sleep mode, previous `mio_oe_o` is 0 and input `sleep_en_i` is not at posedge.
        '''
  stage: V2
  tests: ["pinmux_assert"]
}
{
  name: MioOeSleep1Backward_A
  desc: '''`mio_oe_o` should output 1 only if one of the following conditions meets:
        - In sleep mode, register `mio_pad_sleep_mode` is set to 0 or 1.
        - In sleep mode, previous `mio_oe_o` is 1 and `mio_pad_sleep_mode` is set to 3.
        - In sleep mode, previous `mio_oe_o` is 1 and input `sleep_en_i` is not at posedge.
        '''
  stage: V2
  tests: ["pinmux_assert"]
}

// `dio_out_o` not in sleep mode tests
// Symbolic variable `dio_sel_i` is used to select a specific `dio_out_o` pin.
{
  name: DOutSelN_A
  desc: "`dio_out_o` is connected to `periph_to_dio_i` if not in sleep mode."
  stage: V1
  tests: ["pinmux_assert"]
}

// `dio_oe_o` not in sleep mode tests
// Symbolic variable `dio_sel_i` is used to select a specific `dio_oe_o` pin.
{
  name: DOutSelOeN_A
  desc: "`dio_oe_o` is connected to `periph_to_dio_oe_i` if not in sleep mode."
  stage: V1
  tests: ["pinmux_assert"]
}

// `dio_out_o` in sleep mode tests
// Symbolic variable `dio_sel_i` is used to select a specific `dio_out_o` pin.
{
  name: DioSleepMode0_A
  desc: '''At posedge of `sleep_en_i`, if register `dio_pad_sleep_en` is 1 and
        `dio_pad_sleep_mode` is 0, which means the pad is driven zero in deep sleep mode.
        In the meantime, if register `dio_pad_sleep_status` is not written via TLUL interface
        to clear the sleep status, the corresponding `dio_out_o` must be 0.'''
  stage: V1
  tests: ["pinmux_assert"]
}
{
  name: DioSleepMode1_A
  desc: '''At posedge of `sleep_en_i`, if register `dio_pad_sleep_en` is 1 and
        `dio_pad_sleep_mode` is 1, which means the pad is driven one in deep sleep mode.
        In the meantime, if register `dmio_pad_sleep_status` is not written via TLUL interface
        to clear the sleep status, the corresponding `dio_out_o` must be 1.'''
  stage: V1
  tests: ["pinmux_assert"]
}
{
  name: DioSleepMode2_A
  desc: '''At posedge of `sleep_en_i`, if register `dio_pad_sleep_en` is 1 and
        `dio_pad_sleep_mode` is 2, which means the pad is driven high-Z in deep sleep mode.
        In the meantime, if register `dio_pad_sleep_status` is not written via TLUL interface
        to clear the sleep status, the corresponding `dio_out_o` must be 0.'''
  stage: V1
  tests: ["pinmux_assert"]
}
{
  name: DioSleepMode3_A
  desc: '''At posedge of `sleep_en_i`, if register `dio_pad_sleep_en` is 1 and
        `dio_pad_sleep_mode` is 3, which means the pad keeps last driven value in deep sleep
        mode.
        In the meantime, if register `dio_pad_sleep_status` is not written via TLUL interface
        to clear the sleep status, the corresponding `dio_out_o` should be stable.
        '''
  stage: V1
  tests: ["pinmux_assert"]
}
{
  name: DioSleepStable_A
  desc: '''If not at posedge of `sleep_en_i`, and in the meantime, if register
        `dio_pad_sleep_status` is not written via TLUL interface to clear the sleep status, the
        corresponding `dio_out_o` should be stable.
        '''
  stage: V1
  tests: ["pinmux_assert"]
}

// `dio_oe_o` in sleep mode tests
// Symbolic variable `dio_sel_i` is used to select a specific `dio_oe_o` pin.
{
  name: DioOeSleepMode0_A
  desc: '''At posedge of `sleep_en_i`, if register `dio_pad_sleep_en` is 1 and
        `dio_pad_sleep_mode` is 0, which means the pad is driven zero in deep sleep mode.
        In the meantime, if register `dio_pad_sleep_status` is not written via TLUL interface
        to clear the sleep status, the corresponding `dio_oe_o` must be 1.'''
  stage: V1
  tests: ["pinmux_assert"]
}
{
  name: DioOeSleepMode1_A
  desc: '''At posedge of `sleep_en_i`, if register `dio_pad_sleep_en` is 1 and
        `dio_pad_sleep_mode` is 1, which means the pad is driven one in deep sleep mode.
        In the meantime, if register `dio_pad_sleep_status` is not written via TLUL interface
        to clear the sleep status, the corresponding `dio_oe_o` must be 1.'''
  stage: V1
  tests: ["pinmux_assert"]
}
{
  name: DioOeSleepMode2_A
  desc: '''At posedge of `sleep_en_i`, if register `dio_pad_sleep_en` is 1 and
        `dio_pad_sleep_mode` is 2, which means the pad is driven high-Z in deep sleep mode.
        In the meantime, if register `dio_pad_sleep_status` is not written via TLUL interface
        to clear the sleep status, the corresponding `dio_oe_o` must be 0.'''
  stage: V1
  tests: ["pinmux_assert"]
}
{
  name: DioOeSleepMode3_A
  desc: '''At posedge of `sleep_en_i`, if register `dio_pad_sleep_en` is 1 and
        `dio_pad_sleep_mode` is 3, which means the pad keeps last driven value in deep sleep
        mode.
        In the meantime, if register `dio_pad_sleep_status` is not written via TLUL interface
        to clear the sleep status, the corresponding `dio_oe_o` should be stable.
        '''
  stage: V1
  tests: ["pinmux_assert"]
}
{
  name: DioOeSleepStable_A
  desc: '''If not at posedge of `sleep_en_i`, and in the meantime, if register
        `dio_pad_sleep_status` is not written via TLUL interface to clear the sleep status, the
        corresponding `dio_oe_o` should be stable.
        '''
  stage: V1
  tests: ["pinmux_assert"]
}

// `dio_out_o` backward tests
// Symbolic variable `dio_sel_i` is used to select a specific `dio_out_o` pin.
{
  name: Dio0Backward_A
  desc: '''`dio_out_o` should output 0 only if one of the following conditions meets:
        - The corresponding `periph_to_dio_i` is 0.
        - In sleep mode, register `dio_pad_sleep_mode` is set to 0 or 2.
        - In sleep mode, previous `dio_out_o` is 0 and `dio_pad_sleep_mode` is set to 3.
        - In sleep mode, previous `dio_out_o` is 0 and input `sleep_en_i` is not at posedge.
        '''
  stage: V2
  tests: ["pinmux_assert"]
}
{
  name: Dio1Backward_A
  desc: '''`dio_out_o` should output 1 only if one of the following conditions meets:
        - The corresponding `periph_to_dio_i` is 1.
        - In sleep mode, register `dio_pad_sleep_mode` is set to 1.
        - In sleep mode, previous `dio_out_o` is 1 and `dio_pad_sleep_mode` is set to 3.
        - In sleep mode, previous `dio_out_o` is 1 and input `sleep_en_i` is not at posedge.
        '''
  stage: V2
  tests: ["pinmux_assert"]
}

// `dio_oe_o` backward tests
// Symbolic variable `dio_sel_i` is used to select a specific `dio_oe_o` pin.
{
  name: DioOe0Backward_A
  desc: '''`dio_oe_o` should output 0 only if one of the following conditions meets:
        - The corresponding `periph_to_dio_i` is 0.
        - In sleep mode, register `dio_pad_sleep_mode` is set to 2.
        - In sleep mode, previous `dio_oe_o` is 0 and `dio_pad_sleep_mode` is set to 3.
        - In sleep mode, previous `dio_oe_o` is 0 and input `sleep_en_i` is not at posedge.
        '''
  stage: V2
  tests: ["pinmux_assert"]
}
{
  name: DioOe1Backward_A
  desc: '''`dio_oe_o` should output 1 only if one of the following conditions meets:
        - The corresponding `periph_to_dio_i` is 1.
        - In sleep mode, register `dio_pad_sleep_mode` is set to 0 or 1.
        - In sleep mode, previous `dio_oe_o` is 1 and `dio_pad_sleep_mode` is set to 3.
        - In sleep mode, previous `dio_oe_o` is 1 and input `sleep_en_i` is not at posedge.
        '''
  stage: V2
  tests: ["pinmux_assert"]
}

// `mio_pad_attr_o` tests
{
  name: MioAttrO_A
  desc: '''`mio_attr_o` should be equal to corresponding `mio_pad_attr` register value and
        TargetCfg's mio_pad_type configuration.'''
  stage: V1
  tests: ["pinmux_assert"]
}
{
  name: MioJtagAttrO_A
  desc: '''If JTAG is enabled, each padring attribute should be clamped to zero, except that
           Schmitt triggering should be enabled for the tck and trst pads.'''
  stage: V1
  tests: ["pinmux_assert"]
}

// `dio_pad_attr_o` tests
{
  name: DioAttrO_A
  desc: '''`dio_attr_o` should be equal to corresponding `dio_pad_attr` register value and
        TargetCfg's dio_pad_type configuration.'''
  stage: V1
  tests: ["pinmux_assert"]
}

// `pin_wkup_req_o` tests
// Symbolic variable `wkup_sel_i` is used to select a specific wkup_cause.
// Variable `final_pin_val` is created to capture selected wakeup pins based on register
// `wkup_detector_padsel` and `wkup_detector.filter`.
{
  name: WkupPosedge_A
  desc: '''When register `wkup_detector_en` is set to 1 and `wkup_detector.mode` is set to 0,
        which means rising edge is used to detect wakeup. If variable `final_pin_val` is at
        posedge then `wkup_cause` register's `de` attribute should be set to 1.'''
  stage: V1
  tests: ["pinmux_assert"]
}
{
  name: WkupNegedge_A
  desc: '''When register `wkup_detector_en` is set to 1 and `wkup_detector.mode` is set to 1,
        which means falling edge is used to detect wakeup. If variable `final_pin_val` is at
        negedge, then `wkup_cause` register's `de` attribute should be set to 1.'''
  stage: V1
  tests: ["pinmux_assert"]
}
{
  name: WkupEdge_A
  desc: '''When register `wkup_detector_en` is set to 1 and `wkup_detector.mode` is set to 2,
        which means either rising or falling edge is used to detect wakeup. If variable
        `final_pin_val` is at posedge or negedge, then `wkup_cause` register's `de` attribute
        should be set to 1.'''
  stage: V1
  tests: ["pinmux_assert"]
}
{
  name: WkupTimedHigh_A
  desc: '''When register `wkup_detector_en` is set to 1 and `wkup_detector.mode` is set to 3,
        which means postive pulse cycles are used to detect wakeup. If variable `final_pin_val`
        stays high longer than the threshold, then `wkup_cause` register's `de` attribute
        should be set to 1.'''
  stage: V1
  tests: ["pinmux_assert"]
}
{
  name: WkupTimedLow_A
  desc: '''When register `wkup_detector_en` is set to 1 and `wkup_detector.mode` is set to 4,
        which means negative pulse cycles are used to detect wakeup. If variable `final_pin_val`
        stays low longer than the threshold, then `wkup_cause` register's `de` attribute should
        be set to 1.'''
  stage: V1
  tests: ["pinmux_assert"]
}
{
  name: WkupCauseQ_A
  desc: '''When `wkup_cause` register's `de` attribute is set to 1 and user is not writing to
        `wkup_cause` at the same cycle, then `wkup_cause.q` should be set to 1.'''
  stage: V1
  tests: ["pinmux_assert"]
}
{
  name: AonWkupO_A
  desc: '''When register `wkup_cause` is 1, `pin_wkup_req_o` should also be 1.
        `pin_wkup_req_o` is 0 only when all `wkup_cause` registers are 0.'''
  stage: V1
  tests: ["pinmux_assert"]
}

// `pin_wkup_req_o` backward tests
{
  name: WkupCause0_A
  desc: "Register `wkup_cause` is 0 only when none of the above wakeup conditions is met."
  stage: V2
  tests: ["pinmux_assert"]
}
{
  name: WkupCause1_A
  desc: "Register `wkup_cause` is 1 when at least one of the above wakeup conditions is met."
  stage: V2
  tests: ["pinmux_assert"]
}

// `lc_jtag_o` tests
{
  name: LcJtagWoScanmode_A
  desc: '''Not in scanmode, when tap_strap select LC_tap, `lc_jtag_o` must be equal to the
        corresponding `mio_in_i` pins based on the `TargetCfg` configuration.'''
  stage: V1
  tests: ["pinmux_assert"]
}
{
  name: LcJtagWScanmode_A
  desc: '''In scanmode, when tap_strap select LC_tap, `lc_jtag_o` must be equal to the
        corresponding `mio_in_i` pins based on the `TargetCfg` configuration except the
        `jtag_trst` pin, which must be equal to `rst_ni`.'''
  stage: V1
  tests: ["pinmux_assert"]
}
{
  name: LcJtagODefault_A
  desc: "`lc_jtag_o` should stay 0 if tap_strap did not select LC_tap."
  stage: V1
  tests: ["pinmux_assert"]
}
{
  name: LcJtagOBackward_A
  desc: '''`lc_jtag_o` pins are equal to the corresponding `mio_in_i` inputs if one of the
        following conditions are met:
        - Lc Jtag is disabled and the corresponding pins are 0.
        - Lc Jtag is enabled.
        '''
  stage: V2
  tests: ["pinmux_assert"]
}

// `rv_jtag_o` tests
{
  name: RvJtagWoScanmode_A
  desc: '''Not in scanmode, when tap_strap select RV_tap and `lc_hw_debug_en_i` input is On for
        the past two clock cycles due to the synchronizer, then `rv_jtag_o` must be equal to
        the corresponding `mio_in_i` pins based on the `TargetCfg` configuration.'''
  stage: V1
  tests: ["pinmux_assert"]
}
{
  name: RvJtagWScanmode_A
  desc: '''In scanmode, When tap_strap select RV_tap and `lc_hw_debug_en_i` is On for the past
        two clock cycles due to the synchronizer, then `rv_jtag_o` must be equal to the
        corresponding `mio_in_i` pins based on the `TargetCfg` configuration except the
        `jtag_trst` pin, which must be equal to `rst_ni`.
        '''
  stage: V1
  tests: ["pinmux_assert"]
}
{
  name: RvJtagODefault_A
  desc: '''`rv_jtag_o` should stay 0 if tap_strap did not select RV_tap or `lc_hw_debug_en_i`
        input is Off for the past two clock cycles due to the synchronizer.'''
  stage: V1
  tests: ["pinmux_assert"]
}
{
  name: RvJtagOBackward_A
  desc: '''`rv_jtag_o` pins are equal to the corresponding `mio_in_i` inputs if one of the
        following conditions are met:
        - Rv Jtag is disabled and the corresponding pins are 0.
        - Rv Jtag is enabled.
        '''
  stage: V2
  tests: ["pinmux_assert"]
}

// `dft_jtag_o` tests
{
  name: DftJtagWoScanmode_A
  desc: '''Not in scanmode, when tap_strap select DFT_tap and `lc_dft_en_i` is On for the past
        two clock cycles due to the synchronizer, `lc_jtag_o` must be equal to the
        corresponding `mio_in_i` pins based on the `TargetCfg` configuration.'''
  stage: V1
  tests: ["pinmux_assert"]
}
{
  name: DftJtagWScanmode_A
  desc: '''In scanmode, when tap_strap select DFT_tap and `lc_dft_en_i` is On for the past
        two clock cycles due to the synchronizer, `lc_jtag_o` must be equal to the
        corresponding `mio_in_i` pins based on the `TargetCfg` configuration except the
        `jtag_trst` pin, which must be equal to `rst_ni`.'''
  stage: V1
  tests: ["pinmux_assert"]
}
{
  name: DftJtagODefault_A
  desc: '''`dft_jtag_o` should stay 0 if tap_strap did not select DFT_tap or the `lc_dft_en_i`
        input is Off for the past two clock cycles due to the synchronizer.'''
  stage: V1
  tests: ["pinmux_assert"]
}
{
  name: DftJtagOBackward_A
  desc: '''`dft_jtag_o` pins are equal to the corresponding `mio_in_i` inputs if one of the
        following conditions are met:
        - Dft Jtag is disabled and the corresponding pins are 0.
        - Dft Jtag is enabled.
        '''
  stage: V2
  tests: ["pinmux_assert"]
}
{
  name: DftJtagO1Backward_A
  desc: '''`dft_jtag_o` pins are ones if one of the following conditions are met:
        - Dft Jtag is enabled and the corresponding pins are 1.
        '''
  stage: V2
  tests: ["pinmux_assert"]
}

{
  name: TapStrap_A
  desc: '''If `dft_hold_tap_sel_i` is 0 and `lc_dft_en_i` is On for the past two clock cycles
        due to the synchronizer, or `strap_en_i` is 1.
        And in the meantime, if `lc_hw_debug_en_i` is On for the past two clock cycles due to
        the synchronizer, then tap_strap must be equal to the past value of corresponding
        `mio_in_i`.
        '''
  stage: V1
  tests: ["pinmux_assert"]
}
{
  name: TapStrap0_A
  desc: '''If `dft_hold_tap_sel_i` is 0 and `lc_dft_en_i` is On for the past two clock cycles
        due to the synchronizer, or `strap_en_i` is 1.
        Then tap_strap[0] must be equal to the past value of corresponding `mio_in_i`.
        '''
  stage: V1
  tests: ["pinmux_assert"]
}

// Jtag pinmux output tests
{
  name: LcJtagI_A
  desc: '''When Lc tap is selected, the corresponding `mio_out_o` and `mio_out_oe` should be
        equal to `lc_jtag_i`.'''
  stage: V1
  tests: ["pinmux_assert"]
}
{
  name: RvJtagI_A
  desc: '''When Rv tap is selected and `lc_hw_debug_en_i` is On for the past two clock cycles
        due to the synchronizer, the corresponding `mio_out_o` and `mio_out_oe` should be equal
        to `rv_jtag_i`.'''
  stage: V1
  tests: ["pinmux_assert"]
}
{
  name: DftJtagI_A
  desc: '''When Dft tap is selected and `lc_dft_en_i` is On for the past two clock cycles
        due to the synchronizer, the corresponding `mio_out_o` and `mio_out_oe` should be equal
        to `dft_jtag_i`.'''
  stage: V1
  tests: ["pinmux_assert"]
}

// Dft `strap_test_o` tests
{
  name: DftStrapTestO_A
  desc: '''When `lc_dft_en_i` is On for the past two clock cycles due to the synchronizer,
        `dft_strap_test_o.valid` must be 1, and `dft_strap_test_o.straps` should be equal to
        the corresponding `mio_in_i` index.'''
  stage: V1
  tests: ["pinmux_assert"]
}
{
  name: DftStrapTestOValidStable_A
  desc: "`dft_strap_test_o.valid` once set to 1 will stay high until reset."
  stage: V1
  tests: ["pinmux_assert"]
}
{
  name: DftStrapTestOStrapStable_A
  desc: "`dft_strap_test_o.valid` once set, `dft_strap_test_o.straps` should stay stable."
  stage: V1
  tests: ["pinmux_assert"]
}

// USB related IOs.
// Current plan is to only check connectivity via assertions because usbdev design is fully
// verified separately in a DV testbench.
{
  name: UsbSleepEnI_A
  desc: "`sleep_en_i` should be connected directly to usbdev's `low_power_alw_i`."
  stage: V1
  tests: ["pinmux_assert"]
}
{
  name: UsbDppullupEnUpwrI_A
  desc: '''`usb_dppullup_en_upwr_i` should be connected directly to usbdev's
        `usb_dppullup_en_upwr_i`.'''
  stage: V1
  tests: ["pinmux_assert"]
}
{
  name: UsbDnpullupEnUpwrI_A
  desc: '''`usb_dnpullup_en_upwr_i` should be connected directly to usbdev's
        `usb_dnpullup_en_upwr_i`.'''
  stage: V1
  tests: ["pinmux_assert"]
}
{
  name: UsbDppullupEnO_A
  desc: '''`usb_dppullup_en_o` should be connected directly to usbdev's
        `usb_dppullup_en_o`.'''
  stage: V1
  tests: ["pinmux_assert"]
}
{
  name: UsbDnpullupEnO_A
  desc: '''`usb_dnpullup_en_o` should be connected directly to usbdev's
        `usb_dnpullup_en_o`.'''
  stage: V1
  tests: ["pinmux_assert"]
}
{
  name: UsbOutOfRstI_A
  desc: "`usb_out_of_rst_i` should be connected directly to usbdev's `usb_out_of_rst_upwr_i`."
  stage: V1
  tests: ["pinmux_assert"]
}
{
  name: UsbAonWakeEnUpwrI_A
  desc: '''`usb_aon_wake_en_i` should be connected directly to usbdev's
        `usb_aon_wake_en_upwr_i`.'''
  stage: V1
  tests: ["pinmux_assert"]
}
{
  name: UsbAonWakeAckUpwrI_A
  desc: '''`usb_aon_wake_ack_i` should be connected directly to usbdev's
        `usb_aon_woken_upwr_i`.'''
  stage: V1
  tests: ["pinmux_assert"]
}
{
  name: UsbSuspendI_A
  desc: "`usb_suspend_i` should be connected directly to usbdev's `usb_suspended_upwr_i`."
  stage: V1
  tests: ["pinmux_assert"]
}
{
  name: UsbWkupReqO_A
  desc: "`usb_wkup_req_o` should be connected directly to usbdev's `wake_rep_alw_o`."
  stage: V1
  tests: ["pinmux_assert"]
}
{
  name: UsbBusResetO_A
  desc: "`usb_bus_reset_o` should be connected directly to usbdev's `bus_reset_alw_o`."
  stage: V1
  tests: ["pinmux_assert"]
}
{
  name: UsbSenseLostO_A
  desc: "`usb_sense_lost_o` should be connected directly to usbdev's `bus_lost_alw_o`."
  stage: V1
  tests: ["pinmux_assert"]
}
{
  name: UsbStateDebugO_A
  desc: "`usb_state_debug_o` should be connected directly to usbdev's `bus_debug_o`."
  stage: V1
  tests: ["pinmux_assert"]
}

] }