Hardware Interfaces

Referring to the Comportable guideline for peripheral device functionality, the module i2c has the following hardware interfaces defined

  • Primary Clock: clk_i
  • Other Clocks: none
  • Bus Device Interfaces (TL-UL): tl
  • Bus Host Interfaces (TL-UL): none

Peripheral Pins for Chip IO

Pin nameDirectionDescription
sdainoutSerial input data bit
sclinoutSerial input clock bit

Inter-Module Signals

Port NamePackage::StructTypeActWidthDescription
ram_cfgprim_ram_1p_pkg::ram_1p_cfgunircv1
lsio_triggerlogicunireq1Self-clearing status trigger for the DMA. Set when RX TX FIFO is past their configured watermark matching watermark interrupt behaviour.
tltlul_pkg::tlreq_rsprsp1

Interrupts

Interrupt NameTypeDescription
fmt_thresholdStatushost mode interrupt: asserted whilst the FMT FIFO level is below the low threshold. This is a level status interrupt.
rx_thresholdStatushost mode interrupt: asserted whilst the RX FIFO level is above the high threshold. This is a level status interrupt.
acq_thresholdStatustarget mode interrupt: asserted whilst the ACQ FIFO level is above the high threshold. This is a level status interrupt.
rx_overflowEventhost mode interrupt: raised if the RX FIFO has overflowed.
controller_haltStatushost mode interrupt: raised if the controller FSM is halted, such as on an unexpected NACK or lost arbitration. Check CONTROLLER_EVENTS for the reason. The interrupt will be released when the bits in CONTROLLER_EVENTS are cleared.
scl_interferenceEventhost mode interrupt: raised if the SCL line drops early (not supported without clock synchronization).
sda_interferenceEventhost mode interrupt: raised if the SDA line goes low when host is trying to assert high
stretch_timeoutEventhost mode interrupt: raised if target stretches the clock beyond the allowed timeout period
sda_unstableEventhost mode interrupt: raised if the target does not assert a constant value of SDA during transmission.
cmd_completeEventhost and target mode interrupt. In host mode, raised if the host issues a repeated START or terminates the transaction by issuing STOP. In target mode, raised if the external host issues a STOP or repeated START.
tx_stretchStatustarget mode interrupt: raised if the target is stretching clocks for a read command. This is a level status interrupt.
tx_thresholdStatustarget mode interrupt: asserted whilst the TX FIFO level is below the low threshold. This is a level status interrupt.
acq_stretchStatustarget mode interrupt: raised if the target is stretching clocks due to full ACQ FIFO or zero count in TARGET_ACK_CTRL.NBYTES (if enabled). This is a level status interrupt.
unexp_stopEventtarget mode interrupt: raised if STOP is received without a preceding NACK during an external host read.
host_timeoutEventtarget mode interrupt: raised if the host stops sending the clock during an ongoing transaction.

Security Alerts

Alert NameDescription
fatal_faultThis fatal alert is triggered when a fatal TL-UL bus integrity fault is detected.

Security Countermeasures

Countermeasure IDDescription
I2C.BUS.INTEGRITYEnd-to-end bus integrity scheme.