Hardware Interfaces

Referring to the Comportable guideline for peripheral device functionality, the module clkmgr has the following hardware interfaces defined

  • Primary Clock: clk_i
  • Other Clocks: clk_main_i, clk_io_i, clk_aon_i
  • Bus Device Interfaces (TL-UL): tl
  • Bus Host Interfaces (TL-UL): none
  • Peripheral Pins for Chip IO: none
  • Interrupts: none

Inter-Module Signals

Port NamePackage::StructTypeActWidthDescription
clocksclkmgr_pkg::clkmgr_outunireq1
cg_enclkmgr_pkg::clkmgr_cg_enunireq1
jitter_enprim_mubi_pkg::mubi4unireq1
pwrpwr_clkreq_rsprsp1
idleprim_mubi_pkg::mubi4unircv4
tltlul_pkg::tlreq_rsprsp1

Security Alerts

Alert NameDescription
recov_faultThis recoverable alert is triggered when there are measurement errors.
fatal_faultThis fatal alert is triggered when a fatal TL-UL bus integrity fault is detected.

Security Countermeasures

Countermeasure IDDescription
CLKMGR.BUS.INTEGRITYEnd-to-end bus integrity scheme.
CLKMGR.TIMEOUT.CLK.BKGN_CHKBackground check for clock timeout.
CLKMGR.MEAS.CLK.BKGN_CHKBackground check for clock frequency.
CLKMGR.MEAS.CONFIG.SHADOWMeasurement configurations are shadowed.
CLKMGR.IDLE.INTERSIG.MUBIIdle inputs are multibit encoded.
CLKMGR.JITTER.CONFIG.MUBIThe jitter enable configuration is multibit encoded.
CLKMGR.IDLE.CTR.REDUNIdle counter is duplicated.
CLKMGR.MEAS.CONFIG.REGWENThe measurement controls protected with regwen.
CLKMGR.CLK_CTRL.CONFIG.REGWENSoftware controlled clock requests are proteced with regwen.