“CW340” Target : Pinout and Pinmux Connectivity

Pinout Table

Pad Name

Type

Bank

Connection

Special Function

Pinmux Insel Constant / Muxed Output Index

Description

POR_N

InputStd

VCC

manual

-

- / -

System reset based on VCC

SPI_HOST_D0

BidirStd

VIOA

direct

-

- / -

SPI host data

SPI_HOST_D1

BidirStd

VIOA

direct

-

- / -

SPI host data

SPI_HOST_D2

BidirStd

VIOA

direct

-

- / -

SPI host data

SPI_HOST_D3

BidirStd

VIOA

direct

-

- / -

SPI host data

SPI_HOST_CLK

BidirStd

VIOA

direct

-

- / -

SPI host clock

SPI_HOST_CS_L

BidirStd

VIOA

direct

-

- / -

SPI host chip select

SPI_DEV_D0

BidirStd

VIOA

direct

-

- / -

SPI device data

SPI_DEV_D1

BidirStd

VIOA

direct

-

- / -

SPI device data

SPI_DEV_D2

BidirStd

VIOA

direct

-

- / -

SPI device data

SPI_DEV_D3

BidirStd

VIOA

direct

-

- / -

SPI device data

SPI_DEV_CLK

InputStd

VIOA

direct

-

- / -

SPI device clock

SPI_DEV_CS_L

InputStd

VIOA

direct

-

- / -

SPI device chip select

IOA0

BidirStd

VIOA

muxed

-

kTopEarlgreyPinmuxInselIoa0 / kTopEarlgreyPinmuxMioOutIoa0

Muxed IO pad

IOA1

BidirStd

VIOA

muxed

-

kTopEarlgreyPinmuxInselIoa1 / kTopEarlgreyPinmuxMioOutIoa1

Muxed IO pad

IOA2

BidirStd

VIOA

muxed

-

kTopEarlgreyPinmuxInselIoa2 / kTopEarlgreyPinmuxMioOutIoa2

Muxed IO pad

IOA3

BidirStd

VIOA

muxed

-

kTopEarlgreyPinmuxInselIoa3 / kTopEarlgreyPinmuxMioOutIoa3

Muxed IO pad

IOA4

BidirStd

VIOA

muxed

-

kTopEarlgreyPinmuxInselIoa4 / kTopEarlgreyPinmuxMioOutIoa4

Muxed IO pad

IOA5

BidirStd

VIOA

muxed

-

kTopEarlgreyPinmuxInselIoa5 / kTopEarlgreyPinmuxMioOutIoa5

Muxed IO pad

IOA6

BidirOd

VIOA

muxed

-

kTopEarlgreyPinmuxInselIoa6 / kTopEarlgreyPinmuxMioOutIoa6

Muxed IO pad

IOA7

BidirOd

VIOA

muxed

-

kTopEarlgreyPinmuxInselIoa7 / kTopEarlgreyPinmuxMioOutIoa7

Muxed IO pad

IOA8

BidirOd

VIOA

muxed

-

kTopEarlgreyPinmuxInselIoa8 / kTopEarlgreyPinmuxMioOutIoa8

Muxed IO pad

IOB0

BidirStd

VIOB

muxed

-

kTopEarlgreyPinmuxInselIob0 / kTopEarlgreyPinmuxMioOutIob0

Muxed IO pad

IOB1

BidirStd

VIOB

muxed

-

kTopEarlgreyPinmuxInselIob1 / kTopEarlgreyPinmuxMioOutIob1

Muxed IO pad

IOB2

BidirStd

VIOB

muxed

-

kTopEarlgreyPinmuxInselIob2 / kTopEarlgreyPinmuxMioOutIob2

Muxed IO pad

IOB3

BidirStd

VIOB

muxed

-

kTopEarlgreyPinmuxInselIob3 / kTopEarlgreyPinmuxMioOutIob3

Muxed IO pad

IOB4

BidirStd

VIOB

muxed

-

kTopEarlgreyPinmuxInselIob4 / kTopEarlgreyPinmuxMioOutIob4

Muxed IO pad

IOB5

BidirStd

VIOB

muxed

-

kTopEarlgreyPinmuxInselIob5 / kTopEarlgreyPinmuxMioOutIob5

Muxed IO pad

IOB6

BidirStd

VIOB

muxed

-

kTopEarlgreyPinmuxInselIob6 / kTopEarlgreyPinmuxMioOutIob6

Muxed IO pad

IOB7

BidirStd

VIOB

muxed

-

kTopEarlgreyPinmuxInselIob7 / kTopEarlgreyPinmuxMioOutIob7

Muxed IO pad

IOB8

BidirStd

VIOB

muxed

-

kTopEarlgreyPinmuxInselIob8 / kTopEarlgreyPinmuxMioOutIob8

Muxed IO pad

IOB9

BidirOd

VIOB

muxed

-

kTopEarlgreyPinmuxInselIob9 / kTopEarlgreyPinmuxMioOutIob9

Muxed IO pad

IOB10

BidirOd

VIOB

muxed

-

kTopEarlgreyPinmuxInselIob10 / kTopEarlgreyPinmuxMioOutIob10

Muxed IO pad

IOB11

BidirOd

VIOB

muxed

-

kTopEarlgreyPinmuxInselIob11 / kTopEarlgreyPinmuxMioOutIob11

Muxed IO pad

IOB12

BidirOd

VIOB

muxed

-

kTopEarlgreyPinmuxInselIob12 / kTopEarlgreyPinmuxMioOutIob12

Muxed IO pad

IOC0

BidirStd

VCC

muxed

-

kTopEarlgreyPinmuxInselIoc0 / kTopEarlgreyPinmuxMioOutIoc0

Muxed IO pad

IOC1

BidirStd

VCC

muxed

-

kTopEarlgreyPinmuxInselIoc1 / kTopEarlgreyPinmuxMioOutIoc1

Muxed IO pad

IOC2

BidirStd

VCC

muxed

-

kTopEarlgreyPinmuxInselIoc2 / kTopEarlgreyPinmuxMioOutIoc2

Muxed IO pad

IOC3

BidirStd

VCC

muxed

-

kTopEarlgreyPinmuxInselIoc3 / kTopEarlgreyPinmuxMioOutIoc3

Muxed IO pad

IOC4

BidirStd

VCC

muxed

-

kTopEarlgreyPinmuxInselIoc4 / kTopEarlgreyPinmuxMioOutIoc4

Muxed IO pad

IOC5

BidirStd

VCC

muxed

tap1

kTopEarlgreyPinmuxInselIoc5 / kTopEarlgreyPinmuxMioOutIoc5

Muxed IO pad / TAP strap signal.

IOC6

BidirStd

VCC

muxed

-

kTopEarlgreyPinmuxInselIoc6 / kTopEarlgreyPinmuxMioOutIoc6

Muxed IO pad

IOC7

BidirStd

VCC

muxed

-

kTopEarlgreyPinmuxInselIoc7 / kTopEarlgreyPinmuxMioOutIoc7

Muxed IO pad

IOC8

BidirStd

VCC

muxed

tap0

kTopEarlgreyPinmuxInselIoc8 / kTopEarlgreyPinmuxMioOutIoc8

Muxed IO pad / TAP strap signal.

IOC9

BidirStd

VCC

muxed

-

kTopEarlgreyPinmuxInselIoc9 / kTopEarlgreyPinmuxMioOutIoc9

Muxed IO pad

IOC10

BidirOd

VCC

muxed

-

kTopEarlgreyPinmuxInselIoc10 / kTopEarlgreyPinmuxMioOutIoc10

Muxed IO pad

IOC11

BidirOd

VCC

muxed

-

kTopEarlgreyPinmuxInselIoc11 / kTopEarlgreyPinmuxMioOutIoc11

Muxed IO pad

IOC12

BidirOd

VCC

muxed

-

kTopEarlgreyPinmuxInselIoc12 / kTopEarlgreyPinmuxMioOutIoc12

Muxed IO pad

IOR0

BidirStd

VCC

muxed

tms

kTopEarlgreyPinmuxInselIor0 / kTopEarlgreyPinmuxMioOutIor0

Muxed IO pad / JTAG tms signal.

IOR1

BidirStd

VCC

muxed

tdo

kTopEarlgreyPinmuxInselIor1 / kTopEarlgreyPinmuxMioOutIor1

Muxed IO pad / JTAG tdo signal.

IOR2

BidirStd

VCC

muxed

tdi

kTopEarlgreyPinmuxInselIor2 / kTopEarlgreyPinmuxMioOutIor2

Muxed IO pad / JTAG tdi signal.

IOR3

BidirStd

VCC

muxed

tck

kTopEarlgreyPinmuxInselIor3 / kTopEarlgreyPinmuxMioOutIor3

Muxed IO pad / JTAG tck signal.

IOR4

BidirStd

VCC

muxed

trst_n

kTopEarlgreyPinmuxInselIor4 / kTopEarlgreyPinmuxMioOutIor4

Muxed IO pad / JTAG trst_n signal.

IOR5

BidirStd

VCC

muxed

dft0

kTopEarlgreyPinmuxInselIor5 / kTopEarlgreyPinmuxMioOutIor5

Muxed IO pad / DFT strap signal.

IOR6

BidirStd

VCC

muxed

-

kTopEarlgreyPinmuxInselIor6 / kTopEarlgreyPinmuxMioOutIor6

Muxed IO pad

IOR7

BidirStd

VCC

muxed

dft1

kTopEarlgreyPinmuxInselIor7 / kTopEarlgreyPinmuxMioOutIor7

Muxed IO pad / DFT strap signal.

IOR8

BidirOd

VCC

direct

-

- / -

Dedicated sysrst_ctrl output (ec_rst_l)

IOR9

BidirOd

VCC

direct

-

- / -

Dedicated sysrst_ctrl output (flash_wp_l))

IOR10

BidirOd

VCC

muxed

-

kTopEarlgreyPinmuxInselIor10 / kTopEarlgreyPinmuxMioOutIor10

Muxed IO pad

IOR11

BidirOd

VCC

muxed

-

kTopEarlgreyPinmuxInselIor11 / kTopEarlgreyPinmuxMioOutIor11

Muxed IO pad

IOR12

BidirOd

VCC

muxed

-

kTopEarlgreyPinmuxInselIor12 / kTopEarlgreyPinmuxMioOutIor12

Muxed IO pad

IOR13

BidirOd

VCC

muxed

-

kTopEarlgreyPinmuxInselIor13 / kTopEarlgreyPinmuxMioOutIor13

Muxed IO pad

IO_CLK

InputStd

VCC

manual

-

- / -

Extra clock input for FPGA target

IO_USB_CONNECT

BidirStd

VCC

manual

-

- / -

Manual USB UPHY signal for FPGA target

IO_USB_DP_TX

BidirStd

VCC

manual

-

- / -

Manual USB UPHY signal for FPGA target

IO_USB_DN_TX

BidirStd

VCC

manual

-

- / -

Manual USB UPHY signal for FPGA target

IO_USB_D_RX

BidirStd

VCC

manual

-

- / -

Manual USB UPHY signal for FPGA target

IO_USB_DP_RX

BidirStd

VCC

manual

-

- / -

Manual USB UPHY signal for FPGA target

IO_USB_DN_RX

BidirStd

VCC

manual

-

- / -

Manual USB UPHY signal for FPGA target

IO_USB_OE_N

BidirStd

VCC

manual

-

- / -

Manual USB UPHY signal for FPGA target

IO_USB_SPEED

BidirStd

VCC

manual

-

- / -

Manual USB UPHY signal for FPGA target

IO_USB_SUSPEND

BidirStd

VCC

manual

-

- / -

Manual USB UPHY signal for FPGA target

IO_CLKOUT

BidirStd

VCC

manual

-

- / -

Manual clock output for SCA setup

IO_TRIGGER

BidirStd

VCC

manual

-

- / -

Manual trigger output for SCA setup

Pinmux Connectivity

Module / Signal

Connection

Pad

Pinmux Outsel Constant / Peripheral Input Index

Description

usbdev_usb_dp

manual

-

- / -

usbdev_usb_dn

manual

-

- / -

spi_host0_sd[0]

direct

SPI_HOST_D0

- / -

spi_host0_sd[1]

direct

SPI_HOST_D1

- / -

spi_host0_sd[2]

direct

SPI_HOST_D2

- / -

spi_host0_sd[3]

direct

SPI_HOST_D3

- / -

spi_device_sd[0]

direct

SPI_DEV_D0

- / -

spi_device_sd[1]

direct

SPI_DEV_D1

- / -

spi_device_sd[2]

direct

SPI_DEV_D2

- / -

spi_device_sd[3]

direct

SPI_DEV_D3

- / -

gpio0_gpio[0]

muxed

-

kTopEarlgreyPinmuxOutselGpio0Gpio0 / kTopEarlgreyPinmuxPeripheralInGpio0Gpio0

gpio0_gpio[1]

muxed

-

kTopEarlgreyPinmuxOutselGpio0Gpio1 / kTopEarlgreyPinmuxPeripheralInGpio0Gpio1

gpio0_gpio[2]

muxed

-

kTopEarlgreyPinmuxOutselGpio0Gpio2 / kTopEarlgreyPinmuxPeripheralInGpio0Gpio2

gpio0_gpio[3]

muxed

-

kTopEarlgreyPinmuxOutselGpio0Gpio3 / kTopEarlgreyPinmuxPeripheralInGpio0Gpio3

gpio0_gpio[4]

muxed

-

kTopEarlgreyPinmuxOutselGpio0Gpio4 / kTopEarlgreyPinmuxPeripheralInGpio0Gpio4

gpio0_gpio[5]

muxed

-

kTopEarlgreyPinmuxOutselGpio0Gpio5 / kTopEarlgreyPinmuxPeripheralInGpio0Gpio5

gpio0_gpio[6]

muxed

-

kTopEarlgreyPinmuxOutselGpio0Gpio6 / kTopEarlgreyPinmuxPeripheralInGpio0Gpio6

gpio0_gpio[7]

muxed

-

kTopEarlgreyPinmuxOutselGpio0Gpio7 / kTopEarlgreyPinmuxPeripheralInGpio0Gpio7

gpio0_gpio[8]

muxed

-

kTopEarlgreyPinmuxOutselGpio0Gpio8 / kTopEarlgreyPinmuxPeripheralInGpio0Gpio8

gpio0_gpio[9]

muxed

-

kTopEarlgreyPinmuxOutselGpio0Gpio9 / kTopEarlgreyPinmuxPeripheralInGpio0Gpio9

gpio0_gpio[10]

muxed

-

kTopEarlgreyPinmuxOutselGpio0Gpio10 / kTopEarlgreyPinmuxPeripheralInGpio0Gpio10

gpio0_gpio[11]

muxed

-

kTopEarlgreyPinmuxOutselGpio0Gpio11 / kTopEarlgreyPinmuxPeripheralInGpio0Gpio11

gpio0_gpio[12]

muxed

-

kTopEarlgreyPinmuxOutselGpio0Gpio12 / kTopEarlgreyPinmuxPeripheralInGpio0Gpio12

gpio0_gpio[13]

muxed

-

kTopEarlgreyPinmuxOutselGpio0Gpio13 / kTopEarlgreyPinmuxPeripheralInGpio0Gpio13

gpio0_gpio[14]

muxed

-

kTopEarlgreyPinmuxOutselGpio0Gpio14 / kTopEarlgreyPinmuxPeripheralInGpio0Gpio14

gpio0_gpio[15]

muxed

-

kTopEarlgreyPinmuxOutselGpio0Gpio15 / kTopEarlgreyPinmuxPeripheralInGpio0Gpio15

gpio0_gpio[16]

muxed

-

kTopEarlgreyPinmuxOutselGpio0Gpio16 / kTopEarlgreyPinmuxPeripheralInGpio0Gpio16

gpio0_gpio[17]

muxed

-

kTopEarlgreyPinmuxOutselGpio0Gpio17 / kTopEarlgreyPinmuxPeripheralInGpio0Gpio17

gpio0_gpio[18]

muxed

-

kTopEarlgreyPinmuxOutselGpio0Gpio18 / kTopEarlgreyPinmuxPeripheralInGpio0Gpio18

gpio0_gpio[19]

muxed

-

kTopEarlgreyPinmuxOutselGpio0Gpio19 / kTopEarlgreyPinmuxPeripheralInGpio0Gpio19

gpio0_gpio[20]

muxed

-

kTopEarlgreyPinmuxOutselGpio0Gpio20 / kTopEarlgreyPinmuxPeripheralInGpio0Gpio20

gpio0_gpio[21]

muxed

-

kTopEarlgreyPinmuxOutselGpio0Gpio21 / kTopEarlgreyPinmuxPeripheralInGpio0Gpio21

gpio0_gpio[22]

muxed

-

kTopEarlgreyPinmuxOutselGpio0Gpio22 / kTopEarlgreyPinmuxPeripheralInGpio0Gpio22

gpio0_gpio[23]

muxed

-

kTopEarlgreyPinmuxOutselGpio0Gpio23 / kTopEarlgreyPinmuxPeripheralInGpio0Gpio23

gpio0_gpio[24]

muxed

-

kTopEarlgreyPinmuxOutselGpio0Gpio24 / kTopEarlgreyPinmuxPeripheralInGpio0Gpio24

gpio0_gpio[25]

muxed

-

kTopEarlgreyPinmuxOutselGpio0Gpio25 / kTopEarlgreyPinmuxPeripheralInGpio0Gpio25

gpio0_gpio[26]

muxed

-

kTopEarlgreyPinmuxOutselGpio0Gpio26 / kTopEarlgreyPinmuxPeripheralInGpio0Gpio26

gpio0_gpio[27]

muxed

-

kTopEarlgreyPinmuxOutselGpio0Gpio27 / kTopEarlgreyPinmuxPeripheralInGpio0Gpio27

gpio0_gpio[28]

muxed

-

kTopEarlgreyPinmuxOutselGpio0Gpio28 / kTopEarlgreyPinmuxPeripheralInGpio0Gpio28

gpio0_gpio[29]

muxed

-

kTopEarlgreyPinmuxOutselGpio0Gpio29 / kTopEarlgreyPinmuxPeripheralInGpio0Gpio29

gpio0_gpio[30]

muxed

-

kTopEarlgreyPinmuxOutselGpio0Gpio30 / kTopEarlgreyPinmuxPeripheralInGpio0Gpio30

gpio0_gpio[31]

muxed

-

kTopEarlgreyPinmuxOutselGpio0Gpio31 / kTopEarlgreyPinmuxPeripheralInGpio0Gpio31

gpio1_gpio[0]

muxed

-

kTopEarlgreyPinmuxOutselGpio1Gpio0 / kTopEarlgreyPinmuxPeripheralInGpio1Gpio0

gpio1_gpio[1]

muxed

-

kTopEarlgreyPinmuxOutselGpio1Gpio1 / kTopEarlgreyPinmuxPeripheralInGpio1Gpio1

gpio1_gpio[2]

muxed

-

kTopEarlgreyPinmuxOutselGpio1Gpio2 / kTopEarlgreyPinmuxPeripheralInGpio1Gpio2

gpio1_gpio[3]

muxed

-

kTopEarlgreyPinmuxOutselGpio1Gpio3 / kTopEarlgreyPinmuxPeripheralInGpio1Gpio3

gpio1_gpio[4]

muxed

-

kTopEarlgreyPinmuxOutselGpio1Gpio4 / kTopEarlgreyPinmuxPeripheralInGpio1Gpio4

gpio1_gpio[5]

muxed

-

kTopEarlgreyPinmuxOutselGpio1Gpio5 / kTopEarlgreyPinmuxPeripheralInGpio1Gpio5

gpio1_gpio[6]

muxed

-

kTopEarlgreyPinmuxOutselGpio1Gpio6 / kTopEarlgreyPinmuxPeripheralInGpio1Gpio6

gpio1_gpio[7]

muxed

-

kTopEarlgreyPinmuxOutselGpio1Gpio7 / kTopEarlgreyPinmuxPeripheralInGpio1Gpio7

gpio1_gpio[8]

muxed

-

kTopEarlgreyPinmuxOutselGpio1Gpio8 / kTopEarlgreyPinmuxPeripheralInGpio1Gpio8

gpio1_gpio[9]

muxed

-

kTopEarlgreyPinmuxOutselGpio1Gpio9 / kTopEarlgreyPinmuxPeripheralInGpio1Gpio9

gpio1_gpio[10]

muxed

-

kTopEarlgreyPinmuxOutselGpio1Gpio10 / kTopEarlgreyPinmuxPeripheralInGpio1Gpio10

gpio1_gpio[11]

muxed

-

kTopEarlgreyPinmuxOutselGpio1Gpio11 / kTopEarlgreyPinmuxPeripheralInGpio1Gpio11

gpio1_gpio[12]

muxed

-

kTopEarlgreyPinmuxOutselGpio1Gpio12 / kTopEarlgreyPinmuxPeripheralInGpio1Gpio12

gpio1_gpio[13]

muxed

-

kTopEarlgreyPinmuxOutselGpio1Gpio13 / kTopEarlgreyPinmuxPeripheralInGpio1Gpio13

gpio1_gpio[14]

muxed

-

kTopEarlgreyPinmuxOutselGpio1Gpio14 / kTopEarlgreyPinmuxPeripheralInGpio1Gpio14

gpio1_gpio[15]

muxed

-

kTopEarlgreyPinmuxOutselGpio1Gpio15 / kTopEarlgreyPinmuxPeripheralInGpio1Gpio15

gpio1_gpio[16]

muxed

-

kTopEarlgreyPinmuxOutselGpio1Gpio16 / kTopEarlgreyPinmuxPeripheralInGpio1Gpio16

gpio1_gpio[17]

muxed

-

kTopEarlgreyPinmuxOutselGpio1Gpio17 / kTopEarlgreyPinmuxPeripheralInGpio1Gpio17

gpio1_gpio[18]

muxed

-

kTopEarlgreyPinmuxOutselGpio1Gpio18 / kTopEarlgreyPinmuxPeripheralInGpio1Gpio18

gpio1_gpio[19]

muxed

-

kTopEarlgreyPinmuxOutselGpio1Gpio19 / kTopEarlgreyPinmuxPeripheralInGpio1Gpio19

gpio1_gpio[20]

muxed

-

kTopEarlgreyPinmuxOutselGpio1Gpio20 / kTopEarlgreyPinmuxPeripheralInGpio1Gpio20

gpio1_gpio[21]

muxed

-

kTopEarlgreyPinmuxOutselGpio1Gpio21 / kTopEarlgreyPinmuxPeripheralInGpio1Gpio21

gpio1_gpio[22]

muxed

-

kTopEarlgreyPinmuxOutselGpio1Gpio22 / kTopEarlgreyPinmuxPeripheralInGpio1Gpio22

gpio1_gpio[23]

muxed

-

kTopEarlgreyPinmuxOutselGpio1Gpio23 / kTopEarlgreyPinmuxPeripheralInGpio1Gpio23

gpio1_gpio[24]

muxed

-

kTopEarlgreyPinmuxOutselGpio1Gpio24 / kTopEarlgreyPinmuxPeripheralInGpio1Gpio24

gpio1_gpio[25]

muxed

-

kTopEarlgreyPinmuxOutselGpio1Gpio25 / kTopEarlgreyPinmuxPeripheralInGpio1Gpio25

gpio1_gpio[26]

muxed

-

kTopEarlgreyPinmuxOutselGpio1Gpio26 / kTopEarlgreyPinmuxPeripheralInGpio1Gpio26

gpio1_gpio[27]

muxed

-

kTopEarlgreyPinmuxOutselGpio1Gpio27 / kTopEarlgreyPinmuxPeripheralInGpio1Gpio27

gpio1_gpio[28]

muxed

-

kTopEarlgreyPinmuxOutselGpio1Gpio28 / kTopEarlgreyPinmuxPeripheralInGpio1Gpio28

gpio1_gpio[29]

muxed

-

kTopEarlgreyPinmuxOutselGpio1Gpio29 / kTopEarlgreyPinmuxPeripheralInGpio1Gpio29

gpio1_gpio[30]

muxed

-

kTopEarlgreyPinmuxOutselGpio1Gpio30 / kTopEarlgreyPinmuxPeripheralInGpio1Gpio30

gpio1_gpio[31]

muxed

-

kTopEarlgreyPinmuxOutselGpio1Gpio31 / kTopEarlgreyPinmuxPeripheralInGpio1Gpio31

i2c0_sda

muxed

-

kTopEarlgreyPinmuxOutselI2c0Sda / kTopEarlgreyPinmuxPeripheralInI2c0Sda

i2c0_scl

muxed

-

kTopEarlgreyPinmuxOutselI2c0Scl / kTopEarlgreyPinmuxPeripheralInI2c0Scl

i2c1_sda

muxed

-

kTopEarlgreyPinmuxOutselI2c1Sda / kTopEarlgreyPinmuxPeripheralInI2c1Sda

i2c1_scl

muxed

-

kTopEarlgreyPinmuxOutselI2c1Scl / kTopEarlgreyPinmuxPeripheralInI2c1Scl

i2c2_sda

muxed

-

kTopEarlgreyPinmuxOutselI2c2Sda / kTopEarlgreyPinmuxPeripheralInI2c2Sda

i2c2_scl

muxed

-

kTopEarlgreyPinmuxOutselI2c2Scl / kTopEarlgreyPinmuxPeripheralInI2c2Scl

i3c0_scl

muxed

-

kTopEarlgreyPinmuxOutselI3c0Scl / kTopEarlgreyPinmuxPeripheralInI3c0Scl

i3c0_sda

muxed

-

kTopEarlgreyPinmuxOutselI3c0Sda / kTopEarlgreyPinmuxPeripheralInI3c0Sda

i3c1_scl

muxed

-

kTopEarlgreyPinmuxOutselI3c1Scl / kTopEarlgreyPinmuxPeripheralInI3c1Scl

i3c1_sda

muxed

-

kTopEarlgreyPinmuxOutselI3c1Sda / kTopEarlgreyPinmuxPeripheralInI3c1Sda

spi_host1_sd[0]

muxed

-

kTopEarlgreyPinmuxOutselSpiHost1Sd0 / kTopEarlgreyPinmuxPeripheralInSpiHost1Sd0

spi_host1_sd[1]

muxed

-

kTopEarlgreyPinmuxOutselSpiHost1Sd1 / kTopEarlgreyPinmuxPeripheralInSpiHost1Sd1

spi_host1_sd[2]

muxed

-

kTopEarlgreyPinmuxOutselSpiHost1Sd2 / kTopEarlgreyPinmuxPeripheralInSpiHost1Sd2

spi_host1_sd[3]

muxed

-

kTopEarlgreyPinmuxOutselSpiHost1Sd3 / kTopEarlgreyPinmuxPeripheralInSpiHost1Sd3

sysrst_ctrl_ec_rst_l

direct

IOR8

- / -

sysrst_ctrl_flash_wp_l

direct

IOR9

- / -

spi_device_sck

direct

SPI_DEV_CLK

- / -

spi_device_csb

direct

SPI_DEV_CS_L

- / -

uart0_rx

muxed

-

- / kTopEarlgreyPinmuxPeripheralInUart0Rx

uart1_rx

muxed

-

- / kTopEarlgreyPinmuxPeripheralInUart1Rx

uart2_rx

muxed

-

- / kTopEarlgreyPinmuxPeripheralInUart2Rx

uart3_rx

muxed

-

- / kTopEarlgreyPinmuxPeripheralInUart3Rx

i3c0_rstdet_scl

muxed

-

- / kTopEarlgreyPinmuxPeripheralInI3c0RstdetScl

i3c0_rstdet_sda

muxed

-

- / kTopEarlgreyPinmuxPeripheralInI3c0RstdetSda

i3c1_rstdet_scl

muxed

-

- / kTopEarlgreyPinmuxPeripheralInI3c1RstdetScl

i3c1_rstdet_sda

muxed

-

- / kTopEarlgreyPinmuxPeripheralInI3c1RstdetSda

spi_device_tpm_csb

muxed

-

- / kTopEarlgreyPinmuxPeripheralInSpiDeviceTpmCsb

sysrst_ctrl_ac_present

muxed

-

- / kTopEarlgreyPinmuxPeripheralInSysrstCtrlAcPresent

sysrst_ctrl_key0_in

muxed

-

- / kTopEarlgreyPinmuxPeripheralInSysrstCtrlKey0In

sysrst_ctrl_key1_in

muxed

-

- / kTopEarlgreyPinmuxPeripheralInSysrstCtrlKey1In

sysrst_ctrl_key2_in

muxed

-

- / kTopEarlgreyPinmuxPeripheralInSysrstCtrlKey2In

sysrst_ctrl_pwrb_in

muxed

-

- / kTopEarlgreyPinmuxPeripheralInSysrstCtrlPwrbIn

sysrst_ctrl_lid_open

muxed

-

- / kTopEarlgreyPinmuxPeripheralInSysrstCtrlLidOpen

usbdev_sense

muxed

-

- / kTopEarlgreyPinmuxPeripheralInUsbdevSense

spi_host0_sck

direct

SPI_HOST_CLK

- / -

spi_host0_csb[0]

direct

SPI_HOST_CS_L

- / -

uart0_tx

muxed

-

kTopEarlgreyPinmuxOutselUart0Tx / -

uart1_tx

muxed

-

kTopEarlgreyPinmuxOutselUart1Tx / -

uart2_tx

muxed

-

kTopEarlgreyPinmuxOutselUart2Tx / -

uart3_tx

muxed

-

kTopEarlgreyPinmuxOutselUart3Tx / -

i3c0_ctrl_sda_pu

muxed

-

kTopEarlgreyPinmuxOutselI3c0CtrlSdaPu / -

i3c1_ctrl_sda_pu

muxed

-

kTopEarlgreyPinmuxOutselI3c1CtrlSdaPu / -

spi_host0_csb[1]

muxed

-

kTopEarlgreyPinmuxOutselSpiHost0Csb1 / -

spi_host0_csb[2]

muxed

-

kTopEarlgreyPinmuxOutselSpiHost0Csb2 / -

spi_host1_sck

muxed

-

kTopEarlgreyPinmuxOutselSpiHost1Sck / -

spi_host1_csb[0]

muxed

-

kTopEarlgreyPinmuxOutselSpiHost1Csb0 / -

spi_host1_csb[1]

muxed

-

kTopEarlgreyPinmuxOutselSpiHost1Csb1 / -

spi_host1_csb[2]

muxed

-

kTopEarlgreyPinmuxOutselSpiHost1Csb2 / -

sensor_ctrl_ast_debug_out[0]

muxed

-

kTopEarlgreyPinmuxOutselSensorCtrlAstDebugOut0 / -

sensor_ctrl_ast_debug_out[1]

muxed

-

kTopEarlgreyPinmuxOutselSensorCtrlAstDebugOut1 / -

sensor_ctrl_ast_debug_out[2]

muxed

-

kTopEarlgreyPinmuxOutselSensorCtrlAstDebugOut2 / -

sensor_ctrl_ast_debug_out[3]

muxed

-

kTopEarlgreyPinmuxOutselSensorCtrlAstDebugOut3 / -

sensor_ctrl_ast_debug_out[4]

muxed

-

kTopEarlgreyPinmuxOutselSensorCtrlAstDebugOut4 / -

sensor_ctrl_ast_debug_out[5]

muxed

-

kTopEarlgreyPinmuxOutselSensorCtrlAstDebugOut5 / -

sensor_ctrl_ast_debug_out[6]

muxed

-

kTopEarlgreyPinmuxOutselSensorCtrlAstDebugOut6 / -

sensor_ctrl_ast_debug_out[7]

muxed

-

kTopEarlgreyPinmuxOutselSensorCtrlAstDebugOut7 / -

sensor_ctrl_ast_debug_out[8]

muxed

-

kTopEarlgreyPinmuxOutselSensorCtrlAstDebugOut8 / -

sysrst_ctrl_bat_disable

muxed

-

kTopEarlgreyPinmuxOutselSysrstCtrlBatDisable / -

sysrst_ctrl_key0_out

muxed

-

kTopEarlgreyPinmuxOutselSysrstCtrlKey0Out / -

sysrst_ctrl_key1_out

muxed

-

kTopEarlgreyPinmuxOutselSysrstCtrlKey1Out / -

sysrst_ctrl_key2_out

muxed

-

kTopEarlgreyPinmuxOutselSysrstCtrlKey2Out / -

sysrst_ctrl_pwrb_out

muxed

-

kTopEarlgreyPinmuxOutselSysrstCtrlPwrbOut / -

sysrst_ctrl_z3_wakeup

muxed

-

kTopEarlgreyPinmuxOutselSysrstCtrlZ3Wakeup / -