OpenTitan Top Levels

OpenTitan Peppermint is an Integrated Root of Trust (iRoT) and Secure Enclave designed for integration into energy- and area-constrained systems on chip (SoCs) for products such as wearables, IoT endnodes and microcontrollers. Peppermint has a small footprint that integrates into the SoC, anchors the Secure Boot and DICE chains, then goes into low-power mode and only wakes up to handle security-critical tasks.
✪ Peppermint is the first link in the Secure Boot chain of the SoC.
✪ Peppermint controls critical security mechanisms in the SoC through its always-on power domain.
✪ Peppermint provides on-demand cryptographic services, such as the generation of keys, authentication, attestation, and sealing, to the wider SoC.
✪ Post-Quantum Cryptography (PQC) compatible with CNSA 2.0

Building on the success of the production-ready Earl Grey, OpenTitan Earl Grey 2 is addressing the new security challenges introduced by Artificial Intelligence and future quantum computers.
✪ Hardware memory safety through the addition of Capability Hardware Enhanced RISC Instructions (CHERI)
✪ Security-hardened and optimized Post-Quantum Cryptography (PQC) compatible with CNSA 2.0, through extensions to its crypto accelerators
✪ Advanced control plane I/O with the addition of an I3C controller and target to address peripheral bottlenecks
✪ Greater efficiency, reducing area and power consumption through process node updates, compressed instructions, IP block optimizations and power domain splitting

Datasheet →

The OpenTitan Earl Grey chip is a low-power secure microcontroller which is in production.

It has been hardened against physical attacks (SCA/FI) and can be used for many applications where security is important (e.g. as a Root-of-Trust)

v.1.0.0: Earl Grey release 1.0.0, first OpenTitan production silicon

v 1.0.0 →

OpenTitan Darjeeling is an SoC Secure Execution Environment.

It has been used in production devices by Rivos, but it requires further design verification.

Datasheet →