Software APIs
isr_testutils.h
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1// Copyright lowRISC contributors (OpenTitan project).
2// Licensed under the Apache License, Version 2.0, see LICENSE for details.
3// SPDX-License-Identifier: Apache-2.0
4
5#ifndef OPENTITAN_SW_DEVICE_LIB_TESTING_AUTOGEN_ISR_TESTUTILS_H_
6#define OPENTITAN_SW_DEVICE_LIB_TESTING_AUTOGEN_ISR_TESTUTILS_H_
7
8// THIS FILE HAS BEEN GENERATED, DO NOT EDIT MANUALLY. COMMAND:
9// util/autogen_testutils.py
10
11/**
12 * @file
13 * @brief Default ISRs for each IP
14 */
15
17#include "sw/device/lib/dif/autogen/dif_alert_handler_autogen.h"
18#include "sw/device/lib/dif/autogen/dif_aon_timer_autogen.h"
19#include "sw/device/lib/dif/autogen/dif_csrng_autogen.h"
21#include "sw/device/lib/dif/autogen/dif_edn_autogen.h"
22#include "sw/device/lib/dif/autogen/dif_gpio_autogen.h"
23#include "sw/device/lib/dif/autogen/dif_hmac_autogen.h"
24#include "sw/device/lib/dif/autogen/dif_i2c_autogen.h"
26#include "sw/device/lib/dif/autogen/dif_kmac_autogen.h"
28#include "sw/device/lib/dif/autogen/dif_otbn_autogen.h"
29#include "sw/device/lib/dif/autogen/dif_otp_ctrl_autogen.h"
30#include "sw/device/lib/dif/autogen/dif_pwrmgr_autogen.h"
32#include "sw/device/lib/dif/autogen/dif_rv_timer_autogen.h"
34#include "sw/device/lib/dif/autogen/dif_spi_device_autogen.h"
35#include "sw/device/lib/dif/autogen/dif_spi_host_autogen.h"
36#include "sw/device/lib/dif/autogen/dif_uart_autogen.h"
38
40
41/**
42 * A handle to a PLIC ISR context struct.
43 */
44typedef struct plic_isr_ctx {
45 /**
46 * A handle to a rv_plic.
47 */
49 /**
50 * The HART ID associated with the PLIC (correspond to a PLIC "target").
51 */
52 uint32_t hart_id;
54
55/**
56 * A handle to a ac_range_check ISR context struct.
57 */
58typedef struct ac_range_check_isr_ctx {
59 /**
60 * A handle to a ac_range_check.
61 */
63 /**
64 * The PLIC IRQ ID where this ac_range_check instance's IRQs start.
65 */
67 /**
68 * The ac_range_check IRQ that is expected to be encountered in the ISR.
69 */
70 dif_ac_range_check_irq_t expected_irq;
71 /**
72 * Whether or not a single IRQ is expected to be encountered in the ISR.
73 */
76
77/**
78 * A handle to a alert_handler ISR context struct.
79 */
80typedef struct alert_handler_isr_ctx {
81 /**
82 * A handle to a alert_handler.
83 */
85 /**
86 * The PLIC IRQ ID where this alert_handler instance's IRQs start.
87 */
89 /**
90 * The alert_handler IRQ that is expected to be encountered in the ISR.
91 */
92 dif_alert_handler_irq_t expected_irq;
93 /**
94 * Whether or not a single IRQ is expected to be encountered in the ISR.
95 */
96 bool is_only_irq;
98
99/**
100 * A handle to a aon_timer ISR context struct.
101 */
102typedef struct aon_timer_isr_ctx {
103 /**
104 * A handle to a aon_timer.
105 */
107 /**
108 * The PLIC IRQ ID where this aon_timer instance's IRQs start.
109 */
111 /**
112 * The aon_timer IRQ that is expected to be encountered in the ISR.
113 */
114 dif_aon_timer_irq_t expected_irq;
115 /**
116 * Whether or not a single IRQ is expected to be encountered in the ISR.
117 */
118 bool is_only_irq;
120
121/**
122 * A handle to a csrng ISR context struct.
123 */
124typedef struct csrng_isr_ctx {
125 /**
126 * A handle to a csrng.
127 */
129 /**
130 * The PLIC IRQ ID where this csrng instance's IRQs start.
131 */
133 /**
134 * The csrng IRQ that is expected to be encountered in the ISR.
135 */
136 dif_csrng_irq_t expected_irq;
137 /**
138 * Whether or not a single IRQ is expected to be encountered in the ISR.
139 */
140 bool is_only_irq;
142
143/**
144 * A handle to a dma ISR context struct.
145 */
146typedef struct dma_isr_ctx {
147 /**
148 * A handle to a dma.
149 */
151 /**
152 * The PLIC IRQ ID where this dma instance's IRQs start.
153 */
155 /**
156 * The dma IRQ that is expected to be encountered in the ISR.
157 */
158 dif_dma_irq_t expected_irq;
159 /**
160 * Whether or not a single IRQ is expected to be encountered in the ISR.
161 */
164
165/**
166 * A handle to a edn ISR context struct.
167 */
168typedef struct edn_isr_ctx {
169 /**
170 * A handle to a edn.
171 */
172 dif_edn_t *edn;
173 /**
174 * The PLIC IRQ ID where this edn instance's IRQs start.
175 */
177 /**
178 * The edn IRQ that is expected to be encountered in the ISR.
179 */
180 dif_edn_irq_t expected_irq;
181 /**
182 * Whether or not a single IRQ is expected to be encountered in the ISR.
183 */
184 bool is_only_irq;
186
187/**
188 * A handle to a gpio ISR context struct.
189 */
190typedef struct gpio_isr_ctx {
191 /**
192 * A handle to a gpio.
193 */
195 /**
196 * The PLIC IRQ ID where this gpio instance's IRQs start.
197 */
199 /**
200 * The gpio IRQ that is expected to be encountered in the ISR.
201 */
202 dif_gpio_irq_t expected_irq;
203 /**
204 * Whether or not a single IRQ is expected to be encountered in the ISR.
205 */
206 bool is_only_irq;
208
209/**
210 * A handle to a hmac ISR context struct.
211 */
212typedef struct hmac_isr_ctx {
213 /**
214 * A handle to a hmac.
215 */
217 /**
218 * The PLIC IRQ ID where this hmac instance's IRQs start.
219 */
221 /**
222 * The hmac IRQ that is expected to be encountered in the ISR.
223 */
224 dif_hmac_irq_t expected_irq;
225 /**
226 * Whether or not a single IRQ is expected to be encountered in the ISR.
227 */
228 bool is_only_irq;
230
231/**
232 * A handle to a i2c ISR context struct.
233 */
234typedef struct i2c_isr_ctx {
235 /**
236 * A handle to a i2c.
237 */
238 dif_i2c_t *i2c;
239 /**
240 * The PLIC IRQ ID where this i2c instance's IRQs start.
241 */
243 /**
244 * The i2c IRQ that is expected to be encountered in the ISR.
245 */
246 dif_i2c_irq_t expected_irq;
247 /**
248 * Whether or not a single IRQ is expected to be encountered in the ISR.
249 */
250 bool is_only_irq;
252
253/**
254 * A handle to a keymgr_dpe ISR context struct.
255 */
256typedef struct keymgr_dpe_isr_ctx {
257 /**
258 * A handle to a keymgr_dpe.
259 */
261 /**
262 * The PLIC IRQ ID where this keymgr_dpe instance's IRQs start.
263 */
265 /**
266 * The keymgr_dpe IRQ that is expected to be encountered in the ISR.
267 */
268 dif_keymgr_dpe_irq_t expected_irq;
269 /**
270 * Whether or not a single IRQ is expected to be encountered in the ISR.
271 */
274
275/**
276 * A handle to a kmac ISR context struct.
277 */
278typedef struct kmac_isr_ctx {
279 /**
280 * A handle to a kmac.
281 */
283 /**
284 * The PLIC IRQ ID where this kmac instance's IRQs start.
285 */
287 /**
288 * The kmac IRQ that is expected to be encountered in the ISR.
289 */
290 dif_kmac_irq_t expected_irq;
291 /**
292 * Whether or not a single IRQ is expected to be encountered in the ISR.
293 */
294 bool is_only_irq;
296
297/**
298 * A handle to a mbx ISR context struct.
299 */
300typedef struct mbx_isr_ctx {
301 /**
302 * A handle to a mbx.
303 */
305 /**
306 * The PLIC IRQ ID where this mbx instance's IRQs start.
307 */
309 /**
310 * The mbx IRQ that is expected to be encountered in the ISR.
311 */
312 dif_mbx_irq_t expected_irq;
313 /**
314 * Whether or not a single IRQ is expected to be encountered in the ISR.
315 */
318
319/**
320 * A handle to a otbn ISR context struct.
321 */
322typedef struct otbn_isr_ctx {
323 /**
324 * A handle to a otbn.
325 */
327 /**
328 * The PLIC IRQ ID where this otbn instance's IRQs start.
329 */
331 /**
332 * The otbn IRQ that is expected to be encountered in the ISR.
333 */
334 dif_otbn_irq_t expected_irq;
335 /**
336 * Whether or not a single IRQ is expected to be encountered in the ISR.
337 */
338 bool is_only_irq;
340
341/**
342 * A handle to a otp_ctrl ISR context struct.
343 */
344typedef struct otp_ctrl_isr_ctx {
345 /**
346 * A handle to a otp_ctrl.
347 */
349 /**
350 * The PLIC IRQ ID where this otp_ctrl instance's IRQs start.
351 */
353 /**
354 * The otp_ctrl IRQ that is expected to be encountered in the ISR.
355 */
356 dif_otp_ctrl_irq_t expected_irq;
357 /**
358 * Whether or not a single IRQ is expected to be encountered in the ISR.
359 */
360 bool is_only_irq;
362
363/**
364 * A handle to a pwrmgr ISR context struct.
365 */
366typedef struct pwrmgr_isr_ctx {
367 /**
368 * A handle to a pwrmgr.
369 */
371 /**
372 * The PLIC IRQ ID where this pwrmgr instance's IRQs start.
373 */
375 /**
376 * The pwrmgr IRQ that is expected to be encountered in the ISR.
377 */
378 dif_pwrmgr_irq_t expected_irq;
379 /**
380 * Whether or not a single IRQ is expected to be encountered in the ISR.
381 */
382 bool is_only_irq;
384
385/**
386 * A handle to a racl_ctrl ISR context struct.
387 */
388typedef struct racl_ctrl_isr_ctx {
389 /**
390 * A handle to a racl_ctrl.
391 */
393 /**
394 * The PLIC IRQ ID where this racl_ctrl instance's IRQs start.
395 */
397 /**
398 * The racl_ctrl IRQ that is expected to be encountered in the ISR.
399 */
400 dif_racl_ctrl_irq_t expected_irq;
401 /**
402 * Whether or not a single IRQ is expected to be encountered in the ISR.
403 */
406
407/**
408 * A handle to a rv_timer ISR context struct.
409 */
410typedef struct rv_timer_isr_ctx {
411 /**
412 * A handle to a rv_timer.
413 */
415 /**
416 * The PLIC IRQ ID where this rv_timer instance's IRQs start.
417 */
419 /**
420 * The rv_timer IRQ that is expected to be encountered in the ISR.
421 */
422 dif_rv_timer_irq_t expected_irq;
423 /**
424 * Whether or not a single IRQ is expected to be encountered in the ISR.
425 */
426 bool is_only_irq;
428
429/**
430 * A handle to a soc_proxy ISR context struct.
431 */
432typedef struct soc_proxy_isr_ctx {
433 /**
434 * A handle to a soc_proxy.
435 */
437 /**
438 * The PLIC IRQ ID where this soc_proxy instance's IRQs start.
439 */
441 /**
442 * The soc_proxy IRQ that is expected to be encountered in the ISR.
443 */
444 dif_soc_proxy_irq_t expected_irq;
445 /**
446 * Whether or not a single IRQ is expected to be encountered in the ISR.
447 */
450
451/**
452 * A handle to a spi_device ISR context struct.
453 */
454typedef struct spi_device_isr_ctx {
455 /**
456 * A handle to a spi_device.
457 */
459 /**
460 * The PLIC IRQ ID where this spi_device instance's IRQs start.
461 */
463 /**
464 * The spi_device IRQ that is expected to be encountered in the ISR.
465 */
466 dif_spi_device_irq_t expected_irq;
467 /**
468 * Whether or not a single IRQ is expected to be encountered in the ISR.
469 */
470 bool is_only_irq;
472
473/**
474 * A handle to a spi_host ISR context struct.
475 */
476typedef struct spi_host_isr_ctx {
477 /**
478 * A handle to a spi_host.
479 */
481 /**
482 * The PLIC IRQ ID where this spi_host instance's IRQs start.
483 */
485 /**
486 * The spi_host IRQ that is expected to be encountered in the ISR.
487 */
488 dif_spi_host_irq_t expected_irq;
489 /**
490 * Whether or not a single IRQ is expected to be encountered in the ISR.
491 */
492 bool is_only_irq;
494
495/**
496 * A handle to a uart ISR context struct.
497 */
498typedef struct uart_isr_ctx {
499 /**
500 * A handle to a uart.
501 */
503 /**
504 * The PLIC IRQ ID where this uart instance's IRQs start.
505 */
507 /**
508 * The uart IRQ that is expected to be encountered in the ISR.
509 */
510 dif_uart_irq_t expected_irq;
511 /**
512 * Whether or not a single IRQ is expected to be encountered in the ISR.
513 */
514 bool is_only_irq;
516
517/**
518 * Services an ac_range_check IRQ.
519 *
520 * @param plic_ctx A PLIC ISR context handle.
521 * @param ac_range_check_ctx A(n) ac_range_check ISR context handle.
522 * @param[out] peripheral_serviced Out param for the peripheral that was
523 * serviced.
524 * @param[out] irq_serviced Out param for the IRQ that was serviced.
525 */
527 plic_isr_ctx_t plic_ctx, ac_range_check_isr_ctx_t ac_range_check_ctx,
528 top_darjeeling_plic_peripheral_t *peripheral_serviced,
529 dif_ac_range_check_irq_t *irq_serviced);
530
531/**
532 * Services an alert_handler IRQ.
533 *
534 * @param plic_ctx A PLIC ISR context handle.
535 * @param alert_handler_ctx A(n) alert_handler ISR context handle.
536 * @param[out] peripheral_serviced Out param for the peripheral that was
537 * serviced.
538 * @param[out] irq_serviced Out param for the IRQ that was serviced.
539 */
541 plic_isr_ctx_t plic_ctx, alert_handler_isr_ctx_t alert_handler_ctx,
542 top_darjeeling_plic_peripheral_t *peripheral_serviced,
543 dif_alert_handler_irq_t *irq_serviced);
544
545/**
546 * Services an aon_timer IRQ.
547 *
548 * @param plic_ctx A PLIC ISR context handle.
549 * @param aon_timer_ctx A(n) aon_timer ISR context handle.
550 * @param[out] peripheral_serviced Out param for the peripheral that was
551 * serviced.
552 * @param[out] irq_serviced Out param for the IRQ that was serviced.
553 */
555 plic_isr_ctx_t plic_ctx, aon_timer_isr_ctx_t aon_timer_ctx,
556 top_darjeeling_plic_peripheral_t *peripheral_serviced,
557 dif_aon_timer_irq_t *irq_serviced);
558
559/**
560 * Services an csrng IRQ.
561 *
562 * @param plic_ctx A PLIC ISR context handle.
563 * @param csrng_ctx A(n) csrng ISR context handle.
564 * @param[out] peripheral_serviced Out param for the peripheral that was
565 * serviced.
566 * @param[out] irq_serviced Out param for the IRQ that was serviced.
567 */
569 plic_isr_ctx_t plic_ctx, csrng_isr_ctx_t csrng_ctx,
570 top_darjeeling_plic_peripheral_t *peripheral_serviced,
571 dif_csrng_irq_t *irq_serviced);
572
573/**
574 * Services an dma IRQ.
575 *
576 * @param plic_ctx A PLIC ISR context handle.
577 * @param dma_ctx A(n) dma ISR context handle.
578 * @param mute_status_irq set to true to disable the serviced status type IRQ.
579 * @param[out] peripheral_serviced Out param for the peripheral that was
580 * serviced.
581 * @param[out] irq_serviced Out param for the IRQ that was serviced.
582 */
584 plic_isr_ctx_t plic_ctx, dma_isr_ctx_t dma_ctx, bool mute_status_irq,
585 top_darjeeling_plic_peripheral_t *peripheral_serviced,
586 dif_dma_irq_t *irq_serviced);
587
588/**
589 * Services an edn IRQ.
590 *
591 * @param plic_ctx A PLIC ISR context handle.
592 * @param edn_ctx A(n) edn ISR context handle.
593 * @param[out] peripheral_serviced Out param for the peripheral that was
594 * serviced.
595 * @param[out] irq_serviced Out param for the IRQ that was serviced.
596 */
598 plic_isr_ctx_t plic_ctx, edn_isr_ctx_t edn_ctx,
599 top_darjeeling_plic_peripheral_t *peripheral_serviced,
600 dif_edn_irq_t *irq_serviced);
601
602/**
603 * Services an gpio IRQ.
604 *
605 * @param plic_ctx A PLIC ISR context handle.
606 * @param gpio_ctx A(n) gpio ISR context handle.
607 * @param[out] peripheral_serviced Out param for the peripheral that was
608 * serviced.
609 * @param[out] irq_serviced Out param for the IRQ that was serviced.
610 */
612 plic_isr_ctx_t plic_ctx, gpio_isr_ctx_t gpio_ctx,
613 top_darjeeling_plic_peripheral_t *peripheral_serviced,
614 dif_gpio_irq_t *irq_serviced);
615
616/**
617 * Services an hmac IRQ.
618 *
619 * @param plic_ctx A PLIC ISR context handle.
620 * @param hmac_ctx A(n) hmac ISR context handle.
621 * @param mute_status_irq set to true to disable the serviced status type IRQ.
622 * @param[out] peripheral_serviced Out param for the peripheral that was
623 * serviced.
624 * @param[out] irq_serviced Out param for the IRQ that was serviced.
625 */
627 plic_isr_ctx_t plic_ctx, hmac_isr_ctx_t hmac_ctx, bool mute_status_irq,
628 top_darjeeling_plic_peripheral_t *peripheral_serviced,
629 dif_hmac_irq_t *irq_serviced);
630
631/**
632 * Services an i2c IRQ.
633 *
634 * @param plic_ctx A PLIC ISR context handle.
635 * @param i2c_ctx A(n) i2c ISR context handle.
636 * @param mute_status_irq set to true to disable the serviced status type IRQ.
637 * @param[out] peripheral_serviced Out param for the peripheral that was
638 * serviced.
639 * @param[out] irq_serviced Out param for the IRQ that was serviced.
640 */
642 plic_isr_ctx_t plic_ctx, i2c_isr_ctx_t i2c_ctx, bool mute_status_irq,
643 top_darjeeling_plic_peripheral_t *peripheral_serviced,
644 dif_i2c_irq_t *irq_serviced);
645
646/**
647 * Services an keymgr_dpe IRQ.
648 *
649 * @param plic_ctx A PLIC ISR context handle.
650 * @param keymgr_dpe_ctx A(n) keymgr_dpe ISR context handle.
651 * @param[out] peripheral_serviced Out param for the peripheral that was
652 * serviced.
653 * @param[out] irq_serviced Out param for the IRQ that was serviced.
654 */
656 plic_isr_ctx_t plic_ctx, keymgr_dpe_isr_ctx_t keymgr_dpe_ctx,
657 top_darjeeling_plic_peripheral_t *peripheral_serviced,
658 dif_keymgr_dpe_irq_t *irq_serviced);
659
660/**
661 * Services an kmac IRQ.
662 *
663 * @param plic_ctx A PLIC ISR context handle.
664 * @param kmac_ctx A(n) kmac ISR context handle.
665 * @param mute_status_irq set to true to disable the serviced status type IRQ.
666 * @param[out] peripheral_serviced Out param for the peripheral that was
667 * serviced.
668 * @param[out] irq_serviced Out param for the IRQ that was serviced.
669 */
671 plic_isr_ctx_t plic_ctx, kmac_isr_ctx_t kmac_ctx, bool mute_status_irq,
672 top_darjeeling_plic_peripheral_t *peripheral_serviced,
673 dif_kmac_irq_t *irq_serviced);
674
675/**
676 * Services an mbx IRQ.
677 *
678 * @param plic_ctx A PLIC ISR context handle.
679 * @param mbx_ctx A(n) mbx ISR context handle.
680 * @param[out] peripheral_serviced Out param for the peripheral that was
681 * serviced.
682 * @param[out] irq_serviced Out param for the IRQ that was serviced.
683 */
685 plic_isr_ctx_t plic_ctx, mbx_isr_ctx_t mbx_ctx,
686 top_darjeeling_plic_peripheral_t *peripheral_serviced,
687 dif_mbx_irq_t *irq_serviced);
688
689/**
690 * Services an otbn IRQ.
691 *
692 * @param plic_ctx A PLIC ISR context handle.
693 * @param otbn_ctx A(n) otbn ISR context handle.
694 * @param[out] peripheral_serviced Out param for the peripheral that was
695 * serviced.
696 * @param[out] irq_serviced Out param for the IRQ that was serviced.
697 */
699 plic_isr_ctx_t plic_ctx, otbn_isr_ctx_t otbn_ctx,
700 top_darjeeling_plic_peripheral_t *peripheral_serviced,
701 dif_otbn_irq_t *irq_serviced);
702
703/**
704 * Services an otp_ctrl IRQ.
705 *
706 * @param plic_ctx A PLIC ISR context handle.
707 * @param otp_ctrl_ctx A(n) otp_ctrl ISR context handle.
708 * @param[out] peripheral_serviced Out param for the peripheral that was
709 * serviced.
710 * @param[out] irq_serviced Out param for the IRQ that was serviced.
711 */
713 plic_isr_ctx_t plic_ctx, otp_ctrl_isr_ctx_t otp_ctrl_ctx,
714 top_darjeeling_plic_peripheral_t *peripheral_serviced,
715 dif_otp_ctrl_irq_t *irq_serviced);
716
717/**
718 * Services an pwrmgr IRQ.
719 *
720 * @param plic_ctx A PLIC ISR context handle.
721 * @param pwrmgr_ctx A(n) pwrmgr ISR context handle.
722 * @param[out] peripheral_serviced Out param for the peripheral that was
723 * serviced.
724 * @param[out] irq_serviced Out param for the IRQ that was serviced.
725 */
727 plic_isr_ctx_t plic_ctx, pwrmgr_isr_ctx_t pwrmgr_ctx,
728 top_darjeeling_plic_peripheral_t *peripheral_serviced,
729 dif_pwrmgr_irq_t *irq_serviced);
730
731/**
732 * Services an racl_ctrl IRQ.
733 *
734 * @param plic_ctx A PLIC ISR context handle.
735 * @param racl_ctrl_ctx A(n) racl_ctrl ISR context handle.
736 * @param mute_status_irq set to true to disable the serviced status type IRQ.
737 * @param[out] peripheral_serviced Out param for the peripheral that was
738 * serviced.
739 * @param[out] irq_serviced Out param for the IRQ that was serviced.
740 */
742 plic_isr_ctx_t plic_ctx, racl_ctrl_isr_ctx_t racl_ctrl_ctx,
743 bool mute_status_irq, top_darjeeling_plic_peripheral_t *peripheral_serviced,
744 dif_racl_ctrl_irq_t *irq_serviced);
745
746/**
747 * Services an rv_timer IRQ.
748 *
749 * @param plic_ctx A PLIC ISR context handle.
750 * @param rv_timer_ctx A(n) rv_timer ISR context handle.
751 * @param[out] peripheral_serviced Out param for the peripheral that was
752 * serviced.
753 * @param[out] irq_serviced Out param for the IRQ that was serviced.
754 */
756 plic_isr_ctx_t plic_ctx, rv_timer_isr_ctx_t rv_timer_ctx,
757 top_darjeeling_plic_peripheral_t *peripheral_serviced,
758 dif_rv_timer_irq_t *irq_serviced);
759
760/**
761 * Services an soc_proxy IRQ.
762 *
763 * @param plic_ctx A PLIC ISR context handle.
764 * @param soc_proxy_ctx A(n) soc_proxy ISR context handle.
765 * @param[out] peripheral_serviced Out param for the peripheral that was
766 * serviced.
767 * @param[out] irq_serviced Out param for the IRQ that was serviced.
768 */
770 plic_isr_ctx_t plic_ctx, soc_proxy_isr_ctx_t soc_proxy_ctx,
771 top_darjeeling_plic_peripheral_t *peripheral_serviced,
772 dif_soc_proxy_irq_t *irq_serviced);
773
774/**
775 * Services an spi_device IRQ.
776 *
777 * @param plic_ctx A PLIC ISR context handle.
778 * @param spi_device_ctx A(n) spi_device ISR context handle.
779 * @param mute_status_irq set to true to disable the serviced status type IRQ.
780 * @param[out] peripheral_serviced Out param for the peripheral that was
781 * serviced.
782 * @param[out] irq_serviced Out param for the IRQ that was serviced.
783 */
785 plic_isr_ctx_t plic_ctx, spi_device_isr_ctx_t spi_device_ctx,
786 bool mute_status_irq, top_darjeeling_plic_peripheral_t *peripheral_serviced,
787 dif_spi_device_irq_t *irq_serviced);
788
789/**
790 * Services an spi_host IRQ.
791 *
792 * @param plic_ctx A PLIC ISR context handle.
793 * @param spi_host_ctx A(n) spi_host ISR context handle.
794 * @param mute_status_irq set to true to disable the serviced status type IRQ.
795 * @param[out] peripheral_serviced Out param for the peripheral that was
796 * serviced.
797 * @param[out] irq_serviced Out param for the IRQ that was serviced.
798 */
800 plic_isr_ctx_t plic_ctx, spi_host_isr_ctx_t spi_host_ctx,
801 bool mute_status_irq, top_darjeeling_plic_peripheral_t *peripheral_serviced,
802 dif_spi_host_irq_t *irq_serviced);
803
804/**
805 * Services an uart IRQ.
806 *
807 * @param plic_ctx A PLIC ISR context handle.
808 * @param uart_ctx A(n) uart ISR context handle.
809 * @param mute_status_irq set to true to disable the serviced status type IRQ.
810 * @param[out] peripheral_serviced Out param for the peripheral that was
811 * serviced.
812 * @param[out] irq_serviced Out param for the IRQ that was serviced.
813 */
815 plic_isr_ctx_t plic_ctx, uart_isr_ctx_t uart_ctx, bool mute_status_irq,
816 top_darjeeling_plic_peripheral_t *peripheral_serviced,
817 dif_uart_irq_t *irq_serviced);
818
819#endif // OPENTITAN_SW_DEVICE_LIB_TESTING_AUTOGEN_ISR_TESTUTILS_H_