Trait opentitanlib::io::jtag::Jtag

source ·

pub trait Jtag {
Show 22 methods    // Required methods
    fn into_raw(self: Box<Self>) -> Result<OpenOcd>;
    fn as_raw(&mut self) -> Result<&mut OpenOcd>;
    fn disconnect(self: Box<Self>) -> Result<()>;
    fn tap(&self) -> JtagTap;
    fn read_lc_ctrl_reg(&mut self, reg: &LcCtrlReg) -> Result<u32>;
    fn write_lc_ctrl_reg(&mut self, reg: &LcCtrlReg, value: u32) -> Result<()>;
    fn read_memory(&mut self, addr: u32, buf: &mut [u8]) -> Result<usize>;
    fn read_memory32(&mut self, addr: u32, buf: &mut [u32]) -> Result<usize>;
    fn write_memory(&mut self, addr: u32, buf: &[u8]) -> Result<()>;
    fn write_memory32(&mut self, addr: u32, buf: &[u32]) -> Result<()>;
    fn halt(&mut self) -> Result<()>;
    fn wait_halt(&mut self, timeout: Duration) -> Result<()>;
    fn resume(&mut self) -> Result<()>;
    fn resume_at(&mut self, addr: u32) -> Result<()>;
    fn step(&mut self) -> Result<()>;
    fn step_at(&mut self, addr: u32) -> Result<()>;
    fn reset(&mut self, run: bool) -> Result<()>;
    fn read_riscv_reg(&mut self, reg: &RiscvReg) -> Result<u32>;
    fn write_riscv_reg(&mut self, reg: &RiscvReg, val: u32) -> Result<()>;
    fn set_breakpoint(&mut self, addr: u32, hw: bool) -> Result<()>;
    fn remove_breakpoint(&mut self, addr: u32) -> Result<()>;
    fn remove_all_breakpoints(&mut self) -> Result<()>;
}

Expand description

A trait which represents a TAP on a JTAG chain.

Required Methods§

source

fn into_raw(self: Box<Self>) -> Result<OpenOcd>

Stop further operation and returns raw OpenOCD instance.

source

fn as_raw(&mut self) -> Result<&mut OpenOcd>

Returns the underlying OpenOCD instance.

source

fn disconnect(self: Box<Self>) -> Result<()>

Disconnect from the TAP.

source

fn tap(&self) -> JtagTap

Get TAP we are currently connected too.

source

fn read_lc_ctrl_reg(&mut self, reg: &LcCtrlReg) -> Result<u32>

Read a lifecycle controller register.

source

fn write_lc_ctrl_reg(&mut self, reg: &LcCtrlReg, value: u32) -> Result<()>

Write a value to a lifecycle controller register.

source

fn read_memory(&mut self, addr: u32, buf: &mut [u8]) -> Result<usize>

Read bytes/words from memory into the provided buffer. When reading bytes, each memory access is 8 bits. When reading words, each memory access is 32 bit. If the hardware does not support unaligned memory accesses, this function will fail.

On success, returns the number of bytes/words read.

source

fn read_memory32(&mut self, addr: u32, buf: &mut [u32]) -> Result<usize>

source

fn write_memory(&mut self, addr: u32, buf: &[u8]) -> Result<()>

Write bytes/words to memory.

source

fn write_memory32(&mut self, addr: u32, buf: &[u32]) -> Result<()>

source

fn halt(&mut self) -> Result<()>

Halt execution.

source

fn wait_halt(&mut self, timeout: Duration) -> Result<()>

Wait until the target halt. This does NOT halt the target on timeout.

source

fn resume(&mut self) -> Result<()>

Resume execution at its current code position.

source

fn resume_at(&mut self, addr: u32) -> Result<()>

Resume execution at the specified address.

source

fn step(&mut self) -> Result<()>

Single-step the target at its current code position.

source

fn step_at(&mut self, addr: u32) -> Result<()>

Single-step the target at the specified address.

source

fn reset(&mut self, run: bool) -> Result<()>

Reset the target as hard as possible. If run is true, the target will start running code immediately after reset, otherwise it will be halted immediately.

source