Enum opentitanlib::io::gpio::BitbangEntry
source · pub enum BitbangEntry<'rd, 'wr> {
Write(&'wr [u8]),
WriteOwned(Box<[u8]>),
Both(&'wr [u8], &'rd mut [u8]),
BothOwned(Box<[u8]>),
Delay(u32),
Await {
mask: u8,
pattern: u8,
},
}
Expand description
Represents one entry in the specification of a bitbanging waveform. Pins must have been
configured as either PushPull
, OpenDrain
or Input
prior to requesting a bitbang
operation.
Write
and Both
are somewhat equivalent to their namesakes in spi::Transfer
, that is
Write
requests using the given data for generating waveforms on any of the pins configured
as output, while disregarding the actual levels of the pins. Both
requests generating a
waveform, and also sampling every pin at each clock tick.
Variants§
Write(&'wr [u8])
Represents a sequence of pin values. Bit 0 in each byte controls the first GpioPin
in
the slice given to GpioBitbanging::run()
, bit 1 controls the second GpioPin
, and so
on. Each byte is applied to the pins in sequence, with a particular delay between each
given by the clock_tick
argument to run()
.
WriteOwned(Box<[u8]>)
Same as Write
, but this BitbangEntry
owns the data.
Both(&'wr [u8], &'rd mut [u8])
Represents a sequence of pin values as above, but additionally captures the value of any
pins in Input
or OpenDrain
mode. At each clock tick, the input levels are sampled
just before the given output levels are applied, meaning that the data coming back will be
offset by one sample.
BothOwned(Box<[u8]>)
Same as Both
, but this BitbangEntry
owns the data, which will be overwritten.
Delay(u32)
Represents a delay of the given number of clock ticks in which the output levels are held
as indicated by the last byte of the preceding Write
/Both
entry.
A delay of zero is invalid. A delay of one tick is equivalent to not specifying any
Delay
between two Write
blocks, which is also equivalent to concatenating the two into
a single Write
block.
Await
Similar to Delay
, but waits until (pin_values ^ pattern) & mask
equals zero, that is,
until the set of pins indicated by ones in mask
all have the the value indicated in
pattern
.
Auto Trait Implementations§
impl<'rd, 'wr> RefUnwindSafe for BitbangEntry<'rd, 'wr>
impl<'rd, 'wr> Send for BitbangEntry<'rd, 'wr>
impl<'rd, 'wr> Sync for BitbangEntry<'rd, 'wr>
impl<'rd, 'wr> Unpin for BitbangEntry<'rd, 'wr>
impl<'rd, 'wr> !UnwindSafe for BitbangEntry<'rd, 'wr>
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