rram_ctrl_regs.h File Reference

Generated register defines for rram_ctrl. More...

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Macros
#define	RRAM_CTRL_PARAM_EXEC_EN   2724870391
#define	RRAM_CTRL_PARAM_NUM_REGIONS   8
#define	RRAM_CTRL_PARAM_NUM_INFO_PAGES   8
#define	RRAM_CTRL_PARAM_NUM_DATA_PAGES   4096
#define	RRAM_CTRL_PARAM_WORDS_PER_PAGE   32
#define	RRAM_CTRL_PARAM_BYTES_PER_WORD   16
#define	RRAM_CTRL_PARAM_BYTES_PER_PAGE   512
#define	RRAM_CTRL_PARAM_NUM_ALERTS   5
#define	RRAM_CTRL_PARAM_REG_WIDTH   32
#define	RRAM_CTRL_INTR_COMMON_WR_EMPTY_BIT   0
#define	RRAM_CTRL_INTR_COMMON_WR_LVL_BIT   1
#define	RRAM_CTRL_INTR_COMMON_RD_FULL_BIT   2
#define	RRAM_CTRL_INTR_COMMON_RD_LVL_BIT   3
#define	RRAM_CTRL_INTR_COMMON_OP_DONE_BIT   4
#define	RRAM_CTRL_INTR_COMMON_CORR_ERR_BIT   5
#define	RRAM_CTRL_INTR_STATE_REG_OFFSET   0x0
#define	RRAM_CTRL_INTR_STATE_REG_RESVAL   0x3u
#define	RRAM_CTRL_INTR_STATE_WR_EMPTY_BIT   0
#define	RRAM_CTRL_INTR_STATE_WR_LVL_BIT   1
#define	RRAM_CTRL_INTR_STATE_RD_FULL_BIT   2
#define	RRAM_CTRL_INTR_STATE_RD_LVL_BIT   3
#define	RRAM_CTRL_INTR_STATE_OP_DONE_BIT   4
#define	RRAM_CTRL_INTR_STATE_CORR_ERR_BIT   5
#define	RRAM_CTRL_INTR_ENABLE_REG_OFFSET   0x4
#define	RRAM_CTRL_INTR_ENABLE_REG_RESVAL   0x0u
#define	RRAM_CTRL_INTR_ENABLE_WR_EMPTY_BIT   0
#define	RRAM_CTRL_INTR_ENABLE_WR_LVL_BIT   1
#define	RRAM_CTRL_INTR_ENABLE_RD_FULL_BIT   2
#define	RRAM_CTRL_INTR_ENABLE_RD_LVL_BIT   3
#define	RRAM_CTRL_INTR_ENABLE_OP_DONE_BIT   4
#define	RRAM_CTRL_INTR_ENABLE_CORR_ERR_BIT   5
#define	RRAM_CTRL_INTR_TEST_REG_OFFSET   0x8
#define	RRAM_CTRL_INTR_TEST_REG_RESVAL   0x0u
#define	RRAM_CTRL_INTR_TEST_WR_EMPTY_BIT   0
#define	RRAM_CTRL_INTR_TEST_WR_LVL_BIT   1
#define	RRAM_CTRL_INTR_TEST_RD_FULL_BIT   2
#define	RRAM_CTRL_INTR_TEST_RD_LVL_BIT   3
#define	RRAM_CTRL_INTR_TEST_OP_DONE_BIT   4
#define	RRAM_CTRL_INTR_TEST_CORR_ERR_BIT   5
#define	RRAM_CTRL_ALERT_TEST_REG_OFFSET   0xc
#define	RRAM_CTRL_ALERT_TEST_REG_RESVAL   0x0u
#define	RRAM_CTRL_ALERT_TEST_RECOV_ERR_BIT   0
#define	RRAM_CTRL_ALERT_TEST_FATAL_STD_ERR_BIT   1
#define	RRAM_CTRL_ALERT_TEST_FATAL_ERR_BIT   2
#define	RRAM_CTRL_ALERT_TEST_FATAL_MACRO_ERR_BIT   3
#define	RRAM_CTRL_ALERT_TEST_RECOV_MACRO_ERR_BIT   4
#define	RRAM_CTRL_DIS_REG_OFFSET   0x10
#define	RRAM_CTRL_DIS_REG_RESVAL   0x99u
#define	RRAM_CTRL_DIS_SW_DIS_MASK   0xfu
#define	RRAM_CTRL_DIS_SW_DIS_OFFSET   0
#define	RRAM_CTRL_DIS_SW_DIS_FIELD    ((bitfield_field32_t) { .mask = RRAM_CTRL_DIS_SW_DIS_MASK, .index = RRAM_CTRL_DIS_SW_DIS_OFFSET })
#define	RRAM_CTRL_DIS_RELBL_ERR_FATAL_MASK   0xfu
#define	RRAM_CTRL_DIS_RELBL_ERR_FATAL_OFFSET   4
#define	RRAM_CTRL_DIS_RELBL_ERR_FATAL_FIELD    ((bitfield_field32_t) { .mask = RRAM_CTRL_DIS_RELBL_ERR_FATAL_MASK, .index = RRAM_CTRL_DIS_RELBL_ERR_FATAL_OFFSET })
#define	RRAM_CTRL_EXEC_REG_OFFSET   0x14
#define	RRAM_CTRL_EXEC_REG_RESVAL   0x0u
#define	RRAM_CTRL_INIT_REG_OFFSET   0x18
#define	RRAM_CTRL_INIT_REG_RESVAL   0x0u
#define	RRAM_CTRL_INIT_VAL_BIT   0
#define	RRAM_CTRL_CTRL_REGWEN_REG_OFFSET   0x1c
#define	RRAM_CTRL_CTRL_REGWEN_REG_RESVAL   0x1u
#define	RRAM_CTRL_CTRL_REGWEN_EN_BIT   0
#define	RRAM_CTRL_CONTROL_REG_OFFSET   0x20
#define	RRAM_CTRL_CONTROL_REG_RESVAL   0x0u
#define	RRAM_CTRL_CONTROL_START_BIT   0
#define	RRAM_CTRL_CONTROL_OP_MASK   0x3u
#define	RRAM_CTRL_CONTROL_OP_OFFSET   4
#define	RRAM_CTRL_CONTROL_OP_FIELD    ((bitfield_field32_t) { .mask = RRAM_CTRL_CONTROL_OP_MASK, .index = RRAM_CTRL_CONTROL_OP_OFFSET })
#define	RRAM_CTRL_CONTROL_OP_VALUE_READ   0x0
#define	RRAM_CTRL_CONTROL_OP_VALUE_WRITE   0x1
#define	RRAM_CTRL_CONTROL_OP_VALUE_REWRITE   0x2
#define	RRAM_CTRL_CONTROL_PARTITION_BIT   8
#define	RRAM_CTRL_CONTROL_NUM_MASK   0x3ffu
#define	RRAM_CTRL_CONTROL_NUM_OFFSET   16
#define	RRAM_CTRL_CONTROL_NUM_FIELD    ((bitfield_field32_t) { .mask = RRAM_CTRL_CONTROL_NUM_MASK, .index = RRAM_CTRL_CONTROL_NUM_OFFSET })
#define	RRAM_CTRL_ADDR_REG_OFFSET   0x24
#define	RRAM_CTRL_ADDR_REG_RESVAL   0x0u
#define	RRAM_CTRL_ADDR_START_MASK   0x1fffffu
#define	RRAM_CTRL_ADDR_START_OFFSET   0
#define	RRAM_CTRL_ADDR_START_FIELD    ((bitfield_field32_t) { .mask = RRAM_CTRL_ADDR_START_MASK, .index = RRAM_CTRL_ADDR_START_OFFSET })
#define	RRAM_CTRL_REGION_CFG_REGWEN_REGION_FIELD_WIDTH   1
#define	RRAM_CTRL_REGION_CFG_REGWEN_MULTIREG_COUNT   8
#define	RRAM_CTRL_REGION_CFG_REGWEN_0_REG_OFFSET   0x28
#define	RRAM_CTRL_REGION_CFG_REGWEN_0_REG_RESVAL   0x1u
#define	RRAM_CTRL_REGION_CFG_REGWEN_0_REGION_0_BIT   0
#define	RRAM_CTRL_REGION_CFG_REGWEN_0_REGION_0_VALUE_REGION_LOCKED   0x0
#define	RRAM_CTRL_REGION_CFG_REGWEN_0_REGION_0_VALUE_REGION_ENABLED   0x1
#define	RRAM_CTRL_REGION_CFG_REGWEN_1_REG_OFFSET   0x2c
#define	RRAM_CTRL_REGION_CFG_REGWEN_1_REG_RESVAL   0x1u
#define	RRAM_CTRL_REGION_CFG_REGWEN_1_REGION_1_BIT   0
#define	RRAM_CTRL_REGION_CFG_REGWEN_2_REG_OFFSET   0x30
#define	RRAM_CTRL_REGION_CFG_REGWEN_2_REG_RESVAL   0x1u
#define	RRAM_CTRL_REGION_CFG_REGWEN_2_REGION_2_BIT   0
#define	RRAM_CTRL_REGION_CFG_REGWEN_3_REG_OFFSET   0x34
#define	RRAM_CTRL_REGION_CFG_REGWEN_3_REG_RESVAL   0x1u
#define	RRAM_CTRL_REGION_CFG_REGWEN_3_REGION_3_BIT   0
#define	RRAM_CTRL_REGION_CFG_REGWEN_4_REG_OFFSET   0x38
#define	RRAM_CTRL_REGION_CFG_REGWEN_4_REG_RESVAL   0x1u
#define	RRAM_CTRL_REGION_CFG_REGWEN_4_REGION_4_BIT   0
#define	RRAM_CTRL_REGION_CFG_REGWEN_5_REG_OFFSET   0x3c
#define	RRAM_CTRL_REGION_CFG_REGWEN_5_REG_RESVAL   0x1u
#define	RRAM_CTRL_REGION_CFG_REGWEN_5_REGION_5_BIT   0
#define	RRAM_CTRL_REGION_CFG_REGWEN_6_REG_OFFSET   0x40
#define	RRAM_CTRL_REGION_CFG_REGWEN_6_REG_RESVAL   0x1u
#define	RRAM_CTRL_REGION_CFG_REGWEN_6_REGION_6_BIT   0
#define	RRAM_CTRL_REGION_CFG_REGWEN_7_REG_OFFSET   0x44
#define	RRAM_CTRL_REGION_CFG_REGWEN_7_REG_RESVAL   0x1u
#define	RRAM_CTRL_REGION_CFG_REGWEN_7_REGION_7_BIT   0
#define	RRAM_CTRL_MP_REGION_CFG_EN_FIELD_WIDTH   4
#define	RRAM_CTRL_MP_REGION_CFG_RD_EN_FIELD_WIDTH   4
#define	RRAM_CTRL_MP_REGION_CFG_WR_EN_FIELD_WIDTH   4
#define	RRAM_CTRL_MP_REGION_CFG_SCRAMBLE_EN_FIELD_WIDTH   4
#define	RRAM_CTRL_MP_REGION_CFG_ECC_EN_FIELD_WIDTH   4
#define	RRAM_CTRL_MP_REGION_CFG_MULTIREG_COUNT   8
#define	RRAM_CTRL_MP_REGION_CFG_0_REG_OFFSET   0x48
#define	RRAM_CTRL_MP_REGION_CFG_0_REG_RESVAL   0x99999u
#define	RRAM_CTRL_MP_REGION_CFG_0_EN_0_MASK   0xfu
#define	RRAM_CTRL_MP_REGION_CFG_0_EN_0_OFFSET   0
#define	RRAM_CTRL_MP_REGION_CFG_0_EN_0_FIELD    ((bitfield_field32_t) { .mask = RRAM_CTRL_MP_REGION_CFG_0_EN_0_MASK, .index = RRAM_CTRL_MP_REGION_CFG_0_EN_0_OFFSET })
#define	RRAM_CTRL_MP_REGION_CFG_0_RD_EN_0_MASK   0xfu
#define	RRAM_CTRL_MP_REGION_CFG_0_RD_EN_0_OFFSET   4
#define	RRAM_CTRL_MP_REGION_CFG_0_RD_EN_0_FIELD    ((bitfield_field32_t) { .mask = RRAM_CTRL_MP_REGION_CFG_0_RD_EN_0_MASK, .index = RRAM_CTRL_MP_REGION_CFG_0_RD_EN_0_OFFSET })
#define	RRAM_CTRL_MP_REGION_CFG_0_WR_EN_0_MASK   0xfu
#define	RRAM_CTRL_MP_REGION_CFG_0_WR_EN_0_OFFSET   8
#define	RRAM_CTRL_MP_REGION_CFG_0_WR_EN_0_FIELD    ((bitfield_field32_t) { .mask = RRAM_CTRL_MP_REGION_CFG_0_WR_EN_0_MASK, .index = RRAM_CTRL_MP_REGION_CFG_0_WR_EN_0_OFFSET })
#define	RRAM_CTRL_MP_REGION_CFG_0_SCRAMBLE_EN_0_MASK   0xfu
#define	RRAM_CTRL_MP_REGION_CFG_0_SCRAMBLE_EN_0_OFFSET   12
#define	RRAM_CTRL_MP_REGION_CFG_0_SCRAMBLE_EN_0_FIELD    ((bitfield_field32_t) { .mask = RRAM_CTRL_MP_REGION_CFG_0_SCRAMBLE_EN_0_MASK, .index = RRAM_CTRL_MP_REGION_CFG_0_SCRAMBLE_EN_0_OFFSET })
#define	RRAM_CTRL_MP_REGION_CFG_0_ECC_EN_0_MASK   0xfu
#define	RRAM_CTRL_MP_REGION_CFG_0_ECC_EN_0_OFFSET   16
#define	RRAM_CTRL_MP_REGION_CFG_0_ECC_EN_0_FIELD    ((bitfield_field32_t) { .mask = RRAM_CTRL_MP_REGION_CFG_0_ECC_EN_0_MASK, .index = RRAM_CTRL_MP_REGION_CFG_0_ECC_EN_0_OFFSET })
#define	RRAM_CTRL_MP_REGION_CFG_1_REG_OFFSET   0x4c
#define	RRAM_CTRL_MP_REGION_CFG_1_REG_RESVAL   0x99999u
#define	RRAM_CTRL_MP_REGION_CFG_1_EN_1_MASK   0xfu
#define	RRAM_CTRL_MP_REGION_CFG_1_EN_1_OFFSET   0
#define	RRAM_CTRL_MP_REGION_CFG_1_EN_1_FIELD    ((bitfield_field32_t) { .mask = RRAM_CTRL_MP_REGION_CFG_1_EN_1_MASK, .index = RRAM_CTRL_MP_REGION_CFG_1_EN_1_OFFSET })
#define	RRAM_CTRL_MP_REGION_CFG_1_RD_EN_1_MASK   0xfu
#define	RRAM_CTRL_MP_REGION_CFG_1_RD_EN_1_OFFSET   4
#define	RRAM_CTRL_MP_REGION_CFG_1_RD_EN_1_FIELD    ((bitfield_field32_t) { .mask = RRAM_CTRL_MP_REGION_CFG_1_RD_EN_1_MASK, .index = RRAM_CTRL_MP_REGION_CFG_1_RD_EN_1_OFFSET })
#define	RRAM_CTRL_MP_REGION_CFG_1_WR_EN_1_MASK   0xfu
#define	RRAM_CTRL_MP_REGION_CFG_1_WR_EN_1_OFFSET   8
#define	RRAM_CTRL_MP_REGION_CFG_1_WR_EN_1_FIELD    ((bitfield_field32_t) { .mask = RRAM_CTRL_MP_REGION_CFG_1_WR_EN_1_MASK, .index = RRAM_CTRL_MP_REGION_CFG_1_WR_EN_1_OFFSET })
#define	RRAM_CTRL_MP_REGION_CFG_1_SCRAMBLE_EN_1_MASK   0xfu
#define	RRAM_CTRL_MP_REGION_CFG_1_SCRAMBLE_EN_1_OFFSET   12
#define	RRAM_CTRL_MP_REGION_CFG_1_SCRAMBLE_EN_1_FIELD    ((bitfield_field32_t) { .mask = RRAM_CTRL_MP_REGION_CFG_1_SCRAMBLE_EN_1_MASK, .index = RRAM_CTRL_MP_REGION_CFG_1_SCRAMBLE_EN_1_OFFSET })
#define	RRAM_CTRL_MP_REGION_CFG_1_ECC_EN_1_MASK   0xfu
#define	RRAM_CTRL_MP_REGION_CFG_1_ECC_EN_1_OFFSET   16
#define	RRAM_CTRL_MP_REGION_CFG_1_ECC_EN_1_FIELD    ((bitfield_field32_t) { .mask = RRAM_CTRL_MP_REGION_CFG_1_ECC_EN_1_MASK, .index = RRAM_CTRL_MP_REGION_CFG_1_ECC_EN_1_OFFSET })
#define	RRAM_CTRL_MP_REGION_CFG_2_REG_OFFSET   0x50
#define	RRAM_CTRL_MP_REGION_CFG_2_REG_RESVAL   0x99999u
#define	RRAM_CTRL_MP_REGION_CFG_2_EN_2_MASK   0xfu
#define	RRAM_CTRL_MP_REGION_CFG_2_EN_2_OFFSET   0
#define	RRAM_CTRL_MP_REGION_CFG_2_EN_2_FIELD    ((bitfield_field32_t) { .mask = RRAM_CTRL_MP_REGION_CFG_2_EN_2_MASK, .index = RRAM_CTRL_MP_REGION_CFG_2_EN_2_OFFSET })
#define	RRAM_CTRL_MP_REGION_CFG_2_RD_EN_2_MASK   0xfu
#define	RRAM_CTRL_MP_REGION_CFG_2_RD_EN_2_OFFSET   4
#define	RRAM_CTRL_MP_REGION_CFG_2_RD_EN_2_FIELD    ((bitfield_field32_t) { .mask = RRAM_CTRL_MP_REGION_CFG_2_RD_EN_2_MASK, .index = RRAM_CTRL_MP_REGION_CFG_2_RD_EN_2_OFFSET })
#define	RRAM_CTRL_MP_REGION_CFG_2_WR_EN_2_MASK   0xfu
#define	RRAM_CTRL_MP_REGION_CFG_2_WR_EN_2_OFFSET   8
#define	RRAM_CTRL_MP_REGION_CFG_2_WR_EN_2_FIELD    ((bitfield_field32_t) { .mask = RRAM_CTRL_MP_REGION_CFG_2_WR_EN_2_MASK, .index = RRAM_CTRL_MP_REGION_CFG_2_WR_EN_2_OFFSET })
#define	RRAM_CTRL_MP_REGION_CFG_2_SCRAMBLE_EN_2_MASK   0xfu
#define	RRAM_CTRL_MP_REGION_CFG_2_SCRAMBLE_EN_2_OFFSET   12
#define	RRAM_CTRL_MP_REGION_CFG_2_SCRAMBLE_EN_2_FIELD    ((bitfield_field32_t) { .mask = RRAM_CTRL_MP_REGION_CFG_2_SCRAMBLE_EN_2_MASK, .index = RRAM_CTRL_MP_REGION_CFG_2_SCRAMBLE_EN_2_OFFSET })
#define	RRAM_CTRL_MP_REGION_CFG_2_ECC_EN_2_MASK   0xfu
#define	RRAM_CTRL_MP_REGION_CFG_2_ECC_EN_2_OFFSET   16
#define	RRAM_CTRL_MP_REGION_CFG_2_ECC_EN_2_FIELD    ((bitfield_field32_t) { .mask = RRAM_CTRL_MP_REGION_CFG_2_ECC_EN_2_MASK, .index = RRAM_CTRL_MP_REGION_CFG_2_ECC_EN_2_OFFSET })
#define	RRAM_CTRL_MP_REGION_CFG_3_REG_OFFSET   0x54
#define	RRAM_CTRL_MP_REGION_CFG_3_REG_RESVAL   0x99999u
#define	RRAM_CTRL_MP_REGION_CFG_3_EN_3_MASK   0xfu
#define	RRAM_CTRL_MP_REGION_CFG_3_EN_3_OFFSET   0
#define	RRAM_CTRL_MP_REGION_CFG_3_EN_3_FIELD    ((bitfield_field32_t) { .mask = RRAM_CTRL_MP_REGION_CFG_3_EN_3_MASK, .index = RRAM_CTRL_MP_REGION_CFG_3_EN_3_OFFSET })
#define	RRAM_CTRL_MP_REGION_CFG_3_RD_EN_3_MASK   0xfu
#define	RRAM_CTRL_MP_REGION_CFG_3_RD_EN_3_OFFSET   4
#define	RRAM_CTRL_MP_REGION_CFG_3_RD_EN_3_FIELD    ((bitfield_field32_t) { .mask = RRAM_CTRL_MP_REGION_CFG_3_RD_EN_3_MASK, .index = RRAM_CTRL_MP_REGION_CFG_3_RD_EN_3_OFFSET })
#define	RRAM_CTRL_MP_REGION_CFG_3_WR_EN_3_MASK   0xfu
#define	RRAM_CTRL_MP_REGION_CFG_3_WR_EN_3_OFFSET   8
#define	RRAM_CTRL_MP_REGION_CFG_3_WR_EN_3_FIELD    ((bitfield_field32_t) { .mask = RRAM_CTRL_MP_REGION_CFG_3_WR_EN_3_MASK, .index = RRAM_CTRL_MP_REGION_CFG_3_WR_EN_3_OFFSET })
#define	RRAM_CTRL_MP_REGION_CFG_3_SCRAMBLE_EN_3_MASK   0xfu
#define	RRAM_CTRL_MP_REGION_CFG_3_SCRAMBLE_EN_3_OFFSET   12
#define	RRAM_CTRL_MP_REGION_CFG_3_SCRAMBLE_EN_3_FIELD    ((bitfield_field32_t) { .mask = RRAM_CTRL_MP_REGION_CFG_3_SCRAMBLE_EN_3_MASK, .index = RRAM_CTRL_MP_REGION_CFG_3_SCRAMBLE_EN_3_OFFSET })
#define	RRAM_CTRL_MP_REGION_CFG_3_ECC_EN_3_MASK   0xfu
#define	RRAM_CTRL_MP_REGION_CFG_3_ECC_EN_3_OFFSET   16
#define	RRAM_CTRL_MP_REGION_CFG_3_ECC_EN_3_FIELD    ((bitfield_field32_t) { .mask = RRAM_CTRL_MP_REGION_CFG_3_ECC_EN_3_MASK, .index = RRAM_CTRL_MP_REGION_CFG_3_ECC_EN_3_OFFSET })
#define	RRAM_CTRL_MP_REGION_CFG_4_REG_OFFSET   0x58
#define	RRAM_CTRL_MP_REGION_CFG_4_REG_RESVAL   0x99999u
#define	RRAM_CTRL_MP_REGION_CFG_4_EN_4_MASK   0xfu
#define	RRAM_CTRL_MP_REGION_CFG_4_EN_4_OFFSET   0
#define	RRAM_CTRL_MP_REGION_CFG_4_EN_4_FIELD    ((bitfield_field32_t) { .mask = RRAM_CTRL_MP_REGION_CFG_4_EN_4_MASK, .index = RRAM_CTRL_MP_REGION_CFG_4_EN_4_OFFSET })
#define	RRAM_CTRL_MP_REGION_CFG_4_RD_EN_4_MASK   0xfu
#define	RRAM_CTRL_MP_REGION_CFG_4_RD_EN_4_OFFSET   4
#define	RRAM_CTRL_MP_REGION_CFG_4_RD_EN_4_FIELD    ((bitfield_field32_t) { .mask = RRAM_CTRL_MP_REGION_CFG_4_RD_EN_4_MASK, .index = RRAM_CTRL_MP_REGION_CFG_4_RD_EN_4_OFFSET })
#define	RRAM_CTRL_MP_REGION_CFG_4_WR_EN_4_MASK   0xfu
#define	RRAM_CTRL_MP_REGION_CFG_4_WR_EN_4_OFFSET   8
#define	RRAM_CTRL_MP_REGION_CFG_4_WR_EN_4_FIELD    ((bitfield_field32_t) { .mask = RRAM_CTRL_MP_REGION_CFG_4_WR_EN_4_MASK, .index = RRAM_CTRL_MP_REGION_CFG_4_WR_EN_4_OFFSET })
#define	RRAM_CTRL_MP_REGION_CFG_4_SCRAMBLE_EN_4_MASK   0xfu
#define	RRAM_CTRL_MP_REGION_CFG_4_SCRAMBLE_EN_4_OFFSET   12
#define	RRAM_CTRL_MP_REGION_CFG_4_SCRAMBLE_EN_4_FIELD    ((bitfield_field32_t) { .mask = RRAM_CTRL_MP_REGION_CFG_4_SCRAMBLE_EN_4_MASK, .index = RRAM_CTRL_MP_REGION_CFG_4_SCRAMBLE_EN_4_OFFSET })
#define	RRAM_CTRL_MP_REGION_CFG_4_ECC_EN_4_MASK   0xfu
#define	RRAM_CTRL_MP_REGION_CFG_4_ECC_EN_4_OFFSET   16
#define	RRAM_CTRL_MP_REGION_CFG_4_ECC_EN_4_FIELD    ((bitfield_field32_t) { .mask = RRAM_CTRL_MP_REGION_CFG_4_ECC_EN_4_MASK, .index = RRAM_CTRL_MP_REGION_CFG_4_ECC_EN_4_OFFSET })
#define	RRAM_CTRL_MP_REGION_CFG_5_REG_OFFSET   0x5c
#define	RRAM_CTRL_MP_REGION_CFG_5_REG_RESVAL   0x99999u
#define	RRAM_CTRL_MP_REGION_CFG_5_EN_5_MASK   0xfu
#define	RRAM_CTRL_MP_REGION_CFG_5_EN_5_OFFSET   0
#define	RRAM_CTRL_MP_REGION_CFG_5_EN_5_FIELD    ((bitfield_field32_t) { .mask = RRAM_CTRL_MP_REGION_CFG_5_EN_5_MASK, .index = RRAM_CTRL_MP_REGION_CFG_5_EN_5_OFFSET })
#define	RRAM_CTRL_MP_REGION_CFG_5_RD_EN_5_MASK   0xfu
#define	RRAM_CTRL_MP_REGION_CFG_5_RD_EN_5_OFFSET   4
#define	RRAM_CTRL_MP_REGION_CFG_5_RD_EN_5_FIELD    ((bitfield_field32_t) { .mask = RRAM_CTRL_MP_REGION_CFG_5_RD_EN_5_MASK, .index = RRAM_CTRL_MP_REGION_CFG_5_RD_EN_5_OFFSET })
#define	RRAM_CTRL_MP_REGION_CFG_5_WR_EN_5_MASK   0xfu
#define	RRAM_CTRL_MP_REGION_CFG_5_WR_EN_5_OFFSET   8
#define	RRAM_CTRL_MP_REGION_CFG_5_WR_EN_5_FIELD    ((bitfield_field32_t) { .mask = RRAM_CTRL_MP_REGION_CFG_5_WR_EN_5_MASK, .index = RRAM_CTRL_MP_REGION_CFG_5_WR_EN_5_OFFSET })
#define	RRAM_CTRL_MP_REGION_CFG_5_SCRAMBLE_EN_5_MASK   0xfu
#define	RRAM_CTRL_MP_REGION_CFG_5_SCRAMBLE_EN_5_OFFSET   12
#define	RRAM_CTRL_MP_REGION_CFG_5_SCRAMBLE_EN_5_FIELD    ((bitfield_field32_t) { .mask = RRAM_CTRL_MP_REGION_CFG_5_SCRAMBLE_EN_5_MASK, .index = RRAM_CTRL_MP_REGION_CFG_5_SCRAMBLE_EN_5_OFFSET })
#define	RRAM_CTRL_MP_REGION_CFG_5_ECC_EN_5_MASK   0xfu
#define	RRAM_CTRL_MP_REGION_CFG_5_ECC_EN_5_OFFSET   16
#define	RRAM_CTRL_MP_REGION_CFG_5_ECC_EN_5_FIELD    ((bitfield_field32_t) { .mask = RRAM_CTRL_MP_REGION_CFG_5_ECC_EN_5_MASK, .index = RRAM_CTRL_MP_REGION_CFG_5_ECC_EN_5_OFFSET })
#define	RRAM_CTRL_MP_REGION_CFG_6_REG_OFFSET   0x60
#define	RRAM_CTRL_MP_REGION_CFG_6_REG_RESVAL   0x99999u
#define	RRAM_CTRL_MP_REGION_CFG_6_EN_6_MASK   0xfu
#define	RRAM_CTRL_MP_REGION_CFG_6_EN_6_OFFSET   0
#define	RRAM_CTRL_MP_REGION_CFG_6_EN_6_FIELD    ((bitfield_field32_t) { .mask = RRAM_CTRL_MP_REGION_CFG_6_EN_6_MASK, .index = RRAM_CTRL_MP_REGION_CFG_6_EN_6_OFFSET })
#define	RRAM_CTRL_MP_REGION_CFG_6_RD_EN_6_MASK   0xfu
#define	RRAM_CTRL_MP_REGION_CFG_6_RD_EN_6_OFFSET   4
#define	RRAM_CTRL_MP_REGION_CFG_6_RD_EN_6_FIELD    ((bitfield_field32_t) { .mask = RRAM_CTRL_MP_REGION_CFG_6_RD_EN_6_MASK, .index = RRAM_CTRL_MP_REGION_CFG_6_RD_EN_6_OFFSET })
#define	RRAM_CTRL_MP_REGION_CFG_6_WR_EN_6_MASK   0xfu
#define	RRAM_CTRL_MP_REGION_CFG_6_WR_EN_6_OFFSET   8
#define	RRAM_CTRL_MP_REGION_CFG_6_WR_EN_6_FIELD    ((bitfield_field32_t) { .mask = RRAM_CTRL_MP_REGION_CFG_6_WR_EN_6_MASK, .index = RRAM_CTRL_MP_REGION_CFG_6_WR_EN_6_OFFSET })
#define	RRAM_CTRL_MP_REGION_CFG_6_SCRAMBLE_EN_6_MASK   0xfu
#define	RRAM_CTRL_MP_REGION_CFG_6_SCRAMBLE_EN_6_OFFSET   12
#define	RRAM_CTRL_MP_REGION_CFG_6_SCRAMBLE_EN_6_FIELD    ((bitfield_field32_t) { .mask = RRAM_CTRL_MP_REGION_CFG_6_SCRAMBLE_EN_6_MASK, .index = RRAM_CTRL_MP_REGION_CFG_6_SCRAMBLE_EN_6_OFFSET })
#define	RRAM_CTRL_MP_REGION_CFG_6_ECC_EN_6_MASK   0xfu
#define	RRAM_CTRL_MP_REGION_CFG_6_ECC_EN_6_OFFSET   16
#define	RRAM_CTRL_MP_REGION_CFG_6_ECC_EN_6_FIELD    ((bitfield_field32_t) { .mask = RRAM_CTRL_MP_REGION_CFG_6_ECC_EN_6_MASK, .index = RRAM_CTRL_MP_REGION_CFG_6_ECC_EN_6_OFFSET })
#define	RRAM_CTRL_MP_REGION_CFG_7_REG_OFFSET   0x64
#define	RRAM_CTRL_MP_REGION_CFG_7_REG_RESVAL   0x99999u
#define	RRAM_CTRL_MP_REGION_CFG_7_EN_7_MASK   0xfu
#define	RRAM_CTRL_MP_REGION_CFG_7_EN_7_OFFSET   0
#define	RRAM_CTRL_MP_REGION_CFG_7_EN_7_FIELD    ((bitfield_field32_t) { .mask = RRAM_CTRL_MP_REGION_CFG_7_EN_7_MASK, .index = RRAM_CTRL_MP_REGION_CFG_7_EN_7_OFFSET })
#define	RRAM_CTRL_MP_REGION_CFG_7_RD_EN_7_MASK   0xfu
#define	RRAM_CTRL_MP_REGION_CFG_7_RD_EN_7_OFFSET   4
#define	RRAM_CTRL_MP_REGION_CFG_7_RD_EN_7_FIELD    ((bitfield_field32_t) { .mask = RRAM_CTRL_MP_REGION_CFG_7_RD_EN_7_MASK, .index = RRAM_CTRL_MP_REGION_CFG_7_RD_EN_7_OFFSET })
#define	RRAM_CTRL_MP_REGION_CFG_7_WR_EN_7_MASK   0xfu
#define	RRAM_CTRL_MP_REGION_CFG_7_WR_EN_7_OFFSET   8
#define	RRAM_CTRL_MP_REGION_CFG_7_WR_EN_7_FIELD    ((bitfield_field32_t) { .mask = RRAM_CTRL_MP_REGION_CFG_7_WR_EN_7_MASK, .index = RRAM_CTRL_MP_REGION_CFG_7_WR_EN_7_OFFSET })
#define	RRAM_CTRL_MP_REGION_CFG_7_SCRAMBLE_EN_7_MASK   0xfu
#define	RRAM_CTRL_MP_REGION_CFG_7_SCRAMBLE_EN_7_OFFSET   12
#define	RRAM_CTRL_MP_REGION_CFG_7_SCRAMBLE_EN_7_FIELD    ((bitfield_field32_t) { .mask = RRAM_CTRL_MP_REGION_CFG_7_SCRAMBLE_EN_7_MASK, .index = RRAM_CTRL_MP_REGION_CFG_7_SCRAMBLE_EN_7_OFFSET })
#define	RRAM_CTRL_MP_REGION_CFG_7_ECC_EN_7_MASK   0xfu
#define	RRAM_CTRL_MP_REGION_CFG_7_ECC_EN_7_OFFSET   16
#define	RRAM_CTRL_MP_REGION_CFG_7_ECC_EN_7_FIELD    ((bitfield_field32_t) { .mask = RRAM_CTRL_MP_REGION_CFG_7_ECC_EN_7_MASK, .index = RRAM_CTRL_MP_REGION_CFG_7_ECC_EN_7_OFFSET })
#define	RRAM_CTRL_MP_REGION_BASE_FIELD_WIDTH   12
#define	RRAM_CTRL_MP_REGION_SIZE_FIELD_WIDTH   12
#define	RRAM_CTRL_MP_REGION_MULTIREG_COUNT   8
#define	RRAM_CTRL_MP_REGION_0_REG_OFFSET   0x68
#define	RRAM_CTRL_MP_REGION_0_REG_RESVAL   0x0u
#define	RRAM_CTRL_MP_REGION_0_BASE_0_MASK   0xfffu
#define	RRAM_CTRL_MP_REGION_0_BASE_0_OFFSET   0
#define	RRAM_CTRL_MP_REGION_0_BASE_0_FIELD    ((bitfield_field32_t) { .mask = RRAM_CTRL_MP_REGION_0_BASE_0_MASK, .index = RRAM_CTRL_MP_REGION_0_BASE_0_OFFSET })
#define	RRAM_CTRL_MP_REGION_0_SIZE_0_MASK   0xfffu
#define	RRAM_CTRL_MP_REGION_0_SIZE_0_OFFSET   12
#define	RRAM_CTRL_MP_REGION_0_SIZE_0_FIELD    ((bitfield_field32_t) { .mask = RRAM_CTRL_MP_REGION_0_SIZE_0_MASK, .index = RRAM_CTRL_MP_REGION_0_SIZE_0_OFFSET })
#define	RRAM_CTRL_MP_REGION_1_REG_OFFSET   0x6c
#define	RRAM_CTRL_MP_REGION_1_REG_RESVAL   0x0u
#define	RRAM_CTRL_MP_REGION_1_BASE_1_MASK   0xfffu
#define	RRAM_CTRL_MP_REGION_1_BASE_1_OFFSET   0
#define	RRAM_CTRL_MP_REGION_1_BASE_1_FIELD    ((bitfield_field32_t) { .mask = RRAM_CTRL_MP_REGION_1_BASE_1_MASK, .index = RRAM_CTRL_MP_REGION_1_BASE_1_OFFSET })
#define	RRAM_CTRL_MP_REGION_1_SIZE_1_MASK   0xfffu
#define	RRAM_CTRL_MP_REGION_1_SIZE_1_OFFSET   12
#define	RRAM_CTRL_MP_REGION_1_SIZE_1_FIELD    ((bitfield_field32_t) { .mask = RRAM_CTRL_MP_REGION_1_SIZE_1_MASK, .index = RRAM_CTRL_MP_REGION_1_SIZE_1_OFFSET })
#define	RRAM_CTRL_MP_REGION_2_REG_OFFSET   0x70
#define	RRAM_CTRL_MP_REGION_2_REG_RESVAL   0x0u
#define	RRAM_CTRL_MP_REGION_2_BASE_2_MASK   0xfffu
#define	RRAM_CTRL_MP_REGION_2_BASE_2_OFFSET   0
#define	RRAM_CTRL_MP_REGION_2_BASE_2_FIELD    ((bitfield_field32_t) { .mask = RRAM_CTRL_MP_REGION_2_BASE_2_MASK, .index = RRAM_CTRL_MP_REGION_2_BASE_2_OFFSET })
#define	RRAM_CTRL_MP_REGION_2_SIZE_2_MASK   0xfffu
#define	RRAM_CTRL_MP_REGION_2_SIZE_2_OFFSET   12
#define	RRAM_CTRL_MP_REGION_2_SIZE_2_FIELD    ((bitfield_field32_t) { .mask = RRAM_CTRL_MP_REGION_2_SIZE_2_MASK, .index = RRAM_CTRL_MP_REGION_2_SIZE_2_OFFSET })
#define	RRAM_CTRL_MP_REGION_3_REG_OFFSET   0x74
#define	RRAM_CTRL_MP_REGION_3_REG_RESVAL   0x0u
#define	RRAM_CTRL_MP_REGION_3_BASE_3_MASK   0xfffu
#define	RRAM_CTRL_MP_REGION_3_BASE_3_OFFSET   0
#define	RRAM_CTRL_MP_REGION_3_BASE_3_FIELD    ((bitfield_field32_t) { .mask = RRAM_CTRL_MP_REGION_3_BASE_3_MASK, .index = RRAM_CTRL_MP_REGION_3_BASE_3_OFFSET })
#define	RRAM_CTRL_MP_REGION_3_SIZE_3_MASK   0xfffu
#define	RRAM_CTRL_MP_REGION_3_SIZE_3_OFFSET   12
#define	RRAM_CTRL_MP_REGION_3_SIZE_3_FIELD    ((bitfield_field32_t) { .mask = RRAM_CTRL_MP_REGION_3_SIZE_3_MASK, .index = RRAM_CTRL_MP_REGION_3_SIZE_3_OFFSET })
#define	RRAM_CTRL_MP_REGION_4_REG_OFFSET   0x78
#define	RRAM_CTRL_MP_REGION_4_REG_RESVAL   0x0u
#define	RRAM_CTRL_MP_REGION_4_BASE_4_MASK   0xfffu
#define	RRAM_CTRL_MP_REGION_4_BASE_4_OFFSET   0
#define	RRAM_CTRL_MP_REGION_4_BASE_4_FIELD    ((bitfield_field32_t) { .mask = RRAM_CTRL_MP_REGION_4_BASE_4_MASK, .index = RRAM_CTRL_MP_REGION_4_BASE_4_OFFSET })
#define	RRAM_CTRL_MP_REGION_4_SIZE_4_MASK   0xfffu
#define	RRAM_CTRL_MP_REGION_4_SIZE_4_OFFSET   12
#define	RRAM_CTRL_MP_REGION_4_SIZE_4_FIELD    ((bitfield_field32_t) { .mask = RRAM_CTRL_MP_REGION_4_SIZE_4_MASK, .index = RRAM_CTRL_MP_REGION_4_SIZE_4_OFFSET })
#define	RRAM_CTRL_MP_REGION_5_REG_OFFSET   0x7c
#define	RRAM_CTRL_MP_REGION_5_REG_RESVAL   0x0u
#define	RRAM_CTRL_MP_REGION_5_BASE_5_MASK   0xfffu
#define	RRAM_CTRL_MP_REGION_5_BASE_5_OFFSET   0
#define	RRAM_CTRL_MP_REGION_5_BASE_5_FIELD    ((bitfield_field32_t) { .mask = RRAM_CTRL_MP_REGION_5_BASE_5_MASK, .index = RRAM_CTRL_MP_REGION_5_BASE_5_OFFSET })
#define	RRAM_CTRL_MP_REGION_5_SIZE_5_MASK   0xfffu
#define	RRAM_CTRL_MP_REGION_5_SIZE_5_OFFSET   12
#define	RRAM_CTRL_MP_REGION_5_SIZE_5_FIELD    ((bitfield_field32_t) { .mask = RRAM_CTRL_MP_REGION_5_SIZE_5_MASK, .index = RRAM_CTRL_MP_REGION_5_SIZE_5_OFFSET })
#define	RRAM_CTRL_MP_REGION_6_REG_OFFSET   0x80
#define	RRAM_CTRL_MP_REGION_6_REG_RESVAL   0x0u
#define	RRAM_CTRL_MP_REGION_6_BASE_6_MASK   0xfffu
#define	RRAM_CTRL_MP_REGION_6_BASE_6_OFFSET   0
#define	RRAM_CTRL_MP_REGION_6_BASE_6_FIELD    ((bitfield_field32_t) { .mask = RRAM_CTRL_MP_REGION_6_BASE_6_MASK, .index = RRAM_CTRL_MP_REGION_6_BASE_6_OFFSET })
#define	RRAM_CTRL_MP_REGION_6_SIZE_6_MASK   0xfffu
#define	RRAM_CTRL_MP_REGION_6_SIZE_6_OFFSET   12
#define	RRAM_CTRL_MP_REGION_6_SIZE_6_FIELD    ((bitfield_field32_t) { .mask = RRAM_CTRL_MP_REGION_6_SIZE_6_MASK, .index = RRAM_CTRL_MP_REGION_6_SIZE_6_OFFSET })
#define	RRAM_CTRL_MP_REGION_7_REG_OFFSET   0x84
#define	RRAM_CTRL_MP_REGION_7_REG_RESVAL   0x0u
#define	RRAM_CTRL_MP_REGION_7_BASE_7_MASK   0xfffu
#define	RRAM_CTRL_MP_REGION_7_BASE_7_OFFSET   0
#define	RRAM_CTRL_MP_REGION_7_BASE_7_FIELD    ((bitfield_field32_t) { .mask = RRAM_CTRL_MP_REGION_7_BASE_7_MASK, .index = RRAM_CTRL_MP_REGION_7_BASE_7_OFFSET })
#define	RRAM_CTRL_MP_REGION_7_SIZE_7_MASK   0xfffu
#define	RRAM_CTRL_MP_REGION_7_SIZE_7_OFFSET   12
#define	RRAM_CTRL_MP_REGION_7_SIZE_7_FIELD    ((bitfield_field32_t) { .mask = RRAM_CTRL_MP_REGION_7_SIZE_7_MASK, .index = RRAM_CTRL_MP_REGION_7_SIZE_7_OFFSET })
#define	RRAM_CTRL_DEFAULT_REGION_REG_OFFSET   0x88
#define	RRAM_CTRL_DEFAULT_REGION_REG_RESVAL   0x9999u
#define	RRAM_CTRL_DEFAULT_REGION_RD_EN_MASK   0xfu
#define	RRAM_CTRL_DEFAULT_REGION_RD_EN_OFFSET   0
#define	RRAM_CTRL_DEFAULT_REGION_RD_EN_FIELD    ((bitfield_field32_t) { .mask = RRAM_CTRL_DEFAULT_REGION_RD_EN_MASK, .index = RRAM_CTRL_DEFAULT_REGION_RD_EN_OFFSET })
#define	RRAM_CTRL_DEFAULT_REGION_WR_EN_MASK   0xfu
#define	RRAM_CTRL_DEFAULT_REGION_WR_EN_OFFSET   4
#define	RRAM_CTRL_DEFAULT_REGION_WR_EN_FIELD    ((bitfield_field32_t) { .mask = RRAM_CTRL_DEFAULT_REGION_WR_EN_MASK, .index = RRAM_CTRL_DEFAULT_REGION_WR_EN_OFFSET })
#define	RRAM_CTRL_DEFAULT_REGION_SCRAMBLE_EN_MASK   0xfu
#define	RRAM_CTRL_DEFAULT_REGION_SCRAMBLE_EN_OFFSET   8
#define	RRAM_CTRL_DEFAULT_REGION_SCRAMBLE_EN_FIELD    ((bitfield_field32_t) { .mask = RRAM_CTRL_DEFAULT_REGION_SCRAMBLE_EN_MASK, .index = RRAM_CTRL_DEFAULT_REGION_SCRAMBLE_EN_OFFSET })
#define	RRAM_CTRL_DEFAULT_REGION_ECC_EN_MASK   0xfu
#define	RRAM_CTRL_DEFAULT_REGION_ECC_EN_OFFSET   12
#define	RRAM_CTRL_DEFAULT_REGION_ECC_EN_FIELD    ((bitfield_field32_t) { .mask = RRAM_CTRL_DEFAULT_REGION_ECC_EN_MASK, .index = RRAM_CTRL_DEFAULT_REGION_ECC_EN_OFFSET })
#define	RRAM_CTRL_INFO_REGWEN_REGION_FIELD_WIDTH   1
#define	RRAM_CTRL_INFO_REGWEN_MULTIREG_COUNT   8
#define	RRAM_CTRL_INFO_REGWEN_0_REG_OFFSET   0x8c
#define	RRAM_CTRL_INFO_REGWEN_0_REG_RESVAL   0x1u
#define	RRAM_CTRL_INFO_REGWEN_0_REGION_0_BIT   0
#define	RRAM_CTRL_INFO_REGWEN_0_REGION_0_VALUE_PAGE_LOCKED   0x0
#define	RRAM_CTRL_INFO_REGWEN_0_REGION_0_VALUE_PAGE_ENABLED   0x1
#define	RRAM_CTRL_INFO_REGWEN_1_REG_OFFSET   0x90
#define	RRAM_CTRL_INFO_REGWEN_1_REG_RESVAL   0x1u
#define	RRAM_CTRL_INFO_REGWEN_1_REGION_1_BIT   0
#define	RRAM_CTRL_INFO_REGWEN_2_REG_OFFSET   0x94
#define	RRAM_CTRL_INFO_REGWEN_2_REG_RESVAL   0x1u
#define	RRAM_CTRL_INFO_REGWEN_2_REGION_2_BIT   0
#define	RRAM_CTRL_INFO_REGWEN_3_REG_OFFSET   0x98
#define	RRAM_CTRL_INFO_REGWEN_3_REG_RESVAL   0x1u
#define	RRAM_CTRL_INFO_REGWEN_3_REGION_3_BIT   0
#define	RRAM_CTRL_INFO_REGWEN_4_REG_OFFSET   0x9c
#define	RRAM_CTRL_INFO_REGWEN_4_REG_RESVAL   0x1u
#define	RRAM_CTRL_INFO_REGWEN_4_REGION_4_BIT   0
#define	RRAM_CTRL_INFO_REGWEN_5_REG_OFFSET   0xa0
#define	RRAM_CTRL_INFO_REGWEN_5_REG_RESVAL   0x1u
#define	RRAM_CTRL_INFO_REGWEN_5_REGION_5_BIT   0
#define	RRAM_CTRL_INFO_REGWEN_6_REG_OFFSET   0xa4
#define	RRAM_CTRL_INFO_REGWEN_6_REG_RESVAL   0x1u
#define	RRAM_CTRL_INFO_REGWEN_6_REGION_6_BIT   0
#define	RRAM_CTRL_INFO_REGWEN_7_REG_OFFSET   0xa8
#define	RRAM_CTRL_INFO_REGWEN_7_REG_RESVAL   0x1u
#define	RRAM_CTRL_INFO_REGWEN_7_REGION_7_BIT   0
#define	RRAM_CTRL_INFO_PAGE_CFG_EN_FIELD_WIDTH   4
#define	RRAM_CTRL_INFO_PAGE_CFG_RD_EN_FIELD_WIDTH   4
#define	RRAM_CTRL_INFO_PAGE_CFG_WR_EN_FIELD_WIDTH   4
#define	RRAM_CTRL_INFO_PAGE_CFG_SCRAMBLE_EN_FIELD_WIDTH   4
#define	RRAM_CTRL_INFO_PAGE_CFG_ECC_EN_FIELD_WIDTH   4
#define	RRAM_CTRL_INFO_PAGE_CFG_MULTIREG_COUNT   8
#define	RRAM_CTRL_INFO_PAGE_CFG_0_REG_OFFSET   0xac
#define	RRAM_CTRL_INFO_PAGE_CFG_0_REG_RESVAL   0x99999u
#define	RRAM_CTRL_INFO_PAGE_CFG_0_EN_0_MASK   0xfu
#define	RRAM_CTRL_INFO_PAGE_CFG_0_EN_0_OFFSET   0
#define	RRAM_CTRL_INFO_PAGE_CFG_0_EN_0_FIELD    ((bitfield_field32_t) { .mask = RRAM_CTRL_INFO_PAGE_CFG_0_EN_0_MASK, .index = RRAM_CTRL_INFO_PAGE_CFG_0_EN_0_OFFSET })
#define	RRAM_CTRL_INFO_PAGE_CFG_0_RD_EN_0_MASK   0xfu
#define	RRAM_CTRL_INFO_PAGE_CFG_0_RD_EN_0_OFFSET   4
#define	RRAM_CTRL_INFO_PAGE_CFG_0_RD_EN_0_FIELD    ((bitfield_field32_t) { .mask = RRAM_CTRL_INFO_PAGE_CFG_0_RD_EN_0_MASK, .index = RRAM_CTRL_INFO_PAGE_CFG_0_RD_EN_0_OFFSET })
#define	RRAM_CTRL_INFO_PAGE_CFG_0_WR_EN_0_MASK   0xfu
#define	RRAM_CTRL_INFO_PAGE_CFG_0_WR_EN_0_OFFSET   8
#define	RRAM_CTRL_INFO_PAGE_CFG_0_WR_EN_0_FIELD    ((bitfield_field32_t) { .mask = RRAM_CTRL_INFO_PAGE_CFG_0_WR_EN_0_MASK, .index = RRAM_CTRL_INFO_PAGE_CFG_0_WR_EN_0_OFFSET })
#define	RRAM_CTRL_INFO_PAGE_CFG_0_SCRAMBLE_EN_0_MASK   0xfu
#define	RRAM_CTRL_INFO_PAGE_CFG_0_SCRAMBLE_EN_0_OFFSET   12
#define	RRAM_CTRL_INFO_PAGE_CFG_0_SCRAMBLE_EN_0_FIELD    ((bitfield_field32_t) { .mask = RRAM_CTRL_INFO_PAGE_CFG_0_SCRAMBLE_EN_0_MASK, .index = RRAM_CTRL_INFO_PAGE_CFG_0_SCRAMBLE_EN_0_OFFSET })
#define	RRAM_CTRL_INFO_PAGE_CFG_0_ECC_EN_0_MASK   0xfu
#define	RRAM_CTRL_INFO_PAGE_CFG_0_ECC_EN_0_OFFSET   16
#define	RRAM_CTRL_INFO_PAGE_CFG_0_ECC_EN_0_FIELD    ((bitfield_field32_t) { .mask = RRAM_CTRL_INFO_PAGE_CFG_0_ECC_EN_0_MASK, .index = RRAM_CTRL_INFO_PAGE_CFG_0_ECC_EN_0_OFFSET })
#define	RRAM_CTRL_INFO_PAGE_CFG_1_REG_OFFSET   0xb0
#define	RRAM_CTRL_INFO_PAGE_CFG_1_REG_RESVAL   0x99999u
#define	RRAM_CTRL_INFO_PAGE_CFG_1_EN_1_MASK   0xfu
#define	RRAM_CTRL_INFO_PAGE_CFG_1_EN_1_OFFSET   0
#define	RRAM_CTRL_INFO_PAGE_CFG_1_EN_1_FIELD    ((bitfield_field32_t) { .mask = RRAM_CTRL_INFO_PAGE_CFG_1_EN_1_MASK, .index = RRAM_CTRL_INFO_PAGE_CFG_1_EN_1_OFFSET })
#define	RRAM_CTRL_INFO_PAGE_CFG_1_RD_EN_1_MASK   0xfu
#define	RRAM_CTRL_INFO_PAGE_CFG_1_RD_EN_1_OFFSET   4
#define	RRAM_CTRL_INFO_PAGE_CFG_1_RD_EN_1_FIELD    ((bitfield_field32_t) { .mask = RRAM_CTRL_INFO_PAGE_CFG_1_RD_EN_1_MASK, .index = RRAM_CTRL_INFO_PAGE_CFG_1_RD_EN_1_OFFSET })
#define	RRAM_CTRL_INFO_PAGE_CFG_1_WR_EN_1_MASK   0xfu
#define	RRAM_CTRL_INFO_PAGE_CFG_1_WR_EN_1_OFFSET   8
#define	RRAM_CTRL_INFO_PAGE_CFG_1_WR_EN_1_FIELD    ((bitfield_field32_t) { .mask = RRAM_CTRL_INFO_PAGE_CFG_1_WR_EN_1_MASK, .index = RRAM_CTRL_INFO_PAGE_CFG_1_WR_EN_1_OFFSET })
#define	RRAM_CTRL_INFO_PAGE_CFG_1_SCRAMBLE_EN_1_MASK   0xfu
#define	RRAM_CTRL_INFO_PAGE_CFG_1_SCRAMBLE_EN_1_OFFSET   12
#define	RRAM_CTRL_INFO_PAGE_CFG_1_SCRAMBLE_EN_1_FIELD    ((bitfield_field32_t) { .mask = RRAM_CTRL_INFO_PAGE_CFG_1_SCRAMBLE_EN_1_MASK, .index = RRAM_CTRL_INFO_PAGE_CFG_1_SCRAMBLE_EN_1_OFFSET })
#define	RRAM_CTRL_INFO_PAGE_CFG_1_ECC_EN_1_MASK   0xfu
#define	RRAM_CTRL_INFO_PAGE_CFG_1_ECC_EN_1_OFFSET   16
#define	RRAM_CTRL_INFO_PAGE_CFG_1_ECC_EN_1_FIELD    ((bitfield_field32_t) { .mask = RRAM_CTRL_INFO_PAGE_CFG_1_ECC_EN_1_MASK, .index = RRAM_CTRL_INFO_PAGE_CFG_1_ECC_EN_1_OFFSET })
#define	RRAM_CTRL_INFO_PAGE_CFG_2_REG_OFFSET   0xb4
#define	RRAM_CTRL_INFO_PAGE_CFG_2_REG_RESVAL   0x99999u
#define	RRAM_CTRL_INFO_PAGE_CFG_2_EN_2_MASK   0xfu
#define	RRAM_CTRL_INFO_PAGE_CFG_2_EN_2_OFFSET   0
#define	RRAM_CTRL_INFO_PAGE_CFG_2_EN_2_FIELD    ((bitfield_field32_t) { .mask = RRAM_CTRL_INFO_PAGE_CFG_2_EN_2_MASK, .index = RRAM_CTRL_INFO_PAGE_CFG_2_EN_2_OFFSET })
#define	RRAM_CTRL_INFO_PAGE_CFG_2_RD_EN_2_MASK   0xfu
#define	RRAM_CTRL_INFO_PAGE_CFG_2_RD_EN_2_OFFSET   4
#define	RRAM_CTRL_INFO_PAGE_CFG_2_RD_EN_2_FIELD    ((bitfield_field32_t) { .mask = RRAM_CTRL_INFO_PAGE_CFG_2_RD_EN_2_MASK, .index = RRAM_CTRL_INFO_PAGE_CFG_2_RD_EN_2_OFFSET })
#define	RRAM_CTRL_INFO_PAGE_CFG_2_WR_EN_2_MASK   0xfu
#define	RRAM_CTRL_INFO_PAGE_CFG_2_WR_EN_2_OFFSET   8
#define	RRAM_CTRL_INFO_PAGE_CFG_2_WR_EN_2_FIELD    ((bitfield_field32_t) { .mask = RRAM_CTRL_INFO_PAGE_CFG_2_WR_EN_2_MASK, .index = RRAM_CTRL_INFO_PAGE_CFG_2_WR_EN_2_OFFSET })
#define	RRAM_CTRL_INFO_PAGE_CFG_2_SCRAMBLE_EN_2_MASK   0xfu
#define	RRAM_CTRL_INFO_PAGE_CFG_2_SCRAMBLE_EN_2_OFFSET   12
#define	RRAM_CTRL_INFO_PAGE_CFG_2_SCRAMBLE_EN_2_FIELD    ((bitfield_field32_t) { .mask = RRAM_CTRL_INFO_PAGE_CFG_2_SCRAMBLE_EN_2_MASK, .index = RRAM_CTRL_INFO_PAGE_CFG_2_SCRAMBLE_EN_2_OFFSET })
#define	RRAM_CTRL_INFO_PAGE_CFG_2_ECC_EN_2_MASK   0xfu
#define	RRAM_CTRL_INFO_PAGE_CFG_2_ECC_EN_2_OFFSET   16
#define	RRAM_CTRL_INFO_PAGE_CFG_2_ECC_EN_2_FIELD    ((bitfield_field32_t) { .mask = RRAM_CTRL_INFO_PAGE_CFG_2_ECC_EN_2_MASK, .index = RRAM_CTRL_INFO_PAGE_CFG_2_ECC_EN_2_OFFSET })
#define	RRAM_CTRL_INFO_PAGE_CFG_3_REG_OFFSET   0xb8
#define	RRAM_CTRL_INFO_PAGE_CFG_3_REG_RESVAL   0x99999u
#define	RRAM_CTRL_INFO_PAGE_CFG_3_EN_3_MASK   0xfu
#define	RRAM_CTRL_INFO_PAGE_CFG_3_EN_3_OFFSET   0
#define	RRAM_CTRL_INFO_PAGE_CFG_3_EN_3_FIELD    ((bitfield_field32_t) { .mask = RRAM_CTRL_INFO_PAGE_CFG_3_EN_3_MASK, .index = RRAM_CTRL_INFO_PAGE_CFG_3_EN_3_OFFSET })
#define	RRAM_CTRL_INFO_PAGE_CFG_3_RD_EN_3_MASK   0xfu
#define	RRAM_CTRL_INFO_PAGE_CFG_3_RD_EN_3_OFFSET   4
#define	RRAM_CTRL_INFO_PAGE_CFG_3_RD_EN_3_FIELD    ((bitfield_field32_t) { .mask = RRAM_CTRL_INFO_PAGE_CFG_3_RD_EN_3_MASK, .index = RRAM_CTRL_INFO_PAGE_CFG_3_RD_EN_3_OFFSET })
#define	RRAM_CTRL_INFO_PAGE_CFG_3_WR_EN_3_MASK   0xfu
#define	RRAM_CTRL_INFO_PAGE_CFG_3_WR_EN_3_OFFSET   8
#define	RRAM_CTRL_INFO_PAGE_CFG_3_WR_EN_3_FIELD    ((bitfield_field32_t) { .mask = RRAM_CTRL_INFO_PAGE_CFG_3_WR_EN_3_MASK, .index = RRAM_CTRL_INFO_PAGE_CFG_3_WR_EN_3_OFFSET })
#define	RRAM_CTRL_INFO_PAGE_CFG_3_SCRAMBLE_EN_3_MASK   0xfu
#define	RRAM_CTRL_INFO_PAGE_CFG_3_SCRAMBLE_EN_3_OFFSET   12
#define	RRAM_CTRL_INFO_PAGE_CFG_3_SCRAMBLE_EN_3_FIELD    ((bitfield_field32_t) { .mask = RRAM_CTRL_INFO_PAGE_CFG_3_SCRAMBLE_EN_3_MASK, .index = RRAM_CTRL_INFO_PAGE_CFG_3_SCRAMBLE_EN_3_OFFSET })
#define	RRAM_CTRL_INFO_PAGE_CFG_3_ECC_EN_3_MASK   0xfu
#define	RRAM_CTRL_INFO_PAGE_CFG_3_ECC_EN_3_OFFSET   16
#define	RRAM_CTRL_INFO_PAGE_CFG_3_ECC_EN_3_FIELD    ((bitfield_field32_t) { .mask = RRAM_CTRL_INFO_PAGE_CFG_3_ECC_EN_3_MASK, .index = RRAM_CTRL_INFO_PAGE_CFG_3_ECC_EN_3_OFFSET })
#define	RRAM_CTRL_INFO_PAGE_CFG_4_REG_OFFSET   0xbc
#define	RRAM_CTRL_INFO_PAGE_CFG_4_REG_RESVAL   0x99999u
#define	RRAM_CTRL_INFO_PAGE_CFG_4_EN_4_MASK   0xfu
#define	RRAM_CTRL_INFO_PAGE_CFG_4_EN_4_OFFSET   0
#define	RRAM_CTRL_INFO_PAGE_CFG_4_EN_4_FIELD    ((bitfield_field32_t) { .mask = RRAM_CTRL_INFO_PAGE_CFG_4_EN_4_MASK, .index = RRAM_CTRL_INFO_PAGE_CFG_4_EN_4_OFFSET })
#define	RRAM_CTRL_INFO_PAGE_CFG_4_RD_EN_4_MASK   0xfu
#define	RRAM_CTRL_INFO_PAGE_CFG_4_RD_EN_4_OFFSET   4
#define	RRAM_CTRL_INFO_PAGE_CFG_4_RD_EN_4_FIELD    ((bitfield_field32_t) { .mask = RRAM_CTRL_INFO_PAGE_CFG_4_RD_EN_4_MASK, .index = RRAM_CTRL_INFO_PAGE_CFG_4_RD_EN_4_OFFSET })
#define	RRAM_CTRL_INFO_PAGE_CFG_4_WR_EN_4_MASK   0xfu
#define	RRAM_CTRL_INFO_PAGE_CFG_4_WR_EN_4_OFFSET   8
#define	RRAM_CTRL_INFO_PAGE_CFG_4_WR_EN_4_FIELD    ((bitfield_field32_t) { .mask = RRAM_CTRL_INFO_PAGE_CFG_4_WR_EN_4_MASK, .index = RRAM_CTRL_INFO_PAGE_CFG_4_WR_EN_4_OFFSET })
#define	RRAM_CTRL_INFO_PAGE_CFG_4_SCRAMBLE_EN_4_MASK   0xfu
#define	RRAM_CTRL_INFO_PAGE_CFG_4_SCRAMBLE_EN_4_OFFSET   12
#define	RRAM_CTRL_INFO_PAGE_CFG_4_SCRAMBLE_EN_4_FIELD    ((bitfield_field32_t) { .mask = RRAM_CTRL_INFO_PAGE_CFG_4_SCRAMBLE_EN_4_MASK, .index = RRAM_CTRL_INFO_PAGE_CFG_4_SCRAMBLE_EN_4_OFFSET })
#define	RRAM_CTRL_INFO_PAGE_CFG_4_ECC_EN_4_MASK   0xfu
#define	RRAM_CTRL_INFO_PAGE_CFG_4_ECC_EN_4_OFFSET   16
#define	RRAM_CTRL_INFO_PAGE_CFG_4_ECC_EN_4_FIELD    ((bitfield_field32_t) { .mask = RRAM_CTRL_INFO_PAGE_CFG_4_ECC_EN_4_MASK, .index = RRAM_CTRL_INFO_PAGE_CFG_4_ECC_EN_4_OFFSET })
#define	RRAM_CTRL_INFO_PAGE_CFG_5_REG_OFFSET   0xc0
#define	RRAM_CTRL_INFO_PAGE_CFG_5_REG_RESVAL   0x99999u
#define	RRAM_CTRL_INFO_PAGE_CFG_5_EN_5_MASK   0xfu
#define	RRAM_CTRL_INFO_PAGE_CFG_5_EN_5_OFFSET   0
#define	RRAM_CTRL_INFO_PAGE_CFG_5_EN_5_FIELD    ((bitfield_field32_t) { .mask = RRAM_CTRL_INFO_PAGE_CFG_5_EN_5_MASK, .index = RRAM_CTRL_INFO_PAGE_CFG_5_EN_5_OFFSET })
#define	RRAM_CTRL_INFO_PAGE_CFG_5_RD_EN_5_MASK   0xfu
#define	RRAM_CTRL_INFO_PAGE_CFG_5_RD_EN_5_OFFSET   4
#define	RRAM_CTRL_INFO_PAGE_CFG_5_RD_EN_5_FIELD    ((bitfield_field32_t) { .mask = RRAM_CTRL_INFO_PAGE_CFG_5_RD_EN_5_MASK, .index = RRAM_CTRL_INFO_PAGE_CFG_5_RD_EN_5_OFFSET })
#define	RRAM_CTRL_INFO_PAGE_CFG_5_WR_EN_5_MASK   0xfu
#define	RRAM_CTRL_INFO_PAGE_CFG_5_WR_EN_5_OFFSET   8
#define	RRAM_CTRL_INFO_PAGE_CFG_5_WR_EN_5_FIELD    ((bitfield_field32_t) { .mask = RRAM_CTRL_INFO_PAGE_CFG_5_WR_EN_5_MASK, .index = RRAM_CTRL_INFO_PAGE_CFG_5_WR_EN_5_OFFSET })
#define	RRAM_CTRL_INFO_PAGE_CFG_5_SCRAMBLE_EN_5_MASK   0xfu
#define	RRAM_CTRL_INFO_PAGE_CFG_5_SCRAMBLE_EN_5_OFFSET   12
#define	RRAM_CTRL_INFO_PAGE_CFG_5_SCRAMBLE_EN_5_FIELD    ((bitfield_field32_t) { .mask = RRAM_CTRL_INFO_PAGE_CFG_5_SCRAMBLE_EN_5_MASK, .index = RRAM_CTRL_INFO_PAGE_CFG_5_SCRAMBLE_EN_5_OFFSET })
#define	RRAM_CTRL_INFO_PAGE_CFG_5_ECC_EN_5_MASK   0xfu
#define	RRAM_CTRL_INFO_PAGE_CFG_5_ECC_EN_5_OFFSET   16
#define	RRAM_CTRL_INFO_PAGE_CFG_5_ECC_EN_5_FIELD    ((bitfield_field32_t) { .mask = RRAM_CTRL_INFO_PAGE_CFG_5_ECC_EN_5_MASK, .index = RRAM_CTRL_INFO_PAGE_CFG_5_ECC_EN_5_OFFSET })
#define	RRAM_CTRL_INFO_PAGE_CFG_6_REG_OFFSET   0xc4
#define	RRAM_CTRL_INFO_PAGE_CFG_6_REG_RESVAL   0x99999u
#define	RRAM_CTRL_INFO_PAGE_CFG_6_EN_6_MASK   0xfu
#define	RRAM_CTRL_INFO_PAGE_CFG_6_EN_6_OFFSET   0
#define	RRAM_CTRL_INFO_PAGE_CFG_6_EN_6_FIELD    ((bitfield_field32_t) { .mask = RRAM_CTRL_INFO_PAGE_CFG_6_EN_6_MASK, .index = RRAM_CTRL_INFO_PAGE_CFG_6_EN_6_OFFSET })
#define	RRAM_CTRL_INFO_PAGE_CFG_6_RD_EN_6_MASK   0xfu
#define	RRAM_CTRL_INFO_PAGE_CFG_6_RD_EN_6_OFFSET   4
#define	RRAM_CTRL_INFO_PAGE_CFG_6_RD_EN_6_FIELD    ((bitfield_field32_t) { .mask = RRAM_CTRL_INFO_PAGE_CFG_6_RD_EN_6_MASK, .index = RRAM_CTRL_INFO_PAGE_CFG_6_RD_EN_6_OFFSET })
#define	RRAM_CTRL_INFO_PAGE_CFG_6_WR_EN_6_MASK   0xfu
#define	RRAM_CTRL_INFO_PAGE_CFG_6_WR_EN_6_OFFSET   8
#define	RRAM_CTRL_INFO_PAGE_CFG_6_WR_EN_6_FIELD    ((bitfield_field32_t) { .mask = RRAM_CTRL_INFO_PAGE_CFG_6_WR_EN_6_MASK, .index = RRAM_CTRL_INFO_PAGE_CFG_6_WR_EN_6_OFFSET })
#define	RRAM_CTRL_INFO_PAGE_CFG_6_SCRAMBLE_EN_6_MASK   0xfu
#define	RRAM_CTRL_INFO_PAGE_CFG_6_SCRAMBLE_EN_6_OFFSET   12
#define	RRAM_CTRL_INFO_PAGE_CFG_6_SCRAMBLE_EN_6_FIELD    ((bitfield_field32_t) { .mask = RRAM_CTRL_INFO_PAGE_CFG_6_SCRAMBLE_EN_6_MASK, .index = RRAM_CTRL_INFO_PAGE_CFG_6_SCRAMBLE_EN_6_OFFSET })
#define	RRAM_CTRL_INFO_PAGE_CFG_6_ECC_EN_6_MASK   0xfu
#define	RRAM_CTRL_INFO_PAGE_CFG_6_ECC_EN_6_OFFSET   16
#define	RRAM_CTRL_INFO_PAGE_CFG_6_ECC_EN_6_FIELD    ((bitfield_field32_t) { .mask = RRAM_CTRL_INFO_PAGE_CFG_6_ECC_EN_6_MASK, .index = RRAM_CTRL_INFO_PAGE_CFG_6_ECC_EN_6_OFFSET })
#define	RRAM_CTRL_INFO_PAGE_CFG_7_REG_OFFSET   0xc8
#define	RRAM_CTRL_INFO_PAGE_CFG_7_REG_RESVAL   0x99999u
#define	RRAM_CTRL_INFO_PAGE_CFG_7_EN_7_MASK   0xfu
#define	RRAM_CTRL_INFO_PAGE_CFG_7_EN_7_OFFSET   0
#define	RRAM_CTRL_INFO_PAGE_CFG_7_EN_7_FIELD    ((bitfield_field32_t) { .mask = RRAM_CTRL_INFO_PAGE_CFG_7_EN_7_MASK, .index = RRAM_CTRL_INFO_PAGE_CFG_7_EN_7_OFFSET })
#define	RRAM_CTRL_INFO_PAGE_CFG_7_RD_EN_7_MASK   0xfu
#define	RRAM_CTRL_INFO_PAGE_CFG_7_RD_EN_7_OFFSET   4
#define	RRAM_CTRL_INFO_PAGE_CFG_7_RD_EN_7_FIELD    ((bitfield_field32_t) { .mask = RRAM_CTRL_INFO_PAGE_CFG_7_RD_EN_7_MASK, .index = RRAM_CTRL_INFO_PAGE_CFG_7_RD_EN_7_OFFSET })
#define	RRAM_CTRL_INFO_PAGE_CFG_7_WR_EN_7_MASK   0xfu
#define	RRAM_CTRL_INFO_PAGE_CFG_7_WR_EN_7_OFFSET   8
#define	RRAM_CTRL_INFO_PAGE_CFG_7_WR_EN_7_FIELD    ((bitfield_field32_t) { .mask = RRAM_CTRL_INFO_PAGE_CFG_7_WR_EN_7_MASK, .index = RRAM_CTRL_INFO_PAGE_CFG_7_WR_EN_7_OFFSET })
#define	RRAM_CTRL_INFO_PAGE_CFG_7_SCRAMBLE_EN_7_MASK   0xfu
#define	RRAM_CTRL_INFO_PAGE_CFG_7_SCRAMBLE_EN_7_OFFSET   12
#define	RRAM_CTRL_INFO_PAGE_CFG_7_SCRAMBLE_EN_7_FIELD    ((bitfield_field32_t) { .mask = RRAM_CTRL_INFO_PAGE_CFG_7_SCRAMBLE_EN_7_MASK, .index = RRAM_CTRL_INFO_PAGE_CFG_7_SCRAMBLE_EN_7_OFFSET })
#define	RRAM_CTRL_INFO_PAGE_CFG_7_ECC_EN_7_MASK   0xfu
#define	RRAM_CTRL_INFO_PAGE_CFG_7_ECC_EN_7_OFFSET   16
#define	RRAM_CTRL_INFO_PAGE_CFG_7_ECC_EN_7_FIELD    ((bitfield_field32_t) { .mask = RRAM_CTRL_INFO_PAGE_CFG_7_ECC_EN_7_MASK, .index = RRAM_CTRL_INFO_PAGE_CFG_7_ECC_EN_7_OFFSET })
#define	RRAM_CTRL_HW_INFO_CFG_OVERRIDE_REG_OFFSET   0xcc
#define	RRAM_CTRL_HW_INFO_CFG_OVERRIDE_REG_RESVAL   0x99u
#define	RRAM_CTRL_HW_INFO_CFG_OVERRIDE_SCRAMBLE_DIS_MASK   0xfu
#define	RRAM_CTRL_HW_INFO_CFG_OVERRIDE_SCRAMBLE_DIS_OFFSET   0
#define	RRAM_CTRL_HW_INFO_CFG_OVERRIDE_SCRAMBLE_DIS_FIELD    ((bitfield_field32_t) { .mask = RRAM_CTRL_HW_INFO_CFG_OVERRIDE_SCRAMBLE_DIS_MASK, .index = RRAM_CTRL_HW_INFO_CFG_OVERRIDE_SCRAMBLE_DIS_OFFSET })
#define	RRAM_CTRL_HW_INFO_CFG_OVERRIDE_ECC_DIS_MASK   0xfu
#define	RRAM_CTRL_HW_INFO_CFG_OVERRIDE_ECC_DIS_OFFSET   4
#define	RRAM_CTRL_HW_INFO_CFG_OVERRIDE_ECC_DIS_FIELD    ((bitfield_field32_t) { .mask = RRAM_CTRL_HW_INFO_CFG_OVERRIDE_ECC_DIS_MASK, .index = RRAM_CTRL_HW_INFO_CFG_OVERRIDE_ECC_DIS_OFFSET })
#define	RRAM_CTRL_OP_STATUS_REG_OFFSET   0xd0
#define	RRAM_CTRL_OP_STATUS_REG_RESVAL   0x0u
#define	RRAM_CTRL_OP_STATUS_DONE_BIT   0
#define	RRAM_CTRL_OP_STATUS_ERR_BIT   1
#define	RRAM_CTRL_STATUS_REG_OFFSET   0xd4
#define	RRAM_CTRL_STATUS_REG_RESVAL   0xau
#define	RRAM_CTRL_STATUS_RD_FULL_BIT   0
#define	RRAM_CTRL_STATUS_RD_EMPTY_BIT   1
#define	RRAM_CTRL_STATUS_WR_FULL_BIT   2
#define	RRAM_CTRL_STATUS_WR_EMPTY_BIT   3
#define	RRAM_CTRL_STATUS_INIT_DONE_BIT   4
#define	RRAM_CTRL_STATUS_KEYS_VALID_BIT   5
#define	RRAM_CTRL_ERR_CODE_REG_OFFSET   0xd8
#define	RRAM_CTRL_ERR_CODE_REG_RESVAL   0x0u
#define	RRAM_CTRL_ERR_CODE_OP_ERR_BIT   0
#define	RRAM_CTRL_ERR_CODE_MP_ERR_BIT   1
#define	RRAM_CTRL_ERR_CODE_RD_ERR_BIT   2
#define	RRAM_CTRL_ERR_CODE_WR_ERR_BIT   3
#define	RRAM_CTRL_STD_FAULT_STATUS_REG_OFFSET   0xdc
#define	RRAM_CTRL_STD_FAULT_STATUS_REG_RESVAL   0x0u
#define	RRAM_CTRL_STD_FAULT_STATUS_REG_INTG_ERR_BIT   0
#define	RRAM_CTRL_STD_FAULT_STATUS_LCMGR_ERR_BIT   1
#define	RRAM_CTRL_STD_FAULT_STATUS_LCMGR_INTG_ERR_BIT   2
#define	RRAM_CTRL_STD_FAULT_STATUS_OTP_ERR_BIT   3
#define	RRAM_CTRL_STD_FAULT_STATUS_OTP_INTG_ERR_BIT   4
#define	RRAM_CTRL_STD_FAULT_STATUS_PHY_WR_INTG_ERR_BIT   5
#define	RRAM_CTRL_STD_FAULT_STATUS_PHY_FIFO_ERR_BIT   6
#define	RRAM_CTRL_STD_FAULT_STATUS_PHY_FSM_ERR_BIT   7
#define	RRAM_CTRL_STD_FAULT_STATUS_PHY_CNT_ERR_BIT   8
#define	RRAM_CTRL_STD_FAULT_STATUS_PHY_ARB_ERR_BIT   9
#define	RRAM_CTRL_STD_FAULT_STATUS_CTRL_FSM_ERR_BIT   10
#define	RRAM_CTRL_STD_FAULT_STATUS_CTRL_CNT_ERR_BIT   11
#define	RRAM_CTRL_STD_FAULT_STATUS_CTRL_FIFO_ERR_BIT   12
#define	RRAM_CTRL_FAULT_STATUS_REG_OFFSET   0xe0
#define	RRAM_CTRL_FAULT_STATUS_REG_RESVAL   0x0u
#define	RRAM_CTRL_FAULT_STATUS_LCMGR_OP_ERR_BIT   0
#define	RRAM_CTRL_FAULT_STATUS_LCMGR_MP_ERR_BIT   1
#define	RRAM_CTRL_FAULT_STATUS_LCMGR_RD_ERR_BIT   2
#define	RRAM_CTRL_FAULT_STATUS_LCMGR_WR_ERR_BIT   3
#define	RRAM_CTRL_FAULT_STATUS_OTP_OP_ERR_BIT   4
#define	RRAM_CTRL_FAULT_STATUS_OTP_MP_ERR_BIT   5
#define	RRAM_CTRL_FAULT_STATUS_OTP_RD_ERR_BIT   6
#define	RRAM_CTRL_FAULT_STATUS_OTP_WR_ERR_BIT   7
#define	RRAM_CTRL_FAULT_STATUS_SEED_ERR_BIT   8
#define	RRAM_CTRL_FAULT_STATUS_PHY_RELBL_ERR_BIT   9
#define	RRAM_CTRL_FAULT_STATUS_PHY_RD_INTG_ERR_BIT   10
#define	RRAM_CTRL_FAULT_STATUS_PHY_RD_CTRL_ERR_BIT   11
#define	RRAM_CTRL_FAULT_STATUS_SPURIOUS_DONE_BIT   12
#define	RRAM_CTRL_FAULT_STATUS_HOST_GNT_ERR_BIT   13
#define	RRAM_CTRL_ERR_ADDR_REG_OFFSET   0xe4
#define	RRAM_CTRL_ERR_ADDR_REG_RESVAL   0x0u
#define	RRAM_CTRL_ERR_ADDR_ERR_ADDR_MASK   0x1fffffu
#define	RRAM_CTRL_ERR_ADDR_ERR_ADDR_OFFSET   0
#define	RRAM_CTRL_ERR_ADDR_ERR_ADDR_FIELD    ((bitfield_field32_t) { .mask = RRAM_CTRL_ERR_ADDR_ERR_ADDR_MASK, .index = RRAM_CTRL_ERR_ADDR_ERR_ADDR_OFFSET })
#define	RRAM_CTRL_CORR_ERR_CNT_REG_OFFSET   0xe8
#define	RRAM_CTRL_CORR_ERR_CNT_REG_RESVAL   0x0u
#define	RRAM_CTRL_CORR_ERR_CNT_VAL_MASK   0xffu
#define	RRAM_CTRL_CORR_ERR_CNT_VAL_OFFSET   0
#define	RRAM_CTRL_CORR_ERR_CNT_VAL_FIELD    ((bitfield_field32_t) { .mask = RRAM_CTRL_CORR_ERR_CNT_VAL_MASK, .index = RRAM_CTRL_CORR_ERR_CNT_VAL_OFFSET })
#define	RRAM_CTRL_CORR_ERR_LOC_REG_OFFSET   0xec
#define	RRAM_CTRL_CORR_ERR_LOC_REG_RESVAL   0x0u
#define	RRAM_CTRL_CORR_ERR_LOC_ADDR_MASK   0x1fffffu
#define	RRAM_CTRL_CORR_ERR_LOC_ADDR_OFFSET   0
#define	RRAM_CTRL_CORR_ERR_LOC_ADDR_FIELD    ((bitfield_field32_t) { .mask = RRAM_CTRL_CORR_ERR_LOC_ADDR_MASK, .index = RRAM_CTRL_CORR_ERR_LOC_ADDR_OFFSET })
#define	RRAM_CTRL_CORR_ERR_LOC_PART_BIT   24
#define	RRAM_CTRL_PHY_STATUS_REG_OFFSET   0xf0
#define	RRAM_CTRL_PHY_STATUS_REG_RESVAL   0x0u
#define	RRAM_CTRL_PHY_STATUS_WR_BUSY_BIT   0
#define	RRAM_CTRL_PHY_STATUS_INIT_DONE_BIT   1
#define	RRAM_CTRL_SCRATCH_REG_OFFSET   0xf4
#define	RRAM_CTRL_SCRATCH_REG_RESVAL   0x0u
#define	RRAM_CTRL_FIFO_LVL_REG_OFFSET   0xf8
#define	RRAM_CTRL_FIFO_LVL_REG_RESVAL   0xf0fu
#define	RRAM_CTRL_FIFO_LVL_WR_MASK   0x1fu
#define	RRAM_CTRL_FIFO_LVL_WR_OFFSET   0
#define	RRAM_CTRL_FIFO_LVL_WR_FIELD    ((bitfield_field32_t) { .mask = RRAM_CTRL_FIFO_LVL_WR_MASK, .index = RRAM_CTRL_FIFO_LVL_WR_OFFSET })
#define	RRAM_CTRL_FIFO_LVL_RD_MASK   0x1fu
#define	RRAM_CTRL_FIFO_LVL_RD_OFFSET   8
#define	RRAM_CTRL_FIFO_LVL_RD_FIELD    ((bitfield_field32_t) { .mask = RRAM_CTRL_FIFO_LVL_RD_MASK, .index = RRAM_CTRL_FIFO_LVL_RD_OFFSET })
#define	RRAM_CTRL_FIFO_CLR_REG_OFFSET   0xfc
#define	RRAM_CTRL_FIFO_CLR_REG_RESVAL   0x0u
#define	RRAM_CTRL_FIFO_CLR_WR_BIT   0
#define	RRAM_CTRL_FIFO_CLR_RD_BIT   1
#define	RRAM_CTRL_CURR_FIFO_LVL_REG_OFFSET   0x100
#define	RRAM_CTRL_CURR_FIFO_LVL_REG_RESVAL   0x0u
#define	RRAM_CTRL_CURR_FIFO_LVL_WR_MASK   0x1fu
#define	RRAM_CTRL_CURR_FIFO_LVL_WR_OFFSET   0
#define	RRAM_CTRL_CURR_FIFO_LVL_WR_FIELD    ((bitfield_field32_t) { .mask = RRAM_CTRL_CURR_FIFO_LVL_WR_MASK, .index = RRAM_CTRL_CURR_FIFO_LVL_WR_OFFSET })
#define	RRAM_CTRL_CURR_FIFO_LVL_RD_MASK   0x1fu
#define	RRAM_CTRL_CURR_FIFO_LVL_RD_OFFSET   8
#define	RRAM_CTRL_CURR_FIFO_LVL_RD_FIELD    ((bitfield_field32_t) { .mask = RRAM_CTRL_CURR_FIFO_LVL_RD_MASK, .index = RRAM_CTRL_CURR_FIFO_LVL_RD_OFFSET })
#define	RRAM_CTRL_WR_FIFO_REG_OFFSET   0x104
#define	RRAM_CTRL_WR_FIFO_SIZE_WORDS   1
#define	RRAM_CTRL_WR_FIFO_SIZE_BYTES   4
#define	RRAM_CTRL_RD_FIFO_REG_OFFSET   0x108
#define	RRAM_CTRL_RD_FIFO_SIZE_WORDS   1
#define	RRAM_CTRL_RD_FIFO_SIZE_BYTES   4

Detailed Description

Generated register defines for rram_ctrl.

Definition in file rram_ctrl_regs.h.

Macro Definition Documentation

RRAM_CTRL_ADDR_REG_OFFSET

#define RRAM_CTRL_ADDR_REG_OFFSET   0x24

Definition at line 137 of file rram_ctrl_regs.h.

RRAM_CTRL_ADDR_REG_RESVAL

#define RRAM_CTRL_ADDR_REG_RESVAL   0x0u

Definition at line 138 of file rram_ctrl_regs.h.

RRAM_CTRL_ADDR_START_FIELD

#define RRAM_CTRL_ADDR_START_FIELD    ((bitfield_field32_t) { .mask = RRAM_CTRL_ADDR_START_MASK, .index = RRAM_CTRL_ADDR_START_OFFSET })

Definition at line 141 of file rram_ctrl_regs.h.

RRAM_CTRL_ADDR_START_MASK

#define RRAM_CTRL_ADDR_START_MASK   0x1fffffu

Definition at line 139 of file rram_ctrl_regs.h.

RRAM_CTRL_ADDR_START_OFFSET

#define RRAM_CTRL_ADDR_START_OFFSET   0

Definition at line 140 of file rram_ctrl_regs.h.

RRAM_CTRL_ALERT_TEST_FATAL_ERR_BIT

#define RRAM_CTRL_ALERT_TEST_FATAL_ERR_BIT   2

Definition at line 89 of file rram_ctrl_regs.h.

RRAM_CTRL_ALERT_TEST_FATAL_MACRO_ERR_BIT

#define RRAM_CTRL_ALERT_TEST_FATAL_MACRO_ERR_BIT   3

Definition at line 90 of file rram_ctrl_regs.h.

RRAM_CTRL_ALERT_TEST_FATAL_STD_ERR_BIT

#define RRAM_CTRL_ALERT_TEST_FATAL_STD_ERR_BIT   1

Definition at line 88 of file rram_ctrl_regs.h.

RRAM_CTRL_ALERT_TEST_RECOV_ERR_BIT

#define RRAM_CTRL_ALERT_TEST_RECOV_ERR_BIT   0

Definition at line 87 of file rram_ctrl_regs.h.

RRAM_CTRL_ALERT_TEST_RECOV_MACRO_ERR_BIT

#define RRAM_CTRL_ALERT_TEST_RECOV_MACRO_ERR_BIT   4

Definition at line 91 of file rram_ctrl_regs.h.

RRAM_CTRL_ALERT_TEST_REG_OFFSET

#define RRAM_CTRL_ALERT_TEST_REG_OFFSET   0xc

Definition at line 85 of file rram_ctrl_regs.h.

RRAM_CTRL_ALERT_TEST_REG_RESVAL

#define RRAM_CTRL_ALERT_TEST_REG_RESVAL   0x0u

Definition at line 86 of file rram_ctrl_regs.h.

RRAM_CTRL_CONTROL_NUM_FIELD

#define RRAM_CTRL_CONTROL_NUM_FIELD    ((bitfield_field32_t) { .mask = RRAM_CTRL_CONTROL_NUM_MASK, .index = RRAM_CTRL_CONTROL_NUM_OFFSET })

Definition at line 133 of file rram_ctrl_regs.h.

RRAM_CTRL_CONTROL_NUM_MASK

#define RRAM_CTRL_CONTROL_NUM_MASK   0x3ffu

Definition at line 131 of file rram_ctrl_regs.h.

RRAM_CTRL_CONTROL_NUM_OFFSET

#define RRAM_CTRL_CONTROL_NUM_OFFSET   16

Definition at line 132 of file rram_ctrl_regs.h.

RRAM_CTRL_CONTROL_OP_FIELD

#define RRAM_CTRL_CONTROL_OP_FIELD    ((bitfield_field32_t) { .mask = RRAM_CTRL_CONTROL_OP_MASK, .index = RRAM_CTRL_CONTROL_OP_OFFSET })

Definition at line 125 of file rram_ctrl_regs.h.

RRAM_CTRL_CONTROL_OP_MASK

#define RRAM_CTRL_CONTROL_OP_MASK   0x3u

Definition at line 123 of file rram_ctrl_regs.h.

RRAM_CTRL_CONTROL_OP_OFFSET

#define RRAM_CTRL_CONTROL_OP_OFFSET   4

Definition at line 124 of file rram_ctrl_regs.h.

RRAM_CTRL_CONTROL_OP_VALUE_READ

#define RRAM_CTRL_CONTROL_OP_VALUE_READ   0x0

Definition at line 127 of file rram_ctrl_regs.h.

RRAM_CTRL_CONTROL_OP_VALUE_REWRITE

#define RRAM_CTRL_CONTROL_OP_VALUE_REWRITE   0x2

Definition at line 129 of file rram_ctrl_regs.h.

RRAM_CTRL_CONTROL_OP_VALUE_WRITE

#define RRAM_CTRL_CONTROL_OP_VALUE_WRITE   0x1

Definition at line 128 of file rram_ctrl_regs.h.

RRAM_CTRL_CONTROL_PARTITION_BIT

#define RRAM_CTRL_CONTROL_PARTITION_BIT   8

Definition at line 130 of file rram_ctrl_regs.h.

RRAM_CTRL_CONTROL_REG_OFFSET

#define RRAM_CTRL_CONTROL_REG_OFFSET   0x20

Definition at line 120 of file rram_ctrl_regs.h.

RRAM_CTRL_CONTROL_REG_RESVAL

#define RRAM_CTRL_CONTROL_REG_RESVAL   0x0u

Definition at line 121 of file rram_ctrl_regs.h.

RRAM_CTRL_CONTROL_START_BIT

#define RRAM_CTRL_CONTROL_START_BIT   0

Definition at line 122 of file rram_ctrl_regs.h.

RRAM_CTRL_CORR_ERR_CNT_REG_OFFSET

#define RRAM_CTRL_CORR_ERR_CNT_REG_OFFSET   0xe8

Definition at line 837 of file rram_ctrl_regs.h.

RRAM_CTRL_CORR_ERR_CNT_REG_RESVAL

#define RRAM_CTRL_CORR_ERR_CNT_REG_RESVAL   0x0u

Definition at line 838 of file rram_ctrl_regs.h.

RRAM_CTRL_CORR_ERR_CNT_VAL_FIELD

#define RRAM_CTRL_CORR_ERR_CNT_VAL_FIELD    ((bitfield_field32_t) { .mask = RRAM_CTRL_CORR_ERR_CNT_VAL_MASK, .index = RRAM_CTRL_CORR_ERR_CNT_VAL_OFFSET })

Definition at line 841 of file rram_ctrl_regs.h.

RRAM_CTRL_CORR_ERR_CNT_VAL_MASK

#define RRAM_CTRL_CORR_ERR_CNT_VAL_MASK   0xffu

Definition at line 839 of file rram_ctrl_regs.h.

RRAM_CTRL_CORR_ERR_CNT_VAL_OFFSET

#define RRAM_CTRL_CORR_ERR_CNT_VAL_OFFSET   0

Definition at line 840 of file rram_ctrl_regs.h.

RRAM_CTRL_CORR_ERR_LOC_ADDR_FIELD

#define RRAM_CTRL_CORR_ERR_LOC_ADDR_FIELD    ((bitfield_field32_t) { .mask = RRAM_CTRL_CORR_ERR_LOC_ADDR_MASK, .index = RRAM_CTRL_CORR_ERR_LOC_ADDR_OFFSET })

Definition at line 849 of file rram_ctrl_regs.h.

RRAM_CTRL_CORR_ERR_LOC_ADDR_MASK

#define RRAM_CTRL_CORR_ERR_LOC_ADDR_MASK   0x1fffffu

Definition at line 847 of file rram_ctrl_regs.h.

RRAM_CTRL_CORR_ERR_LOC_ADDR_OFFSET

#define RRAM_CTRL_CORR_ERR_LOC_ADDR_OFFSET   0

Definition at line 848 of file rram_ctrl_regs.h.

RRAM_CTRL_CORR_ERR_LOC_PART_BIT

#define RRAM_CTRL_CORR_ERR_LOC_PART_BIT   24

Definition at line 851 of file rram_ctrl_regs.h.

RRAM_CTRL_CORR_ERR_LOC_REG_OFFSET

#define RRAM_CTRL_CORR_ERR_LOC_REG_OFFSET   0xec

Definition at line 845 of file rram_ctrl_regs.h.

RRAM_CTRL_CORR_ERR_LOC_REG_RESVAL

#define RRAM_CTRL_CORR_ERR_LOC_REG_RESVAL   0x0u

Definition at line 846 of file rram_ctrl_regs.h.

RRAM_CTRL_CTRL_REGWEN_EN_BIT

#define RRAM_CTRL_CTRL_REGWEN_EN_BIT   0

Definition at line 117 of file rram_ctrl_regs.h.

RRAM_CTRL_CTRL_REGWEN_REG_OFFSET

#define RRAM_CTRL_CTRL_REGWEN_REG_OFFSET   0x1c

Definition at line 115 of file rram_ctrl_regs.h.

RRAM_CTRL_CTRL_REGWEN_REG_RESVAL

#define RRAM_CTRL_CTRL_REGWEN_REG_RESVAL   0x1u

Definition at line 116 of file rram_ctrl_regs.h.

RRAM_CTRL_CURR_FIFO_LVL_RD_FIELD

#define RRAM_CTRL_CURR_FIFO_LVL_RD_FIELD    ((bitfield_field32_t) { .mask = RRAM_CTRL_CURR_FIFO_LVL_RD_MASK, .index = RRAM_CTRL_CURR_FIFO_LVL_RD_OFFSET })

Definition at line 890 of file rram_ctrl_regs.h.

RRAM_CTRL_CURR_FIFO_LVL_RD_MASK

#define RRAM_CTRL_CURR_FIFO_LVL_RD_MASK   0x1fu

Definition at line 888 of file rram_ctrl_regs.h.

RRAM_CTRL_CURR_FIFO_LVL_RD_OFFSET

#define RRAM_CTRL_CURR_FIFO_LVL_RD_OFFSET   8

Definition at line 889 of file rram_ctrl_regs.h.

RRAM_CTRL_CURR_FIFO_LVL_REG_OFFSET

#define RRAM_CTRL_CURR_FIFO_LVL_REG_OFFSET   0x100

Definition at line 882 of file rram_ctrl_regs.h.

RRAM_CTRL_CURR_FIFO_LVL_REG_RESVAL

#define RRAM_CTRL_CURR_FIFO_LVL_REG_RESVAL   0x0u

Definition at line 883 of file rram_ctrl_regs.h.

RRAM_CTRL_CURR_FIFO_LVL_WR_FIELD

#define RRAM_CTRL_CURR_FIFO_LVL_WR_FIELD    ((bitfield_field32_t) { .mask = RRAM_CTRL_CURR_FIFO_LVL_WR_MASK, .index = RRAM_CTRL_CURR_FIFO_LVL_WR_OFFSET })

Definition at line 886 of file rram_ctrl_regs.h.

RRAM_CTRL_CURR_FIFO_LVL_WR_MASK

#define RRAM_CTRL_CURR_FIFO_LVL_WR_MASK   0x1fu

Definition at line 884 of file rram_ctrl_regs.h.

RRAM_CTRL_CURR_FIFO_LVL_WR_OFFSET

#define RRAM_CTRL_CURR_FIFO_LVL_WR_OFFSET   0

Definition at line 885 of file rram_ctrl_regs.h.

RRAM_CTRL_DEFAULT_REGION_ECC_EN_FIELD

#define RRAM_CTRL_DEFAULT_REGION_ECC_EN_FIELD    ((bitfield_field32_t) { .mask = RRAM_CTRL_DEFAULT_REGION_ECC_EN_MASK, .index = RRAM_CTRL_DEFAULT_REGION_ECC_EN_OFFSET })

Definition at line 508 of file rram_ctrl_regs.h.

RRAM_CTRL_DEFAULT_REGION_ECC_EN_MASK

#define RRAM_CTRL_DEFAULT_REGION_ECC_EN_MASK   0xfu

Definition at line 506 of file rram_ctrl_regs.h.

RRAM_CTRL_DEFAULT_REGION_ECC_EN_OFFSET

#define RRAM_CTRL_DEFAULT_REGION_ECC_EN_OFFSET   12

Definition at line 507 of file rram_ctrl_regs.h.

RRAM_CTRL_DEFAULT_REGION_RD_EN_FIELD

#define RRAM_CTRL_DEFAULT_REGION_RD_EN_FIELD    ((bitfield_field32_t) { .mask = RRAM_CTRL_DEFAULT_REGION_RD_EN_MASK, .index = RRAM_CTRL_DEFAULT_REGION_RD_EN_OFFSET })

Definition at line 496 of file rram_ctrl_regs.h.

RRAM_CTRL_DEFAULT_REGION_RD_EN_MASK

#define RRAM_CTRL_DEFAULT_REGION_RD_EN_MASK   0xfu

Definition at line 494 of file rram_ctrl_regs.h.

RRAM_CTRL_DEFAULT_REGION_RD_EN_OFFSET

#define RRAM_CTRL_DEFAULT_REGION_RD_EN_OFFSET   0

Definition at line 495 of file rram_ctrl_regs.h.

RRAM_CTRL_DEFAULT_REGION_REG_OFFSET

#define RRAM_CTRL_DEFAULT_REGION_REG_OFFSET   0x88

Definition at line 492 of file rram_ctrl_regs.h.

RRAM_CTRL_DEFAULT_REGION_REG_RESVAL

#define RRAM_CTRL_DEFAULT_REGION_REG_RESVAL   0x9999u

Definition at line 493 of file rram_ctrl_regs.h.

RRAM_CTRL_DEFAULT_REGION_SCRAMBLE_EN_FIELD

#define RRAM_CTRL_DEFAULT_REGION_SCRAMBLE_EN_FIELD    ((bitfield_field32_t) { .mask = RRAM_CTRL_DEFAULT_REGION_SCRAMBLE_EN_MASK, .index = RRAM_CTRL_DEFAULT_REGION_SCRAMBLE_EN_OFFSET })

Definition at line 504 of file rram_ctrl_regs.h.

RRAM_CTRL_DEFAULT_REGION_SCRAMBLE_EN_MASK

#define RRAM_CTRL_DEFAULT_REGION_SCRAMBLE_EN_MASK   0xfu

Definition at line 502 of file rram_ctrl_regs.h.

RRAM_CTRL_DEFAULT_REGION_SCRAMBLE_EN_OFFSET

#define RRAM_CTRL_DEFAULT_REGION_SCRAMBLE_EN_OFFSET   8

Definition at line 503 of file rram_ctrl_regs.h.

RRAM_CTRL_DEFAULT_REGION_WR_EN_FIELD

#define RRAM_CTRL_DEFAULT_REGION_WR_EN_FIELD    ((bitfield_field32_t) { .mask = RRAM_CTRL_DEFAULT_REGION_WR_EN_MASK, .index = RRAM_CTRL_DEFAULT_REGION_WR_EN_OFFSET })

Definition at line 500 of file rram_ctrl_regs.h.

RRAM_CTRL_DEFAULT_REGION_WR_EN_MASK

#define RRAM_CTRL_DEFAULT_REGION_WR_EN_MASK   0xfu

Definition at line 498 of file rram_ctrl_regs.h.

RRAM_CTRL_DEFAULT_REGION_WR_EN_OFFSET

#define RRAM_CTRL_DEFAULT_REGION_WR_EN_OFFSET   4

Definition at line 499 of file rram_ctrl_regs.h.

RRAM_CTRL_DIS_REG_OFFSET

#define RRAM_CTRL_DIS_REG_OFFSET   0x10

Definition at line 94 of file rram_ctrl_regs.h.

RRAM_CTRL_DIS_REG_RESVAL

#define RRAM_CTRL_DIS_REG_RESVAL   0x99u

Definition at line 95 of file rram_ctrl_regs.h.

RRAM_CTRL_DIS_RELBL_ERR_FATAL_FIELD

#define RRAM_CTRL_DIS_RELBL_ERR_FATAL_FIELD    ((bitfield_field32_t) { .mask = RRAM_CTRL_DIS_RELBL_ERR_FATAL_MASK, .index = RRAM_CTRL_DIS_RELBL_ERR_FATAL_OFFSET })

Definition at line 102 of file rram_ctrl_regs.h.

RRAM_CTRL_DIS_RELBL_ERR_FATAL_MASK

#define RRAM_CTRL_DIS_RELBL_ERR_FATAL_MASK   0xfu

Definition at line 100 of file rram_ctrl_regs.h.

RRAM_CTRL_DIS_RELBL_ERR_FATAL_OFFSET

#define RRAM_CTRL_DIS_RELBL_ERR_FATAL_OFFSET   4

Definition at line 101 of file rram_ctrl_regs.h.

RRAM_CTRL_DIS_SW_DIS_FIELD

#define RRAM_CTRL_DIS_SW_DIS_FIELD    ((bitfield_field32_t) { .mask = RRAM_CTRL_DIS_SW_DIS_MASK, .index = RRAM_CTRL_DIS_SW_DIS_OFFSET })

Definition at line 98 of file rram_ctrl_regs.h.

RRAM_CTRL_DIS_SW_DIS_MASK

#define RRAM_CTRL_DIS_SW_DIS_MASK   0xfu

Definition at line 96 of file rram_ctrl_regs.h.

RRAM_CTRL_DIS_SW_DIS_OFFSET

#define RRAM_CTRL_DIS_SW_DIS_OFFSET   0

Definition at line 97 of file rram_ctrl_regs.h.

RRAM_CTRL_ERR_ADDR_ERR_ADDR_FIELD

#define RRAM_CTRL_ERR_ADDR_ERR_ADDR_FIELD    ((bitfield_field32_t) { .mask = RRAM_CTRL_ERR_ADDR_ERR_ADDR_MASK, .index = RRAM_CTRL_ERR_ADDR_ERR_ADDR_OFFSET })

Definition at line 833 of file rram_ctrl_regs.h.

RRAM_CTRL_ERR_ADDR_ERR_ADDR_MASK

#define RRAM_CTRL_ERR_ADDR_ERR_ADDR_MASK   0x1fffffu

Definition at line 831 of file rram_ctrl_regs.h.

RRAM_CTRL_ERR_ADDR_ERR_ADDR_OFFSET

#define RRAM_CTRL_ERR_ADDR_ERR_ADDR_OFFSET   0

Definition at line 832 of file rram_ctrl_regs.h.

RRAM_CTRL_ERR_ADDR_REG_OFFSET

#define RRAM_CTRL_ERR_ADDR_REG_OFFSET   0xe4

Definition at line 829 of file rram_ctrl_regs.h.

RRAM_CTRL_ERR_ADDR_REG_RESVAL

#define RRAM_CTRL_ERR_ADDR_REG_RESVAL   0x0u

Definition at line 830 of file rram_ctrl_regs.h.

RRAM_CTRL_ERR_CODE_MP_ERR_BIT

#define RRAM_CTRL_ERR_CODE_MP_ERR_BIT   1

Definition at line 789 of file rram_ctrl_regs.h.

RRAM_CTRL_ERR_CODE_OP_ERR_BIT

#define RRAM_CTRL_ERR_CODE_OP_ERR_BIT   0

Definition at line 788 of file rram_ctrl_regs.h.

RRAM_CTRL_ERR_CODE_RD_ERR_BIT

#define RRAM_CTRL_ERR_CODE_RD_ERR_BIT   2

Definition at line 790 of file rram_ctrl_regs.h.

RRAM_CTRL_ERR_CODE_REG_OFFSET

#define RRAM_CTRL_ERR_CODE_REG_OFFSET   0xd8

Definition at line 786 of file rram_ctrl_regs.h.

RRAM_CTRL_ERR_CODE_REG_RESVAL

#define RRAM_CTRL_ERR_CODE_REG_RESVAL   0x0u

Definition at line 787 of file rram_ctrl_regs.h.

RRAM_CTRL_ERR_CODE_WR_ERR_BIT

#define RRAM_CTRL_ERR_CODE_WR_ERR_BIT   3

Definition at line 791 of file rram_ctrl_regs.h.

RRAM_CTRL_EXEC_REG_OFFSET

#define RRAM_CTRL_EXEC_REG_OFFSET   0x14

Definition at line 106 of file rram_ctrl_regs.h.

RRAM_CTRL_EXEC_REG_RESVAL

#define RRAM_CTRL_EXEC_REG_RESVAL   0x0u

Definition at line 107 of file rram_ctrl_regs.h.

RRAM_CTRL_FAULT_STATUS_HOST_GNT_ERR_BIT

#define RRAM_CTRL_FAULT_STATUS_HOST_GNT_ERR_BIT   13

Definition at line 826 of file rram_ctrl_regs.h.

RRAM_CTRL_FAULT_STATUS_LCMGR_MP_ERR_BIT

#define RRAM_CTRL_FAULT_STATUS_LCMGR_MP_ERR_BIT   1

Definition at line 814 of file rram_ctrl_regs.h.

RRAM_CTRL_FAULT_STATUS_LCMGR_OP_ERR_BIT

#define RRAM_CTRL_FAULT_STATUS_LCMGR_OP_ERR_BIT   0

Definition at line 813 of file rram_ctrl_regs.h.

RRAM_CTRL_FAULT_STATUS_LCMGR_RD_ERR_BIT

#define RRAM_CTRL_FAULT_STATUS_LCMGR_RD_ERR_BIT   2

Definition at line 815 of file rram_ctrl_regs.h.

RRAM_CTRL_FAULT_STATUS_LCMGR_WR_ERR_BIT

#define RRAM_CTRL_FAULT_STATUS_LCMGR_WR_ERR_BIT   3

Definition at line 816 of file rram_ctrl_regs.h.

RRAM_CTRL_FAULT_STATUS_OTP_MP_ERR_BIT

#define RRAM_CTRL_FAULT_STATUS_OTP_MP_ERR_BIT   5

Definition at line 818 of file rram_ctrl_regs.h.

RRAM_CTRL_FAULT_STATUS_OTP_OP_ERR_BIT

#define RRAM_CTRL_FAULT_STATUS_OTP_OP_ERR_BIT   4

Definition at line 817 of file rram_ctrl_regs.h.

RRAM_CTRL_FAULT_STATUS_OTP_RD_ERR_BIT

#define RRAM_CTRL_FAULT_STATUS_OTP_RD_ERR_BIT   6

Definition at line 819 of file rram_ctrl_regs.h.

RRAM_CTRL_FAULT_STATUS_OTP_WR_ERR_BIT

#define RRAM_CTRL_FAULT_STATUS_OTP_WR_ERR_BIT   7

Definition at line 820 of file rram_ctrl_regs.h.

RRAM_CTRL_FAULT_STATUS_PHY_RD_CTRL_ERR_BIT

#define RRAM_CTRL_FAULT_STATUS_PHY_RD_CTRL_ERR_BIT   11

Definition at line 824 of file rram_ctrl_regs.h.

RRAM_CTRL_FAULT_STATUS_PHY_RD_INTG_ERR_BIT

#define RRAM_CTRL_FAULT_STATUS_PHY_RD_INTG_ERR_BIT   10

Definition at line 823 of file rram_ctrl_regs.h.

RRAM_CTRL_FAULT_STATUS_PHY_RELBL_ERR_BIT

#define RRAM_CTRL_FAULT_STATUS_PHY_RELBL_ERR_BIT   9

Definition at line 822 of file rram_ctrl_regs.h.

RRAM_CTRL_FAULT_STATUS_REG_OFFSET

#define RRAM_CTRL_FAULT_STATUS_REG_OFFSET   0xe0

Definition at line 811 of file rram_ctrl_regs.h.

RRAM_CTRL_FAULT_STATUS_REG_RESVAL

#define RRAM_CTRL_FAULT_STATUS_REG_RESVAL   0x0u

Definition at line 812 of file rram_ctrl_regs.h.

RRAM_CTRL_FAULT_STATUS_SEED_ERR_BIT

#define RRAM_CTRL_FAULT_STATUS_SEED_ERR_BIT   8

Definition at line 821 of file rram_ctrl_regs.h.

RRAM_CTRL_FAULT_STATUS_SPURIOUS_DONE_BIT

#define RRAM_CTRL_FAULT_STATUS_SPURIOUS_DONE_BIT   12

Definition at line 825 of file rram_ctrl_regs.h.

RRAM_CTRL_FIFO_CLR_RD_BIT

#define RRAM_CTRL_FIFO_CLR_RD_BIT   1

Definition at line 879 of file rram_ctrl_regs.h.

RRAM_CTRL_FIFO_CLR_REG_OFFSET

#define RRAM_CTRL_FIFO_CLR_REG_OFFSET   0xfc

Definition at line 876 of file rram_ctrl_regs.h.

RRAM_CTRL_FIFO_CLR_REG_RESVAL

#define RRAM_CTRL_FIFO_CLR_REG_RESVAL   0x0u

Definition at line 877 of file rram_ctrl_regs.h.

RRAM_CTRL_FIFO_CLR_WR_BIT

#define RRAM_CTRL_FIFO_CLR_WR_BIT   0

Definition at line 878 of file rram_ctrl_regs.h.

RRAM_CTRL_FIFO_LVL_RD_FIELD

#define RRAM_CTRL_FIFO_LVL_RD_FIELD    ((bitfield_field32_t) { .mask = RRAM_CTRL_FIFO_LVL_RD_MASK, .index = RRAM_CTRL_FIFO_LVL_RD_OFFSET })

Definition at line 872 of file rram_ctrl_regs.h.

RRAM_CTRL_FIFO_LVL_RD_MASK

#define RRAM_CTRL_FIFO_LVL_RD_MASK   0x1fu

Definition at line 870 of file rram_ctrl_regs.h.

RRAM_CTRL_FIFO_LVL_RD_OFFSET

#define RRAM_CTRL_FIFO_LVL_RD_OFFSET   8

Definition at line 871 of file rram_ctrl_regs.h.

RRAM_CTRL_FIFO_LVL_REG_OFFSET

#define RRAM_CTRL_FIFO_LVL_REG_OFFSET   0xf8

Definition at line 864 of file rram_ctrl_regs.h.

RRAM_CTRL_FIFO_LVL_REG_RESVAL

#define RRAM_CTRL_FIFO_LVL_REG_RESVAL   0xf0fu

Definition at line 865 of file rram_ctrl_regs.h.

RRAM_CTRL_FIFO_LVL_WR_FIELD

#define RRAM_CTRL_FIFO_LVL_WR_FIELD    ((bitfield_field32_t) { .mask = RRAM_CTRL_FIFO_LVL_WR_MASK, .index = RRAM_CTRL_FIFO_LVL_WR_OFFSET })

Definition at line 868 of file rram_ctrl_regs.h.

RRAM_CTRL_FIFO_LVL_WR_MASK

#define RRAM_CTRL_FIFO_LVL_WR_MASK   0x1fu

Definition at line 866 of file rram_ctrl_regs.h.

RRAM_CTRL_FIFO_LVL_WR_OFFSET

#define RRAM_CTRL_FIFO_LVL_WR_OFFSET   0

Definition at line 867 of file rram_ctrl_regs.h.

RRAM_CTRL_HW_INFO_CFG_OVERRIDE_ECC_DIS_FIELD

#define RRAM_CTRL_HW_INFO_CFG_OVERRIDE_ECC_DIS_FIELD    ((bitfield_field32_t) { .mask = RRAM_CTRL_HW_INFO_CFG_OVERRIDE_ECC_DIS_MASK, .index = RRAM_CTRL_HW_INFO_CFG_OVERRIDE_ECC_DIS_OFFSET })

Definition at line 766 of file rram_ctrl_regs.h.

RRAM_CTRL_HW_INFO_CFG_OVERRIDE_ECC_DIS_MASK

#define RRAM_CTRL_HW_INFO_CFG_OVERRIDE_ECC_DIS_MASK   0xfu

Definition at line 764 of file rram_ctrl_regs.h.

RRAM_CTRL_HW_INFO_CFG_OVERRIDE_ECC_DIS_OFFSET

#define RRAM_CTRL_HW_INFO_CFG_OVERRIDE_ECC_DIS_OFFSET   4

Definition at line 765 of file rram_ctrl_regs.h.

RRAM_CTRL_HW_INFO_CFG_OVERRIDE_REG_OFFSET

#define RRAM_CTRL_HW_INFO_CFG_OVERRIDE_REG_OFFSET   0xcc

Definition at line 758 of file rram_ctrl_regs.h.

RRAM_CTRL_HW_INFO_CFG_OVERRIDE_REG_RESVAL

#define RRAM_CTRL_HW_INFO_CFG_OVERRIDE_REG_RESVAL   0x99u

Definition at line 759 of file rram_ctrl_regs.h.

RRAM_CTRL_HW_INFO_CFG_OVERRIDE_SCRAMBLE_DIS_FIELD

#define RRAM_CTRL_HW_INFO_CFG_OVERRIDE_SCRAMBLE_DIS_FIELD    ((bitfield_field32_t) { .mask = RRAM_CTRL_HW_INFO_CFG_OVERRIDE_SCRAMBLE_DIS_MASK, .index = RRAM_CTRL_HW_INFO_CFG_OVERRIDE_SCRAMBLE_DIS_OFFSET })

Definition at line 762 of file rram_ctrl_regs.h.

RRAM_CTRL_HW_INFO_CFG_OVERRIDE_SCRAMBLE_DIS_MASK

#define RRAM_CTRL_HW_INFO_CFG_OVERRIDE_SCRAMBLE_DIS_MASK   0xfu

Definition at line 760 of file rram_ctrl_regs.h.

RRAM_CTRL_HW_INFO_CFG_OVERRIDE_SCRAMBLE_DIS_OFFSET

#define RRAM_CTRL_HW_INFO_CFG_OVERRIDE_SCRAMBLE_DIS_OFFSET   0

Definition at line 761 of file rram_ctrl_regs.h.

RRAM_CTRL_INFO_PAGE_CFG_0_ECC_EN_0_FIELD

#define RRAM_CTRL_INFO_PAGE_CFG_0_ECC_EN_0_FIELD    ((bitfield_field32_t) { .mask = RRAM_CTRL_INFO_PAGE_CFG_0_ECC_EN_0_MASK, .index = RRAM_CTRL_INFO_PAGE_CFG_0_ECC_EN_0_OFFSET })

Definition at line 586 of file rram_ctrl_regs.h.

RRAM_CTRL_INFO_PAGE_CFG_0_ECC_EN_0_MASK

#define RRAM_CTRL_INFO_PAGE_CFG_0_ECC_EN_0_MASK   0xfu

Definition at line 584 of file rram_ctrl_regs.h.

RRAM_CTRL_INFO_PAGE_CFG_0_ECC_EN_0_OFFSET

#define RRAM_CTRL_INFO_PAGE_CFG_0_ECC_EN_0_OFFSET   16

Definition at line 585 of file rram_ctrl_regs.h.

RRAM_CTRL_INFO_PAGE_CFG_0_EN_0_FIELD

#define RRAM_CTRL_INFO_PAGE_CFG_0_EN_0_FIELD    ((bitfield_field32_t) { .mask = RRAM_CTRL_INFO_PAGE_CFG_0_EN_0_MASK, .index = RRAM_CTRL_INFO_PAGE_CFG_0_EN_0_OFFSET })

Definition at line 570 of file rram_ctrl_regs.h.

RRAM_CTRL_INFO_PAGE_CFG_0_EN_0_MASK

#define RRAM_CTRL_INFO_PAGE_CFG_0_EN_0_MASK   0xfu

Definition at line 568 of file rram_ctrl_regs.h.

RRAM_CTRL_INFO_PAGE_CFG_0_EN_0_OFFSET

#define RRAM_CTRL_INFO_PAGE_CFG_0_EN_0_OFFSET   0

Definition at line 569 of file rram_ctrl_regs.h.

RRAM_CTRL_INFO_PAGE_CFG_0_RD_EN_0_FIELD

#define RRAM_CTRL_INFO_PAGE_CFG_0_RD_EN_0_FIELD    ((bitfield_field32_t) { .mask = RRAM_CTRL_INFO_PAGE_CFG_0_RD_EN_0_MASK, .index = RRAM_CTRL_INFO_PAGE_CFG_0_RD_EN_0_OFFSET })

Definition at line 574 of file rram_ctrl_regs.h.

RRAM_CTRL_INFO_PAGE_CFG_0_RD_EN_0_MASK

#define RRAM_CTRL_INFO_PAGE_CFG_0_RD_EN_0_MASK   0xfu

Definition at line 572 of file rram_ctrl_regs.h.

RRAM_CTRL_INFO_PAGE_CFG_0_RD_EN_0_OFFSET

#define RRAM_CTRL_INFO_PAGE_CFG_0_RD_EN_0_OFFSET   4

Definition at line 573 of file rram_ctrl_regs.h.

RRAM_CTRL_INFO_PAGE_CFG_0_REG_OFFSET

#define RRAM_CTRL_INFO_PAGE_CFG_0_REG_OFFSET   0xac

Definition at line 566 of file rram_ctrl_regs.h.

RRAM_CTRL_INFO_PAGE_CFG_0_REG_RESVAL

#define RRAM_CTRL_INFO_PAGE_CFG_0_REG_RESVAL   0x99999u

Definition at line 567 of file rram_ctrl_regs.h.

RRAM_CTRL_INFO_PAGE_CFG_0_SCRAMBLE_EN_0_FIELD

#define RRAM_CTRL_INFO_PAGE_CFG_0_SCRAMBLE_EN_0_FIELD    ((bitfield_field32_t) { .mask = RRAM_CTRL_INFO_PAGE_CFG_0_SCRAMBLE_EN_0_MASK, .index = RRAM_CTRL_INFO_PAGE_CFG_0_SCRAMBLE_EN_0_OFFSET })

Definition at line 582 of file rram_ctrl_regs.h.

RRAM_CTRL_INFO_PAGE_CFG_0_SCRAMBLE_EN_0_MASK

#define RRAM_CTRL_INFO_PAGE_CFG_0_SCRAMBLE_EN_0_MASK   0xfu

Definition at line 580 of file rram_ctrl_regs.h.

RRAM_CTRL_INFO_PAGE_CFG_0_SCRAMBLE_EN_0_OFFSET

#define RRAM_CTRL_INFO_PAGE_CFG_0_SCRAMBLE_EN_0_OFFSET   12

Definition at line 581 of file rram_ctrl_regs.h.

RRAM_CTRL_INFO_PAGE_CFG_0_WR_EN_0_FIELD

#define RRAM_CTRL_INFO_PAGE_CFG_0_WR_EN_0_FIELD    ((bitfield_field32_t) { .mask = RRAM_CTRL_INFO_PAGE_CFG_0_WR_EN_0_MASK, .index = RRAM_CTRL_INFO_PAGE_CFG_0_WR_EN_0_OFFSET })

Definition at line 578 of file rram_ctrl_regs.h.

RRAM_CTRL_INFO_PAGE_CFG_0_WR_EN_0_MASK

#define RRAM_CTRL_INFO_PAGE_CFG_0_WR_EN_0_MASK   0xfu

Definition at line 576 of file rram_ctrl_regs.h.

RRAM_CTRL_INFO_PAGE_CFG_0_WR_EN_0_OFFSET

#define RRAM_CTRL_INFO_PAGE_CFG_0_WR_EN_0_OFFSET   8

Definition at line 577 of file rram_ctrl_regs.h.

RRAM_CTRL_INFO_PAGE_CFG_1_ECC_EN_1_FIELD

#define RRAM_CTRL_INFO_PAGE_CFG_1_ECC_EN_1_FIELD    ((bitfield_field32_t) { .mask = RRAM_CTRL_INFO_PAGE_CFG_1_ECC_EN_1_MASK, .index = RRAM_CTRL_INFO_PAGE_CFG_1_ECC_EN_1_OFFSET })

Definition at line 610 of file rram_ctrl_regs.h.

RRAM_CTRL_INFO_PAGE_CFG_1_ECC_EN_1_MASK

#define RRAM_CTRL_INFO_PAGE_CFG_1_ECC_EN_1_MASK   0xfu

Definition at line 608 of file rram_ctrl_regs.h.

RRAM_CTRL_INFO_PAGE_CFG_1_ECC_EN_1_OFFSET

#define RRAM_CTRL_INFO_PAGE_CFG_1_ECC_EN_1_OFFSET   16

Definition at line 609 of file rram_ctrl_regs.h.

RRAM_CTRL_INFO_PAGE_CFG_1_EN_1_FIELD

#define RRAM_CTRL_INFO_PAGE_CFG_1_EN_1_FIELD    ((bitfield_field32_t) { .mask = RRAM_CTRL_INFO_PAGE_CFG_1_EN_1_MASK, .index = RRAM_CTRL_INFO_PAGE_CFG_1_EN_1_OFFSET })

Definition at line 594 of file rram_ctrl_regs.h.

RRAM_CTRL_INFO_PAGE_CFG_1_EN_1_MASK

#define RRAM_CTRL_INFO_PAGE_CFG_1_EN_1_MASK   0xfu

Definition at line 592 of file rram_ctrl_regs.h.

RRAM_CTRL_INFO_PAGE_CFG_1_EN_1_OFFSET

#define RRAM_CTRL_INFO_PAGE_CFG_1_EN_1_OFFSET   0

Definition at line 593 of file rram_ctrl_regs.h.

RRAM_CTRL_INFO_PAGE_CFG_1_RD_EN_1_FIELD

#define RRAM_CTRL_INFO_PAGE_CFG_1_RD_EN_1_FIELD    ((bitfield_field32_t) { .mask = RRAM_CTRL_INFO_PAGE_CFG_1_RD_EN_1_MASK, .index = RRAM_CTRL_INFO_PAGE_CFG_1_RD_EN_1_OFFSET })

Definition at line 598 of file rram_ctrl_regs.h.

RRAM_CTRL_INFO_PAGE_CFG_1_RD_EN_1_MASK

#define RRAM_CTRL_INFO_PAGE_CFG_1_RD_EN_1_MASK   0xfu

Definition at line 596 of file rram_ctrl_regs.h.

RRAM_CTRL_INFO_PAGE_CFG_1_RD_EN_1_OFFSET

#define RRAM_CTRL_INFO_PAGE_CFG_1_RD_EN_1_OFFSET   4

Definition at line 597 of file rram_ctrl_regs.h.

RRAM_CTRL_INFO_PAGE_CFG_1_REG_OFFSET

#define RRAM_CTRL_INFO_PAGE_CFG_1_REG_OFFSET   0xb0

Definition at line 590 of file rram_ctrl_regs.h.

RRAM_CTRL_INFO_PAGE_CFG_1_REG_RESVAL

#define RRAM_CTRL_INFO_PAGE_CFG_1_REG_RESVAL   0x99999u

Definition at line 591 of file rram_ctrl_regs.h.

RRAM_CTRL_INFO_PAGE_CFG_1_SCRAMBLE_EN_1_FIELD

#define RRAM_CTRL_INFO_PAGE_CFG_1_SCRAMBLE_EN_1_FIELD    ((bitfield_field32_t) { .mask = RRAM_CTRL_INFO_PAGE_CFG_1_SCRAMBLE_EN_1_MASK, .index = RRAM_CTRL_INFO_PAGE_CFG_1_SCRAMBLE_EN_1_OFFSET })

Definition at line 606 of file rram_ctrl_regs.h.

RRAM_CTRL_INFO_PAGE_CFG_1_SCRAMBLE_EN_1_MASK

#define RRAM_CTRL_INFO_PAGE_CFG_1_SCRAMBLE_EN_1_MASK   0xfu

Definition at line 604 of file rram_ctrl_regs.h.

RRAM_CTRL_INFO_PAGE_CFG_1_SCRAMBLE_EN_1_OFFSET

#define RRAM_CTRL_INFO_PAGE_CFG_1_SCRAMBLE_EN_1_OFFSET   12

Definition at line 605 of file rram_ctrl_regs.h.

RRAM_CTRL_INFO_PAGE_CFG_1_WR_EN_1_FIELD

#define RRAM_CTRL_INFO_PAGE_CFG_1_WR_EN_1_FIELD    ((bitfield_field32_t) { .mask = RRAM_CTRL_INFO_PAGE_CFG_1_WR_EN_1_MASK, .index = RRAM_CTRL_INFO_PAGE_CFG_1_WR_EN_1_OFFSET })

Definition at line 602 of file rram_ctrl_regs.h.

RRAM_CTRL_INFO_PAGE_CFG_1_WR_EN_1_MASK

#define RRAM_CTRL_INFO_PAGE_CFG_1_WR_EN_1_MASK   0xfu

Definition at line 600 of file rram_ctrl_regs.h.

RRAM_CTRL_INFO_PAGE_CFG_1_WR_EN_1_OFFSET

#define RRAM_CTRL_INFO_PAGE_CFG_1_WR_EN_1_OFFSET   8

Definition at line 601 of file rram_ctrl_regs.h.

RRAM_CTRL_INFO_PAGE_CFG_2_ECC_EN_2_FIELD

#define RRAM_CTRL_INFO_PAGE_CFG_2_ECC_EN_2_FIELD    ((bitfield_field32_t) { .mask = RRAM_CTRL_INFO_PAGE_CFG_2_ECC_EN_2_MASK, .index = RRAM_CTRL_INFO_PAGE_CFG_2_ECC_EN_2_OFFSET })

Definition at line 634 of file rram_ctrl_regs.h.

RRAM_CTRL_INFO_PAGE_CFG_2_ECC_EN_2_MASK

#define RRAM_CTRL_INFO_PAGE_CFG_2_ECC_EN_2_MASK   0xfu

Definition at line 632 of file rram_ctrl_regs.h.

RRAM_CTRL_INFO_PAGE_CFG_2_ECC_EN_2_OFFSET

#define RRAM_CTRL_INFO_PAGE_CFG_2_ECC_EN_2_OFFSET   16

Definition at line 633 of file rram_ctrl_regs.h.

RRAM_CTRL_INFO_PAGE_CFG_2_EN_2_FIELD

#define RRAM_CTRL_INFO_PAGE_CFG_2_EN_2_FIELD    ((bitfield_field32_t) { .mask = RRAM_CTRL_INFO_PAGE_CFG_2_EN_2_MASK, .index = RRAM_CTRL_INFO_PAGE_CFG_2_EN_2_OFFSET })

Definition at line 618 of file rram_ctrl_regs.h.

RRAM_CTRL_INFO_PAGE_CFG_2_EN_2_MASK

#define RRAM_CTRL_INFO_PAGE_CFG_2_EN_2_MASK   0xfu

Definition at line 616 of file rram_ctrl_regs.h.

RRAM_CTRL_INFO_PAGE_CFG_2_EN_2_OFFSET

#define RRAM_CTRL_INFO_PAGE_CFG_2_EN_2_OFFSET   0

Definition at line 617 of file rram_ctrl_regs.h.

RRAM_CTRL_INFO_PAGE_CFG_2_RD_EN_2_FIELD

#define RRAM_CTRL_INFO_PAGE_CFG_2_RD_EN_2_FIELD    ((bitfield_field32_t) { .mask = RRAM_CTRL_INFO_PAGE_CFG_2_RD_EN_2_MASK, .index = RRAM_CTRL_INFO_PAGE_CFG_2_RD_EN_2_OFFSET })

Definition at line 622 of file rram_ctrl_regs.h.

RRAM_CTRL_INFO_PAGE_CFG_2_RD_EN_2_MASK

#define RRAM_CTRL_INFO_PAGE_CFG_2_RD_EN_2_MASK   0xfu

Definition at line 620 of file rram_ctrl_regs.h.

RRAM_CTRL_INFO_PAGE_CFG_2_RD_EN_2_OFFSET

#define RRAM_CTRL_INFO_PAGE_CFG_2_RD_EN_2_OFFSET   4

Definition at line 621 of file rram_ctrl_regs.h.

RRAM_CTRL_INFO_PAGE_CFG_2_REG_OFFSET

#define RRAM_CTRL_INFO_PAGE_CFG_2_REG_OFFSET   0xb4

Definition at line 614 of file rram_ctrl_regs.h.

RRAM_CTRL_INFO_PAGE_CFG_2_REG_RESVAL

#define RRAM_CTRL_INFO_PAGE_CFG_2_REG_RESVAL   0x99999u

Definition at line 615 of file rram_ctrl_regs.h.

RRAM_CTRL_INFO_PAGE_CFG_2_SCRAMBLE_EN_2_FIELD

#define RRAM_CTRL_INFO_PAGE_CFG_2_SCRAMBLE_EN_2_FIELD    ((bitfield_field32_t) { .mask = RRAM_CTRL_INFO_PAGE_CFG_2_SCRAMBLE_EN_2_MASK, .index = RRAM_CTRL_INFO_PAGE_CFG_2_SCRAMBLE_EN_2_OFFSET })

Definition at line 630 of file rram_ctrl_regs.h.

RRAM_CTRL_INFO_PAGE_CFG_2_SCRAMBLE_EN_2_MASK

#define RRAM_CTRL_INFO_PAGE_CFG_2_SCRAMBLE_EN_2_MASK   0xfu

Definition at line 628 of file rram_ctrl_regs.h.

RRAM_CTRL_INFO_PAGE_CFG_2_SCRAMBLE_EN_2_OFFSET

#define RRAM_CTRL_INFO_PAGE_CFG_2_SCRAMBLE_EN_2_OFFSET   12

Definition at line 629 of file rram_ctrl_regs.h.

RRAM_CTRL_INFO_PAGE_CFG_2_WR_EN_2_FIELD

#define RRAM_CTRL_INFO_PAGE_CFG_2_WR_EN_2_FIELD    ((bitfield_field32_t) { .mask = RRAM_CTRL_INFO_PAGE_CFG_2_WR_EN_2_MASK, .index = RRAM_CTRL_INFO_PAGE_CFG_2_WR_EN_2_OFFSET })

Definition at line 626 of file rram_ctrl_regs.h.

RRAM_CTRL_INFO_PAGE_CFG_2_WR_EN_2_MASK

#define RRAM_CTRL_INFO_PAGE_CFG_2_WR_EN_2_MASK   0xfu

Definition at line 624 of file rram_ctrl_regs.h.

RRAM_CTRL_INFO_PAGE_CFG_2_WR_EN_2_OFFSET

#define RRAM_CTRL_INFO_PAGE_CFG_2_WR_EN_2_OFFSET   8

Definition at line 625 of file rram_ctrl_regs.h.

RRAM_CTRL_INFO_PAGE_CFG_3_ECC_EN_3_FIELD

#define RRAM_CTRL_INFO_PAGE_CFG_3_ECC_EN_3_FIELD    ((bitfield_field32_t) { .mask = RRAM_CTRL_INFO_PAGE_CFG_3_ECC_EN_3_MASK, .index = RRAM_CTRL_INFO_PAGE_CFG_3_ECC_EN_3_OFFSET })

Definition at line 658 of file rram_ctrl_regs.h.

RRAM_CTRL_INFO_PAGE_CFG_3_ECC_EN_3_MASK

#define RRAM_CTRL_INFO_PAGE_CFG_3_ECC_EN_3_MASK   0xfu

Definition at line 656 of file rram_ctrl_regs.h.

RRAM_CTRL_INFO_PAGE_CFG_3_ECC_EN_3_OFFSET

#define RRAM_CTRL_INFO_PAGE_CFG_3_ECC_EN_3_OFFSET   16

Definition at line 657 of file rram_ctrl_regs.h.

RRAM_CTRL_INFO_PAGE_CFG_3_EN_3_FIELD

#define RRAM_CTRL_INFO_PAGE_CFG_3_EN_3_FIELD    ((bitfield_field32_t) { .mask = RRAM_CTRL_INFO_PAGE_CFG_3_EN_3_MASK, .index = RRAM_CTRL_INFO_PAGE_CFG_3_EN_3_OFFSET })

Definition at line 642 of file rram_ctrl_regs.h.

RRAM_CTRL_INFO_PAGE_CFG_3_EN_3_MASK

#define RRAM_CTRL_INFO_PAGE_CFG_3_EN_3_MASK   0xfu

Definition at line 640 of file rram_ctrl_regs.h.

RRAM_CTRL_INFO_PAGE_CFG_3_EN_3_OFFSET

#define RRAM_CTRL_INFO_PAGE_CFG_3_EN_3_OFFSET   0

Definition at line 641 of file rram_ctrl_regs.h.

RRAM_CTRL_INFO_PAGE_CFG_3_RD_EN_3_FIELD

#define RRAM_CTRL_INFO_PAGE_CFG_3_RD_EN_3_FIELD    ((bitfield_field32_t) { .mask = RRAM_CTRL_INFO_PAGE_CFG_3_RD_EN_3_MASK, .index = RRAM_CTRL_INFO_PAGE_CFG_3_RD_EN_3_OFFSET })

Definition at line 646 of file rram_ctrl_regs.h.

RRAM_CTRL_INFO_PAGE_CFG_3_RD_EN_3_MASK

#define RRAM_CTRL_INFO_PAGE_CFG_3_RD_EN_3_MASK   0xfu

Definition at line 644 of file rram_ctrl_regs.h.

RRAM_CTRL_INFO_PAGE_CFG_3_RD_EN_3_OFFSET

#define RRAM_CTRL_INFO_PAGE_CFG_3_RD_EN_3_OFFSET   4

Definition at line 645 of file rram_ctrl_regs.h.

RRAM_CTRL_INFO_PAGE_CFG_3_REG_OFFSET

#define RRAM_CTRL_INFO_PAGE_CFG_3_REG_OFFSET   0xb8

Definition at line 638 of file rram_ctrl_regs.h.

RRAM_CTRL_INFO_PAGE_CFG_3_REG_RESVAL

#define RRAM_CTRL_INFO_PAGE_CFG_3_REG_RESVAL   0x99999u

Definition at line 639 of file rram_ctrl_regs.h.

RRAM_CTRL_INFO_PAGE_CFG_3_SCRAMBLE_EN_3_FIELD

#define RRAM_CTRL_INFO_PAGE_CFG_3_SCRAMBLE_EN_3_FIELD    ((bitfield_field32_t) { .mask = RRAM_CTRL_INFO_PAGE_CFG_3_SCRAMBLE_EN_3_MASK, .index = RRAM_CTRL_INFO_PAGE_CFG_3_SCRAMBLE_EN_3_OFFSET })

Definition at line 654 of file rram_ctrl_regs.h.

RRAM_CTRL_INFO_PAGE_CFG_3_SCRAMBLE_EN_3_MASK

#define RRAM_CTRL_INFO_PAGE_CFG_3_SCRAMBLE_EN_3_MASK   0xfu

Definition at line 652 of file rram_ctrl_regs.h.

RRAM_CTRL_INFO_PAGE_CFG_3_SCRAMBLE_EN_3_OFFSET

#define RRAM_CTRL_INFO_PAGE_CFG_3_SCRAMBLE_EN_3_OFFSET   12

Definition at line 653 of file rram_ctrl_regs.h.

RRAM_CTRL_INFO_PAGE_CFG_3_WR_EN_3_FIELD

#define RRAM_CTRL_INFO_PAGE_CFG_3_WR_EN_3_FIELD    ((bitfield_field32_t) { .mask = RRAM_CTRL_INFO_PAGE_CFG_3_WR_EN_3_MASK, .index = RRAM_CTRL_INFO_PAGE_CFG_3_WR_EN_3_OFFSET })

Definition at line 650 of file rram_ctrl_regs.h.

RRAM_CTRL_INFO_PAGE_CFG_3_WR_EN_3_MASK

#define RRAM_CTRL_INFO_PAGE_CFG_3_WR_EN_3_MASK   0xfu

Definition at line 648 of file rram_ctrl_regs.h.

RRAM_CTRL_INFO_PAGE_CFG_3_WR_EN_3_OFFSET

#define RRAM_CTRL_INFO_PAGE_CFG_3_WR_EN_3_OFFSET   8

Definition at line 649 of file rram_ctrl_regs.h.

RRAM_CTRL_INFO_PAGE_CFG_4_ECC_EN_4_FIELD

#define RRAM_CTRL_INFO_PAGE_CFG_4_ECC_EN_4_FIELD    ((bitfield_field32_t) { .mask = RRAM_CTRL_INFO_PAGE_CFG_4_ECC_EN_4_MASK, .index = RRAM_CTRL_INFO_PAGE_CFG_4_ECC_EN_4_OFFSET })

Definition at line 682 of file rram_ctrl_regs.h.

RRAM_CTRL_INFO_PAGE_CFG_4_ECC_EN_4_MASK

#define RRAM_CTRL_INFO_PAGE_CFG_4_ECC_EN_4_MASK   0xfu

Definition at line 680 of file rram_ctrl_regs.h.

RRAM_CTRL_INFO_PAGE_CFG_4_ECC_EN_4_OFFSET

#define RRAM_CTRL_INFO_PAGE_CFG_4_ECC_EN_4_OFFSET   16

Definition at line 681 of file rram_ctrl_regs.h.

RRAM_CTRL_INFO_PAGE_CFG_4_EN_4_FIELD

#define RRAM_CTRL_INFO_PAGE_CFG_4_EN_4_FIELD    ((bitfield_field32_t) { .mask = RRAM_CTRL_INFO_PAGE_CFG_4_EN_4_MASK, .index = RRAM_CTRL_INFO_PAGE_CFG_4_EN_4_OFFSET })

Definition at line 666 of file rram_ctrl_regs.h.

RRAM_CTRL_INFO_PAGE_CFG_4_EN_4_MASK

#define RRAM_CTRL_INFO_PAGE_CFG_4_EN_4_MASK   0xfu

Definition at line 664 of file rram_ctrl_regs.h.

RRAM_CTRL_INFO_PAGE_CFG_4_EN_4_OFFSET

#define RRAM_CTRL_INFO_PAGE_CFG_4_EN_4_OFFSET   0

Definition at line 665 of file rram_ctrl_regs.h.

RRAM_CTRL_INFO_PAGE_CFG_4_RD_EN_4_FIELD

#define RRAM_CTRL_INFO_PAGE_CFG_4_RD_EN_4_FIELD    ((bitfield_field32_t) { .mask = RRAM_CTRL_INFO_PAGE_CFG_4_RD_EN_4_MASK, .index = RRAM_CTRL_INFO_PAGE_CFG_4_RD_EN_4_OFFSET })

Definition at line 670 of file rram_ctrl_regs.h.

RRAM_CTRL_INFO_PAGE_CFG_4_RD_EN_4_MASK

#define RRAM_CTRL_INFO_PAGE_CFG_4_RD_EN_4_MASK   0xfu

Definition at line 668 of file rram_ctrl_regs.h.

RRAM_CTRL_INFO_PAGE_CFG_4_RD_EN_4_OFFSET

#define RRAM_CTRL_INFO_PAGE_CFG_4_RD_EN_4_OFFSET   4

Definition at line 669 of file rram_ctrl_regs.h.

RRAM_CTRL_INFO_PAGE_CFG_4_REG_OFFSET

#define RRAM_CTRL_INFO_PAGE_CFG_4_REG_OFFSET   0xbc

Definition at line 662 of file rram_ctrl_regs.h.

RRAM_CTRL_INFO_PAGE_CFG_4_REG_RESVAL

#define RRAM_CTRL_INFO_PAGE_CFG_4_REG_RESVAL   0x99999u

Definition at line 663 of file rram_ctrl_regs.h.

RRAM_CTRL_INFO_PAGE_CFG_4_SCRAMBLE_EN_4_FIELD

#define RRAM_CTRL_INFO_PAGE_CFG_4_SCRAMBLE_EN_4_FIELD    ((bitfield_field32_t) { .mask = RRAM_CTRL_INFO_PAGE_CFG_4_SCRAMBLE_EN_4_MASK, .index = RRAM_CTRL_INFO_PAGE_CFG_4_SCRAMBLE_EN_4_OFFSET })

Definition at line 678 of file rram_ctrl_regs.h.

RRAM_CTRL_INFO_PAGE_CFG_4_SCRAMBLE_EN_4_MASK

#define RRAM_CTRL_INFO_PAGE_CFG_4_SCRAMBLE_EN_4_MASK   0xfu

Definition at line 676 of file rram_ctrl_regs.h.

RRAM_CTRL_INFO_PAGE_CFG_4_SCRAMBLE_EN_4_OFFSET

#define RRAM_CTRL_INFO_PAGE_CFG_4_SCRAMBLE_EN_4_OFFSET   12

Definition at line 677 of file rram_ctrl_regs.h.

RRAM_CTRL_INFO_PAGE_CFG_4_WR_EN_4_FIELD

#define RRAM_CTRL_INFO_PAGE_CFG_4_WR_EN_4_FIELD    ((bitfield_field32_t) { .mask = RRAM_CTRL_INFO_PAGE_CFG_4_WR_EN_4_MASK, .index = RRAM_CTRL_INFO_PAGE_CFG_4_WR_EN_4_OFFSET })

Definition at line 674 of file rram_ctrl_regs.h.

RRAM_CTRL_INFO_PAGE_CFG_4_WR_EN_4_MASK

#define RRAM_CTRL_INFO_PAGE_CFG_4_WR_EN_4_MASK   0xfu

Definition at line 672 of file rram_ctrl_regs.h.

RRAM_CTRL_INFO_PAGE_CFG_4_WR_EN_4_OFFSET

#define RRAM_CTRL_INFO_PAGE_CFG_4_WR_EN_4_OFFSET   8

Definition at line 673 of file rram_ctrl_regs.h.

RRAM_CTRL_INFO_PAGE_CFG_5_ECC_EN_5_FIELD

#define RRAM_CTRL_INFO_PAGE_CFG_5_ECC_EN_5_FIELD    ((bitfield_field32_t) { .mask = RRAM_CTRL_INFO_PAGE_CFG_5_ECC_EN_5_MASK, .index = RRAM_CTRL_INFO_PAGE_CFG_5_ECC_EN_5_OFFSET })

Definition at line 706 of file rram_ctrl_regs.h.

RRAM_CTRL_INFO_PAGE_CFG_5_ECC_EN_5_MASK

#define RRAM_CTRL_INFO_PAGE_CFG_5_ECC_EN_5_MASK   0xfu

Definition at line 704 of file rram_ctrl_regs.h.

RRAM_CTRL_INFO_PAGE_CFG_5_ECC_EN_5_OFFSET

#define RRAM_CTRL_INFO_PAGE_CFG_5_ECC_EN_5_OFFSET   16

Definition at line 705 of file rram_ctrl_regs.h.

RRAM_CTRL_INFO_PAGE_CFG_5_EN_5_FIELD

#define RRAM_CTRL_INFO_PAGE_CFG_5_EN_5_FIELD    ((bitfield_field32_t) { .mask = RRAM_CTRL_INFO_PAGE_CFG_5_EN_5_MASK, .index = RRAM_CTRL_INFO_PAGE_CFG_5_EN_5_OFFSET })

Definition at line 690 of file rram_ctrl_regs.h.

RRAM_CTRL_INFO_PAGE_CFG_5_EN_5_MASK

#define RRAM_CTRL_INFO_PAGE_CFG_5_EN_5_MASK   0xfu

Definition at line 688 of file rram_ctrl_regs.h.

RRAM_CTRL_INFO_PAGE_CFG_5_EN_5_OFFSET

#define RRAM_CTRL_INFO_PAGE_CFG_5_EN_5_OFFSET   0

Definition at line 689 of file rram_ctrl_regs.h.

RRAM_CTRL_INFO_PAGE_CFG_5_RD_EN_5_FIELD

#define RRAM_CTRL_INFO_PAGE_CFG_5_RD_EN_5_FIELD    ((bitfield_field32_t) { .mask = RRAM_CTRL_INFO_PAGE_CFG_5_RD_EN_5_MASK, .index = RRAM_CTRL_INFO_PAGE_CFG_5_RD_EN_5_OFFSET })

Definition at line 694 of file rram_ctrl_regs.h.

RRAM_CTRL_INFO_PAGE_CFG_5_RD_EN_5_MASK

#define RRAM_CTRL_INFO_PAGE_CFG_5_RD_EN_5_MASK   0xfu

Definition at line 692 of file rram_ctrl_regs.h.

RRAM_CTRL_INFO_PAGE_CFG_5_RD_EN_5_OFFSET

#define RRAM_CTRL_INFO_PAGE_CFG_5_RD_EN_5_OFFSET   4

Definition at line 693 of file rram_ctrl_regs.h.

RRAM_CTRL_INFO_PAGE_CFG_5_REG_OFFSET

#define RRAM_CTRL_INFO_PAGE_CFG_5_REG_OFFSET   0xc0

Definition at line 686 of file rram_ctrl_regs.h.

RRAM_CTRL_INFO_PAGE_CFG_5_REG_RESVAL

#define RRAM_CTRL_INFO_PAGE_CFG_5_REG_RESVAL   0x99999u

Definition at line 687 of file rram_ctrl_regs.h.

RRAM_CTRL_INFO_PAGE_CFG_5_SCRAMBLE_EN_5_FIELD

#define RRAM_CTRL_INFO_PAGE_CFG_5_SCRAMBLE_EN_5_FIELD    ((bitfield_field32_t) { .mask = RRAM_CTRL_INFO_PAGE_CFG_5_SCRAMBLE_EN_5_MASK, .index = RRAM_CTRL_INFO_PAGE_CFG_5_SCRAMBLE_EN_5_OFFSET })

Definition at line 702 of file rram_ctrl_regs.h.

RRAM_CTRL_INFO_PAGE_CFG_5_SCRAMBLE_EN_5_MASK

#define RRAM_CTRL_INFO_PAGE_CFG_5_SCRAMBLE_EN_5_MASK   0xfu

Definition at line 700 of file rram_ctrl_regs.h.

RRAM_CTRL_INFO_PAGE_CFG_5_SCRAMBLE_EN_5_OFFSET

#define RRAM_CTRL_INFO_PAGE_CFG_5_SCRAMBLE_EN_5_OFFSET   12

Definition at line 701 of file rram_ctrl_regs.h.

RRAM_CTRL_INFO_PAGE_CFG_5_WR_EN_5_FIELD

#define RRAM_CTRL_INFO_PAGE_CFG_5_WR_EN_5_FIELD    ((bitfield_field32_t) { .mask = RRAM_CTRL_INFO_PAGE_CFG_5_WR_EN_5_MASK, .index = RRAM_CTRL_INFO_PAGE_CFG_5_WR_EN_5_OFFSET })

Definition at line 698 of file rram_ctrl_regs.h.

RRAM_CTRL_INFO_PAGE_CFG_5_WR_EN_5_MASK

#define RRAM_CTRL_INFO_PAGE_CFG_5_WR_EN_5_MASK   0xfu

Definition at line 696 of file rram_ctrl_regs.h.

RRAM_CTRL_INFO_PAGE_CFG_5_WR_EN_5_OFFSET

#define RRAM_CTRL_INFO_PAGE_CFG_5_WR_EN_5_OFFSET   8

Definition at line 697 of file rram_ctrl_regs.h.

RRAM_CTRL_INFO_PAGE_CFG_6_ECC_EN_6_FIELD

#define RRAM_CTRL_INFO_PAGE_CFG_6_ECC_EN_6_FIELD    ((bitfield_field32_t) { .mask = RRAM_CTRL_INFO_PAGE_CFG_6_ECC_EN_6_MASK, .index = RRAM_CTRL_INFO_PAGE_CFG_6_ECC_EN_6_OFFSET })

Definition at line 730 of file rram_ctrl_regs.h.

RRAM_CTRL_INFO_PAGE_CFG_6_ECC_EN_6_MASK

#define RRAM_CTRL_INFO_PAGE_CFG_6_ECC_EN_6_MASK   0xfu

Definition at line 728 of file rram_ctrl_regs.h.

RRAM_CTRL_INFO_PAGE_CFG_6_ECC_EN_6_OFFSET

#define RRAM_CTRL_INFO_PAGE_CFG_6_ECC_EN_6_OFFSET   16

Definition at line 729 of file rram_ctrl_regs.h.

RRAM_CTRL_INFO_PAGE_CFG_6_EN_6_FIELD

#define RRAM_CTRL_INFO_PAGE_CFG_6_EN_6_FIELD    ((bitfield_field32_t) { .mask = RRAM_CTRL_INFO_PAGE_CFG_6_EN_6_MASK, .index = RRAM_CTRL_INFO_PAGE_CFG_6_EN_6_OFFSET })

Definition at line 714 of file rram_ctrl_regs.h.

RRAM_CTRL_INFO_PAGE_CFG_6_EN_6_MASK

#define RRAM_CTRL_INFO_PAGE_CFG_6_EN_6_MASK   0xfu

Definition at line 712 of file rram_ctrl_regs.h.

RRAM_CTRL_INFO_PAGE_CFG_6_EN_6_OFFSET

#define RRAM_CTRL_INFO_PAGE_CFG_6_EN_6_OFFSET   0

Definition at line 713 of file rram_ctrl_regs.h.

RRAM_CTRL_INFO_PAGE_CFG_6_RD_EN_6_FIELD

#define RRAM_CTRL_INFO_PAGE_CFG_6_RD_EN_6_FIELD    ((bitfield_field32_t) { .mask = RRAM_CTRL_INFO_PAGE_CFG_6_RD_EN_6_MASK, .index = RRAM_CTRL_INFO_PAGE_CFG_6_RD_EN_6_OFFSET })

Definition at line 718 of file rram_ctrl_regs.h.

RRAM_CTRL_INFO_PAGE_CFG_6_RD_EN_6_MASK

#define RRAM_CTRL_INFO_PAGE_CFG_6_RD_EN_6_MASK   0xfu

Definition at line 716 of file rram_ctrl_regs.h.

RRAM_CTRL_INFO_PAGE_CFG_6_RD_EN_6_OFFSET

#define RRAM_CTRL_INFO_PAGE_CFG_6_RD_EN_6_OFFSET   4

Definition at line 717 of file rram_ctrl_regs.h.

RRAM_CTRL_INFO_PAGE_CFG_6_REG_OFFSET

#define RRAM_CTRL_INFO_PAGE_CFG_6_REG_OFFSET   0xc4

Definition at line 710 of file rram_ctrl_regs.h.

RRAM_CTRL_INFO_PAGE_CFG_6_REG_RESVAL

#define RRAM_CTRL_INFO_PAGE_CFG_6_REG_RESVAL   0x99999u

Definition at line 711 of file rram_ctrl_regs.h.

RRAM_CTRL_INFO_PAGE_CFG_6_SCRAMBLE_EN_6_FIELD

#define RRAM_CTRL_INFO_PAGE_CFG_6_SCRAMBLE_EN_6_FIELD    ((bitfield_field32_t) { .mask = RRAM_CTRL_INFO_PAGE_CFG_6_SCRAMBLE_EN_6_MASK, .index = RRAM_CTRL_INFO_PAGE_CFG_6_SCRAMBLE_EN_6_OFFSET })

Definition at line 726 of file rram_ctrl_regs.h.

RRAM_CTRL_INFO_PAGE_CFG_6_SCRAMBLE_EN_6_MASK

#define RRAM_CTRL_INFO_PAGE_CFG_6_SCRAMBLE_EN_6_MASK   0xfu

Definition at line 724 of file rram_ctrl_regs.h.

RRAM_CTRL_INFO_PAGE_CFG_6_SCRAMBLE_EN_6_OFFSET

#define RRAM_CTRL_INFO_PAGE_CFG_6_SCRAMBLE_EN_6_OFFSET   12

Definition at line 725 of file rram_ctrl_regs.h.

RRAM_CTRL_INFO_PAGE_CFG_6_WR_EN_6_FIELD

#define RRAM_CTRL_INFO_PAGE_CFG_6_WR_EN_6_FIELD    ((bitfield_field32_t) { .mask = RRAM_CTRL_INFO_PAGE_CFG_6_WR_EN_6_MASK, .index = RRAM_CTRL_INFO_PAGE_CFG_6_WR_EN_6_OFFSET })

Definition at line 722 of file rram_ctrl_regs.h.

RRAM_CTRL_INFO_PAGE_CFG_6_WR_EN_6_MASK

#define RRAM_CTRL_INFO_PAGE_CFG_6_WR_EN_6_MASK   0xfu

Definition at line 720 of file rram_ctrl_regs.h.

RRAM_CTRL_INFO_PAGE_CFG_6_WR_EN_6_OFFSET

#define RRAM_CTRL_INFO_PAGE_CFG_6_WR_EN_6_OFFSET   8

Definition at line 721 of file rram_ctrl_regs.h.

RRAM_CTRL_INFO_PAGE_CFG_7_ECC_EN_7_FIELD

#define RRAM_CTRL_INFO_PAGE_CFG_7_ECC_EN_7_FIELD    ((bitfield_field32_t) { .mask = RRAM_CTRL_INFO_PAGE_CFG_7_ECC_EN_7_MASK, .index = RRAM_CTRL_INFO_PAGE_CFG_7_ECC_EN_7_OFFSET })

Definition at line 754 of file rram_ctrl_regs.h.

RRAM_CTRL_INFO_PAGE_CFG_7_ECC_EN_7_MASK

#define RRAM_CTRL_INFO_PAGE_CFG_7_ECC_EN_7_MASK   0xfu

Definition at line 752 of file rram_ctrl_regs.h.

RRAM_CTRL_INFO_PAGE_CFG_7_ECC_EN_7_OFFSET

#define RRAM_CTRL_INFO_PAGE_CFG_7_ECC_EN_7_OFFSET   16

Definition at line 753 of file rram_ctrl_regs.h.

RRAM_CTRL_INFO_PAGE_CFG_7_EN_7_FIELD

#define RRAM_CTRL_INFO_PAGE_CFG_7_EN_7_FIELD    ((bitfield_field32_t) { .mask = RRAM_CTRL_INFO_PAGE_CFG_7_EN_7_MASK, .index = RRAM_CTRL_INFO_PAGE_CFG_7_EN_7_OFFSET })

Definition at line 738 of file rram_ctrl_regs.h.

RRAM_CTRL_INFO_PAGE_CFG_7_EN_7_MASK

#define RRAM_CTRL_INFO_PAGE_CFG_7_EN_7_MASK   0xfu

Definition at line 736 of file rram_ctrl_regs.h.

RRAM_CTRL_INFO_PAGE_CFG_7_EN_7_OFFSET

#define RRAM_CTRL_INFO_PAGE_CFG_7_EN_7_OFFSET   0

Definition at line 737 of file rram_ctrl_regs.h.

RRAM_CTRL_INFO_PAGE_CFG_7_RD_EN_7_FIELD

#define RRAM_CTRL_INFO_PAGE_CFG_7_RD_EN_7_FIELD    ((bitfield_field32_t) { .mask = RRAM_CTRL_INFO_PAGE_CFG_7_RD_EN_7_MASK, .index = RRAM_CTRL_INFO_PAGE_CFG_7_RD_EN_7_OFFSET })

Definition at line 742 of file rram_ctrl_regs.h.

RRAM_CTRL_INFO_PAGE_CFG_7_RD_EN_7_MASK

#define RRAM_CTRL_INFO_PAGE_CFG_7_RD_EN_7_MASK   0xfu

Definition at line 740 of file rram_ctrl_regs.h.

RRAM_CTRL_INFO_PAGE_CFG_7_RD_EN_7_OFFSET

#define RRAM_CTRL_INFO_PAGE_CFG_7_RD_EN_7_OFFSET   4

Definition at line 741 of file rram_ctrl_regs.h.

RRAM_CTRL_INFO_PAGE_CFG_7_REG_OFFSET

#define RRAM_CTRL_INFO_PAGE_CFG_7_REG_OFFSET   0xc8

Definition at line 734 of file rram_ctrl_regs.h.

RRAM_CTRL_INFO_PAGE_CFG_7_REG_RESVAL

#define RRAM_CTRL_INFO_PAGE_CFG_7_REG_RESVAL   0x99999u

Definition at line 735 of file rram_ctrl_regs.h.

RRAM_CTRL_INFO_PAGE_CFG_7_SCRAMBLE_EN_7_FIELD

#define RRAM_CTRL_INFO_PAGE_CFG_7_SCRAMBLE_EN_7_FIELD    ((bitfield_field32_t) { .mask = RRAM_CTRL_INFO_PAGE_CFG_7_SCRAMBLE_EN_7_MASK, .index = RRAM_CTRL_INFO_PAGE_CFG_7_SCRAMBLE_EN_7_OFFSET })

Definition at line 750 of file rram_ctrl_regs.h.

RRAM_CTRL_INFO_PAGE_CFG_7_SCRAMBLE_EN_7_MASK

#define RRAM_CTRL_INFO_PAGE_CFG_7_SCRAMBLE_EN_7_MASK   0xfu

Definition at line 748 of file rram_ctrl_regs.h.

RRAM_CTRL_INFO_PAGE_CFG_7_SCRAMBLE_EN_7_OFFSET

#define RRAM_CTRL_INFO_PAGE_CFG_7_SCRAMBLE_EN_7_OFFSET   12

Definition at line 749 of file rram_ctrl_regs.h.

RRAM_CTRL_INFO_PAGE_CFG_7_WR_EN_7_FIELD

#define RRAM_CTRL_INFO_PAGE_CFG_7_WR_EN_7_FIELD    ((bitfield_field32_t) { .mask = RRAM_CTRL_INFO_PAGE_CFG_7_WR_EN_7_MASK, .index = RRAM_CTRL_INFO_PAGE_CFG_7_WR_EN_7_OFFSET })

Definition at line 746 of file rram_ctrl_regs.h.

RRAM_CTRL_INFO_PAGE_CFG_7_WR_EN_7_MASK

#define RRAM_CTRL_INFO_PAGE_CFG_7_WR_EN_7_MASK   0xfu

Definition at line 744 of file rram_ctrl_regs.h.

RRAM_CTRL_INFO_PAGE_CFG_7_WR_EN_7_OFFSET

#define RRAM_CTRL_INFO_PAGE_CFG_7_WR_EN_7_OFFSET   8

Definition at line 745 of file rram_ctrl_regs.h.

RRAM_CTRL_INFO_PAGE_CFG_ECC_EN_FIELD_WIDTH

#define RRAM_CTRL_INFO_PAGE_CFG_ECC_EN_FIELD_WIDTH   4

Definition at line 562 of file rram_ctrl_regs.h.

RRAM_CTRL_INFO_PAGE_CFG_EN_FIELD_WIDTH

#define RRAM_CTRL_INFO_PAGE_CFG_EN_FIELD_WIDTH   4

Definition at line 558 of file rram_ctrl_regs.h.

RRAM_CTRL_INFO_PAGE_CFG_MULTIREG_COUNT

#define RRAM_CTRL_INFO_PAGE_CFG_MULTIREG_COUNT   8

Definition at line 563 of file rram_ctrl_regs.h.

RRAM_CTRL_INFO_PAGE_CFG_RD_EN_FIELD_WIDTH

#define RRAM_CTRL_INFO_PAGE_CFG_RD_EN_FIELD_WIDTH   4

Definition at line 559 of file rram_ctrl_regs.h.

RRAM_CTRL_INFO_PAGE_CFG_SCRAMBLE_EN_FIELD_WIDTH

#define RRAM_CTRL_INFO_PAGE_CFG_SCRAMBLE_EN_FIELD_WIDTH   4

Definition at line 561 of file rram_ctrl_regs.h.

RRAM_CTRL_INFO_PAGE_CFG_WR_EN_FIELD_WIDTH

#define RRAM_CTRL_INFO_PAGE_CFG_WR_EN_FIELD_WIDTH   4

Definition at line 560 of file rram_ctrl_regs.h.

RRAM_CTRL_INFO_REGWEN_0_REG_OFFSET

#define RRAM_CTRL_INFO_REGWEN_0_REG_OFFSET   0x8c

Definition at line 516 of file rram_ctrl_regs.h.

RRAM_CTRL_INFO_REGWEN_0_REG_RESVAL

#define RRAM_CTRL_INFO_REGWEN_0_REG_RESVAL   0x1u

Definition at line 517 of file rram_ctrl_regs.h.

RRAM_CTRL_INFO_REGWEN_0_REGION_0_BIT

#define RRAM_CTRL_INFO_REGWEN_0_REGION_0_BIT   0

Definition at line 518 of file rram_ctrl_regs.h.

RRAM_CTRL_INFO_REGWEN_0_REGION_0_VALUE_PAGE_ENABLED

#define RRAM_CTRL_INFO_REGWEN_0_REGION_0_VALUE_PAGE_ENABLED   0x1

Definition at line 520 of file rram_ctrl_regs.h.

RRAM_CTRL_INFO_REGWEN_0_REGION_0_VALUE_PAGE_LOCKED

#define RRAM_CTRL_INFO_REGWEN_0_REGION_0_VALUE_PAGE_LOCKED   0x0

Definition at line 519 of file rram_ctrl_regs.h.

RRAM_CTRL_INFO_REGWEN_1_REG_OFFSET

#define RRAM_CTRL_INFO_REGWEN_1_REG_OFFSET   0x90

Definition at line 523 of file rram_ctrl_regs.h.

RRAM_CTRL_INFO_REGWEN_1_REG_RESVAL

#define RRAM_CTRL_INFO_REGWEN_1_REG_RESVAL   0x1u

Definition at line 524 of file rram_ctrl_regs.h.

RRAM_CTRL_INFO_REGWEN_1_REGION_1_BIT

#define RRAM_CTRL_INFO_REGWEN_1_REGION_1_BIT   0

Definition at line 525 of file rram_ctrl_regs.h.

RRAM_CTRL_INFO_REGWEN_2_REG_OFFSET

#define RRAM_CTRL_INFO_REGWEN_2_REG_OFFSET   0x94

Definition at line 528 of file rram_ctrl_regs.h.

RRAM_CTRL_INFO_REGWEN_2_REG_RESVAL

#define RRAM_CTRL_INFO_REGWEN_2_REG_RESVAL   0x1u

Definition at line 529 of file rram_ctrl_regs.h.

RRAM_CTRL_INFO_REGWEN_2_REGION_2_BIT

#define RRAM_CTRL_INFO_REGWEN_2_REGION_2_BIT   0

Definition at line 530 of file rram_ctrl_regs.h.

RRAM_CTRL_INFO_REGWEN_3_REG_OFFSET

#define RRAM_CTRL_INFO_REGWEN_3_REG_OFFSET   0x98

Definition at line 533 of file rram_ctrl_regs.h.

RRAM_CTRL_INFO_REGWEN_3_REG_RESVAL

#define RRAM_CTRL_INFO_REGWEN_3_REG_RESVAL   0x1u

Definition at line 534 of file rram_ctrl_regs.h.

RRAM_CTRL_INFO_REGWEN_3_REGION_3_BIT

#define RRAM_CTRL_INFO_REGWEN_3_REGION_3_BIT   0

Definition at line 535 of file rram_ctrl_regs.h.

RRAM_CTRL_INFO_REGWEN_4_REG_OFFSET

#define RRAM_CTRL_INFO_REGWEN_4_REG_OFFSET   0x9c

Definition at line 538 of file rram_ctrl_regs.h.

RRAM_CTRL_INFO_REGWEN_4_REG_RESVAL

#define RRAM_CTRL_INFO_REGWEN_4_REG_RESVAL   0x1u

Definition at line 539 of file rram_ctrl_regs.h.

RRAM_CTRL_INFO_REGWEN_4_REGION_4_BIT

#define RRAM_CTRL_INFO_REGWEN_4_REGION_4_BIT   0

Definition at line 540 of file rram_ctrl_regs.h.

RRAM_CTRL_INFO_REGWEN_5_REG_OFFSET

#define RRAM_CTRL_INFO_REGWEN_5_REG_OFFSET   0xa0

Definition at line 543 of file rram_ctrl_regs.h.

RRAM_CTRL_INFO_REGWEN_5_REG_RESVAL

#define RRAM_CTRL_INFO_REGWEN_5_REG_RESVAL   0x1u

Definition at line 544 of file rram_ctrl_regs.h.

RRAM_CTRL_INFO_REGWEN_5_REGION_5_BIT

#define RRAM_CTRL_INFO_REGWEN_5_REGION_5_BIT   0

Definition at line 545 of file rram_ctrl_regs.h.

RRAM_CTRL_INFO_REGWEN_6_REG_OFFSET

#define RRAM_CTRL_INFO_REGWEN_6_REG_OFFSET   0xa4

Definition at line 548 of file rram_ctrl_regs.h.

RRAM_CTRL_INFO_REGWEN_6_REG_RESVAL

#define RRAM_CTRL_INFO_REGWEN_6_REG_RESVAL   0x1u

Definition at line 549 of file rram_ctrl_regs.h.

RRAM_CTRL_INFO_REGWEN_6_REGION_6_BIT

#define RRAM_CTRL_INFO_REGWEN_6_REGION_6_BIT   0

Definition at line 550 of file rram_ctrl_regs.h.

RRAM_CTRL_INFO_REGWEN_7_REG_OFFSET

#define RRAM_CTRL_INFO_REGWEN_7_REG_OFFSET   0xa8

Definition at line 553 of file rram_ctrl_regs.h.

RRAM_CTRL_INFO_REGWEN_7_REG_RESVAL

#define RRAM_CTRL_INFO_REGWEN_7_REG_RESVAL   0x1u

Definition at line 554 of file rram_ctrl_regs.h.

RRAM_CTRL_INFO_REGWEN_7_REGION_7_BIT

#define RRAM_CTRL_INFO_REGWEN_7_REGION_7_BIT   0

Definition at line 555 of file rram_ctrl_regs.h.

RRAM_CTRL_INFO_REGWEN_MULTIREG_COUNT

#define RRAM_CTRL_INFO_REGWEN_MULTIREG_COUNT   8

Definition at line 513 of file rram_ctrl_regs.h.

RRAM_CTRL_INFO_REGWEN_REGION_FIELD_WIDTH

#define RRAM_CTRL_INFO_REGWEN_REGION_FIELD_WIDTH   1

Definition at line 512 of file rram_ctrl_regs.h.

RRAM_CTRL_INIT_REG_OFFSET

#define RRAM_CTRL_INIT_REG_OFFSET   0x18

Definition at line 110 of file rram_ctrl_regs.h.

RRAM_CTRL_INIT_REG_RESVAL

#define RRAM_CTRL_INIT_REG_RESVAL   0x0u

Definition at line 111 of file rram_ctrl_regs.h.

RRAM_CTRL_INIT_VAL_BIT

#define RRAM_CTRL_INIT_VAL_BIT   0

Definition at line 112 of file rram_ctrl_regs.h.

RRAM_CTRL_INTR_COMMON_CORR_ERR_BIT

#define RRAM_CTRL_INTR_COMMON_CORR_ERR_BIT   5

Definition at line 52 of file rram_ctrl_regs.h.

RRAM_CTRL_INTR_COMMON_OP_DONE_BIT

#define RRAM_CTRL_INTR_COMMON_OP_DONE_BIT   4

Definition at line 51 of file rram_ctrl_regs.h.

RRAM_CTRL_INTR_COMMON_RD_FULL_BIT

#define RRAM_CTRL_INTR_COMMON_RD_FULL_BIT   2

Definition at line 49 of file rram_ctrl_regs.h.

RRAM_CTRL_INTR_COMMON_RD_LVL_BIT

#define RRAM_CTRL_INTR_COMMON_RD_LVL_BIT   3

Definition at line 50 of file rram_ctrl_regs.h.

RRAM_CTRL_INTR_COMMON_WR_EMPTY_BIT

#define RRAM_CTRL_INTR_COMMON_WR_EMPTY_BIT   0

Definition at line 47 of file rram_ctrl_regs.h.

RRAM_CTRL_INTR_COMMON_WR_LVL_BIT

#define RRAM_CTRL_INTR_COMMON_WR_LVL_BIT   1

Definition at line 48 of file rram_ctrl_regs.h.

RRAM_CTRL_INTR_ENABLE_CORR_ERR_BIT

#define RRAM_CTRL_INTR_ENABLE_CORR_ERR_BIT   5

Definition at line 72 of file rram_ctrl_regs.h.

RRAM_CTRL_INTR_ENABLE_OP_DONE_BIT

#define RRAM_CTRL_INTR_ENABLE_OP_DONE_BIT   4

Definition at line 71 of file rram_ctrl_regs.h.

RRAM_CTRL_INTR_ENABLE_RD_FULL_BIT

#define RRAM_CTRL_INTR_ENABLE_RD_FULL_BIT   2

Definition at line 69 of file rram_ctrl_regs.h.

RRAM_CTRL_INTR_ENABLE_RD_LVL_BIT

#define RRAM_CTRL_INTR_ENABLE_RD_LVL_BIT   3

Definition at line 70 of file rram_ctrl_regs.h.

RRAM_CTRL_INTR_ENABLE_REG_OFFSET

#define RRAM_CTRL_INTR_ENABLE_REG_OFFSET   0x4

Definition at line 65 of file rram_ctrl_regs.h.

RRAM_CTRL_INTR_ENABLE_REG_RESVAL

#define RRAM_CTRL_INTR_ENABLE_REG_RESVAL   0x0u

Definition at line 66 of file rram_ctrl_regs.h.

RRAM_CTRL_INTR_ENABLE_WR_EMPTY_BIT

#define RRAM_CTRL_INTR_ENABLE_WR_EMPTY_BIT   0

Definition at line 67 of file rram_ctrl_regs.h.

RRAM_CTRL_INTR_ENABLE_WR_LVL_BIT

#define RRAM_CTRL_INTR_ENABLE_WR_LVL_BIT   1

Definition at line 68 of file rram_ctrl_regs.h.

RRAM_CTRL_INTR_STATE_CORR_ERR_BIT

#define RRAM_CTRL_INTR_STATE_CORR_ERR_BIT   5

Definition at line 62 of file rram_ctrl_regs.h.

RRAM_CTRL_INTR_STATE_OP_DONE_BIT

#define RRAM_CTRL_INTR_STATE_OP_DONE_BIT   4

Definition at line 61 of file rram_ctrl_regs.h.

RRAM_CTRL_INTR_STATE_RD_FULL_BIT

#define RRAM_CTRL_INTR_STATE_RD_FULL_BIT   2

Definition at line 59 of file rram_ctrl_regs.h.

RRAM_CTRL_INTR_STATE_RD_LVL_BIT

#define RRAM_CTRL_INTR_STATE_RD_LVL_BIT   3

Definition at line 60 of file rram_ctrl_regs.h.

RRAM_CTRL_INTR_STATE_REG_OFFSET

#define RRAM_CTRL_INTR_STATE_REG_OFFSET   0x0

Definition at line 55 of file rram_ctrl_regs.h.

RRAM_CTRL_INTR_STATE_REG_RESVAL

#define RRAM_CTRL_INTR_STATE_REG_RESVAL   0x3u

Definition at line 56 of file rram_ctrl_regs.h.

RRAM_CTRL_INTR_STATE_WR_EMPTY_BIT

#define RRAM_CTRL_INTR_STATE_WR_EMPTY_BIT   0

Definition at line 57 of file rram_ctrl_regs.h.

RRAM_CTRL_INTR_STATE_WR_LVL_BIT

#define RRAM_CTRL_INTR_STATE_WR_LVL_BIT   1

Definition at line 58 of file rram_ctrl_regs.h.

RRAM_CTRL_INTR_TEST_CORR_ERR_BIT

#define RRAM_CTRL_INTR_TEST_CORR_ERR_BIT   5

Definition at line 82 of file rram_ctrl_regs.h.

RRAM_CTRL_INTR_TEST_OP_DONE_BIT

#define RRAM_CTRL_INTR_TEST_OP_DONE_BIT   4

Definition at line 81 of file rram_ctrl_regs.h.

RRAM_CTRL_INTR_TEST_RD_FULL_BIT

#define RRAM_CTRL_INTR_TEST_RD_FULL_BIT   2

Definition at line 79 of file rram_ctrl_regs.h.

RRAM_CTRL_INTR_TEST_RD_LVL_BIT

#define RRAM_CTRL_INTR_TEST_RD_LVL_BIT   3

Definition at line 80 of file rram_ctrl_regs.h.

RRAM_CTRL_INTR_TEST_REG_OFFSET

#define RRAM_CTRL_INTR_TEST_REG_OFFSET   0x8

Definition at line 75 of file rram_ctrl_regs.h.

RRAM_CTRL_INTR_TEST_REG_RESVAL

#define RRAM_CTRL_INTR_TEST_REG_RESVAL   0x0u

Definition at line 76 of file rram_ctrl_regs.h.

RRAM_CTRL_INTR_TEST_WR_EMPTY_BIT

#define RRAM_CTRL_INTR_TEST_WR_EMPTY_BIT   0

Definition at line 77 of file rram_ctrl_regs.h.

RRAM_CTRL_INTR_TEST_WR_LVL_BIT

#define RRAM_CTRL_INTR_TEST_WR_LVL_BIT   1

Definition at line 78 of file rram_ctrl_regs.h.

RRAM_CTRL_MP_REGION_0_BASE_0_FIELD

#define RRAM_CTRL_MP_REGION_0_BASE_0_FIELD    ((bitfield_field32_t) { .mask = RRAM_CTRL_MP_REGION_0_BASE_0_MASK, .index = RRAM_CTRL_MP_REGION_0_BASE_0_OFFSET })

Definition at line 400 of file rram_ctrl_regs.h.

RRAM_CTRL_MP_REGION_0_BASE_0_MASK

#define RRAM_CTRL_MP_REGION_0_BASE_0_MASK   0xfffu

Definition at line 398 of file rram_ctrl_regs.h.

RRAM_CTRL_MP_REGION_0_BASE_0_OFFSET

#define RRAM_CTRL_MP_REGION_0_BASE_0_OFFSET   0

Definition at line 399 of file rram_ctrl_regs.h.

RRAM_CTRL_MP_REGION_0_REG_OFFSET

#define RRAM_CTRL_MP_REGION_0_REG_OFFSET   0x68

Definition at line 396 of file rram_ctrl_regs.h.

RRAM_CTRL_MP_REGION_0_REG_RESVAL

#define RRAM_CTRL_MP_REGION_0_REG_RESVAL   0x0u

Definition at line 397 of file rram_ctrl_regs.h.

RRAM_CTRL_MP_REGION_0_SIZE_0_FIELD

#define RRAM_CTRL_MP_REGION_0_SIZE_0_FIELD    ((bitfield_field32_t) { .mask = RRAM_CTRL_MP_REGION_0_SIZE_0_MASK, .index = RRAM_CTRL_MP_REGION_0_SIZE_0_OFFSET })

Definition at line 404 of file rram_ctrl_regs.h.

RRAM_CTRL_MP_REGION_0_SIZE_0_MASK

#define RRAM_CTRL_MP_REGION_0_SIZE_0_MASK   0xfffu

Definition at line 402 of file rram_ctrl_regs.h.

RRAM_CTRL_MP_REGION_0_SIZE_0_OFFSET

#define RRAM_CTRL_MP_REGION_0_SIZE_0_OFFSET   12

Definition at line 403 of file rram_ctrl_regs.h.

RRAM_CTRL_MP_REGION_1_BASE_1_FIELD

#define RRAM_CTRL_MP_REGION_1_BASE_1_FIELD    ((bitfield_field32_t) { .mask = RRAM_CTRL_MP_REGION_1_BASE_1_MASK, .index = RRAM_CTRL_MP_REGION_1_BASE_1_OFFSET })

Definition at line 412 of file rram_ctrl_regs.h.

RRAM_CTRL_MP_REGION_1_BASE_1_MASK

#define RRAM_CTRL_MP_REGION_1_BASE_1_MASK   0xfffu

Definition at line 410 of file rram_ctrl_regs.h.

RRAM_CTRL_MP_REGION_1_BASE_1_OFFSET

#define RRAM_CTRL_MP_REGION_1_BASE_1_OFFSET   0

Definition at line 411 of file rram_ctrl_regs.h.

RRAM_CTRL_MP_REGION_1_REG_OFFSET

#define RRAM_CTRL_MP_REGION_1_REG_OFFSET   0x6c

Definition at line 408 of file rram_ctrl_regs.h.

RRAM_CTRL_MP_REGION_1_REG_RESVAL

#define RRAM_CTRL_MP_REGION_1_REG_RESVAL   0x0u

Definition at line 409 of file rram_ctrl_regs.h.

RRAM_CTRL_MP_REGION_1_SIZE_1_FIELD

#define RRAM_CTRL_MP_REGION_1_SIZE_1_FIELD    ((bitfield_field32_t) { .mask = RRAM_CTRL_MP_REGION_1_SIZE_1_MASK, .index = RRAM_CTRL_MP_REGION_1_SIZE_1_OFFSET })

Definition at line 416 of file rram_ctrl_regs.h.

RRAM_CTRL_MP_REGION_1_SIZE_1_MASK

#define RRAM_CTRL_MP_REGION_1_SIZE_1_MASK   0xfffu

Definition at line 414 of file rram_ctrl_regs.h.

RRAM_CTRL_MP_REGION_1_SIZE_1_OFFSET

#define RRAM_CTRL_MP_REGION_1_SIZE_1_OFFSET   12

Definition at line 415 of file rram_ctrl_regs.h.

RRAM_CTRL_MP_REGION_2_BASE_2_FIELD

#define RRAM_CTRL_MP_REGION_2_BASE_2_FIELD    ((bitfield_field32_t) { .mask = RRAM_CTRL_MP_REGION_2_BASE_2_MASK, .index = RRAM_CTRL_MP_REGION_2_BASE_2_OFFSET })

Definition at line 424 of file rram_ctrl_regs.h.

RRAM_CTRL_MP_REGION_2_BASE_2_MASK

#define RRAM_CTRL_MP_REGION_2_BASE_2_MASK   0xfffu

Definition at line 422 of file rram_ctrl_regs.h.

RRAM_CTRL_MP_REGION_2_BASE_2_OFFSET

#define RRAM_CTRL_MP_REGION_2_BASE_2_OFFSET   0

Definition at line 423 of file rram_ctrl_regs.h.

RRAM_CTRL_MP_REGION_2_REG_OFFSET

#define RRAM_CTRL_MP_REGION_2_REG_OFFSET   0x70

Definition at line 420 of file rram_ctrl_regs.h.

RRAM_CTRL_MP_REGION_2_REG_RESVAL

#define RRAM_CTRL_MP_REGION_2_REG_RESVAL   0x0u

Definition at line 421 of file rram_ctrl_regs.h.

RRAM_CTRL_MP_REGION_2_SIZE_2_FIELD

#define RRAM_CTRL_MP_REGION_2_SIZE_2_FIELD    ((bitfield_field32_t) { .mask = RRAM_CTRL_MP_REGION_2_SIZE_2_MASK, .index = RRAM_CTRL_MP_REGION_2_SIZE_2_OFFSET })

Definition at line 428 of file rram_ctrl_regs.h.

RRAM_CTRL_MP_REGION_2_SIZE_2_MASK

#define RRAM_CTRL_MP_REGION_2_SIZE_2_MASK   0xfffu

Definition at line 426 of file rram_ctrl_regs.h.

RRAM_CTRL_MP_REGION_2_SIZE_2_OFFSET

#define RRAM_CTRL_MP_REGION_2_SIZE_2_OFFSET   12

Definition at line 427 of file rram_ctrl_regs.h.

RRAM_CTRL_MP_REGION_3_BASE_3_FIELD

#define RRAM_CTRL_MP_REGION_3_BASE_3_FIELD    ((bitfield_field32_t) { .mask = RRAM_CTRL_MP_REGION_3_BASE_3_MASK, .index = RRAM_CTRL_MP_REGION_3_BASE_3_OFFSET })

Definition at line 436 of file rram_ctrl_regs.h.

RRAM_CTRL_MP_REGION_3_BASE_3_MASK

#define RRAM_CTRL_MP_REGION_3_BASE_3_MASK   0xfffu

Definition at line 434 of file rram_ctrl_regs.h.

RRAM_CTRL_MP_REGION_3_BASE_3_OFFSET

#define RRAM_CTRL_MP_REGION_3_BASE_3_OFFSET   0

Definition at line 435 of file rram_ctrl_regs.h.

RRAM_CTRL_MP_REGION_3_REG_OFFSET

#define RRAM_CTRL_MP_REGION_3_REG_OFFSET   0x74

Definition at line 432 of file rram_ctrl_regs.h.

RRAM_CTRL_MP_REGION_3_REG_RESVAL

#define RRAM_CTRL_MP_REGION_3_REG_RESVAL   0x0u

Definition at line 433 of file rram_ctrl_regs.h.

RRAM_CTRL_MP_REGION_3_SIZE_3_FIELD

#define RRAM_CTRL_MP_REGION_3_SIZE_3_FIELD    ((bitfield_field32_t) { .mask = RRAM_CTRL_MP_REGION_3_SIZE_3_MASK, .index = RRAM_CTRL_MP_REGION_3_SIZE_3_OFFSET })

Definition at line 440 of file rram_ctrl_regs.h.

RRAM_CTRL_MP_REGION_3_SIZE_3_MASK

#define RRAM_CTRL_MP_REGION_3_SIZE_3_MASK   0xfffu

Definition at line 438 of file rram_ctrl_regs.h.

RRAM_CTRL_MP_REGION_3_SIZE_3_OFFSET

#define RRAM_CTRL_MP_REGION_3_SIZE_3_OFFSET   12

Definition at line 439 of file rram_ctrl_regs.h.

RRAM_CTRL_MP_REGION_4_BASE_4_FIELD

#define RRAM_CTRL_MP_REGION_4_BASE_4_FIELD    ((bitfield_field32_t) { .mask = RRAM_CTRL_MP_REGION_4_BASE_4_MASK, .index = RRAM_CTRL_MP_REGION_4_BASE_4_OFFSET })

Definition at line 448 of file rram_ctrl_regs.h.

RRAM_CTRL_MP_REGION_4_BASE_4_MASK

#define RRAM_CTRL_MP_REGION_4_BASE_4_MASK   0xfffu

Definition at line 446 of file rram_ctrl_regs.h.

RRAM_CTRL_MP_REGION_4_BASE_4_OFFSET

#define RRAM_CTRL_MP_REGION_4_BASE_4_OFFSET   0

Definition at line 447 of file rram_ctrl_regs.h.

RRAM_CTRL_MP_REGION_4_REG_OFFSET

#define RRAM_CTRL_MP_REGION_4_REG_OFFSET   0x78

Definition at line 444 of file rram_ctrl_regs.h.

RRAM_CTRL_MP_REGION_4_REG_RESVAL

#define RRAM_CTRL_MP_REGION_4_REG_RESVAL   0x0u

Definition at line 445 of file rram_ctrl_regs.h.

RRAM_CTRL_MP_REGION_4_SIZE_4_FIELD

#define RRAM_CTRL_MP_REGION_4_SIZE_4_FIELD    ((bitfield_field32_t) { .mask = RRAM_CTRL_MP_REGION_4_SIZE_4_MASK, .index = RRAM_CTRL_MP_REGION_4_SIZE_4_OFFSET })

Definition at line 452 of file rram_ctrl_regs.h.

RRAM_CTRL_MP_REGION_4_SIZE_4_MASK

#define RRAM_CTRL_MP_REGION_4_SIZE_4_MASK   0xfffu

Definition at line 450 of file rram_ctrl_regs.h.

RRAM_CTRL_MP_REGION_4_SIZE_4_OFFSET

#define RRAM_CTRL_MP_REGION_4_SIZE_4_OFFSET   12

Definition at line 451 of file rram_ctrl_regs.h.

RRAM_CTRL_MP_REGION_5_BASE_5_FIELD

#define RRAM_CTRL_MP_REGION_5_BASE_5_FIELD    ((bitfield_field32_t) { .mask = RRAM_CTRL_MP_REGION_5_BASE_5_MASK, .index = RRAM_CTRL_MP_REGION_5_BASE_5_OFFSET })

Definition at line 460 of file rram_ctrl_regs.h.

RRAM_CTRL_MP_REGION_5_BASE_5_MASK

#define RRAM_CTRL_MP_REGION_5_BASE_5_MASK   0xfffu

Definition at line 458 of file rram_ctrl_regs.h.

RRAM_CTRL_MP_REGION_5_BASE_5_OFFSET

#define RRAM_CTRL_MP_REGION_5_BASE_5_OFFSET   0

Definition at line 459 of file rram_ctrl_regs.h.

RRAM_CTRL_MP_REGION_5_REG_OFFSET

#define RRAM_CTRL_MP_REGION_5_REG_OFFSET   0x7c

Definition at line 456 of file rram_ctrl_regs.h.

RRAM_CTRL_MP_REGION_5_REG_RESVAL

#define RRAM_CTRL_MP_REGION_5_REG_RESVAL   0x0u

Definition at line 457 of file rram_ctrl_regs.h.

RRAM_CTRL_MP_REGION_5_SIZE_5_FIELD

#define RRAM_CTRL_MP_REGION_5_SIZE_5_FIELD    ((bitfield_field32_t) { .mask = RRAM_CTRL_MP_REGION_5_SIZE_5_MASK, .index = RRAM_CTRL_MP_REGION_5_SIZE_5_OFFSET })

Definition at line 464 of file rram_ctrl_regs.h.

RRAM_CTRL_MP_REGION_5_SIZE_5_MASK

#define RRAM_CTRL_MP_REGION_5_SIZE_5_MASK   0xfffu

Definition at line 462 of file rram_ctrl_regs.h.

RRAM_CTRL_MP_REGION_5_SIZE_5_OFFSET

#define RRAM_CTRL_MP_REGION_5_SIZE_5_OFFSET   12

Definition at line 463 of file rram_ctrl_regs.h.

RRAM_CTRL_MP_REGION_6_BASE_6_FIELD

#define RRAM_CTRL_MP_REGION_6_BASE_6_FIELD    ((bitfield_field32_t) { .mask = RRAM_CTRL_MP_REGION_6_BASE_6_MASK, .index = RRAM_CTRL_MP_REGION_6_BASE_6_OFFSET })

Definition at line 472 of file rram_ctrl_regs.h.

RRAM_CTRL_MP_REGION_6_BASE_6_MASK

#define RRAM_CTRL_MP_REGION_6_BASE_6_MASK   0xfffu

Definition at line 470 of file rram_ctrl_regs.h.

RRAM_CTRL_MP_REGION_6_BASE_6_OFFSET

#define RRAM_CTRL_MP_REGION_6_BASE_6_OFFSET   0

Definition at line 471 of file rram_ctrl_regs.h.

RRAM_CTRL_MP_REGION_6_REG_OFFSET

#define RRAM_CTRL_MP_REGION_6_REG_OFFSET   0x80

Definition at line 468 of file rram_ctrl_regs.h.

RRAM_CTRL_MP_REGION_6_REG_RESVAL

#define RRAM_CTRL_MP_REGION_6_REG_RESVAL   0x0u

Definition at line 469 of file rram_ctrl_regs.h.

RRAM_CTRL_MP_REGION_6_SIZE_6_FIELD

#define RRAM_CTRL_MP_REGION_6_SIZE_6_FIELD    ((bitfield_field32_t) { .mask = RRAM_CTRL_MP_REGION_6_SIZE_6_MASK, .index = RRAM_CTRL_MP_REGION_6_SIZE_6_OFFSET })

Definition at line 476 of file rram_ctrl_regs.h.

RRAM_CTRL_MP_REGION_6_SIZE_6_MASK

#define RRAM_CTRL_MP_REGION_6_SIZE_6_MASK   0xfffu

Definition at line 474 of file rram_ctrl_regs.h.

RRAM_CTRL_MP_REGION_6_SIZE_6_OFFSET

#define RRAM_CTRL_MP_REGION_6_SIZE_6_OFFSET   12

Definition at line 475 of file rram_ctrl_regs.h.

RRAM_CTRL_MP_REGION_7_BASE_7_FIELD

#define RRAM_CTRL_MP_REGION_7_BASE_7_FIELD    ((bitfield_field32_t) { .mask = RRAM_CTRL_MP_REGION_7_BASE_7_MASK, .index = RRAM_CTRL_MP_REGION_7_BASE_7_OFFSET })

Definition at line 484 of file rram_ctrl_regs.h.

RRAM_CTRL_MP_REGION_7_BASE_7_MASK

#define RRAM_CTRL_MP_REGION_7_BASE_7_MASK   0xfffu

Definition at line 482 of file rram_ctrl_regs.h.

RRAM_CTRL_MP_REGION_7_BASE_7_OFFSET

#define RRAM_CTRL_MP_REGION_7_BASE_7_OFFSET   0

Definition at line 483 of file rram_ctrl_regs.h.

RRAM_CTRL_MP_REGION_7_REG_OFFSET

#define RRAM_CTRL_MP_REGION_7_REG_OFFSET   0x84

Definition at line 480 of file rram_ctrl_regs.h.

RRAM_CTRL_MP_REGION_7_REG_RESVAL

#define RRAM_CTRL_MP_REGION_7_REG_RESVAL   0x0u

Definition at line 481 of file rram_ctrl_regs.h.

RRAM_CTRL_MP_REGION_7_SIZE_7_FIELD

#define RRAM_CTRL_MP_REGION_7_SIZE_7_FIELD    ((bitfield_field32_t) { .mask = RRAM_CTRL_MP_REGION_7_SIZE_7_MASK, .index = RRAM_CTRL_MP_REGION_7_SIZE_7_OFFSET })

Definition at line 488 of file rram_ctrl_regs.h.

RRAM_CTRL_MP_REGION_7_SIZE_7_MASK

#define RRAM_CTRL_MP_REGION_7_SIZE_7_MASK   0xfffu

Definition at line 486 of file rram_ctrl_regs.h.

RRAM_CTRL_MP_REGION_7_SIZE_7_OFFSET

#define RRAM_CTRL_MP_REGION_7_SIZE_7_OFFSET   12

Definition at line 487 of file rram_ctrl_regs.h.

RRAM_CTRL_MP_REGION_BASE_FIELD_WIDTH

#define RRAM_CTRL_MP_REGION_BASE_FIELD_WIDTH   12

Definition at line 391 of file rram_ctrl_regs.h.

RRAM_CTRL_MP_REGION_CFG_0_ECC_EN_0_FIELD

#define RRAM_CTRL_MP_REGION_CFG_0_ECC_EN_0_FIELD    ((bitfield_field32_t) { .mask = RRAM_CTRL_MP_REGION_CFG_0_ECC_EN_0_MASK, .index = RRAM_CTRL_MP_REGION_CFG_0_ECC_EN_0_OFFSET })

Definition at line 219 of file rram_ctrl_regs.h.

RRAM_CTRL_MP_REGION_CFG_0_ECC_EN_0_MASK

#define RRAM_CTRL_MP_REGION_CFG_0_ECC_EN_0_MASK   0xfu

Definition at line 217 of file rram_ctrl_regs.h.

RRAM_CTRL_MP_REGION_CFG_0_ECC_EN_0_OFFSET

#define RRAM_CTRL_MP_REGION_CFG_0_ECC_EN_0_OFFSET   16

Definition at line 218 of file rram_ctrl_regs.h.

RRAM_CTRL_MP_REGION_CFG_0_EN_0_FIELD

#define RRAM_CTRL_MP_REGION_CFG_0_EN_0_FIELD    ((bitfield_field32_t) { .mask = RRAM_CTRL_MP_REGION_CFG_0_EN_0_MASK, .index = RRAM_CTRL_MP_REGION_CFG_0_EN_0_OFFSET })

Definition at line 203 of file rram_ctrl_regs.h.

RRAM_CTRL_MP_REGION_CFG_0_EN_0_MASK

#define RRAM_CTRL_MP_REGION_CFG_0_EN_0_MASK   0xfu

Definition at line 201 of file rram_ctrl_regs.h.

RRAM_CTRL_MP_REGION_CFG_0_EN_0_OFFSET

#define RRAM_CTRL_MP_REGION_CFG_0_EN_0_OFFSET   0

Definition at line 202 of file rram_ctrl_regs.h.

RRAM_CTRL_MP_REGION_CFG_0_RD_EN_0_FIELD

#define RRAM_CTRL_MP_REGION_CFG_0_RD_EN_0_FIELD    ((bitfield_field32_t) { .mask = RRAM_CTRL_MP_REGION_CFG_0_RD_EN_0_MASK, .index = RRAM_CTRL_MP_REGION_CFG_0_RD_EN_0_OFFSET })

Definition at line 207 of file rram_ctrl_regs.h.

RRAM_CTRL_MP_REGION_CFG_0_RD_EN_0_MASK

#define RRAM_CTRL_MP_REGION_CFG_0_RD_EN_0_MASK   0xfu

Definition at line 205 of file rram_ctrl_regs.h.

RRAM_CTRL_MP_REGION_CFG_0_RD_EN_0_OFFSET

#define RRAM_CTRL_MP_REGION_CFG_0_RD_EN_0_OFFSET   4

Definition at line 206 of file rram_ctrl_regs.h.

RRAM_CTRL_MP_REGION_CFG_0_REG_OFFSET

#define RRAM_CTRL_MP_REGION_CFG_0_REG_OFFSET   0x48

Definition at line 199 of file rram_ctrl_regs.h.

RRAM_CTRL_MP_REGION_CFG_0_REG_RESVAL

#define RRAM_CTRL_MP_REGION_CFG_0_REG_RESVAL   0x99999u

Definition at line 200 of file rram_ctrl_regs.h.

RRAM_CTRL_MP_REGION_CFG_0_SCRAMBLE_EN_0_FIELD

#define RRAM_CTRL_MP_REGION_CFG_0_SCRAMBLE_EN_0_FIELD    ((bitfield_field32_t) { .mask = RRAM_CTRL_MP_REGION_CFG_0_SCRAMBLE_EN_0_MASK, .index = RRAM_CTRL_MP_REGION_CFG_0_SCRAMBLE_EN_0_OFFSET })

Definition at line 215 of file rram_ctrl_regs.h.

RRAM_CTRL_MP_REGION_CFG_0_SCRAMBLE_EN_0_MASK

#define RRAM_CTRL_MP_REGION_CFG_0_SCRAMBLE_EN_0_MASK   0xfu

Definition at line 213 of file rram_ctrl_regs.h.

RRAM_CTRL_MP_REGION_CFG_0_SCRAMBLE_EN_0_OFFSET

#define RRAM_CTRL_MP_REGION_CFG_0_SCRAMBLE_EN_0_OFFSET   12

Definition at line 214 of file rram_ctrl_regs.h.

RRAM_CTRL_MP_REGION_CFG_0_WR_EN_0_FIELD

#define RRAM_CTRL_MP_REGION_CFG_0_WR_EN_0_FIELD    ((bitfield_field32_t) { .mask = RRAM_CTRL_MP_REGION_CFG_0_WR_EN_0_MASK, .index = RRAM_CTRL_MP_REGION_CFG_0_WR_EN_0_OFFSET })

Definition at line 211 of file rram_ctrl_regs.h.

RRAM_CTRL_MP_REGION_CFG_0_WR_EN_0_MASK

#define RRAM_CTRL_MP_REGION_CFG_0_WR_EN_0_MASK   0xfu

Definition at line 209 of file rram_ctrl_regs.h.

RRAM_CTRL_MP_REGION_CFG_0_WR_EN_0_OFFSET

#define RRAM_CTRL_MP_REGION_CFG_0_WR_EN_0_OFFSET   8

Definition at line 210 of file rram_ctrl_regs.h.

RRAM_CTRL_MP_REGION_CFG_1_ECC_EN_1_FIELD

#define RRAM_CTRL_MP_REGION_CFG_1_ECC_EN_1_FIELD    ((bitfield_field32_t) { .mask = RRAM_CTRL_MP_REGION_CFG_1_ECC_EN_1_MASK, .index = RRAM_CTRL_MP_REGION_CFG_1_ECC_EN_1_OFFSET })

Definition at line 243 of file rram_ctrl_regs.h.

RRAM_CTRL_MP_REGION_CFG_1_ECC_EN_1_MASK

#define RRAM_CTRL_MP_REGION_CFG_1_ECC_EN_1_MASK   0xfu

Definition at line 241 of file rram_ctrl_regs.h.

RRAM_CTRL_MP_REGION_CFG_1_ECC_EN_1_OFFSET

#define RRAM_CTRL_MP_REGION_CFG_1_ECC_EN_1_OFFSET   16

Definition at line 242 of file rram_ctrl_regs.h.

RRAM_CTRL_MP_REGION_CFG_1_EN_1_FIELD

#define RRAM_CTRL_MP_REGION_CFG_1_EN_1_FIELD    ((bitfield_field32_t) { .mask = RRAM_CTRL_MP_REGION_CFG_1_EN_1_MASK, .index = RRAM_CTRL_MP_REGION_CFG_1_EN_1_OFFSET })

Definition at line 227 of file rram_ctrl_regs.h.

RRAM_CTRL_MP_REGION_CFG_1_EN_1_MASK

#define RRAM_CTRL_MP_REGION_CFG_1_EN_1_MASK   0xfu

Definition at line 225 of file rram_ctrl_regs.h.

RRAM_CTRL_MP_REGION_CFG_1_EN_1_OFFSET

#define RRAM_CTRL_MP_REGION_CFG_1_EN_1_OFFSET   0

Definition at line 226 of file rram_ctrl_regs.h.

RRAM_CTRL_MP_REGION_CFG_1_RD_EN_1_FIELD

#define RRAM_CTRL_MP_REGION_CFG_1_RD_EN_1_FIELD    ((bitfield_field32_t) { .mask = RRAM_CTRL_MP_REGION_CFG_1_RD_EN_1_MASK, .index = RRAM_CTRL_MP_REGION_CFG_1_RD_EN_1_OFFSET })

Definition at line 231 of file rram_ctrl_regs.h.

RRAM_CTRL_MP_REGION_CFG_1_RD_EN_1_MASK

#define RRAM_CTRL_MP_REGION_CFG_1_RD_EN_1_MASK   0xfu

Definition at line 229 of file rram_ctrl_regs.h.

RRAM_CTRL_MP_REGION_CFG_1_RD_EN_1_OFFSET

#define RRAM_CTRL_MP_REGION_CFG_1_RD_EN_1_OFFSET   4

Definition at line 230 of file rram_ctrl_regs.h.

RRAM_CTRL_MP_REGION_CFG_1_REG_OFFSET

#define RRAM_CTRL_MP_REGION_CFG_1_REG_OFFSET   0x4c

Definition at line 223 of file rram_ctrl_regs.h.

RRAM_CTRL_MP_REGION_CFG_1_REG_RESVAL

#define RRAM_CTRL_MP_REGION_CFG_1_REG_RESVAL   0x99999u

Definition at line 224 of file rram_ctrl_regs.h.

RRAM_CTRL_MP_REGION_CFG_1_SCRAMBLE_EN_1_FIELD

#define RRAM_CTRL_MP_REGION_CFG_1_SCRAMBLE_EN_1_FIELD    ((bitfield_field32_t) { .mask = RRAM_CTRL_MP_REGION_CFG_1_SCRAMBLE_EN_1_MASK, .index = RRAM_CTRL_MP_REGION_CFG_1_SCRAMBLE_EN_1_OFFSET })

Definition at line 239 of file rram_ctrl_regs.h.

RRAM_CTRL_MP_REGION_CFG_1_SCRAMBLE_EN_1_MASK

#define RRAM_CTRL_MP_REGION_CFG_1_SCRAMBLE_EN_1_MASK   0xfu

Definition at line 237 of file rram_ctrl_regs.h.

RRAM_CTRL_MP_REGION_CFG_1_SCRAMBLE_EN_1_OFFSET

#define RRAM_CTRL_MP_REGION_CFG_1_SCRAMBLE_EN_1_OFFSET   12

Definition at line 238 of file rram_ctrl_regs.h.

RRAM_CTRL_MP_REGION_CFG_1_WR_EN_1_FIELD

#define RRAM_CTRL_MP_REGION_CFG_1_WR_EN_1_FIELD    ((bitfield_field32_t) { .mask = RRAM_CTRL_MP_REGION_CFG_1_WR_EN_1_MASK, .index = RRAM_CTRL_MP_REGION_CFG_1_WR_EN_1_OFFSET })

Definition at line 235 of file rram_ctrl_regs.h.

RRAM_CTRL_MP_REGION_CFG_1_WR_EN_1_MASK

#define RRAM_CTRL_MP_REGION_CFG_1_WR_EN_1_MASK   0xfu

Definition at line 233 of file rram_ctrl_regs.h.

RRAM_CTRL_MP_REGION_CFG_1_WR_EN_1_OFFSET

#define RRAM_CTRL_MP_REGION_CFG_1_WR_EN_1_OFFSET   8

Definition at line 234 of file rram_ctrl_regs.h.

RRAM_CTRL_MP_REGION_CFG_2_ECC_EN_2_FIELD

#define RRAM_CTRL_MP_REGION_CFG_2_ECC_EN_2_FIELD    ((bitfield_field32_t) { .mask = RRAM_CTRL_MP_REGION_CFG_2_ECC_EN_2_MASK, .index = RRAM_CTRL_MP_REGION_CFG_2_ECC_EN_2_OFFSET })

Definition at line 267 of file rram_ctrl_regs.h.

RRAM_CTRL_MP_REGION_CFG_2_ECC_EN_2_MASK

#define RRAM_CTRL_MP_REGION_CFG_2_ECC_EN_2_MASK   0xfu

Definition at line 265 of file rram_ctrl_regs.h.

RRAM_CTRL_MP_REGION_CFG_2_ECC_EN_2_OFFSET

#define RRAM_CTRL_MP_REGION_CFG_2_ECC_EN_2_OFFSET   16

Definition at line 266 of file rram_ctrl_regs.h.

RRAM_CTRL_MP_REGION_CFG_2_EN_2_FIELD

#define RRAM_CTRL_MP_REGION_CFG_2_EN_2_FIELD    ((bitfield_field32_t) { .mask = RRAM_CTRL_MP_REGION_CFG_2_EN_2_MASK, .index = RRAM_CTRL_MP_REGION_CFG_2_EN_2_OFFSET })

Definition at line 251 of file rram_ctrl_regs.h.

RRAM_CTRL_MP_REGION_CFG_2_EN_2_MASK

#define RRAM_CTRL_MP_REGION_CFG_2_EN_2_MASK   0xfu

Definition at line 249 of file rram_ctrl_regs.h.

RRAM_CTRL_MP_REGION_CFG_2_EN_2_OFFSET

#define RRAM_CTRL_MP_REGION_CFG_2_EN_2_OFFSET   0

Definition at line 250 of file rram_ctrl_regs.h.

RRAM_CTRL_MP_REGION_CFG_2_RD_EN_2_FIELD

#define RRAM_CTRL_MP_REGION_CFG_2_RD_EN_2_FIELD    ((bitfield_field32_t) { .mask = RRAM_CTRL_MP_REGION_CFG_2_RD_EN_2_MASK, .index = RRAM_CTRL_MP_REGION_CFG_2_RD_EN_2_OFFSET })

Definition at line 255 of file rram_ctrl_regs.h.

RRAM_CTRL_MP_REGION_CFG_2_RD_EN_2_MASK

#define RRAM_CTRL_MP_REGION_CFG_2_RD_EN_2_MASK   0xfu

Definition at line 253 of file rram_ctrl_regs.h.

RRAM_CTRL_MP_REGION_CFG_2_RD_EN_2_OFFSET

#define RRAM_CTRL_MP_REGION_CFG_2_RD_EN_2_OFFSET   4

Definition at line 254 of file rram_ctrl_regs.h.

RRAM_CTRL_MP_REGION_CFG_2_REG_OFFSET

#define RRAM_CTRL_MP_REGION_CFG_2_REG_OFFSET   0x50

Definition at line 247 of file rram_ctrl_regs.h.

RRAM_CTRL_MP_REGION_CFG_2_REG_RESVAL

#define RRAM_CTRL_MP_REGION_CFG_2_REG_RESVAL   0x99999u

Definition at line 248 of file rram_ctrl_regs.h.

RRAM_CTRL_MP_REGION_CFG_2_SCRAMBLE_EN_2_FIELD

#define RRAM_CTRL_MP_REGION_CFG_2_SCRAMBLE_EN_2_FIELD    ((bitfield_field32_t) { .mask = RRAM_CTRL_MP_REGION_CFG_2_SCRAMBLE_EN_2_MASK, .index = RRAM_CTRL_MP_REGION_CFG_2_SCRAMBLE_EN_2_OFFSET })

Definition at line 263 of file rram_ctrl_regs.h.

RRAM_CTRL_MP_REGION_CFG_2_SCRAMBLE_EN_2_MASK

#define RRAM_CTRL_MP_REGION_CFG_2_SCRAMBLE_EN_2_MASK   0xfu

Definition at line 261 of file rram_ctrl_regs.h.

RRAM_CTRL_MP_REGION_CFG_2_SCRAMBLE_EN_2_OFFSET

#define RRAM_CTRL_MP_REGION_CFG_2_SCRAMBLE_EN_2_OFFSET   12

Definition at line 262 of file rram_ctrl_regs.h.

RRAM_CTRL_MP_REGION_CFG_2_WR_EN_2_FIELD

#define RRAM_CTRL_MP_REGION_CFG_2_WR_EN_2_FIELD    ((bitfield_field32_t) { .mask = RRAM_CTRL_MP_REGION_CFG_2_WR_EN_2_MASK, .index = RRAM_CTRL_MP_REGION_CFG_2_WR_EN_2_OFFSET })

Definition at line 259 of file rram_ctrl_regs.h.

RRAM_CTRL_MP_REGION_CFG_2_WR_EN_2_MASK

#define RRAM_CTRL_MP_REGION_CFG_2_WR_EN_2_MASK   0xfu

Definition at line 257 of file rram_ctrl_regs.h.

RRAM_CTRL_MP_REGION_CFG_2_WR_EN_2_OFFSET

#define RRAM_CTRL_MP_REGION_CFG_2_WR_EN_2_OFFSET   8

Definition at line 258 of file rram_ctrl_regs.h.

RRAM_CTRL_MP_REGION_CFG_3_ECC_EN_3_FIELD

#define RRAM_CTRL_MP_REGION_CFG_3_ECC_EN_3_FIELD    ((bitfield_field32_t) { .mask = RRAM_CTRL_MP_REGION_CFG_3_ECC_EN_3_MASK, .index = RRAM_CTRL_MP_REGION_CFG_3_ECC_EN_3_OFFSET })

Definition at line 291 of file rram_ctrl_regs.h.

RRAM_CTRL_MP_REGION_CFG_3_ECC_EN_3_MASK

#define RRAM_CTRL_MP_REGION_CFG_3_ECC_EN_3_MASK   0xfu

Definition at line 289 of file rram_ctrl_regs.h.

RRAM_CTRL_MP_REGION_CFG_3_ECC_EN_3_OFFSET

#define RRAM_CTRL_MP_REGION_CFG_3_ECC_EN_3_OFFSET   16

Definition at line 290 of file rram_ctrl_regs.h.

RRAM_CTRL_MP_REGION_CFG_3_EN_3_FIELD

#define RRAM_CTRL_MP_REGION_CFG_3_EN_3_FIELD    ((bitfield_field32_t) { .mask = RRAM_CTRL_MP_REGION_CFG_3_EN_3_MASK, .index = RRAM_CTRL_MP_REGION_CFG_3_EN_3_OFFSET })

Definition at line 275 of file rram_ctrl_regs.h.

RRAM_CTRL_MP_REGION_CFG_3_EN_3_MASK

#define RRAM_CTRL_MP_REGION_CFG_3_EN_3_MASK   0xfu

Definition at line 273 of file rram_ctrl_regs.h.

RRAM_CTRL_MP_REGION_CFG_3_EN_3_OFFSET

#define RRAM_CTRL_MP_REGION_CFG_3_EN_3_OFFSET   0

Definition at line 274 of file rram_ctrl_regs.h.

RRAM_CTRL_MP_REGION_CFG_3_RD_EN_3_FIELD

#define RRAM_CTRL_MP_REGION_CFG_3_RD_EN_3_FIELD    ((bitfield_field32_t) { .mask = RRAM_CTRL_MP_REGION_CFG_3_RD_EN_3_MASK, .index = RRAM_CTRL_MP_REGION_CFG_3_RD_EN_3_OFFSET })

Definition at line 279 of file rram_ctrl_regs.h.

RRAM_CTRL_MP_REGION_CFG_3_RD_EN_3_MASK

#define RRAM_CTRL_MP_REGION_CFG_3_RD_EN_3_MASK   0xfu

Definition at line 277 of file rram_ctrl_regs.h.

RRAM_CTRL_MP_REGION_CFG_3_RD_EN_3_OFFSET

#define RRAM_CTRL_MP_REGION_CFG_3_RD_EN_3_OFFSET   4

Definition at line 278 of file rram_ctrl_regs.h.

RRAM_CTRL_MP_REGION_CFG_3_REG_OFFSET

#define RRAM_CTRL_MP_REGION_CFG_3_REG_OFFSET   0x54

Definition at line 271 of file rram_ctrl_regs.h.

RRAM_CTRL_MP_REGION_CFG_3_REG_RESVAL

#define RRAM_CTRL_MP_REGION_CFG_3_REG_RESVAL   0x99999u

Definition at line 272 of file rram_ctrl_regs.h.

RRAM_CTRL_MP_REGION_CFG_3_SCRAMBLE_EN_3_FIELD

#define RRAM_CTRL_MP_REGION_CFG_3_SCRAMBLE_EN_3_FIELD    ((bitfield_field32_t) { .mask = RRAM_CTRL_MP_REGION_CFG_3_SCRAMBLE_EN_3_MASK, .index = RRAM_CTRL_MP_REGION_CFG_3_SCRAMBLE_EN_3_OFFSET })

Definition at line 287 of file rram_ctrl_regs.h.

RRAM_CTRL_MP_REGION_CFG_3_SCRAMBLE_EN_3_MASK

#define RRAM_CTRL_MP_REGION_CFG_3_SCRAMBLE_EN_3_MASK   0xfu

Definition at line 285 of file rram_ctrl_regs.h.

RRAM_CTRL_MP_REGION_CFG_3_SCRAMBLE_EN_3_OFFSET

#define RRAM_CTRL_MP_REGION_CFG_3_SCRAMBLE_EN_3_OFFSET   12

Definition at line 286 of file rram_ctrl_regs.h.

RRAM_CTRL_MP_REGION_CFG_3_WR_EN_3_FIELD

#define RRAM_CTRL_MP_REGION_CFG_3_WR_EN_3_FIELD    ((bitfield_field32_t) { .mask = RRAM_CTRL_MP_REGION_CFG_3_WR_EN_3_MASK, .index = RRAM_CTRL_MP_REGION_CFG_3_WR_EN_3_OFFSET })

Definition at line 283 of file rram_ctrl_regs.h.

RRAM_CTRL_MP_REGION_CFG_3_WR_EN_3_MASK

#define RRAM_CTRL_MP_REGION_CFG_3_WR_EN_3_MASK   0xfu

Definition at line 281 of file rram_ctrl_regs.h.

RRAM_CTRL_MP_REGION_CFG_3_WR_EN_3_OFFSET

#define RRAM_CTRL_MP_REGION_CFG_3_WR_EN_3_OFFSET   8

Definition at line 282 of file rram_ctrl_regs.h.

RRAM_CTRL_MP_REGION_CFG_4_ECC_EN_4_FIELD

#define RRAM_CTRL_MP_REGION_CFG_4_ECC_EN_4_FIELD    ((bitfield_field32_t) { .mask = RRAM_CTRL_MP_REGION_CFG_4_ECC_EN_4_MASK, .index = RRAM_CTRL_MP_REGION_CFG_4_ECC_EN_4_OFFSET })

Definition at line 315 of file rram_ctrl_regs.h.

RRAM_CTRL_MP_REGION_CFG_4_ECC_EN_4_MASK

#define RRAM_CTRL_MP_REGION_CFG_4_ECC_EN_4_MASK   0xfu

Definition at line 313 of file rram_ctrl_regs.h.

RRAM_CTRL_MP_REGION_CFG_4_ECC_EN_4_OFFSET

#define RRAM_CTRL_MP_REGION_CFG_4_ECC_EN_4_OFFSET   16

Definition at line 314 of file rram_ctrl_regs.h.

RRAM_CTRL_MP_REGION_CFG_4_EN_4_FIELD

#define RRAM_CTRL_MP_REGION_CFG_4_EN_4_FIELD    ((bitfield_field32_t) { .mask = RRAM_CTRL_MP_REGION_CFG_4_EN_4_MASK, .index = RRAM_CTRL_MP_REGION_CFG_4_EN_4_OFFSET })

Definition at line 299 of file rram_ctrl_regs.h.

RRAM_CTRL_MP_REGION_CFG_4_EN_4_MASK

#define RRAM_CTRL_MP_REGION_CFG_4_EN_4_MASK   0xfu

Definition at line 297 of file rram_ctrl_regs.h.

RRAM_CTRL_MP_REGION_CFG_4_EN_4_OFFSET

#define RRAM_CTRL_MP_REGION_CFG_4_EN_4_OFFSET   0

Definition at line 298 of file rram_ctrl_regs.h.

RRAM_CTRL_MP_REGION_CFG_4_RD_EN_4_FIELD

#define RRAM_CTRL_MP_REGION_CFG_4_RD_EN_4_FIELD    ((bitfield_field32_t) { .mask = RRAM_CTRL_MP_REGION_CFG_4_RD_EN_4_MASK, .index = RRAM_CTRL_MP_REGION_CFG_4_RD_EN_4_OFFSET })

Definition at line 303 of file rram_ctrl_regs.h.

RRAM_CTRL_MP_REGION_CFG_4_RD_EN_4_MASK

#define RRAM_CTRL_MP_REGION_CFG_4_RD_EN_4_MASK   0xfu

Definition at line 301 of file rram_ctrl_regs.h.

RRAM_CTRL_MP_REGION_CFG_4_RD_EN_4_OFFSET

#define RRAM_CTRL_MP_REGION_CFG_4_RD_EN_4_OFFSET   4

Definition at line 302 of file rram_ctrl_regs.h.

RRAM_CTRL_MP_REGION_CFG_4_REG_OFFSET

#define RRAM_CTRL_MP_REGION_CFG_4_REG_OFFSET   0x58

Definition at line 295 of file rram_ctrl_regs.h.

RRAM_CTRL_MP_REGION_CFG_4_REG_RESVAL

#define RRAM_CTRL_MP_REGION_CFG_4_REG_RESVAL   0x99999u

Definition at line 296 of file rram_ctrl_regs.h.

RRAM_CTRL_MP_REGION_CFG_4_SCRAMBLE_EN_4_FIELD

#define RRAM_CTRL_MP_REGION_CFG_4_SCRAMBLE_EN_4_FIELD    ((bitfield_field32_t) { .mask = RRAM_CTRL_MP_REGION_CFG_4_SCRAMBLE_EN_4_MASK, .index = RRAM_CTRL_MP_REGION_CFG_4_SCRAMBLE_EN_4_OFFSET })

Definition at line 311 of file rram_ctrl_regs.h.

RRAM_CTRL_MP_REGION_CFG_4_SCRAMBLE_EN_4_MASK

#define RRAM_CTRL_MP_REGION_CFG_4_SCRAMBLE_EN_4_MASK   0xfu

Definition at line 309 of file rram_ctrl_regs.h.

RRAM_CTRL_MP_REGION_CFG_4_SCRAMBLE_EN_4_OFFSET

#define RRAM_CTRL_MP_REGION_CFG_4_SCRAMBLE_EN_4_OFFSET   12

Definition at line 310 of file rram_ctrl_regs.h.

RRAM_CTRL_MP_REGION_CFG_4_WR_EN_4_FIELD

#define RRAM_CTRL_MP_REGION_CFG_4_WR_EN_4_FIELD    ((bitfield_field32_t) { .mask = RRAM_CTRL_MP_REGION_CFG_4_WR_EN_4_MASK, .index = RRAM_CTRL_MP_REGION_CFG_4_WR_EN_4_OFFSET })

Definition at line 307 of file rram_ctrl_regs.h.

RRAM_CTRL_MP_REGION_CFG_4_WR_EN_4_MASK

#define RRAM_CTRL_MP_REGION_CFG_4_WR_EN_4_MASK   0xfu

Definition at line 305 of file rram_ctrl_regs.h.

RRAM_CTRL_MP_REGION_CFG_4_WR_EN_4_OFFSET

#define RRAM_CTRL_MP_REGION_CFG_4_WR_EN_4_OFFSET   8

Definition at line 306 of file rram_ctrl_regs.h.

RRAM_CTRL_MP_REGION_CFG_5_ECC_EN_5_FIELD

#define RRAM_CTRL_MP_REGION_CFG_5_ECC_EN_5_FIELD    ((bitfield_field32_t) { .mask = RRAM_CTRL_MP_REGION_CFG_5_ECC_EN_5_MASK, .index = RRAM_CTRL_MP_REGION_CFG_5_ECC_EN_5_OFFSET })

Definition at line 339 of file rram_ctrl_regs.h.

RRAM_CTRL_MP_REGION_CFG_5_ECC_EN_5_MASK

#define RRAM_CTRL_MP_REGION_CFG_5_ECC_EN_5_MASK   0xfu

Definition at line 337 of file rram_ctrl_regs.h.

RRAM_CTRL_MP_REGION_CFG_5_ECC_EN_5_OFFSET

#define RRAM_CTRL_MP_REGION_CFG_5_ECC_EN_5_OFFSET   16

Definition at line 338 of file rram_ctrl_regs.h.

RRAM_CTRL_MP_REGION_CFG_5_EN_5_FIELD

#define RRAM_CTRL_MP_REGION_CFG_5_EN_5_FIELD    ((bitfield_field32_t) { .mask = RRAM_CTRL_MP_REGION_CFG_5_EN_5_MASK, .index = RRAM_CTRL_MP_REGION_CFG_5_EN_5_OFFSET })

Definition at line 323 of file rram_ctrl_regs.h.

RRAM_CTRL_MP_REGION_CFG_5_EN_5_MASK

#define RRAM_CTRL_MP_REGION_CFG_5_EN_5_MASK   0xfu

Definition at line 321 of file rram_ctrl_regs.h.

RRAM_CTRL_MP_REGION_CFG_5_EN_5_OFFSET

#define RRAM_CTRL_MP_REGION_CFG_5_EN_5_OFFSET   0

Definition at line 322 of file rram_ctrl_regs.h.

RRAM_CTRL_MP_REGION_CFG_5_RD_EN_5_FIELD

#define RRAM_CTRL_MP_REGION_CFG_5_RD_EN_5_FIELD    ((bitfield_field32_t) { .mask = RRAM_CTRL_MP_REGION_CFG_5_RD_EN_5_MASK, .index = RRAM_CTRL_MP_REGION_CFG_5_RD_EN_5_OFFSET })

Definition at line 327 of file rram_ctrl_regs.h.

RRAM_CTRL_MP_REGION_CFG_5_RD_EN_5_MASK

#define RRAM_CTRL_MP_REGION_CFG_5_RD_EN_5_MASK   0xfu

Definition at line 325 of file rram_ctrl_regs.h.

RRAM_CTRL_MP_REGION_CFG_5_RD_EN_5_OFFSET

#define RRAM_CTRL_MP_REGION_CFG_5_RD_EN_5_OFFSET   4

Definition at line 326 of file rram_ctrl_regs.h.

RRAM_CTRL_MP_REGION_CFG_5_REG_OFFSET

#define RRAM_CTRL_MP_REGION_CFG_5_REG_OFFSET   0x5c

Definition at line 319 of file rram_ctrl_regs.h.

RRAM_CTRL_MP_REGION_CFG_5_REG_RESVAL

#define RRAM_CTRL_MP_REGION_CFG_5_REG_RESVAL   0x99999u

Definition at line 320 of file rram_ctrl_regs.h.

RRAM_CTRL_MP_REGION_CFG_5_SCRAMBLE_EN_5_FIELD

#define RRAM_CTRL_MP_REGION_CFG_5_SCRAMBLE_EN_5_FIELD    ((bitfield_field32_t) { .mask = RRAM_CTRL_MP_REGION_CFG_5_SCRAMBLE_EN_5_MASK, .index = RRAM_CTRL_MP_REGION_CFG_5_SCRAMBLE_EN_5_OFFSET })

Definition at line 335 of file rram_ctrl_regs.h.

RRAM_CTRL_MP_REGION_CFG_5_SCRAMBLE_EN_5_MASK

#define RRAM_CTRL_MP_REGION_CFG_5_SCRAMBLE_EN_5_MASK   0xfu

Definition at line 333 of file rram_ctrl_regs.h.

RRAM_CTRL_MP_REGION_CFG_5_SCRAMBLE_EN_5_OFFSET

#define RRAM_CTRL_MP_REGION_CFG_5_SCRAMBLE_EN_5_OFFSET   12

Definition at line 334 of file rram_ctrl_regs.h.

RRAM_CTRL_MP_REGION_CFG_5_WR_EN_5_FIELD

#define RRAM_CTRL_MP_REGION_CFG_5_WR_EN_5_FIELD    ((bitfield_field32_t) { .mask = RRAM_CTRL_MP_REGION_CFG_5_WR_EN_5_MASK, .index = RRAM_CTRL_MP_REGION_CFG_5_WR_EN_5_OFFSET })

Definition at line 331 of file rram_ctrl_regs.h.

RRAM_CTRL_MP_REGION_CFG_5_WR_EN_5_MASK

#define RRAM_CTRL_MP_REGION_CFG_5_WR_EN_5_MASK   0xfu

Definition at line 329 of file rram_ctrl_regs.h.

RRAM_CTRL_MP_REGION_CFG_5_WR_EN_5_OFFSET

#define RRAM_CTRL_MP_REGION_CFG_5_WR_EN_5_OFFSET   8

Definition at line 330 of file rram_ctrl_regs.h.

RRAM_CTRL_MP_REGION_CFG_6_ECC_EN_6_FIELD

#define RRAM_CTRL_MP_REGION_CFG_6_ECC_EN_6_FIELD    ((bitfield_field32_t) { .mask = RRAM_CTRL_MP_REGION_CFG_6_ECC_EN_6_MASK, .index = RRAM_CTRL_MP_REGION_CFG_6_ECC_EN_6_OFFSET })

Definition at line 363 of file rram_ctrl_regs.h.

RRAM_CTRL_MP_REGION_CFG_6_ECC_EN_6_MASK

#define RRAM_CTRL_MP_REGION_CFG_6_ECC_EN_6_MASK   0xfu

Definition at line 361 of file rram_ctrl_regs.h.

RRAM_CTRL_MP_REGION_CFG_6_ECC_EN_6_OFFSET

#define RRAM_CTRL_MP_REGION_CFG_6_ECC_EN_6_OFFSET   16

Definition at line 362 of file rram_ctrl_regs.h.

RRAM_CTRL_MP_REGION_CFG_6_EN_6_FIELD

#define RRAM_CTRL_MP_REGION_CFG_6_EN_6_FIELD    ((bitfield_field32_t) { .mask = RRAM_CTRL_MP_REGION_CFG_6_EN_6_MASK, .index = RRAM_CTRL_MP_REGION_CFG_6_EN_6_OFFSET })

Definition at line 347 of file rram_ctrl_regs.h.

RRAM_CTRL_MP_REGION_CFG_6_EN_6_MASK

#define RRAM_CTRL_MP_REGION_CFG_6_EN_6_MASK   0xfu

Definition at line 345 of file rram_ctrl_regs.h.

RRAM_CTRL_MP_REGION_CFG_6_EN_6_OFFSET

#define RRAM_CTRL_MP_REGION_CFG_6_EN_6_OFFSET   0

Definition at line 346 of file rram_ctrl_regs.h.

RRAM_CTRL_MP_REGION_CFG_6_RD_EN_6_FIELD

#define RRAM_CTRL_MP_REGION_CFG_6_RD_EN_6_FIELD    ((bitfield_field32_t) { .mask = RRAM_CTRL_MP_REGION_CFG_6_RD_EN_6_MASK, .index = RRAM_CTRL_MP_REGION_CFG_6_RD_EN_6_OFFSET })

Definition at line 351 of file rram_ctrl_regs.h.

RRAM_CTRL_MP_REGION_CFG_6_RD_EN_6_MASK

#define RRAM_CTRL_MP_REGION_CFG_6_RD_EN_6_MASK   0xfu

Definition at line 349 of file rram_ctrl_regs.h.

RRAM_CTRL_MP_REGION_CFG_6_RD_EN_6_OFFSET

#define RRAM_CTRL_MP_REGION_CFG_6_RD_EN_6_OFFSET   4

Definition at line 350 of file rram_ctrl_regs.h.

RRAM_CTRL_MP_REGION_CFG_6_REG_OFFSET

#define RRAM_CTRL_MP_REGION_CFG_6_REG_OFFSET   0x60

Definition at line 343 of file rram_ctrl_regs.h.

RRAM_CTRL_MP_REGION_CFG_6_REG_RESVAL

#define RRAM_CTRL_MP_REGION_CFG_6_REG_RESVAL   0x99999u

Definition at line 344 of file rram_ctrl_regs.h.

RRAM_CTRL_MP_REGION_CFG_6_SCRAMBLE_EN_6_FIELD

#define RRAM_CTRL_MP_REGION_CFG_6_SCRAMBLE_EN_6_FIELD    ((bitfield_field32_t) { .mask = RRAM_CTRL_MP_REGION_CFG_6_SCRAMBLE_EN_6_MASK, .index = RRAM_CTRL_MP_REGION_CFG_6_SCRAMBLE_EN_6_OFFSET })

Definition at line 359 of file rram_ctrl_regs.h.

RRAM_CTRL_MP_REGION_CFG_6_SCRAMBLE_EN_6_MASK

#define RRAM_CTRL_MP_REGION_CFG_6_SCRAMBLE_EN_6_MASK   0xfu

Definition at line 357 of file rram_ctrl_regs.h.

RRAM_CTRL_MP_REGION_CFG_6_SCRAMBLE_EN_6_OFFSET

#define RRAM_CTRL_MP_REGION_CFG_6_SCRAMBLE_EN_6_OFFSET   12

Definition at line 358 of file rram_ctrl_regs.h.

RRAM_CTRL_MP_REGION_CFG_6_WR_EN_6_FIELD

#define RRAM_CTRL_MP_REGION_CFG_6_WR_EN_6_FIELD    ((bitfield_field32_t) { .mask = RRAM_CTRL_MP_REGION_CFG_6_WR_EN_6_MASK, .index = RRAM_CTRL_MP_REGION_CFG_6_WR_EN_6_OFFSET })

Definition at line 355 of file rram_ctrl_regs.h.

RRAM_CTRL_MP_REGION_CFG_6_WR_EN_6_MASK

#define RRAM_CTRL_MP_REGION_CFG_6_WR_EN_6_MASK   0xfu

Definition at line 353 of file rram_ctrl_regs.h.

RRAM_CTRL_MP_REGION_CFG_6_WR_EN_6_OFFSET

#define RRAM_CTRL_MP_REGION_CFG_6_WR_EN_6_OFFSET   8

Definition at line 354 of file rram_ctrl_regs.h.

RRAM_CTRL_MP_REGION_CFG_7_ECC_EN_7_FIELD

#define RRAM_CTRL_MP_REGION_CFG_7_ECC_EN_7_FIELD    ((bitfield_field32_t) { .mask = RRAM_CTRL_MP_REGION_CFG_7_ECC_EN_7_MASK, .index = RRAM_CTRL_MP_REGION_CFG_7_ECC_EN_7_OFFSET })

Definition at line 387 of file rram_ctrl_regs.h.

RRAM_CTRL_MP_REGION_CFG_7_ECC_EN_7_MASK

#define RRAM_CTRL_MP_REGION_CFG_7_ECC_EN_7_MASK   0xfu

Definition at line 385 of file rram_ctrl_regs.h.

RRAM_CTRL_MP_REGION_CFG_7_ECC_EN_7_OFFSET

#define RRAM_CTRL_MP_REGION_CFG_7_ECC_EN_7_OFFSET   16

Definition at line 386 of file rram_ctrl_regs.h.

RRAM_CTRL_MP_REGION_CFG_7_EN_7_FIELD

#define RRAM_CTRL_MP_REGION_CFG_7_EN_7_FIELD    ((bitfield_field32_t) { .mask = RRAM_CTRL_MP_REGION_CFG_7_EN_7_MASK, .index = RRAM_CTRL_MP_REGION_CFG_7_EN_7_OFFSET })

Definition at line 371 of file rram_ctrl_regs.h.

RRAM_CTRL_MP_REGION_CFG_7_EN_7_MASK

#define RRAM_CTRL_MP_REGION_CFG_7_EN_7_MASK   0xfu

Definition at line 369 of file rram_ctrl_regs.h.

RRAM_CTRL_MP_REGION_CFG_7_EN_7_OFFSET

#define RRAM_CTRL_MP_REGION_CFG_7_EN_7_OFFSET   0

Definition at line 370 of file rram_ctrl_regs.h.

RRAM_CTRL_MP_REGION_CFG_7_RD_EN_7_FIELD

#define RRAM_CTRL_MP_REGION_CFG_7_RD_EN_7_FIELD    ((bitfield_field32_t) { .mask = RRAM_CTRL_MP_REGION_CFG_7_RD_EN_7_MASK, .index = RRAM_CTRL_MP_REGION_CFG_7_RD_EN_7_OFFSET })

Definition at line 375 of file rram_ctrl_regs.h.

RRAM_CTRL_MP_REGION_CFG_7_RD_EN_7_MASK

#define RRAM_CTRL_MP_REGION_CFG_7_RD_EN_7_MASK   0xfu

Definition at line 373 of file rram_ctrl_regs.h.

RRAM_CTRL_MP_REGION_CFG_7_RD_EN_7_OFFSET

#define RRAM_CTRL_MP_REGION_CFG_7_RD_EN_7_OFFSET   4

Definition at line 374 of file rram_ctrl_regs.h.

RRAM_CTRL_MP_REGION_CFG_7_REG_OFFSET

#define RRAM_CTRL_MP_REGION_CFG_7_REG_OFFSET   0x64

Definition at line 367 of file rram_ctrl_regs.h.

RRAM_CTRL_MP_REGION_CFG_7_REG_RESVAL

#define RRAM_CTRL_MP_REGION_CFG_7_REG_RESVAL   0x99999u

Definition at line 368 of file rram_ctrl_regs.h.

RRAM_CTRL_MP_REGION_CFG_7_SCRAMBLE_EN_7_FIELD

#define RRAM_CTRL_MP_REGION_CFG_7_SCRAMBLE_EN_7_FIELD    ((bitfield_field32_t) { .mask = RRAM_CTRL_MP_REGION_CFG_7_SCRAMBLE_EN_7_MASK, .index = RRAM_CTRL_MP_REGION_CFG_7_SCRAMBLE_EN_7_OFFSET })

Definition at line 383 of file rram_ctrl_regs.h.

RRAM_CTRL_MP_REGION_CFG_7_SCRAMBLE_EN_7_MASK

#define RRAM_CTRL_MP_REGION_CFG_7_SCRAMBLE_EN_7_MASK   0xfu

Definition at line 381 of file rram_ctrl_regs.h.

RRAM_CTRL_MP_REGION_CFG_7_SCRAMBLE_EN_7_OFFSET

#define RRAM_CTRL_MP_REGION_CFG_7_SCRAMBLE_EN_7_OFFSET   12

Definition at line 382 of file rram_ctrl_regs.h.

RRAM_CTRL_MP_REGION_CFG_7_WR_EN_7_FIELD

#define RRAM_CTRL_MP_REGION_CFG_7_WR_EN_7_FIELD    ((bitfield_field32_t) { .mask = RRAM_CTRL_MP_REGION_CFG_7_WR_EN_7_MASK, .index = RRAM_CTRL_MP_REGION_CFG_7_WR_EN_7_OFFSET })

Definition at line 379 of file rram_ctrl_regs.h.

RRAM_CTRL_MP_REGION_CFG_7_WR_EN_7_MASK

#define RRAM_CTRL_MP_REGION_CFG_7_WR_EN_7_MASK   0xfu

Definition at line 377 of file rram_ctrl_regs.h.

RRAM_CTRL_MP_REGION_CFG_7_WR_EN_7_OFFSET

#define RRAM_CTRL_MP_REGION_CFG_7_WR_EN_7_OFFSET   8

Definition at line 378 of file rram_ctrl_regs.h.

RRAM_CTRL_MP_REGION_CFG_ECC_EN_FIELD_WIDTH

#define RRAM_CTRL_MP_REGION_CFG_ECC_EN_FIELD_WIDTH   4

Definition at line 195 of file rram_ctrl_regs.h.

RRAM_CTRL_MP_REGION_CFG_EN_FIELD_WIDTH

#define RRAM_CTRL_MP_REGION_CFG_EN_FIELD_WIDTH   4

Definition at line 191 of file rram_ctrl_regs.h.

RRAM_CTRL_MP_REGION_CFG_MULTIREG_COUNT

#define RRAM_CTRL_MP_REGION_CFG_MULTIREG_COUNT   8

Definition at line 196 of file rram_ctrl_regs.h.

RRAM_CTRL_MP_REGION_CFG_RD_EN_FIELD_WIDTH

#define RRAM_CTRL_MP_REGION_CFG_RD_EN_FIELD_WIDTH   4

Definition at line 192 of file rram_ctrl_regs.h.

RRAM_CTRL_MP_REGION_CFG_SCRAMBLE_EN_FIELD_WIDTH

#define RRAM_CTRL_MP_REGION_CFG_SCRAMBLE_EN_FIELD_WIDTH   4

Definition at line 194 of file rram_ctrl_regs.h.

RRAM_CTRL_MP_REGION_CFG_WR_EN_FIELD_WIDTH

#define RRAM_CTRL_MP_REGION_CFG_WR_EN_FIELD_WIDTH   4

Definition at line 193 of file rram_ctrl_regs.h.

RRAM_CTRL_MP_REGION_MULTIREG_COUNT

#define RRAM_CTRL_MP_REGION_MULTIREG_COUNT   8

Definition at line 393 of file rram_ctrl_regs.h.

RRAM_CTRL_MP_REGION_SIZE_FIELD_WIDTH

#define RRAM_CTRL_MP_REGION_SIZE_FIELD_WIDTH   12

Definition at line 392 of file rram_ctrl_regs.h.

RRAM_CTRL_OP_STATUS_DONE_BIT

#define RRAM_CTRL_OP_STATUS_DONE_BIT   0

Definition at line 772 of file rram_ctrl_regs.h.

RRAM_CTRL_OP_STATUS_ERR_BIT

#define RRAM_CTRL_OP_STATUS_ERR_BIT   1

Definition at line 773 of file rram_ctrl_regs.h.

RRAM_CTRL_OP_STATUS_REG_OFFSET

#define RRAM_CTRL_OP_STATUS_REG_OFFSET   0xd0

Definition at line 770 of file rram_ctrl_regs.h.

RRAM_CTRL_OP_STATUS_REG_RESVAL

#define RRAM_CTRL_OP_STATUS_REG_RESVAL   0x0u

Definition at line 771 of file rram_ctrl_regs.h.

RRAM_CTRL_PARAM_BYTES_PER_PAGE

#define RRAM_CTRL_PARAM_BYTES_PER_PAGE   512

Definition at line 38 of file rram_ctrl_regs.h.

RRAM_CTRL_PARAM_BYTES_PER_WORD

#define RRAM_CTRL_PARAM_BYTES_PER_WORD   16

Definition at line 35 of file rram_ctrl_regs.h.

RRAM_CTRL_PARAM_EXEC_EN

#define RRAM_CTRL_PARAM_EXEC_EN   2724870391

Definition at line 20 of file rram_ctrl_regs.h.

RRAM_CTRL_PARAM_NUM_ALERTS

#define RRAM_CTRL_PARAM_NUM_ALERTS   5

Definition at line 41 of file rram_ctrl_regs.h.

RRAM_CTRL_PARAM_NUM_DATA_PAGES

#define RRAM_CTRL_PARAM_NUM_DATA_PAGES   4096

Definition at line 29 of file rram_ctrl_regs.h.

RRAM_CTRL_PARAM_NUM_INFO_PAGES

#define RRAM_CTRL_PARAM_NUM_INFO_PAGES   8

Definition at line 26 of file rram_ctrl_regs.h.

RRAM_CTRL_PARAM_NUM_REGIONS

#define RRAM_CTRL_PARAM_NUM_REGIONS   8

Definition at line 23 of file rram_ctrl_regs.h.

RRAM_CTRL_PARAM_REG_WIDTH

#define RRAM_CTRL_PARAM_REG_WIDTH   32

Definition at line 44 of file rram_ctrl_regs.h.

RRAM_CTRL_PARAM_WORDS_PER_PAGE

#define RRAM_CTRL_PARAM_WORDS_PER_PAGE   32

Definition at line 32 of file rram_ctrl_regs.h.

RRAM_CTRL_PHY_STATUS_INIT_DONE_BIT

#define RRAM_CTRL_PHY_STATUS_INIT_DONE_BIT   1

Definition at line 857 of file rram_ctrl_regs.h.

RRAM_CTRL_PHY_STATUS_REG_OFFSET

#define RRAM_CTRL_PHY_STATUS_REG_OFFSET   0xf0

Definition at line 854 of file rram_ctrl_regs.h.

RRAM_CTRL_PHY_STATUS_REG_RESVAL

#define RRAM_CTRL_PHY_STATUS_REG_RESVAL   0x0u

Definition at line 855 of file rram_ctrl_regs.h.

RRAM_CTRL_PHY_STATUS_WR_BUSY_BIT

#define RRAM_CTRL_PHY_STATUS_WR_BUSY_BIT   0

Definition at line 856 of file rram_ctrl_regs.h.

RRAM_CTRL_RD_FIFO_REG_OFFSET

#define RRAM_CTRL_RD_FIFO_REG_OFFSET   0x108

Definition at line 898 of file rram_ctrl_regs.h.

RRAM_CTRL_RD_FIFO_SIZE_BYTES

#define RRAM_CTRL_RD_FIFO_SIZE_BYTES   4

Definition at line 900 of file rram_ctrl_regs.h.

RRAM_CTRL_RD_FIFO_SIZE_WORDS

#define RRAM_CTRL_RD_FIFO_SIZE_WORDS   1

Definition at line 899 of file rram_ctrl_regs.h.

RRAM_CTRL_REGION_CFG_REGWEN_0_REG_OFFSET

#define RRAM_CTRL_REGION_CFG_REGWEN_0_REG_OFFSET   0x28

Definition at line 149 of file rram_ctrl_regs.h.

RRAM_CTRL_REGION_CFG_REGWEN_0_REG_RESVAL

#define RRAM_CTRL_REGION_CFG_REGWEN_0_REG_RESVAL   0x1u

Definition at line 150 of file rram_ctrl_regs.h.

RRAM_CTRL_REGION_CFG_REGWEN_0_REGION_0_BIT

#define RRAM_CTRL_REGION_CFG_REGWEN_0_REGION_0_BIT   0

Definition at line 151 of file rram_ctrl_regs.h.

RRAM_CTRL_REGION_CFG_REGWEN_0_REGION_0_VALUE_REGION_ENABLED

#define RRAM_CTRL_REGION_CFG_REGWEN_0_REGION_0_VALUE_REGION_ENABLED   0x1

Definition at line 153 of file rram_ctrl_regs.h.

RRAM_CTRL_REGION_CFG_REGWEN_0_REGION_0_VALUE_REGION_LOCKED

#define RRAM_CTRL_REGION_CFG_REGWEN_0_REGION_0_VALUE_REGION_LOCKED   0x0

Definition at line 152 of file rram_ctrl_regs.h.

RRAM_CTRL_REGION_CFG_REGWEN_1_REG_OFFSET

#define RRAM_CTRL_REGION_CFG_REGWEN_1_REG_OFFSET   0x2c

Definition at line 156 of file rram_ctrl_regs.h.

RRAM_CTRL_REGION_CFG_REGWEN_1_REG_RESVAL

#define RRAM_CTRL_REGION_CFG_REGWEN_1_REG_RESVAL   0x1u

Definition at line 157 of file rram_ctrl_regs.h.

RRAM_CTRL_REGION_CFG_REGWEN_1_REGION_1_BIT

#define RRAM_CTRL_REGION_CFG_REGWEN_1_REGION_1_BIT   0

Definition at line 158 of file rram_ctrl_regs.h.

RRAM_CTRL_REGION_CFG_REGWEN_2_REG_OFFSET

#define RRAM_CTRL_REGION_CFG_REGWEN_2_REG_OFFSET   0x30

Definition at line 161 of file rram_ctrl_regs.h.

RRAM_CTRL_REGION_CFG_REGWEN_2_REG_RESVAL

#define RRAM_CTRL_REGION_CFG_REGWEN_2_REG_RESVAL   0x1u

Definition at line 162 of file rram_ctrl_regs.h.

RRAM_CTRL_REGION_CFG_REGWEN_2_REGION_2_BIT

#define RRAM_CTRL_REGION_CFG_REGWEN_2_REGION_2_BIT   0

Definition at line 163 of file rram_ctrl_regs.h.

RRAM_CTRL_REGION_CFG_REGWEN_3_REG_OFFSET

#define RRAM_CTRL_REGION_CFG_REGWEN_3_REG_OFFSET   0x34

Definition at line 166 of file rram_ctrl_regs.h.

RRAM_CTRL_REGION_CFG_REGWEN_3_REG_RESVAL

#define RRAM_CTRL_REGION_CFG_REGWEN_3_REG_RESVAL   0x1u

Definition at line 167 of file rram_ctrl_regs.h.

RRAM_CTRL_REGION_CFG_REGWEN_3_REGION_3_BIT

#define RRAM_CTRL_REGION_CFG_REGWEN_3_REGION_3_BIT   0

Definition at line 168 of file rram_ctrl_regs.h.

RRAM_CTRL_REGION_CFG_REGWEN_4_REG_OFFSET

#define RRAM_CTRL_REGION_CFG_REGWEN_4_REG_OFFSET   0x38

Definition at line 171 of file rram_ctrl_regs.h.

RRAM_CTRL_REGION_CFG_REGWEN_4_REG_RESVAL

#define RRAM_CTRL_REGION_CFG_REGWEN_4_REG_RESVAL   0x1u

Definition at line 172 of file rram_ctrl_regs.h.

RRAM_CTRL_REGION_CFG_REGWEN_4_REGION_4_BIT

#define RRAM_CTRL_REGION_CFG_REGWEN_4_REGION_4_BIT   0

Definition at line 173 of file rram_ctrl_regs.h.

RRAM_CTRL_REGION_CFG_REGWEN_5_REG_OFFSET

#define RRAM_CTRL_REGION_CFG_REGWEN_5_REG_OFFSET   0x3c

Definition at line 176 of file rram_ctrl_regs.h.

RRAM_CTRL_REGION_CFG_REGWEN_5_REG_RESVAL

#define RRAM_CTRL_REGION_CFG_REGWEN_5_REG_RESVAL   0x1u

Definition at line 177 of file rram_ctrl_regs.h.

RRAM_CTRL_REGION_CFG_REGWEN_5_REGION_5_BIT

#define RRAM_CTRL_REGION_CFG_REGWEN_5_REGION_5_BIT   0

Definition at line 178 of file rram_ctrl_regs.h.

RRAM_CTRL_REGION_CFG_REGWEN_6_REG_OFFSET

#define RRAM_CTRL_REGION_CFG_REGWEN_6_REG_OFFSET   0x40

Definition at line 181 of file rram_ctrl_regs.h.

RRAM_CTRL_REGION_CFG_REGWEN_6_REG_RESVAL

#define RRAM_CTRL_REGION_CFG_REGWEN_6_REG_RESVAL   0x1u

Definition at line 182 of file rram_ctrl_regs.h.

RRAM_CTRL_REGION_CFG_REGWEN_6_REGION_6_BIT

#define RRAM_CTRL_REGION_CFG_REGWEN_6_REGION_6_BIT   0

Definition at line 183 of file rram_ctrl_regs.h.

RRAM_CTRL_REGION_CFG_REGWEN_7_REG_OFFSET

#define RRAM_CTRL_REGION_CFG_REGWEN_7_REG_OFFSET   0x44

Definition at line 186 of file rram_ctrl_regs.h.

RRAM_CTRL_REGION_CFG_REGWEN_7_REG_RESVAL

#define RRAM_CTRL_REGION_CFG_REGWEN_7_REG_RESVAL   0x1u

Definition at line 187 of file rram_ctrl_regs.h.

RRAM_CTRL_REGION_CFG_REGWEN_7_REGION_7_BIT

#define RRAM_CTRL_REGION_CFG_REGWEN_7_REGION_7_BIT   0

Definition at line 188 of file rram_ctrl_regs.h.

RRAM_CTRL_REGION_CFG_REGWEN_MULTIREG_COUNT

#define RRAM_CTRL_REGION_CFG_REGWEN_MULTIREG_COUNT   8

Definition at line 146 of file rram_ctrl_regs.h.

RRAM_CTRL_REGION_CFG_REGWEN_REGION_FIELD_WIDTH

#define RRAM_CTRL_REGION_CFG_REGWEN_REGION_FIELD_WIDTH   1

Definition at line 145 of file rram_ctrl_regs.h.

RRAM_CTRL_SCRATCH_REG_OFFSET

#define RRAM_CTRL_SCRATCH_REG_OFFSET   0xf4

Definition at line 860 of file rram_ctrl_regs.h.

RRAM_CTRL_SCRATCH_REG_RESVAL

#define RRAM_CTRL_SCRATCH_REG_RESVAL   0x0u

Definition at line 861 of file rram_ctrl_regs.h.

RRAM_CTRL_STATUS_INIT_DONE_BIT

#define RRAM_CTRL_STATUS_INIT_DONE_BIT   4

Definition at line 782 of file rram_ctrl_regs.h.

RRAM_CTRL_STATUS_KEYS_VALID_BIT

#define RRAM_CTRL_STATUS_KEYS_VALID_BIT   5

Definition at line 783 of file rram_ctrl_regs.h.

RRAM_CTRL_STATUS_RD_EMPTY_BIT

#define RRAM_CTRL_STATUS_RD_EMPTY_BIT   1

Definition at line 779 of file rram_ctrl_regs.h.

RRAM_CTRL_STATUS_RD_FULL_BIT

#define RRAM_CTRL_STATUS_RD_FULL_BIT   0

Definition at line 778 of file rram_ctrl_regs.h.

RRAM_CTRL_STATUS_REG_OFFSET

#define RRAM_CTRL_STATUS_REG_OFFSET   0xd4

Definition at line 776 of file rram_ctrl_regs.h.

RRAM_CTRL_STATUS_REG_RESVAL

#define RRAM_CTRL_STATUS_REG_RESVAL   0xau

Definition at line 777 of file rram_ctrl_regs.h.

RRAM_CTRL_STATUS_WR_EMPTY_BIT

#define RRAM_CTRL_STATUS_WR_EMPTY_BIT   3

Definition at line 781 of file rram_ctrl_regs.h.

RRAM_CTRL_STATUS_WR_FULL_BIT

#define RRAM_CTRL_STATUS_WR_FULL_BIT   2

Definition at line 780 of file rram_ctrl_regs.h.

RRAM_CTRL_STD_FAULT_STATUS_CTRL_CNT_ERR_BIT

#define RRAM_CTRL_STD_FAULT_STATUS_CTRL_CNT_ERR_BIT   11

Definition at line 807 of file rram_ctrl_regs.h.

RRAM_CTRL_STD_FAULT_STATUS_CTRL_FIFO_ERR_BIT

#define RRAM_CTRL_STD_FAULT_STATUS_CTRL_FIFO_ERR_BIT   12

Definition at line 808 of file rram_ctrl_regs.h.

RRAM_CTRL_STD_FAULT_STATUS_CTRL_FSM_ERR_BIT

#define RRAM_CTRL_STD_FAULT_STATUS_CTRL_FSM_ERR_BIT   10

Definition at line 806 of file rram_ctrl_regs.h.

RRAM_CTRL_STD_FAULT_STATUS_LCMGR_ERR_BIT

#define RRAM_CTRL_STD_FAULT_STATUS_LCMGR_ERR_BIT   1

Definition at line 797 of file rram_ctrl_regs.h.

RRAM_CTRL_STD_FAULT_STATUS_LCMGR_INTG_ERR_BIT

#define RRAM_CTRL_STD_FAULT_STATUS_LCMGR_INTG_ERR_BIT   2

Definition at line 798 of file rram_ctrl_regs.h.

RRAM_CTRL_STD_FAULT_STATUS_OTP_ERR_BIT

#define RRAM_CTRL_STD_FAULT_STATUS_OTP_ERR_BIT   3

Definition at line 799 of file rram_ctrl_regs.h.

RRAM_CTRL_STD_FAULT_STATUS_OTP_INTG_ERR_BIT

#define RRAM_CTRL_STD_FAULT_STATUS_OTP_INTG_ERR_BIT   4

Definition at line 800 of file rram_ctrl_regs.h.

RRAM_CTRL_STD_FAULT_STATUS_PHY_ARB_ERR_BIT

#define RRAM_CTRL_STD_FAULT_STATUS_PHY_ARB_ERR_BIT   9

Definition at line 805 of file rram_ctrl_regs.h.

RRAM_CTRL_STD_FAULT_STATUS_PHY_CNT_ERR_BIT

#define RRAM_CTRL_STD_FAULT_STATUS_PHY_CNT_ERR_BIT   8

Definition at line 804 of file rram_ctrl_regs.h.

RRAM_CTRL_STD_FAULT_STATUS_PHY_FIFO_ERR_BIT

#define RRAM_CTRL_STD_FAULT_STATUS_PHY_FIFO_ERR_BIT   6

Definition at line 802 of file rram_ctrl_regs.h.

RRAM_CTRL_STD_FAULT_STATUS_PHY_FSM_ERR_BIT

#define RRAM_CTRL_STD_FAULT_STATUS_PHY_FSM_ERR_BIT   7

Definition at line 803 of file rram_ctrl_regs.h.

RRAM_CTRL_STD_FAULT_STATUS_PHY_WR_INTG_ERR_BIT

#define RRAM_CTRL_STD_FAULT_STATUS_PHY_WR_INTG_ERR_BIT   5

Definition at line 801 of file rram_ctrl_regs.h.

RRAM_CTRL_STD_FAULT_STATUS_REG_INTG_ERR_BIT

#define RRAM_CTRL_STD_FAULT_STATUS_REG_INTG_ERR_BIT   0

Definition at line 796 of file rram_ctrl_regs.h.

RRAM_CTRL_STD_FAULT_STATUS_REG_OFFSET

#define RRAM_CTRL_STD_FAULT_STATUS_REG_OFFSET   0xdc

Definition at line 794 of file rram_ctrl_regs.h.

RRAM_CTRL_STD_FAULT_STATUS_REG_RESVAL

#define RRAM_CTRL_STD_FAULT_STATUS_REG_RESVAL   0x0u

Definition at line 795 of file rram_ctrl_regs.h.

RRAM_CTRL_WR_FIFO_REG_OFFSET

#define RRAM_CTRL_WR_FIFO_REG_OFFSET   0x104

Definition at line 894 of file rram_ctrl_regs.h.

RRAM_CTRL_WR_FIFO_SIZE_BYTES

#define RRAM_CTRL_WR_FIFO_SIZE_BYTES   4

Definition at line 896 of file rram_ctrl_regs.h.

RRAM_CTRL_WR_FIFO_SIZE_WORDS

#define RRAM_CTRL_WR_FIFO_SIZE_WORDS   1

Definition at line 895 of file rram_ctrl_regs.h.