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Software APIs
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Software APIs
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Generated register defines for racl_ctrl. More...
Go to the source code of this file.
Generated register defines for racl_ctrl.
Definition in file racl_ctrl_regs.h.
| #define RACL_CTRL_ALERT_TEST_FATAL_FAULT_BIT 0 |
Definition at line 79 of file racl_ctrl_regs.h.
| #define RACL_CTRL_ALERT_TEST_RECOV_CTRL_UPDATE_ERR_BIT 1 |
Definition at line 80 of file racl_ctrl_regs.h.
| #define RACL_CTRL_ALERT_TEST_REG_OFFSET 0xf4 |
Definition at line 77 of file racl_ctrl_regs.h.
| #define RACL_CTRL_ALERT_TEST_REG_RESVAL 0x0u |
Definition at line 78 of file racl_ctrl_regs.h.
| #define RACL_CTRL_ERROR_LOG_ADDRESS_REG_OFFSET 0xfc |
Definition at line 98 of file racl_ctrl_regs.h.
| #define RACL_CTRL_ERROR_LOG_ADDRESS_REG_RESVAL 0x0u |
Definition at line 99 of file racl_ctrl_regs.h.
| #define RACL_CTRL_ERROR_LOG_CTN_UID_FIELD ((bitfield_field32_t) { .mask = RACL_CTRL_ERROR_LOG_CTN_UID_MASK, .index = RACL_CTRL_ERROR_LOG_CTN_UID_OFFSET }) |
Definition at line 94 of file racl_ctrl_regs.h.
| #define RACL_CTRL_ERROR_LOG_CTN_UID_MASK 0x1fu |
Definition at line 92 of file racl_ctrl_regs.h.
| #define RACL_CTRL_ERROR_LOG_CTN_UID_OFFSET 7 |
Definition at line 93 of file racl_ctrl_regs.h.
| #define RACL_CTRL_ERROR_LOG_OVERFLOW_BIT 1 |
Definition at line 86 of file racl_ctrl_regs.h.
| #define RACL_CTRL_ERROR_LOG_READ_ACCESS_BIT 2 |
Definition at line 87 of file racl_ctrl_regs.h.
| #define RACL_CTRL_ERROR_LOG_REG_OFFSET 0xf8 |
Definition at line 83 of file racl_ctrl_regs.h.
| #define RACL_CTRL_ERROR_LOG_REG_RESVAL 0x0u |
Definition at line 84 of file racl_ctrl_regs.h.
| #define RACL_CTRL_ERROR_LOG_ROLE_FIELD ((bitfield_field32_t) { .mask = RACL_CTRL_ERROR_LOG_ROLE_MASK, .index = RACL_CTRL_ERROR_LOG_ROLE_OFFSET }) |
Definition at line 90 of file racl_ctrl_regs.h.
| #define RACL_CTRL_ERROR_LOG_ROLE_MASK 0xfu |
Definition at line 88 of file racl_ctrl_regs.h.
| #define RACL_CTRL_ERROR_LOG_ROLE_OFFSET 3 |
Definition at line 89 of file racl_ctrl_regs.h.
| #define RACL_CTRL_ERROR_LOG_VALID_BIT 0 |
Definition at line 85 of file racl_ctrl_regs.h.
| #define RACL_CTRL_INTR_ENABLE_IE_BIT 0 |
Definition at line 69 of file racl_ctrl_regs.h.
| #define RACL_CTRL_INTR_ENABLE_REG_OFFSET 0xec |
Definition at line 67 of file racl_ctrl_regs.h.
| #define RACL_CTRL_INTR_ENABLE_REG_RESVAL 0x0u |
Definition at line 68 of file racl_ctrl_regs.h.
| #define RACL_CTRL_INTR_STATE_RACL_ERROR_BIT 0 |
Definition at line 64 of file racl_ctrl_regs.h.
| #define RACL_CTRL_INTR_STATE_REG_OFFSET 0xe8 |
Definition at line 62 of file racl_ctrl_regs.h.
| #define RACL_CTRL_INTR_STATE_REG_RESVAL 0x0u |
Definition at line 63 of file racl_ctrl_regs.h.
| #define RACL_CTRL_INTR_TEST_RACL_ERROR_BIT 0 |
Definition at line 74 of file racl_ctrl_regs.h.
| #define RACL_CTRL_INTR_TEST_REG_OFFSET 0xf0 |
Definition at line 72 of file racl_ctrl_regs.h.
| #define RACL_CTRL_INTR_TEST_REG_RESVAL 0x0u |
Definition at line 73 of file racl_ctrl_regs.h.
| #define RACL_CTRL_PARAM_NUM_ALERTS 2 |
Definition at line 20 of file racl_ctrl_regs.h.
| #define RACL_CTRL_PARAM_REG_WIDTH 32 |
Definition at line 23 of file racl_ctrl_regs.h.
| #define RACL_CTRL_POLICY_ALL_RD_WR_SHADOWED_READ_PERM_FIELD ((bitfield_field32_t) { .mask = RACL_CTRL_POLICY_ALL_RD_WR_SHADOWED_READ_PERM_MASK, .index = RACL_CTRL_POLICY_ALL_RD_WR_SHADOWED_READ_PERM_OFFSET }) |
Definition at line 30 of file racl_ctrl_regs.h.
| #define RACL_CTRL_POLICY_ALL_RD_WR_SHADOWED_READ_PERM_MASK 0xffffu |
Definition at line 28 of file racl_ctrl_regs.h.
| #define RACL_CTRL_POLICY_ALL_RD_WR_SHADOWED_READ_PERM_OFFSET 0 |
Definition at line 29 of file racl_ctrl_regs.h.
| #define RACL_CTRL_POLICY_ALL_RD_WR_SHADOWED_REG_OFFSET 0x0 |
Definition at line 26 of file racl_ctrl_regs.h.
| #define RACL_CTRL_POLICY_ALL_RD_WR_SHADOWED_REG_RESVAL 0x70007u |
Definition at line 27 of file racl_ctrl_regs.h.
| #define RACL_CTRL_POLICY_ALL_RD_WR_SHADOWED_WRITE_PERM_FIELD ((bitfield_field32_t) { .mask = RACL_CTRL_POLICY_ALL_RD_WR_SHADOWED_WRITE_PERM_MASK, .index = RACL_CTRL_POLICY_ALL_RD_WR_SHADOWED_WRITE_PERM_OFFSET }) |
Definition at line 34 of file racl_ctrl_regs.h.
| #define RACL_CTRL_POLICY_ALL_RD_WR_SHADOWED_WRITE_PERM_MASK 0xffffu |
Definition at line 32 of file racl_ctrl_regs.h.
| #define RACL_CTRL_POLICY_ALL_RD_WR_SHADOWED_WRITE_PERM_OFFSET 16 |
Definition at line 33 of file racl_ctrl_regs.h.
| #define RACL_CTRL_POLICY_ROT_PRIVATE_SHADOWED_READ_PERM_FIELD ((bitfield_field32_t) { .mask = RACL_CTRL_POLICY_ROT_PRIVATE_SHADOWED_READ_PERM_MASK, .index = RACL_CTRL_POLICY_ROT_PRIVATE_SHADOWED_READ_PERM_OFFSET }) |
Definition at line 42 of file racl_ctrl_regs.h.
| #define RACL_CTRL_POLICY_ROT_PRIVATE_SHADOWED_READ_PERM_MASK 0xffffu |
Definition at line 40 of file racl_ctrl_regs.h.
| #define RACL_CTRL_POLICY_ROT_PRIVATE_SHADOWED_READ_PERM_OFFSET 0 |
Definition at line 41 of file racl_ctrl_regs.h.
| #define RACL_CTRL_POLICY_ROT_PRIVATE_SHADOWED_REG_OFFSET 0x8 |
Definition at line 38 of file racl_ctrl_regs.h.
| #define RACL_CTRL_POLICY_ROT_PRIVATE_SHADOWED_REG_RESVAL 0x10001u |
Definition at line 39 of file racl_ctrl_regs.h.
| #define RACL_CTRL_POLICY_ROT_PRIVATE_SHADOWED_WRITE_PERM_FIELD ((bitfield_field32_t) { .mask = RACL_CTRL_POLICY_ROT_PRIVATE_SHADOWED_WRITE_PERM_MASK, .index = RACL_CTRL_POLICY_ROT_PRIVATE_SHADOWED_WRITE_PERM_OFFSET }) |
Definition at line 46 of file racl_ctrl_regs.h.
| #define RACL_CTRL_POLICY_ROT_PRIVATE_SHADOWED_WRITE_PERM_MASK 0xffffu |
Definition at line 44 of file racl_ctrl_regs.h.
| #define RACL_CTRL_POLICY_ROT_PRIVATE_SHADOWED_WRITE_PERM_OFFSET 16 |
Definition at line 45 of file racl_ctrl_regs.h.
| #define RACL_CTRL_POLICY_SOC_ROT_SHADOWED_READ_PERM_FIELD ((bitfield_field32_t) { .mask = RACL_CTRL_POLICY_SOC_ROT_SHADOWED_READ_PERM_MASK, .index = RACL_CTRL_POLICY_SOC_ROT_SHADOWED_READ_PERM_OFFSET }) |
Definition at line 54 of file racl_ctrl_regs.h.
| #define RACL_CTRL_POLICY_SOC_ROT_SHADOWED_READ_PERM_MASK 0xffffu |
Definition at line 52 of file racl_ctrl_regs.h.
| #define RACL_CTRL_POLICY_SOC_ROT_SHADOWED_READ_PERM_OFFSET 0 |
Definition at line 53 of file racl_ctrl_regs.h.
| #define RACL_CTRL_POLICY_SOC_ROT_SHADOWED_REG_OFFSET 0x10 |
Definition at line 50 of file racl_ctrl_regs.h.
| #define RACL_CTRL_POLICY_SOC_ROT_SHADOWED_REG_RESVAL 0x50005u |
Definition at line 51 of file racl_ctrl_regs.h.
| #define RACL_CTRL_POLICY_SOC_ROT_SHADOWED_WRITE_PERM_FIELD ((bitfield_field32_t) { .mask = RACL_CTRL_POLICY_SOC_ROT_SHADOWED_WRITE_PERM_MASK, .index = RACL_CTRL_POLICY_SOC_ROT_SHADOWED_WRITE_PERM_OFFSET }) |
Definition at line 58 of file racl_ctrl_regs.h.
| #define RACL_CTRL_POLICY_SOC_ROT_SHADOWED_WRITE_PERM_MASK 0xffffu |
Definition at line 56 of file racl_ctrl_regs.h.
| #define RACL_CTRL_POLICY_SOC_ROT_SHADOWED_WRITE_PERM_OFFSET 16 |
Definition at line 57 of file racl_ctrl_regs.h.