dt_sram_ctrl.h File Reference

Device Tables (DT) for IP sram_ctrl and top englishbreakfast. More...

#include "hw/top/dt/dt_api.h"
#include <stdint.h>

Go to the source code of this file.

Macros
#define	OPENTITAN_SRAM_CTRL_HAS_INTEGRITY   1
	List of supported hardware features.
#define	OPENTITAN_SRAM_CTRL_HAS_SCRAMBLED   1
#define	OPENTITAN_SRAM_CTRL_HAS_LOCK_ON_ERROR   1
#define	OPENTITAN_SRAM_CTRL_HAS_MEMSET   1
#define	OPENTITAN_SRAM_CTRL_HAS_FETCH_ALLOW   1
#define	OPENTITAN_SRAM_CTRL_HAS_SUBWORD_ACCESS   1
#define	OPENTITAN_SRAM_CTRL_HAS_REGWEN   1

Typedefs
typedef enum dt_sram_ctrl	dt_sram_ctrl_t
	List of instances.
typedef enum dt_sram_ctrl_reg_block	dt_sram_ctrl_reg_block_t
	List of register blocks.
typedef enum dt_sram_ctrl_memory	dt_sram_ctrl_memory_t
	List of memories.
typedef enum dt_sram_ctrl_clock	dt_sram_ctrl_clock_t
	List of clock ports.
typedef enum dt_sram_ctrl_reset	dt_sram_ctrl_reset_t
	List of reset ports.

Enumerations
enum	dt_sram_ctrl {   kDtSramCtrlMain = 0 ,   kDtSramCtrlFirst = 0 ,   kDtSramCtrlCount = 1 }
	List of instances. More...
enum	dt_sram_ctrl_reg_block {   kDtSramCtrlRegBlockRegs = 0 ,   kDtSramCtrlRegBlockCount = 1 }
	List of register blocks. More...
enum	dt_sram_ctrl_memory {   kDtSramCtrlMemoryRam = 0 ,   kDtSramCtrlMemoryCount = 1 }
	List of memories. More...
enum	dt_sram_ctrl_clock {   kDtSramCtrlClockClk = 0 ,   kDtSramCtrlClockOtp = 1 ,   kDtSramCtrlClockCount = 2 }
	List of clock ports. More...
enum	dt_sram_ctrl_reset {   kDtSramCtrlResetRst = 0 ,   kDtSramCtrlResetOtp = 1 ,   kDtSramCtrlResetCount = 2 }
	List of reset ports. More...

Functions
dt_sram_ctrl_t	dt_sram_ctrl_from_instance_id (dt_instance_id_t inst_id)
	Get the sram_ctrl instance from an instance ID.
dt_instance_id_t	dt_sram_ctrl_instance_id (dt_sram_ctrl_t dt)
	Get the instance ID of an instance.
uint32_t	dt_sram_ctrl_reg_block (dt_sram_ctrl_t dt, dt_sram_ctrl_reg_block_t reg_block)
	Get the register base address of an instance.
uint32_t	dt_sram_ctrl_memory_base (dt_sram_ctrl_t dt, dt_sram_ctrl_memory_t mem)
	Get the base address of a memory.
uint32_t	dt_sram_ctrl_memory_size (dt_sram_ctrl_t dt, dt_sram_ctrl_memory_t mem)
	Get the size of a memory.
dt_clock_t	dt_sram_ctrl_clock (dt_sram_ctrl_t dt, dt_sram_ctrl_clock_t clk)
	Get the clock signal connected to a clock port of an instance.
dt_reset_t	dt_sram_ctrl_reset (dt_sram_ctrl_t dt, dt_sram_ctrl_reset_t rst)
	Get the reset signal connected to a reset port of an instance.

Detailed Description

Device Tables (DT) for IP sram_ctrl and top englishbreakfast.

This file contains the type definitions and global functions of the sram_ctrl.

Definition in file dt_sram_ctrl.h.

Macro Definition Documentation

OPENTITAN_SRAM_CTRL_HAS_FETCH_ALLOW

#define OPENTITAN_SRAM_CTRL_HAS_FETCH_ALLOW   1

Definition at line 87 of file dt_sram_ctrl.h.

OPENTITAN_SRAM_CTRL_HAS_INTEGRITY

#define OPENTITAN_SRAM_CTRL_HAS_INTEGRITY   1

List of supported hardware features.

Definition at line 83 of file dt_sram_ctrl.h.

OPENTITAN_SRAM_CTRL_HAS_LOCK_ON_ERROR

#define OPENTITAN_SRAM_CTRL_HAS_LOCK_ON_ERROR   1

Definition at line 85 of file dt_sram_ctrl.h.

OPENTITAN_SRAM_CTRL_HAS_MEMSET

#define OPENTITAN_SRAM_CTRL_HAS_MEMSET   1

Definition at line 86 of file dt_sram_ctrl.h.

OPENTITAN_SRAM_CTRL_HAS_REGWEN

#define OPENTITAN_SRAM_CTRL_HAS_REGWEN   1

Definition at line 89 of file dt_sram_ctrl.h.

OPENTITAN_SRAM_CTRL_HAS_SCRAMBLED

#define OPENTITAN_SRAM_CTRL_HAS_SCRAMBLED   1

Definition at line 84 of file dt_sram_ctrl.h.

OPENTITAN_SRAM_CTRL_HAS_SUBWORD_ACCESS

#define OPENTITAN_SRAM_CTRL_HAS_SUBWORD_ACCESS   1

Definition at line 88 of file dt_sram_ctrl.h.

Typedef Documentation

dt_sram_ctrl_clock_t

typedef enum dt_sram_ctrl_clock dt_sram_ctrl_clock_t

List of clock ports.

Clock ports are guaranteed to be numbered consecutively from 0.

dt_sram_ctrl_memory_t

typedef enum dt_sram_ctrl_memory dt_sram_ctrl_memory_t

List of memories.

Memories are guaranteed to start at 0 and to be consecutively numbered.

dt_sram_ctrl_reg_block_t

typedef enum dt_sram_ctrl_reg_block dt_sram_ctrl_reg_block_t

List of register blocks.

Register blocks are guaranteed to start at 0 and to be consecutively numbered.

dt_sram_ctrl_reset_t

typedef enum dt_sram_ctrl_reset dt_sram_ctrl_reset_t

List of reset ports.

Reset ports are guaranteed to be numbered consecutively from 0.

Enumeration Type Documentation

dt_sram_ctrl

enum dt_sram_ctrl

List of instances.

Enumerator
kDtSramCtrlMain	sram_ctrl_main

Definition at line 29 of file dt_sram_ctrl.h.

dt_sram_ctrl_clock

enum dt_sram_ctrl_clock

List of clock ports.

Clock ports are guaranteed to be numbered consecutively from 0.

Enumerator
kDtSramCtrlClockClk	Clock port clk_i.
kDtSramCtrlClockOtp	Clock port clk_otp_i.

Definition at line 63 of file dt_sram_ctrl.h.

dt_sram_ctrl_memory

enum dt_sram_ctrl_memory

List of memories.

Memories are guaranteed to start at 0 and to be consecutively numbered.

Definition at line 53 of file dt_sram_ctrl.h.

dt_sram_ctrl_reg_block

enum dt_sram_ctrl_reg_block

List of register blocks.

Register blocks are guaranteed to start at 0 and to be consecutively numbered.

Definition at line 40 of file dt_sram_ctrl.h.

dt_sram_ctrl_reset

enum dt_sram_ctrl_reset

List of reset ports.

Reset ports are guaranteed to be numbered consecutively from 0.

Enumerator
kDtSramCtrlResetRst	Reset port rst_ni.
kDtSramCtrlResetOtp	Reset port rst_otp_ni.

Definition at line 74 of file dt_sram_ctrl.h.

Function Documentation

dt_sram_ctrl_clock()

dt_clock_t dt_sram_ctrl_clock	(	dt_sram_ctrl_t	dt,
		dt_sram_ctrl_clock_t	clk )

Get the clock signal connected to a clock port of an instance.

Parameters

dt	Instance of sram_ctrl.
clk	Clock port.

Returns

Clock signal.

Definition at line 141 of file dt_sram_ctrl.c.

dt_sram_ctrl_from_instance_id()

dt_sram_ctrl_t dt_sram_ctrl_from_instance_id

(

dt_instance_id_t

inst_id

)

Get the sram_ctrl instance from an instance ID.

For example, dt_uart_from_instance_id(kDtInstanceIdUart3) == kDtUart3.

Parameters

inst_id

Instance ID.

Returns

A sram_ctrl instance.

Note: This function only makes sense if the instance ID has device type sram_ctrl, otherwise the returned value is unspecified.

Definition at line 89 of file dt_sram_ctrl.c.

dt_sram_ctrl_instance_id()

dt_instance_id_t dt_sram_ctrl_instance_id

(

dt_sram_ctrl_t

dt

)

Get the instance ID of an instance.

Parameters

dt	Instance of sram_ctrl.

Returns

The instance ID of that instance.

Definition at line 96 of file dt_sram_ctrl.c.

dt_sram_ctrl_memory_base()

uint32_t dt_sram_ctrl_memory_base	(	dt_sram_ctrl_t	dt,
		dt_sram_ctrl_memory_t	mem )

Get the base address of a memory.

Parameters

dt	Instance of sram_ctrl.
mem	The memory requested.

Returns

The base address of the requested memory.

Definition at line 108 of file dt_sram_ctrl.c.

dt_sram_ctrl_memory_size()

uint32_t dt_sram_ctrl_memory_size	(	dt_sram_ctrl_t	dt,
		dt_sram_ctrl_memory_t	mem )

Get the size of a memory.

Parameters

dt	Instance of sram_ctrl.
mem	The memory requested.

Returns

The size of the requested memory.

Definition at line 115 of file dt_sram_ctrl.c.

dt_sram_ctrl_reg_block()

uint32_t dt_sram_ctrl_reg_block	(	dt_sram_ctrl_t	dt,
		dt_sram_ctrl_reg_block_t	reg_block )

Get the register base address of an instance.

Parameters

dt	Instance of sram_ctrl.
reg_block	The register block requested.

Returns

The register base address of the requested block.

Definition at line 101 of file dt_sram_ctrl.c.

dt_sram_ctrl_reset()

dt_reset_t dt_sram_ctrl_reset	(	dt_sram_ctrl_t	dt,
		dt_sram_ctrl_reset_t	rst )

Get the reset signal connected to a reset port of an instance.

Parameters

dt	Instance of sram_ctrl.
rst	Reset port.

Returns

Reset signal.

Definition at line 148 of file dt_sram_ctrl.c.