Software APIs
isr_testutils.h
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1// Copyright lowRISC contributors (OpenTitan project).
2// Licensed under the Apache License, Version 2.0, see LICENSE for details.
3// SPDX-License-Identifier: Apache-2.0
4
5#ifndef OPENTITAN_SW_DEVICE_LIB_TESTING_AUTOGEN_ISR_TESTUTILS_H_
6#define OPENTITAN_SW_DEVICE_LIB_TESTING_AUTOGEN_ISR_TESTUTILS_H_
7
8// THIS FILE HAS BEEN GENERATED, DO NOT EDIT MANUALLY. COMMAND:
9// util/autogen_testutils.py
10
11/**
12 * @file
13 * @brief Default ISRs for each IP
14 */
15
17#include "sw/device/lib/dif/autogen/dif_alert_handler_autogen.h"
18#include "sw/device/lib/dif/autogen/dif_aon_timer_autogen.h"
20#include "sw/device/lib/dif/autogen/dif_csrng_autogen.h"
21#include "sw/device/lib/dif/autogen/dif_edn_autogen.h"
22#include "sw/device/lib/dif/autogen/dif_entropy_src_autogen.h"
23#include "sw/device/lib/dif/autogen/dif_gpio_autogen.h"
24#include "sw/device/lib/dif/autogen/dif_hmac_autogen.h"
25#include "sw/device/lib/dif/autogen/dif_i2c_autogen.h"
27#include "sw/device/lib/dif/autogen/dif_keymgr_dpe_autogen.h"
28#include "sw/device/lib/dif/autogen/dif_kmac_autogen.h"
29#include "sw/device/lib/dif/autogen/dif_otbn_autogen.h"
30#include "sw/device/lib/dif/autogen/dif_otp_ctrl_autogen.h"
31#include "sw/device/lib/dif/autogen/dif_pwrmgr_autogen.h"
33#include "sw/device/lib/dif/autogen/dif_rv_timer_autogen.h"
35#include "sw/device/lib/dif/autogen/dif_spi_device_autogen.h"
36#include "sw/device/lib/dif/autogen/dif_spi_host_autogen.h"
38#include "sw/device/lib/dif/autogen/dif_uart_autogen.h"
39#include "sw/device/lib/dif/autogen/dif_usbdev_autogen.h"
41
42#include "hw/top_earlgrey/sw/autogen/top_earlgrey.h" // Generated.
43
44/**
45 * A handle to a PLIC ISR context struct.
46 */
47typedef struct plic_isr_ctx {
48 /**
49 * A handle to a rv_plic.
50 */
52 /**
53 * The HART ID associated with the PLIC (correspond to a PLIC "target").
54 */
55 uint32_t hart_id;
57
58/**
59 * A handle to a adc_ctrl ISR context struct.
60 */
61typedef struct adc_ctrl_isr_ctx {
62 /**
63 * A handle to a adc_ctrl.
64 */
66 /**
67 * The PLIC IRQ ID where this adc_ctrl instance's IRQs start.
68 */
70 /**
71 * The adc_ctrl IRQ that is expected to be encountered in the ISR.
72 */
73 dif_adc_ctrl_irq_t expected_irq;
74 /**
75 * Whether or not a single IRQ is expected to be encountered in the ISR.
76 */
79
80/**
81 * A handle to a alert_handler ISR context struct.
82 */
83typedef struct alert_handler_isr_ctx {
84 /**
85 * A handle to a alert_handler.
86 */
88 /**
89 * The PLIC IRQ ID where this alert_handler instance's IRQs start.
90 */
92 /**
93 * The alert_handler IRQ that is expected to be encountered in the ISR.
94 */
95 dif_alert_handler_irq_t expected_irq;
96 /**
97 * Whether or not a single IRQ is expected to be encountered in the ISR.
98 */
101
102/**
103 * A handle to a aon_timer ISR context struct.
104 */
105typedef struct aon_timer_isr_ctx {
106 /**
107 * A handle to a aon_timer.
108 */
110 /**
111 * The PLIC IRQ ID where this aon_timer instance's IRQs start.
112 */
114 /**
115 * The aon_timer IRQ that is expected to be encountered in the ISR.
116 */
117 dif_aon_timer_irq_t expected_irq;
118 /**
119 * Whether or not a single IRQ is expected to be encountered in the ISR.
120 */
123
124/**
125 * A handle to a cheriot_mem_sys ISR context struct.
126 */
128 /**
129 * A handle to a cheriot_mem_sys.
130 */
132 /**
133 * The PLIC IRQ ID where this cheriot_mem_sys instance's IRQs start.
134 */
136 /**
137 * The cheriot_mem_sys IRQ that is expected to be encountered in the ISR.
138 */
139 dif_cheriot_mem_sys_irq_t expected_irq;
140 /**
141 * Whether or not a single IRQ is expected to be encountered in the ISR.
142 */
145
146/**
147 * A handle to a csrng ISR context struct.
148 */
149typedef struct csrng_isr_ctx {
150 /**
151 * A handle to a csrng.
152 */
154 /**
155 * The PLIC IRQ ID where this csrng instance's IRQs start.
156 */
158 /**
159 * The csrng IRQ that is expected to be encountered in the ISR.
160 */
161 dif_csrng_irq_t expected_irq;
162 /**
163 * Whether or not a single IRQ is expected to be encountered in the ISR.
164 */
167
168/**
169 * A handle to a edn ISR context struct.
170 */
171typedef struct edn_isr_ctx {
172 /**
173 * A handle to a edn.
174 */
176 /**
177 * The PLIC IRQ ID where this edn instance's IRQs start.
178 */
180 /**
181 * The edn IRQ that is expected to be encountered in the ISR.
182 */
183 dif_edn_irq_t expected_irq;
184 /**
185 * Whether or not a single IRQ is expected to be encountered in the ISR.
186 */
189
190/**
191 * A handle to a entropy_src ISR context struct.
192 */
193typedef struct entropy_src_isr_ctx {
194 /**
195 * A handle to a entropy_src.
196 */
198 /**
199 * The PLIC IRQ ID where this entropy_src instance's IRQs start.
200 */
202 /**
203 * The entropy_src IRQ that is expected to be encountered in the ISR.
204 */
205 dif_entropy_src_irq_t expected_irq;
206 /**
207 * Whether or not a single IRQ is expected to be encountered in the ISR.
208 */
211
212/**
213 * A handle to a gpio ISR context struct.
214 */
215typedef struct gpio_isr_ctx {
216 /**
217 * A handle to a gpio.
218 */
220 /**
221 * The PLIC IRQ ID where this gpio instance's IRQs start.
222 */
224 /**
225 * The gpio IRQ that is expected to be encountered in the ISR.
226 */
227 dif_gpio_irq_t expected_irq;
228 /**
229 * Whether or not a single IRQ is expected to be encountered in the ISR.
230 */
233
234/**
235 * A handle to a hmac ISR context struct.
236 */
237typedef struct hmac_isr_ctx {
238 /**
239 * A handle to a hmac.
240 */
242 /**
243 * The PLIC IRQ ID where this hmac instance's IRQs start.
244 */
246 /**
247 * The hmac IRQ that is expected to be encountered in the ISR.
248 */
249 dif_hmac_irq_t expected_irq;
250 /**
251 * Whether or not a single IRQ is expected to be encountered in the ISR.
252 */
255
256/**
257 * A handle to a i2c ISR context struct.
258 */
259typedef struct i2c_isr_ctx {
260 /**
261 * A handle to a i2c.
262 */
264 /**
265 * The PLIC IRQ ID where this i2c instance's IRQs start.
266 */
268 /**
269 * The i2c IRQ that is expected to be encountered in the ISR.
270 */
271 dif_i2c_irq_t expected_irq;
272 /**
273 * Whether or not a single IRQ is expected to be encountered in the ISR.
274 */
277
278/**
279 * A handle to a i3c ISR context struct.
280 */
281typedef struct i3c_isr_ctx {
282 /**
283 * A handle to a i3c.
284 */
286 /**
287 * The PLIC IRQ ID where this i3c instance's IRQs start.
288 */
290 /**
291 * The i3c IRQ that is expected to be encountered in the ISR.
292 */
293 dif_i3c_irq_t expected_irq;
294 /**
295 * Whether or not a single IRQ is expected to be encountered in the ISR.
296 */
299
300/**
301 * A handle to a keymgr_dpe ISR context struct.
302 */
303typedef struct keymgr_dpe_isr_ctx {
304 /**
305 * A handle to a keymgr_dpe.
306 */
308 /**
309 * The PLIC IRQ ID where this keymgr_dpe instance's IRQs start.
310 */
312 /**
313 * The keymgr_dpe IRQ that is expected to be encountered in the ISR.
314 */
315 dif_keymgr_dpe_irq_t expected_irq;
316 /**
317 * Whether or not a single IRQ is expected to be encountered in the ISR.
318 */
321
322/**
323 * A handle to a kmac ISR context struct.
324 */
325typedef struct kmac_isr_ctx {
326 /**
327 * A handle to a kmac.
328 */
330 /**
331 * The PLIC IRQ ID where this kmac instance's IRQs start.
332 */
334 /**
335 * The kmac IRQ that is expected to be encountered in the ISR.
336 */
337 dif_kmac_irq_t expected_irq;
338 /**
339 * Whether or not a single IRQ is expected to be encountered in the ISR.
340 */
343
344/**
345 * A handle to a otbn ISR context struct.
346 */
347typedef struct otbn_isr_ctx {
348 /**
349 * A handle to a otbn.
350 */
352 /**
353 * The PLIC IRQ ID where this otbn instance's IRQs start.
354 */
356 /**
357 * The otbn IRQ that is expected to be encountered in the ISR.
358 */
359 dif_otbn_irq_t expected_irq;
360 /**
361 * Whether or not a single IRQ is expected to be encountered in the ISR.
362 */
365
366/**
367 * A handle to a otp_ctrl ISR context struct.
368 */
369typedef struct otp_ctrl_isr_ctx {
370 /**
371 * A handle to a otp_ctrl.
372 */
374 /**
375 * The PLIC IRQ ID where this otp_ctrl instance's IRQs start.
376 */
378 /**
379 * The otp_ctrl IRQ that is expected to be encountered in the ISR.
380 */
381 dif_otp_ctrl_irq_t expected_irq;
382 /**
383 * Whether or not a single IRQ is expected to be encountered in the ISR.
384 */
387
388/**
389 * A handle to a pwrmgr ISR context struct.
390 */
391typedef struct pwrmgr_isr_ctx {
392 /**
393 * A handle to a pwrmgr.
394 */
396 /**
397 * The PLIC IRQ ID where this pwrmgr instance's IRQs start.
398 */
400 /**
401 * The pwrmgr IRQ that is expected to be encountered in the ISR.
402 */
403 dif_pwrmgr_irq_t expected_irq;
404 /**
405 * Whether or not a single IRQ is expected to be encountered in the ISR.
406 */
409
410/**
411 * A handle to a rram_ctrl ISR context struct.
412 */
413typedef struct rram_ctrl_isr_ctx {
414 /**
415 * A handle to a rram_ctrl.
416 */
418 /**
419 * The PLIC IRQ ID where this rram_ctrl instance's IRQs start.
420 */
422 /**
423 * The rram_ctrl IRQ that is expected to be encountered in the ISR.
424 */
425 dif_rram_ctrl_irq_t expected_irq;
426 /**
427 * Whether or not a single IRQ is expected to be encountered in the ISR.
428 */
431
432/**
433 * A handle to a rv_timer ISR context struct.
434 */
435typedef struct rv_timer_isr_ctx {
436 /**
437 * A handle to a rv_timer.
438 */
440 /**
441 * The PLIC IRQ ID where this rv_timer instance's IRQs start.
442 */
444 /**
445 * The rv_timer IRQ that is expected to be encountered in the ISR.
446 */
447 dif_rv_timer_irq_t expected_irq;
448 /**
449 * Whether or not a single IRQ is expected to be encountered in the ISR.
450 */
453
454/**
455 * A handle to a sensor_ctrl ISR context struct.
456 */
457typedef struct sensor_ctrl_isr_ctx {
458 /**
459 * A handle to a sensor_ctrl.
460 */
462 /**
463 * The PLIC IRQ ID where this sensor_ctrl instance's IRQs start.
464 */
466 /**
467 * The sensor_ctrl IRQ that is expected to be encountered in the ISR.
468 */
469 dif_sensor_ctrl_irq_t expected_irq;
470 /**
471 * Whether or not a single IRQ is expected to be encountered in the ISR.
472 */
475
476/**
477 * A handle to a spi_device ISR context struct.
478 */
479typedef struct spi_device_isr_ctx {
480 /**
481 * A handle to a spi_device.
482 */
484 /**
485 * The PLIC IRQ ID where this spi_device instance's IRQs start.
486 */
488 /**
489 * The spi_device IRQ that is expected to be encountered in the ISR.
490 */
491 dif_spi_device_irq_t expected_irq;
492 /**
493 * Whether or not a single IRQ is expected to be encountered in the ISR.
494 */
497
498/**
499 * A handle to a spi_host ISR context struct.
500 */
501typedef struct spi_host_isr_ctx {
502 /**
503 * A handle to a spi_host.
504 */
506 /**
507 * The PLIC IRQ ID where this spi_host instance's IRQs start.
508 */
510 /**
511 * The spi_host IRQ that is expected to be encountered in the ISR.
512 */
513 dif_spi_host_irq_t expected_irq;
514 /**
515 * Whether or not a single IRQ is expected to be encountered in the ISR.
516 */
519
520/**
521 * A handle to a sysrst_ctrl ISR context struct.
522 */
523typedef struct sysrst_ctrl_isr_ctx {
524 /**
525 * A handle to a sysrst_ctrl.
526 */
528 /**
529 * The PLIC IRQ ID where this sysrst_ctrl instance's IRQs start.
530 */
532 /**
533 * The sysrst_ctrl IRQ that is expected to be encountered in the ISR.
534 */
535 dif_sysrst_ctrl_irq_t expected_irq;
536 /**
537 * Whether or not a single IRQ is expected to be encountered in the ISR.
538 */
541
542/**
543 * A handle to a uart ISR context struct.
544 */
545typedef struct uart_isr_ctx {
546 /**
547 * A handle to a uart.
548 */
550 /**
551 * The PLIC IRQ ID where this uart instance's IRQs start.
552 */
554 /**
555 * The uart IRQ that is expected to be encountered in the ISR.
556 */
557 dif_uart_irq_t expected_irq;
558 /**
559 * Whether or not a single IRQ is expected to be encountered in the ISR.
560 */
563
564/**
565 * A handle to a usbdev ISR context struct.
566 */
567typedef struct usbdev_isr_ctx {
568 /**
569 * A handle to a usbdev.
570 */
572 /**
573 * The PLIC IRQ ID where this usbdev instance's IRQs start.
574 */
576 /**
577 * The usbdev IRQ that is expected to be encountered in the ISR.
578 */
579 dif_usbdev_irq_t expected_irq;
580 /**
581 * Whether or not a single IRQ is expected to be encountered in the ISR.
582 */
585
586/**
587 * Services an adc_ctrl IRQ.
588 *
589 * @param plic_ctx A PLIC ISR context handle.
590 * @param adc_ctrl_ctx A(n) adc_ctrl ISR context handle.
591 * @param mute_status_irq set to true to disable the serviced status type IRQ.
592 * @param[out] peripheral_serviced Out param for the peripheral that was
593 * serviced.
594 * @param[out] irq_serviced Out param for the IRQ that was serviced.
595 */
597 plic_isr_ctx_t plic_ctx, adc_ctrl_isr_ctx_t adc_ctrl_ctx,
598 bool mute_status_irq, top_earlgrey_plic_peripheral_t *peripheral_serviced,
599 dif_adc_ctrl_irq_t *irq_serviced);
600
601/**
602 * Services an alert_handler IRQ.
603 *
604 * @param plic_ctx A PLIC ISR context handle.
605 * @param alert_handler_ctx A(n) alert_handler ISR context handle.
606 * @param[out] peripheral_serviced Out param for the peripheral that was
607 * serviced.
608 * @param[out] irq_serviced Out param for the IRQ that was serviced.
609 */
611 plic_isr_ctx_t plic_ctx, alert_handler_isr_ctx_t alert_handler_ctx,
612 top_earlgrey_plic_peripheral_t *peripheral_serviced,
613 dif_alert_handler_irq_t *irq_serviced);
614
615/**
616 * Services an aon_timer IRQ.
617 *
618 * @param plic_ctx A PLIC ISR context handle.
619 * @param aon_timer_ctx A(n) aon_timer ISR context handle.
620 * @param[out] peripheral_serviced Out param for the peripheral that was
621 * serviced.
622 * @param[out] irq_serviced Out param for the IRQ that was serviced.
623 */
625 plic_isr_ctx_t plic_ctx, aon_timer_isr_ctx_t aon_timer_ctx,
626 top_earlgrey_plic_peripheral_t *peripheral_serviced,
627 dif_aon_timer_irq_t *irq_serviced);
628
629/**
630 * Services an cheriot_mem_sys IRQ.
631 *
632 * @param plic_ctx A PLIC ISR context handle.
633 * @param cheriot_mem_sys_ctx A(n) cheriot_mem_sys ISR context handle.
634 * @param[out] peripheral_serviced Out param for the peripheral that was
635 * serviced.
636 * @param[out] irq_serviced Out param for the IRQ that was serviced.
637 */
639 plic_isr_ctx_t plic_ctx, cheriot_mem_sys_isr_ctx_t cheriot_mem_sys_ctx,
640 top_earlgrey_plic_peripheral_t *peripheral_serviced,
641 dif_cheriot_mem_sys_irq_t *irq_serviced);
642
643/**
644 * Services an csrng IRQ.
645 *
646 * @param plic_ctx A PLIC ISR context handle.
647 * @param csrng_ctx A(n) csrng ISR context handle.
648 * @param[out] peripheral_serviced Out param for the peripheral that was
649 * serviced.
650 * @param[out] irq_serviced Out param for the IRQ that was serviced.
651 */
653 plic_isr_ctx_t plic_ctx, csrng_isr_ctx_t csrng_ctx,
654 top_earlgrey_plic_peripheral_t *peripheral_serviced,
655 dif_csrng_irq_t *irq_serviced);
656
657/**
658 * Services an edn IRQ.
659 *
660 * @param plic_ctx A PLIC ISR context handle.
661 * @param edn_ctx A(n) edn ISR context handle.
662 * @param[out] peripheral_serviced Out param for the peripheral that was
663 * serviced.
664 * @param[out] irq_serviced Out param for the IRQ that was serviced.
665 */
667 top_earlgrey_plic_peripheral_t *peripheral_serviced,
668 dif_edn_irq_t *irq_serviced);
669
670/**
671 * Services an entropy_src IRQ.
672 *
673 * @param plic_ctx A PLIC ISR context handle.
674 * @param entropy_src_ctx A(n) entropy_src ISR context handle.
675 * @param[out] peripheral_serviced Out param for the peripheral that was
676 * serviced.
677 * @param[out] irq_serviced Out param for the IRQ that was serviced.
678 */
680 plic_isr_ctx_t plic_ctx, entropy_src_isr_ctx_t entropy_src_ctx,
681 top_earlgrey_plic_peripheral_t *peripheral_serviced,
682 dif_entropy_src_irq_t *irq_serviced);
683
684/**
685 * Services an gpio IRQ.
686 *
687 * @param plic_ctx A PLIC ISR context handle.
688 * @param gpio_ctx A(n) gpio ISR context handle.
689 * @param[out] peripheral_serviced Out param for the peripheral that was
690 * serviced.
691 * @param[out] irq_serviced Out param for the IRQ that was serviced.
692 */
694 top_earlgrey_plic_peripheral_t *peripheral_serviced,
695 dif_gpio_irq_t *irq_serviced);
696
697/**
698 * Services an hmac IRQ.
699 *
700 * @param plic_ctx A PLIC ISR context handle.
701 * @param hmac_ctx A(n) hmac ISR context handle.
702 * @param mute_status_irq set to true to disable the serviced status type IRQ.
703 * @param[out] peripheral_serviced Out param for the peripheral that was
704 * serviced.
705 * @param[out] irq_serviced Out param for the IRQ that was serviced.
706 */
708 bool mute_status_irq,
709 top_earlgrey_plic_peripheral_t *peripheral_serviced,
710 dif_hmac_irq_t *irq_serviced);
711
712/**
713 * Services an i2c IRQ.
714 *
715 * @param plic_ctx A PLIC ISR context handle.
716 * @param i2c_ctx A(n) i2c ISR context handle.
717 * @param mute_status_irq set to true to disable the serviced status type IRQ.
718 * @param[out] peripheral_serviced Out param for the peripheral that was
719 * serviced.
720 * @param[out] irq_serviced Out param for the IRQ that was serviced.
721 */
723 bool mute_status_irq,
724 top_earlgrey_plic_peripheral_t *peripheral_serviced,
725 dif_i2c_irq_t *irq_serviced);
726
727/**
728 * Services an i3c IRQ.
729 *
730 * @param plic_ctx A PLIC ISR context handle.
731 * @param i3c_ctx A(n) i3c ISR context handle.
732 * @param mute_status_irq set to true to disable the serviced status type IRQ.
733 * @param[out] peripheral_serviced Out param for the peripheral that was
734 * serviced.
735 * @param[out] irq_serviced Out param for the IRQ that was serviced.
736 */
738 bool mute_status_irq,
739 top_earlgrey_plic_peripheral_t *peripheral_serviced,
740 dif_i3c_irq_t *irq_serviced);
741
742/**
743 * Services an keymgr_dpe IRQ.
744 *
745 * @param plic_ctx A PLIC ISR context handle.
746 * @param keymgr_dpe_ctx A(n) keymgr_dpe ISR context handle.
747 * @param[out] peripheral_serviced Out param for the peripheral that was
748 * serviced.
749 * @param[out] irq_serviced Out param for the IRQ that was serviced.
750 */
752 plic_isr_ctx_t plic_ctx, keymgr_dpe_isr_ctx_t keymgr_dpe_ctx,
753 top_earlgrey_plic_peripheral_t *peripheral_serviced,
754 dif_keymgr_dpe_irq_t *irq_serviced);
755
756/**
757 * Services an kmac IRQ.
758 *
759 * @param plic_ctx A PLIC ISR context handle.
760 * @param kmac_ctx A(n) kmac ISR context handle.
761 * @param mute_status_irq set to true to disable the serviced status type IRQ.
762 * @param[out] peripheral_serviced Out param for the peripheral that was
763 * serviced.
764 * @param[out] irq_serviced Out param for the IRQ that was serviced.
765 */
767 bool mute_status_irq,
768 top_earlgrey_plic_peripheral_t *peripheral_serviced,
769 dif_kmac_irq_t *irq_serviced);
770
771/**
772 * Services an otbn IRQ.
773 *
774 * @param plic_ctx A PLIC ISR context handle.
775 * @param otbn_ctx A(n) otbn ISR context handle.
776 * @param[out] peripheral_serviced Out param for the peripheral that was
777 * serviced.
778 * @param[out] irq_serviced Out param for the IRQ that was serviced.
779 */
781 top_earlgrey_plic_peripheral_t *peripheral_serviced,
782 dif_otbn_irq_t *irq_serviced);
783
784/**
785 * Services an otp_ctrl IRQ.
786 *
787 * @param plic_ctx A PLIC ISR context handle.
788 * @param otp_ctrl_ctx A(n) otp_ctrl ISR context handle.
789 * @param[out] peripheral_serviced Out param for the peripheral that was
790 * serviced.
791 * @param[out] irq_serviced Out param for the IRQ that was serviced.
792 */
794 plic_isr_ctx_t plic_ctx, otp_ctrl_isr_ctx_t otp_ctrl_ctx,
795 top_earlgrey_plic_peripheral_t *peripheral_serviced,
796 dif_otp_ctrl_irq_t *irq_serviced);
797
798/**
799 * Services an pwrmgr IRQ.
800 *
801 * @param plic_ctx A PLIC ISR context handle.
802 * @param pwrmgr_ctx A(n) pwrmgr ISR context handle.
803 * @param[out] peripheral_serviced Out param for the peripheral that was
804 * serviced.
805 * @param[out] irq_serviced Out param for the IRQ that was serviced.
806 */
808 plic_isr_ctx_t plic_ctx, pwrmgr_isr_ctx_t pwrmgr_ctx,
809 top_earlgrey_plic_peripheral_t *peripheral_serviced,
810 dif_pwrmgr_irq_t *irq_serviced);
811
812/**
813 * Services an rram_ctrl IRQ.
814 *
815 * @param plic_ctx A PLIC ISR context handle.
816 * @param rram_ctrl_ctx A(n) rram_ctrl ISR context handle.
817 * @param mute_status_irq set to true to disable the serviced status type IRQ.
818 * @param[out] peripheral_serviced Out param for the peripheral that was
819 * serviced.
820 * @param[out] irq_serviced Out param for the IRQ that was serviced.
821 */
823 plic_isr_ctx_t plic_ctx, rram_ctrl_isr_ctx_t rram_ctrl_ctx,
824 bool mute_status_irq, top_earlgrey_plic_peripheral_t *peripheral_serviced,
825 dif_rram_ctrl_irq_t *irq_serviced);
826
827/**
828 * Services an rv_timer IRQ.
829 *
830 * @param plic_ctx A PLIC ISR context handle.
831 * @param rv_timer_ctx A(n) rv_timer ISR context handle.
832 * @param[out] peripheral_serviced Out param for the peripheral that was
833 * serviced.
834 * @param[out] irq_serviced Out param for the IRQ that was serviced.
835 */
837 plic_isr_ctx_t plic_ctx, rv_timer_isr_ctx_t rv_timer_ctx,
838 top_earlgrey_plic_peripheral_t *peripheral_serviced,
839 dif_rv_timer_irq_t *irq_serviced);
840
841/**
842 * Services an sensor_ctrl IRQ.
843 *
844 * @param plic_ctx A PLIC ISR context handle.
845 * @param sensor_ctrl_ctx A(n) sensor_ctrl ISR context handle.
846 * @param[out] peripheral_serviced Out param for the peripheral that was
847 * serviced.
848 * @param[out] irq_serviced Out param for the IRQ that was serviced.
849 */
851 plic_isr_ctx_t plic_ctx, sensor_ctrl_isr_ctx_t sensor_ctrl_ctx,
852 top_earlgrey_plic_peripheral_t *peripheral_serviced,
853 dif_sensor_ctrl_irq_t *irq_serviced);
854
855/**
856 * Services an spi_device IRQ.
857 *
858 * @param plic_ctx A PLIC ISR context handle.
859 * @param spi_device_ctx A(n) spi_device ISR context handle.
860 * @param mute_status_irq set to true to disable the serviced status type IRQ.
861 * @param[out] peripheral_serviced Out param for the peripheral that was
862 * serviced.
863 * @param[out] irq_serviced Out param for the IRQ that was serviced.
864 */
866 plic_isr_ctx_t plic_ctx, spi_device_isr_ctx_t spi_device_ctx,
867 bool mute_status_irq, top_earlgrey_plic_peripheral_t *peripheral_serviced,
868 dif_spi_device_irq_t *irq_serviced);
869
870/**
871 * Services an spi_host IRQ.
872 *
873 * @param plic_ctx A PLIC ISR context handle.
874 * @param spi_host_ctx A(n) spi_host ISR context handle.
875 * @param mute_status_irq set to true to disable the serviced status type IRQ.
876 * @param[out] peripheral_serviced Out param for the peripheral that was
877 * serviced.
878 * @param[out] irq_serviced Out param for the IRQ that was serviced.
879 */
881 plic_isr_ctx_t plic_ctx, spi_host_isr_ctx_t spi_host_ctx,
882 bool mute_status_irq, top_earlgrey_plic_peripheral_t *peripheral_serviced,
883 dif_spi_host_irq_t *irq_serviced);
884
885/**
886 * Services an sysrst_ctrl IRQ.
887 *
888 * @param plic_ctx A PLIC ISR context handle.
889 * @param sysrst_ctrl_ctx A(n) sysrst_ctrl ISR context handle.
890 * @param mute_status_irq set to true to disable the serviced status type IRQ.
891 * @param[out] peripheral_serviced Out param for the peripheral that was
892 * serviced.
893 * @param[out] irq_serviced Out param for the IRQ that was serviced.
894 */
896 plic_isr_ctx_t plic_ctx, sysrst_ctrl_isr_ctx_t sysrst_ctrl_ctx,
897 bool mute_status_irq, top_earlgrey_plic_peripheral_t *peripheral_serviced,
898 dif_sysrst_ctrl_irq_t *irq_serviced);
899
900/**
901 * Services an uart IRQ.
902 *
903 * @param plic_ctx A PLIC ISR context handle.
904 * @param uart_ctx A(n) uart ISR context handle.
905 * @param mute_status_irq set to true to disable the serviced status type IRQ.
906 * @param[out] peripheral_serviced Out param for the peripheral that was
907 * serviced.
908 * @param[out] irq_serviced Out param for the IRQ that was serviced.
909 */
911 bool mute_status_irq,
912 top_earlgrey_plic_peripheral_t *peripheral_serviced,
913 dif_uart_irq_t *irq_serviced);
914
915/**
916 * Services an usbdev IRQ.
917 *
918 * @param plic_ctx A PLIC ISR context handle.
919 * @param usbdev_ctx A(n) usbdev ISR context handle.
920 * @param mute_status_irq set to true to disable the serviced status type IRQ.
921 * @param[out] peripheral_serviced Out param for the peripheral that was
922 * serviced.
923 * @param[out] irq_serviced Out param for the IRQ that was serviced.
924 */
926 plic_isr_ctx_t plic_ctx, usbdev_isr_ctx_t usbdev_ctx, bool mute_status_irq,
927 top_earlgrey_plic_peripheral_t *peripheral_serviced,
928 dif_usbdev_irq_t *irq_serviced);
929
930#endif // OPENTITAN_SW_DEVICE_LIB_TESTING_AUTOGEN_ISR_TESTUTILS_H_