 |
Software APIs
|
|
Software APIs
|
Generated register defines for sram_ctrl. More...
Go to the source code of this file.
Generated register defines for sram_ctrl.
Definition in file sram_ctrl_regs.h.
| #define SRAM_CTRL_ALERT_TEST_FATAL_ERROR_BIT 0 |
Definition at line 28 of file sram_ctrl_regs.h.
| #define SRAM_CTRL_ALERT_TEST_REG_OFFSET 0x0 |
Definition at line 26 of file sram_ctrl_regs.h.
| #define SRAM_CTRL_ALERT_TEST_REG_RESVAL 0x0u |
Definition at line 27 of file sram_ctrl_regs.h.
| #define SRAM_CTRL_CTRL_INIT_BIT 1 |
Definition at line 64 of file sram_ctrl_regs.h.
| #define SRAM_CTRL_CTRL_REG_OFFSET 0x14 |
Definition at line 61 of file sram_ctrl_regs.h.
| #define SRAM_CTRL_CTRL_REG_RESVAL 0x0u |
Definition at line 62 of file sram_ctrl_regs.h.
| #define SRAM_CTRL_CTRL_REGWEN_CTRL_REGWEN_BIT 0 |
Definition at line 58 of file sram_ctrl_regs.h.
| #define SRAM_CTRL_CTRL_REGWEN_REG_OFFSET 0x10 |
Definition at line 56 of file sram_ctrl_regs.h.
| #define SRAM_CTRL_CTRL_REGWEN_REG_RESVAL 0x1u |
Definition at line 57 of file sram_ctrl_regs.h.
| #define SRAM_CTRL_CTRL_RENEW_SCR_KEY_BIT 0 |
Definition at line 63 of file sram_ctrl_regs.h.
| #define SRAM_CTRL_EXEC_EN_FIELD ((bitfield_field32_t) { .mask = SRAM_CTRL_EXEC_EN_MASK, .index = SRAM_CTRL_EXEC_EN_OFFSET }) |
Definition at line 52 of file sram_ctrl_regs.h.
| #define SRAM_CTRL_EXEC_EN_MASK 0xfu |
Definition at line 50 of file sram_ctrl_regs.h.
| #define SRAM_CTRL_EXEC_EN_OFFSET 0 |
Definition at line 51 of file sram_ctrl_regs.h.
| #define SRAM_CTRL_EXEC_REG_OFFSET 0xc |
Definition at line 48 of file sram_ctrl_regs.h.
| #define SRAM_CTRL_EXEC_REG_RESVAL 0x9u |
Definition at line 49 of file sram_ctrl_regs.h.
| #define SRAM_CTRL_EXEC_REGWEN_EXEC_REGWEN_BIT 0 |
Definition at line 45 of file sram_ctrl_regs.h.
| #define SRAM_CTRL_EXEC_REGWEN_REG_OFFSET 0x8 |
Definition at line 43 of file sram_ctrl_regs.h.
| #define SRAM_CTRL_EXEC_REGWEN_REG_RESVAL 0x1u |
Definition at line 44 of file sram_ctrl_regs.h.
| #define SRAM_CTRL_PARAM_NUM_ALERTS 1 |
Definition at line 20 of file sram_ctrl_regs.h.
| #define SRAM_CTRL_PARAM_REG_WIDTH 32 |
Definition at line 23 of file sram_ctrl_regs.h.
| #define SRAM_CTRL_READBACK_EN_FIELD ((bitfield_field32_t) { .mask = SRAM_CTRL_READBACK_EN_MASK, .index = SRAM_CTRL_READBACK_EN_OFFSET }) |
Definition at line 84 of file sram_ctrl_regs.h.
| #define SRAM_CTRL_READBACK_EN_MASK 0xfu |
Definition at line 82 of file sram_ctrl_regs.h.
| #define SRAM_CTRL_READBACK_EN_OFFSET 0 |
Definition at line 83 of file sram_ctrl_regs.h.
| #define SRAM_CTRL_READBACK_REG_OFFSET 0x20 |
Definition at line 80 of file sram_ctrl_regs.h.
| #define SRAM_CTRL_READBACK_REG_RESVAL 0x9u |
Definition at line 81 of file sram_ctrl_regs.h.
| #define SRAM_CTRL_READBACK_REGWEN_READBACK_REGWEN_BIT 0 |
Definition at line 77 of file sram_ctrl_regs.h.
| #define SRAM_CTRL_READBACK_REGWEN_REG_OFFSET 0x1c |
Definition at line 75 of file sram_ctrl_regs.h.
| #define SRAM_CTRL_READBACK_REGWEN_REG_RESVAL 0x1u |
Definition at line 76 of file sram_ctrl_regs.h.
| #define SRAM_CTRL_SCR_KEY_ROTATED_REG_OFFSET 0x18 |
Definition at line 67 of file sram_ctrl_regs.h.
| #define SRAM_CTRL_SCR_KEY_ROTATED_REG_RESVAL 0x9u |
Definition at line 68 of file sram_ctrl_regs.h.
| #define SRAM_CTRL_SCR_KEY_ROTATED_SUCCESS_FIELD ((bitfield_field32_t) { .mask = SRAM_CTRL_SCR_KEY_ROTATED_SUCCESS_MASK, .index = SRAM_CTRL_SCR_KEY_ROTATED_SUCCESS_OFFSET }) |
Definition at line 71 of file sram_ctrl_regs.h.
| #define SRAM_CTRL_SCR_KEY_ROTATED_SUCCESS_MASK 0xfu |
Definition at line 69 of file sram_ctrl_regs.h.
| #define SRAM_CTRL_SCR_KEY_ROTATED_SUCCESS_OFFSET 0 |
Definition at line 70 of file sram_ctrl_regs.h.
| #define SRAM_CTRL_STATUS_BUS_INTEG_ERROR_BIT 0 |
Definition at line 33 of file sram_ctrl_regs.h.
| #define SRAM_CTRL_STATUS_ESCALATED_BIT 2 |
Definition at line 35 of file sram_ctrl_regs.h.
| #define SRAM_CTRL_STATUS_INIT_DONE_BIT 5 |
Definition at line 38 of file sram_ctrl_regs.h.
| #define SRAM_CTRL_STATUS_INIT_ERROR_BIT 1 |
Definition at line 34 of file sram_ctrl_regs.h.
| #define SRAM_CTRL_STATUS_READBACK_ERROR_BIT 6 |
Definition at line 39 of file sram_ctrl_regs.h.
| #define SRAM_CTRL_STATUS_REG_OFFSET 0x4 |
Definition at line 31 of file sram_ctrl_regs.h.
| #define SRAM_CTRL_STATUS_REG_RESVAL 0x0u |
Definition at line 32 of file sram_ctrl_regs.h.
| #define SRAM_CTRL_STATUS_SCR_KEY_SEED_VALID_BIT 4 |
Definition at line 37 of file sram_ctrl_regs.h.
| #define SRAM_CTRL_STATUS_SCR_KEY_VALID_BIT 3 |
Definition at line 36 of file sram_ctrl_regs.h.
| #define SRAM_CTRL_STATUS_SRAM_ALERT_BIT 7 |
Definition at line 40 of file sram_ctrl_regs.h.