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Software APIs
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Software APIs
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Generated register defines for i2c. More...
Go to the source code of this file.
Generated register defines for i2c.
Definition in file i2c_regs.h.
| #define I2C_ACQ_FIFO_NEXT_DATA_ACQ_FIFO_NEXT_DATA_FIELD ((bitfield_field32_t) { .mask = I2C_ACQ_FIFO_NEXT_DATA_ACQ_FIFO_NEXT_DATA_MASK, .index = I2C_ACQ_FIFO_NEXT_DATA_ACQ_FIFO_NEXT_DATA_OFFSET }) |
Definition at line 397 of file i2c_regs.h.
| #define I2C_ACQ_FIFO_NEXT_DATA_ACQ_FIFO_NEXT_DATA_MASK 0xffu |
Definition at line 395 of file i2c_regs.h.
| #define I2C_ACQ_FIFO_NEXT_DATA_ACQ_FIFO_NEXT_DATA_OFFSET 0 |
Definition at line 396 of file i2c_regs.h.
| #define I2C_ACQ_FIFO_NEXT_DATA_REG_OFFSET 0x70 |
Definition at line 393 of file i2c_regs.h.
| #define I2C_ACQ_FIFO_NEXT_DATA_REG_RESVAL 0x0u |
Definition at line 394 of file i2c_regs.h.
| #define I2C_ACQDATA_ABYTE_FIELD ((bitfield_field32_t) { .mask = I2C_ACQDATA_ABYTE_MASK, .index = I2C_ACQDATA_ABYTE_OFFSET }) |
Definition at line 334 of file i2c_regs.h.
| #define I2C_ACQDATA_ABYTE_MASK 0xffu |
Definition at line 332 of file i2c_regs.h.
| #define I2C_ACQDATA_ABYTE_OFFSET 0 |
Definition at line 333 of file i2c_regs.h.
| #define I2C_ACQDATA_REG_OFFSET 0x58 |
Definition at line 330 of file i2c_regs.h.
| #define I2C_ACQDATA_REG_RESVAL 0x0u |
Definition at line 331 of file i2c_regs.h.
| #define I2C_ACQDATA_SIGNAL_FIELD ((bitfield_field32_t) { .mask = I2C_ACQDATA_SIGNAL_MASK, .index = I2C_ACQDATA_SIGNAL_OFFSET }) |
Definition at line 338 of file i2c_regs.h.
| #define I2C_ACQDATA_SIGNAL_MASK 0x7u |
Definition at line 336 of file i2c_regs.h.
| #define I2C_ACQDATA_SIGNAL_OFFSET 8 |
Definition at line 337 of file i2c_regs.h.
| #define I2C_ACQDATA_SIGNAL_VALUE_NACK 0x4 |
Definition at line 344 of file i2c_regs.h.
| #define I2C_ACQDATA_SIGNAL_VALUE_NACK_START 0x5 |
Definition at line 345 of file i2c_regs.h.
| #define I2C_ACQDATA_SIGNAL_VALUE_NACK_STOP 0x6 |
Definition at line 346 of file i2c_regs.h.
| #define I2C_ACQDATA_SIGNAL_VALUE_NONE 0x0 |
Definition at line 340 of file i2c_regs.h.
| #define I2C_ACQDATA_SIGNAL_VALUE_RESTART 0x3 |
Definition at line 343 of file i2c_regs.h.
| #define I2C_ACQDATA_SIGNAL_VALUE_START 0x1 |
Definition at line 341 of file i2c_regs.h.
| #define I2C_ACQDATA_SIGNAL_VALUE_STOP 0x2 |
Definition at line 342 of file i2c_regs.h.
| #define I2C_ALERT_TEST_FATAL_FAULT_BIT 0 |
Definition at line 108 of file i2c_regs.h.
| #define I2C_ALERT_TEST_REG_OFFSET 0xc |
Definition at line 106 of file i2c_regs.h.
| #define I2C_ALERT_TEST_REG_RESVAL 0x0u |
Definition at line 107 of file i2c_regs.h.
| #define I2C_CONTROLLER_EVENTS_ARBITRATION_LOST_BIT 3 |
Definition at line 416 of file i2c_regs.h.
| #define I2C_CONTROLLER_EVENTS_BUS_TIMEOUT_BIT 2 |
Definition at line 415 of file i2c_regs.h.
| #define I2C_CONTROLLER_EVENTS_NACK_BIT 0 |
Definition at line 413 of file i2c_regs.h.
| #define I2C_CONTROLLER_EVENTS_REG_OFFSET 0x78 |
Definition at line 411 of file i2c_regs.h.
| #define I2C_CONTROLLER_EVENTS_REG_RESVAL 0x0u |
Definition at line 412 of file i2c_regs.h.
| #define I2C_CONTROLLER_EVENTS_UNHANDLED_NACK_TIMEOUT_BIT 1 |
Definition at line 414 of file i2c_regs.h.
| #define I2C_CTRL_ACK_CTRL_EN_BIT 4 |
Definition at line 117 of file i2c_regs.h.
| #define I2C_CTRL_ENABLEHOST_BIT 0 |
Definition at line 113 of file i2c_regs.h.
| #define I2C_CTRL_ENABLETARGET_BIT 1 |
Definition at line 114 of file i2c_regs.h.
| #define I2C_CTRL_LLPBK_BIT 2 |
Definition at line 115 of file i2c_regs.h.
| #define I2C_CTRL_MULTI_CONTROLLER_MONITOR_EN_BIT 5 |
Definition at line 118 of file i2c_regs.h.
| #define I2C_CTRL_NACK_ADDR_AFTER_TIMEOUT_BIT 3 |
Definition at line 116 of file i2c_regs.h.
| #define I2C_CTRL_REG_OFFSET 0x10 |
Definition at line 111 of file i2c_regs.h.
| #define I2C_CTRL_REG_RESVAL 0x0u |
Definition at line 112 of file i2c_regs.h.
| #define I2C_CTRL_TX_STRETCH_CTRL_EN_BIT 6 |
Definition at line 119 of file i2c_regs.h.
| #define I2C_FDATA_FBYTE_FIELD ((bitfield_field32_t) { .mask = I2C_FDATA_FBYTE_MASK, .index = I2C_FDATA_FBYTE_OFFSET }) |
Definition at line 149 of file i2c_regs.h.
| #define I2C_FDATA_FBYTE_MASK 0xffu |
Definition at line 147 of file i2c_regs.h.
| #define I2C_FDATA_FBYTE_OFFSET 0 |
Definition at line 148 of file i2c_regs.h.
| #define I2C_FDATA_NAKOK_BIT 12 |
Definition at line 155 of file i2c_regs.h.
| #define I2C_FDATA_RCONT_BIT 11 |
Definition at line 154 of file i2c_regs.h.
| #define I2C_FDATA_READB_BIT 10 |
Definition at line 153 of file i2c_regs.h.
| #define I2C_FDATA_REG_OFFSET 0x1c |
Definition at line 145 of file i2c_regs.h.
| #define I2C_FDATA_REG_RESVAL 0x0u |
Definition at line 146 of file i2c_regs.h.
| #define I2C_FDATA_START_BIT 8 |
Definition at line 151 of file i2c_regs.h.
| #define I2C_FDATA_STOP_BIT 9 |
Definition at line 152 of file i2c_regs.h.
| #define I2C_FIFO_CTRL_ACQRST_BIT 7 |
Definition at line 162 of file i2c_regs.h.
| #define I2C_FIFO_CTRL_FMTRST_BIT 1 |
Definition at line 161 of file i2c_regs.h.
| #define I2C_FIFO_CTRL_REG_OFFSET 0x20 |
Definition at line 158 of file i2c_regs.h.
| #define I2C_FIFO_CTRL_REG_RESVAL 0x0u |
Definition at line 159 of file i2c_regs.h.
| #define I2C_FIFO_CTRL_RXRST_BIT 0 |
Definition at line 160 of file i2c_regs.h.
| #define I2C_FIFO_CTRL_TXRST_BIT 8 |
Definition at line 163 of file i2c_regs.h.
| #define I2C_HOST_FIFO_CONFIG_FMT_THRESH_FIELD ((bitfield_field32_t) { .mask = I2C_HOST_FIFO_CONFIG_FMT_THRESH_MASK, .index = I2C_HOST_FIFO_CONFIG_FMT_THRESH_OFFSET }) |
Definition at line 174 of file i2c_regs.h.
| #define I2C_HOST_FIFO_CONFIG_FMT_THRESH_MASK 0xfffu |
Definition at line 172 of file i2c_regs.h.
| #define I2C_HOST_FIFO_CONFIG_FMT_THRESH_OFFSET 16 |
Definition at line 173 of file i2c_regs.h.
| #define I2C_HOST_FIFO_CONFIG_REG_OFFSET 0x24 |
Definition at line 166 of file i2c_regs.h.
| #define I2C_HOST_FIFO_CONFIG_REG_RESVAL 0x0u |
Definition at line 167 of file i2c_regs.h.
| #define I2C_HOST_FIFO_CONFIG_RX_THRESH_FIELD ((bitfield_field32_t) { .mask = I2C_HOST_FIFO_CONFIG_RX_THRESH_MASK, .index = I2C_HOST_FIFO_CONFIG_RX_THRESH_OFFSET }) |
Definition at line 170 of file i2c_regs.h.
| #define I2C_HOST_FIFO_CONFIG_RX_THRESH_MASK 0xfffu |
Definition at line 168 of file i2c_regs.h.
| #define I2C_HOST_FIFO_CONFIG_RX_THRESH_OFFSET 0 |
Definition at line 169 of file i2c_regs.h.
| #define I2C_HOST_FIFO_STATUS_FMTLVL_FIELD ((bitfield_field32_t) { .mask = I2C_HOST_FIFO_STATUS_FMTLVL_MASK, .index = I2C_HOST_FIFO_STATUS_FMTLVL_OFFSET }) |
Definition at line 194 of file i2c_regs.h.
| #define I2C_HOST_FIFO_STATUS_FMTLVL_MASK 0xfffu |
Definition at line 192 of file i2c_regs.h.
| #define I2C_HOST_FIFO_STATUS_FMTLVL_OFFSET 0 |
Definition at line 193 of file i2c_regs.h.
| #define I2C_HOST_FIFO_STATUS_REG_OFFSET 0x2c |
Definition at line 190 of file i2c_regs.h.
| #define I2C_HOST_FIFO_STATUS_REG_RESVAL 0x0u |
Definition at line 191 of file i2c_regs.h.
| #define I2C_HOST_FIFO_STATUS_RXLVL_FIELD ((bitfield_field32_t) { .mask = I2C_HOST_FIFO_STATUS_RXLVL_MASK, .index = I2C_HOST_FIFO_STATUS_RXLVL_OFFSET }) |
Definition at line 198 of file i2c_regs.h.
| #define I2C_HOST_FIFO_STATUS_RXLVL_MASK 0xfffu |
Definition at line 196 of file i2c_regs.h.
| #define I2C_HOST_FIFO_STATUS_RXLVL_OFFSET 16 |
Definition at line 197 of file i2c_regs.h.
| #define I2C_HOST_NACK_HANDLER_TIMEOUT_EN_BIT 31 |
Definition at line 408 of file i2c_regs.h.
| #define I2C_HOST_NACK_HANDLER_TIMEOUT_REG_OFFSET 0x74 |
Definition at line 402 of file i2c_regs.h.
| #define I2C_HOST_NACK_HANDLER_TIMEOUT_REG_RESVAL 0x0u |
Definition at line 403 of file i2c_regs.h.
| #define I2C_HOST_NACK_HANDLER_TIMEOUT_VAL_FIELD ((bitfield_field32_t) { .mask = I2C_HOST_NACK_HANDLER_TIMEOUT_VAL_MASK, .index = I2C_HOST_NACK_HANDLER_TIMEOUT_VAL_OFFSET }) |
Definition at line 406 of file i2c_regs.h.
| #define I2C_HOST_NACK_HANDLER_TIMEOUT_VAL_MASK 0x7fffffffu |
Definition at line 404 of file i2c_regs.h.
| #define I2C_HOST_NACK_HANDLER_TIMEOUT_VAL_OFFSET 0 |
Definition at line 405 of file i2c_regs.h.
| #define I2C_HOST_TIMEOUT_CTRL_HOST_TIMEOUT_CTRL_FIELD ((bitfield_field32_t) { .mask = I2C_HOST_TIMEOUT_CTRL_HOST_TIMEOUT_CTRL_MASK, .index = I2C_HOST_TIMEOUT_CTRL_HOST_TIMEOUT_CTRL_OFFSET }) |
Definition at line 362 of file i2c_regs.h.
| #define I2C_HOST_TIMEOUT_CTRL_HOST_TIMEOUT_CTRL_MASK 0xfffffu |
Definition at line 360 of file i2c_regs.h.
| #define I2C_HOST_TIMEOUT_CTRL_HOST_TIMEOUT_CTRL_OFFSET 0 |
Definition at line 361 of file i2c_regs.h.
| #define I2C_HOST_TIMEOUT_CTRL_REG_OFFSET 0x60 |
Definition at line 358 of file i2c_regs.h.
| #define I2C_HOST_TIMEOUT_CTRL_REG_RESVAL 0x0u |
Definition at line 359 of file i2c_regs.h.
| #define I2C_INTR_COMMON_ACQ_STRETCH_BIT 12 |
Definition at line 44 of file i2c_regs.h.
| #define I2C_INTR_COMMON_ACQ_THRESHOLD_BIT 2 |
Definition at line 34 of file i2c_regs.h.
| #define I2C_INTR_COMMON_CMD_COMPLETE_BIT 9 |
Definition at line 41 of file i2c_regs.h.
| #define I2C_INTR_COMMON_CONTROLLER_HALT_BIT 4 |
Definition at line 36 of file i2c_regs.h.
| #define I2C_INTR_COMMON_FMT_THRESHOLD_BIT 0 |
Definition at line 32 of file i2c_regs.h.
| #define I2C_INTR_COMMON_HOST_TIMEOUT_BIT 14 |
Definition at line 46 of file i2c_regs.h.
| #define I2C_INTR_COMMON_RX_OVERFLOW_BIT 3 |
Definition at line 35 of file i2c_regs.h.
| #define I2C_INTR_COMMON_RX_THRESHOLD_BIT 1 |
Definition at line 33 of file i2c_regs.h.
| #define I2C_INTR_COMMON_SCL_INTERFERENCE_BIT 5 |
Definition at line 37 of file i2c_regs.h.
| #define I2C_INTR_COMMON_SDA_INTERFERENCE_BIT 6 |
Definition at line 38 of file i2c_regs.h.
| #define I2C_INTR_COMMON_SDA_UNSTABLE_BIT 8 |
Definition at line 40 of file i2c_regs.h.
| #define I2C_INTR_COMMON_STRETCH_TIMEOUT_BIT 7 |
Definition at line 39 of file i2c_regs.h.
| #define I2C_INTR_COMMON_TX_STRETCH_BIT 10 |
Definition at line 42 of file i2c_regs.h.
| #define I2C_INTR_COMMON_TX_THRESHOLD_BIT 11 |
Definition at line 43 of file i2c_regs.h.
| #define I2C_INTR_COMMON_UNEXP_STOP_BIT 13 |
Definition at line 45 of file i2c_regs.h.
| #define I2C_INTR_ENABLE_ACQ_STRETCH_BIT 12 |
Definition at line 82 of file i2c_regs.h.
| #define I2C_INTR_ENABLE_ACQ_THRESHOLD_BIT 2 |
Definition at line 72 of file i2c_regs.h.
| #define I2C_INTR_ENABLE_CMD_COMPLETE_BIT 9 |
Definition at line 79 of file i2c_regs.h.
| #define I2C_INTR_ENABLE_CONTROLLER_HALT_BIT 4 |
Definition at line 74 of file i2c_regs.h.
| #define I2C_INTR_ENABLE_FMT_THRESHOLD_BIT 0 |
Definition at line 70 of file i2c_regs.h.
| #define I2C_INTR_ENABLE_HOST_TIMEOUT_BIT 14 |
Definition at line 84 of file i2c_regs.h.
| #define I2C_INTR_ENABLE_REG_OFFSET 0x4 |
Definition at line 68 of file i2c_regs.h.
| #define I2C_INTR_ENABLE_REG_RESVAL 0x0u |
Definition at line 69 of file i2c_regs.h.
| #define I2C_INTR_ENABLE_RX_OVERFLOW_BIT 3 |
Definition at line 73 of file i2c_regs.h.
| #define I2C_INTR_ENABLE_RX_THRESHOLD_BIT 1 |
Definition at line 71 of file i2c_regs.h.
| #define I2C_INTR_ENABLE_SCL_INTERFERENCE_BIT 5 |
Definition at line 75 of file i2c_regs.h.
| #define I2C_INTR_ENABLE_SDA_INTERFERENCE_BIT 6 |
Definition at line 76 of file i2c_regs.h.
| #define I2C_INTR_ENABLE_SDA_UNSTABLE_BIT 8 |
Definition at line 78 of file i2c_regs.h.
| #define I2C_INTR_ENABLE_STRETCH_TIMEOUT_BIT 7 |
Definition at line 77 of file i2c_regs.h.
| #define I2C_INTR_ENABLE_TX_STRETCH_BIT 10 |
Definition at line 80 of file i2c_regs.h.
| #define I2C_INTR_ENABLE_TX_THRESHOLD_BIT 11 |
Definition at line 81 of file i2c_regs.h.
| #define I2C_INTR_ENABLE_UNEXP_STOP_BIT 13 |
Definition at line 83 of file i2c_regs.h.
| #define I2C_INTR_STATE_ACQ_STRETCH_BIT 12 |
Definition at line 63 of file i2c_regs.h.
| #define I2C_INTR_STATE_ACQ_THRESHOLD_BIT 2 |
Definition at line 53 of file i2c_regs.h.
| #define I2C_INTR_STATE_CMD_COMPLETE_BIT 9 |
Definition at line 60 of file i2c_regs.h.
| #define I2C_INTR_STATE_CONTROLLER_HALT_BIT 4 |
Definition at line 55 of file i2c_regs.h.
| #define I2C_INTR_STATE_FMT_THRESHOLD_BIT 0 |
Definition at line 51 of file i2c_regs.h.
| #define I2C_INTR_STATE_HOST_TIMEOUT_BIT 14 |
Definition at line 65 of file i2c_regs.h.
| #define I2C_INTR_STATE_REG_OFFSET 0x0 |
Definition at line 49 of file i2c_regs.h.
| #define I2C_INTR_STATE_REG_RESVAL 0x0u |
Definition at line 50 of file i2c_regs.h.
| #define I2C_INTR_STATE_RX_OVERFLOW_BIT 3 |
Definition at line 54 of file i2c_regs.h.
| #define I2C_INTR_STATE_RX_THRESHOLD_BIT 1 |
Definition at line 52 of file i2c_regs.h.
| #define I2C_INTR_STATE_SCL_INTERFERENCE_BIT 5 |
Definition at line 56 of file i2c_regs.h.
| #define I2C_INTR_STATE_SDA_INTERFERENCE_BIT 6 |
Definition at line 57 of file i2c_regs.h.
| #define I2C_INTR_STATE_SDA_UNSTABLE_BIT 8 |
Definition at line 59 of file i2c_regs.h.
| #define I2C_INTR_STATE_STRETCH_TIMEOUT_BIT 7 |
Definition at line 58 of file i2c_regs.h.
| #define I2C_INTR_STATE_TX_STRETCH_BIT 10 |
Definition at line 61 of file i2c_regs.h.
| #define I2C_INTR_STATE_TX_THRESHOLD_BIT 11 |
Definition at line 62 of file i2c_regs.h.
| #define I2C_INTR_STATE_UNEXP_STOP_BIT 13 |
Definition at line 64 of file i2c_regs.h.
| #define I2C_INTR_TEST_ACQ_STRETCH_BIT 12 |
Definition at line 101 of file i2c_regs.h.
| #define I2C_INTR_TEST_ACQ_THRESHOLD_BIT 2 |
Definition at line 91 of file i2c_regs.h.
| #define I2C_INTR_TEST_CMD_COMPLETE_BIT 9 |
Definition at line 98 of file i2c_regs.h.
| #define I2C_INTR_TEST_CONTROLLER_HALT_BIT 4 |
Definition at line 93 of file i2c_regs.h.
| #define I2C_INTR_TEST_FMT_THRESHOLD_BIT 0 |
Definition at line 89 of file i2c_regs.h.
| #define I2C_INTR_TEST_HOST_TIMEOUT_BIT 14 |
Definition at line 103 of file i2c_regs.h.
| #define I2C_INTR_TEST_REG_OFFSET 0x8 |
Definition at line 87 of file i2c_regs.h.
| #define I2C_INTR_TEST_REG_RESVAL 0x0u |
Definition at line 88 of file i2c_regs.h.
| #define I2C_INTR_TEST_RX_OVERFLOW_BIT 3 |
Definition at line 92 of file i2c_regs.h.
| #define I2C_INTR_TEST_RX_THRESHOLD_BIT 1 |
Definition at line 90 of file i2c_regs.h.
| #define I2C_INTR_TEST_SCL_INTERFERENCE_BIT 5 |
Definition at line 94 of file i2c_regs.h.
| #define I2C_INTR_TEST_SDA_INTERFERENCE_BIT 6 |
Definition at line 95 of file i2c_regs.h.
| #define I2C_INTR_TEST_SDA_UNSTABLE_BIT 8 |
Definition at line 97 of file i2c_regs.h.
| #define I2C_INTR_TEST_STRETCH_TIMEOUT_BIT 7 |
Definition at line 96 of file i2c_regs.h.
| #define I2C_INTR_TEST_TX_STRETCH_BIT 10 |
Definition at line 99 of file i2c_regs.h.
| #define I2C_INTR_TEST_TX_THRESHOLD_BIT 11 |
Definition at line 100 of file i2c_regs.h.
| #define I2C_INTR_TEST_UNEXP_STOP_BIT 13 |
Definition at line 102 of file i2c_regs.h.
| #define I2C_OVRD_REG_OFFSET 0x34 |
Definition at line 214 of file i2c_regs.h.
| #define I2C_OVRD_REG_RESVAL 0x0u |
Definition at line 215 of file i2c_regs.h.
| #define I2C_OVRD_SCLVAL_BIT 1 |
Definition at line 217 of file i2c_regs.h.
| #define I2C_OVRD_SDAVAL_BIT 2 |
Definition at line 218 of file i2c_regs.h.
| #define I2C_OVRD_TXOVRDEN_BIT 0 |
Definition at line 216 of file i2c_regs.h.
| #define I2C_PARAM_ACQ_FIFO_DEPTH 268 |
Definition at line 23 of file i2c_regs.h.
| #define I2C_PARAM_FIFO_DEPTH 64 |
Definition at line 20 of file i2c_regs.h.
| #define I2C_PARAM_NUM_ALERTS 1 |
Definition at line 26 of file i2c_regs.h.
| #define I2C_PARAM_REG_WIDTH 32 |
Definition at line 29 of file i2c_regs.h.
| #define I2C_RDATA_RDATA_FIELD ((bitfield_field32_t) { .mask = I2C_RDATA_RDATA_MASK, .index = I2C_RDATA_RDATA_OFFSET }) |
Definition at line 141 of file i2c_regs.h.
| #define I2C_RDATA_RDATA_MASK 0xffu |
Definition at line 139 of file i2c_regs.h.
| #define I2C_RDATA_RDATA_OFFSET 0 |
Definition at line 140 of file i2c_regs.h.
| #define I2C_RDATA_REG_OFFSET 0x18 |
Definition at line 137 of file i2c_regs.h.
| #define I2C_RDATA_REG_RESVAL 0x0u |
Definition at line 138 of file i2c_regs.h.
| #define I2C_STATUS_ACK_CTRL_STRETCH_BIT 10 |
Definition at line 134 of file i2c_regs.h.
| #define I2C_STATUS_ACQEMPTY_BIT 9 |
Definition at line 133 of file i2c_regs.h.
| #define I2C_STATUS_ACQFULL_BIT 7 |
Definition at line 131 of file i2c_regs.h.
| #define I2C_STATUS_FMTEMPTY_BIT 2 |
Definition at line 126 of file i2c_regs.h.
| #define I2C_STATUS_FMTFULL_BIT 0 |
Definition at line 124 of file i2c_regs.h.
| #define I2C_STATUS_HOSTIDLE_BIT 3 |
Definition at line 127 of file i2c_regs.h.
| #define I2C_STATUS_REG_OFFSET 0x14 |
Definition at line 122 of file i2c_regs.h.
| #define I2C_STATUS_REG_RESVAL 0x33cu |
Definition at line 123 of file i2c_regs.h.
| #define I2C_STATUS_RXEMPTY_BIT 5 |
Definition at line 129 of file i2c_regs.h.
| #define I2C_STATUS_RXFULL_BIT 1 |
Definition at line 125 of file i2c_regs.h.
| #define I2C_STATUS_TARGETIDLE_BIT 4 |
Definition at line 128 of file i2c_regs.h.
| #define I2C_STATUS_TXEMPTY_BIT 8 |
Definition at line 132 of file i2c_regs.h.
| #define I2C_STATUS_TXFULL_BIT 6 |
Definition at line 130 of file i2c_regs.h.
| #define I2C_TARGET_ACK_CTRL_NACK_BIT 31 |
Definition at line 390 of file i2c_regs.h.
| #define I2C_TARGET_ACK_CTRL_NBYTES_FIELD ((bitfield_field32_t) { .mask = I2C_TARGET_ACK_CTRL_NBYTES_MASK, .index = I2C_TARGET_ACK_CTRL_NBYTES_OFFSET }) |
Definition at line 388 of file i2c_regs.h.
| #define I2C_TARGET_ACK_CTRL_NBYTES_MASK 0x1ffu |
Definition at line 386 of file i2c_regs.h.
| #define I2C_TARGET_ACK_CTRL_NBYTES_OFFSET 0 |
Definition at line 387 of file i2c_regs.h.
| #define I2C_TARGET_ACK_CTRL_REG_OFFSET 0x6c |
Definition at line 384 of file i2c_regs.h.
| #define I2C_TARGET_ACK_CTRL_REG_RESVAL 0x0u |
Definition at line 385 of file i2c_regs.h.
| #define I2C_TARGET_EVENTS_ARBITRATION_LOST_BIT 2 |
Definition at line 424 of file i2c_regs.h.
| #define I2C_TARGET_EVENTS_BUS_TIMEOUT_BIT 1 |
Definition at line 423 of file i2c_regs.h.
| #define I2C_TARGET_EVENTS_REG_OFFSET 0x7c |
Definition at line 420 of file i2c_regs.h.
| #define I2C_TARGET_EVENTS_REG_RESVAL 0x0u |
Definition at line 421 of file i2c_regs.h.
| #define I2C_TARGET_EVENTS_TX_PENDING_BIT 0 |
Definition at line 422 of file i2c_regs.h.
| #define I2C_TARGET_FIFO_CONFIG_ACQ_THRESH_FIELD ((bitfield_field32_t) { .mask = I2C_TARGET_FIFO_CONFIG_ACQ_THRESH_MASK, .index = I2C_TARGET_FIFO_CONFIG_ACQ_THRESH_OFFSET }) |
Definition at line 186 of file i2c_regs.h.
| #define I2C_TARGET_FIFO_CONFIG_ACQ_THRESH_MASK 0xfffu |
Definition at line 184 of file i2c_regs.h.
| #define I2C_TARGET_FIFO_CONFIG_ACQ_THRESH_OFFSET 16 |
Definition at line 185 of file i2c_regs.h.
| #define I2C_TARGET_FIFO_CONFIG_REG_OFFSET 0x28 |
Definition at line 178 of file i2c_regs.h.
| #define I2C_TARGET_FIFO_CONFIG_REG_RESVAL 0x0u |
Definition at line 179 of file i2c_regs.h.
| #define I2C_TARGET_FIFO_CONFIG_TX_THRESH_FIELD ((bitfield_field32_t) { .mask = I2C_TARGET_FIFO_CONFIG_TX_THRESH_MASK, .index = I2C_TARGET_FIFO_CONFIG_TX_THRESH_OFFSET }) |
Definition at line 182 of file i2c_regs.h.
| #define I2C_TARGET_FIFO_CONFIG_TX_THRESH_MASK 0xfffu |
Definition at line 180 of file i2c_regs.h.
| #define I2C_TARGET_FIFO_CONFIG_TX_THRESH_OFFSET 0 |
Definition at line 181 of file i2c_regs.h.
| #define I2C_TARGET_FIFO_STATUS_ACQLVL_FIELD ((bitfield_field32_t) { .mask = I2C_TARGET_FIFO_STATUS_ACQLVL_MASK, .index = I2C_TARGET_FIFO_STATUS_ACQLVL_OFFSET }) |
Definition at line 210 of file i2c_regs.h.
| #define I2C_TARGET_FIFO_STATUS_ACQLVL_MASK 0xfffu |
Definition at line 208 of file i2c_regs.h.
| #define I2C_TARGET_FIFO_STATUS_ACQLVL_OFFSET 16 |
Definition at line 209 of file i2c_regs.h.
| #define I2C_TARGET_FIFO_STATUS_REG_OFFSET 0x30 |
Definition at line 202 of file i2c_regs.h.
| #define I2C_TARGET_FIFO_STATUS_REG_RESVAL 0x0u |
Definition at line 203 of file i2c_regs.h.
| #define I2C_TARGET_FIFO_STATUS_TXLVL_FIELD ((bitfield_field32_t) { .mask = I2C_TARGET_FIFO_STATUS_TXLVL_MASK, .index = I2C_TARGET_FIFO_STATUS_TXLVL_OFFSET }) |
Definition at line 206 of file i2c_regs.h.
| #define I2C_TARGET_FIFO_STATUS_TXLVL_MASK 0xfffu |
Definition at line 204 of file i2c_regs.h.
| #define I2C_TARGET_FIFO_STATUS_TXLVL_OFFSET 0 |
Definition at line 205 of file i2c_regs.h.
| #define I2C_TARGET_ID_ADDRESS0_FIELD ((bitfield_field32_t) { .mask = I2C_TARGET_ID_ADDRESS0_MASK, .index = I2C_TARGET_ID_ADDRESS0_OFFSET }) |
Definition at line 314 of file i2c_regs.h.
| #define I2C_TARGET_ID_ADDRESS0_MASK 0x7fu |
Definition at line 312 of file i2c_regs.h.
| #define I2C_TARGET_ID_ADDRESS0_OFFSET 0 |
Definition at line 313 of file i2c_regs.h.
| #define I2C_TARGET_ID_ADDRESS1_FIELD ((bitfield_field32_t) { .mask = I2C_TARGET_ID_ADDRESS1_MASK, .index = I2C_TARGET_ID_ADDRESS1_OFFSET }) |
Definition at line 322 of file i2c_regs.h.
| #define I2C_TARGET_ID_ADDRESS1_MASK 0x7fu |
Definition at line 320 of file i2c_regs.h.
| #define I2C_TARGET_ID_ADDRESS1_OFFSET 14 |
Definition at line 321 of file i2c_regs.h.
| #define I2C_TARGET_ID_MASK0_FIELD ((bitfield_field32_t) { .mask = I2C_TARGET_ID_MASK0_MASK, .index = I2C_TARGET_ID_MASK0_OFFSET }) |
Definition at line 318 of file i2c_regs.h.
| #define I2C_TARGET_ID_MASK0_MASK 0x7fu |
Definition at line 316 of file i2c_regs.h.
| #define I2C_TARGET_ID_MASK0_OFFSET 7 |
Definition at line 317 of file i2c_regs.h.
| #define I2C_TARGET_ID_MASK1_FIELD ((bitfield_field32_t) { .mask = I2C_TARGET_ID_MASK1_MASK, .index = I2C_TARGET_ID_MASK1_OFFSET }) |
Definition at line 326 of file i2c_regs.h.
| #define I2C_TARGET_ID_MASK1_MASK 0x7fu |
Definition at line 324 of file i2c_regs.h.
| #define I2C_TARGET_ID_MASK1_OFFSET 21 |
Definition at line 325 of file i2c_regs.h.
| #define I2C_TARGET_ID_REG_OFFSET 0x54 |
Definition at line 310 of file i2c_regs.h.
| #define I2C_TARGET_ID_REG_RESVAL 0x0u |
Definition at line 311 of file i2c_regs.h.
| #define I2C_TARGET_NACK_COUNT_REG_OFFSET 0x68 |
Definition at line 376 of file i2c_regs.h.
| #define I2C_TARGET_NACK_COUNT_REG_RESVAL 0x0u |
Definition at line 377 of file i2c_regs.h.
| #define I2C_TARGET_NACK_COUNT_TARGET_NACK_COUNT_FIELD ((bitfield_field32_t) { .mask = I2C_TARGET_NACK_COUNT_TARGET_NACK_COUNT_MASK, .index = I2C_TARGET_NACK_COUNT_TARGET_NACK_COUNT_OFFSET }) |
Definition at line 380 of file i2c_regs.h.
| #define I2C_TARGET_NACK_COUNT_TARGET_NACK_COUNT_MASK 0xffu |
Definition at line 378 of file i2c_regs.h.
| #define I2C_TARGET_NACK_COUNT_TARGET_NACK_COUNT_OFFSET 0 |
Definition at line 379 of file i2c_regs.h.
| #define I2C_TARGET_TIMEOUT_CTRL_EN_BIT 31 |
Definition at line 372 of file i2c_regs.h.
| #define I2C_TARGET_TIMEOUT_CTRL_REG_OFFSET 0x64 |
Definition at line 366 of file i2c_regs.h.
| #define I2C_TARGET_TIMEOUT_CTRL_REG_RESVAL 0x0u |
Definition at line 367 of file i2c_regs.h.
| #define I2C_TARGET_TIMEOUT_CTRL_VAL_FIELD ((bitfield_field32_t) { .mask = I2C_TARGET_TIMEOUT_CTRL_VAL_MASK, .index = I2C_TARGET_TIMEOUT_CTRL_VAL_OFFSET }) |
Definition at line 370 of file i2c_regs.h.
| #define I2C_TARGET_TIMEOUT_CTRL_VAL_MASK 0x7fffffffu |
Definition at line 368 of file i2c_regs.h.
| #define I2C_TARGET_TIMEOUT_CTRL_VAL_OFFSET 0 |
Definition at line 369 of file i2c_regs.h.
| #define I2C_TIMEOUT_CTRL_EN_BIT 31 |
Definition at line 307 of file i2c_regs.h.
| #define I2C_TIMEOUT_CTRL_MODE_BIT 30 |
Definition at line 304 of file i2c_regs.h.
| #define I2C_TIMEOUT_CTRL_MODE_VALUE_BUS_TIMEOUT 0x1 |
Definition at line 306 of file i2c_regs.h.
| #define I2C_TIMEOUT_CTRL_MODE_VALUE_STRETCH_TIMEOUT 0x0 |
Definition at line 305 of file i2c_regs.h.
| #define I2C_TIMEOUT_CTRL_REG_OFFSET 0x50 |
Definition at line 298 of file i2c_regs.h.
| #define I2C_TIMEOUT_CTRL_REG_RESVAL 0x0u |
Definition at line 299 of file i2c_regs.h.
| #define I2C_TIMEOUT_CTRL_VAL_FIELD ((bitfield_field32_t) { .mask = I2C_TIMEOUT_CTRL_VAL_MASK, .index = I2C_TIMEOUT_CTRL_VAL_OFFSET }) |
Definition at line 302 of file i2c_regs.h.
| #define I2C_TIMEOUT_CTRL_VAL_MASK 0x3fffffffu |
Definition at line 300 of file i2c_regs.h.
| #define I2C_TIMEOUT_CTRL_VAL_OFFSET 0 |
Definition at line 301 of file i2c_regs.h.
| #define I2C_TIMING0_REG_OFFSET 0x3c |
Definition at line 234 of file i2c_regs.h.
| #define I2C_TIMING0_REG_RESVAL 0x0u |
Definition at line 235 of file i2c_regs.h.
| #define I2C_TIMING0_THIGH_FIELD ((bitfield_field32_t) { .mask = I2C_TIMING0_THIGH_MASK, .index = I2C_TIMING0_THIGH_OFFSET }) |
Definition at line 238 of file i2c_regs.h.
| #define I2C_TIMING0_THIGH_MASK 0x1fffu |
Definition at line 236 of file i2c_regs.h.
| #define I2C_TIMING0_THIGH_OFFSET 0 |
Definition at line 237 of file i2c_regs.h.
| #define I2C_TIMING0_TLOW_FIELD ((bitfield_field32_t) { .mask = I2C_TIMING0_TLOW_MASK, .index = I2C_TIMING0_TLOW_OFFSET }) |
Definition at line 242 of file i2c_regs.h.
| #define I2C_TIMING0_TLOW_MASK 0x1fffu |
Definition at line 240 of file i2c_regs.h.
| #define I2C_TIMING0_TLOW_OFFSET 16 |
Definition at line 241 of file i2c_regs.h.
| #define I2C_TIMING1_REG_OFFSET 0x40 |
Definition at line 247 of file i2c_regs.h.
| #define I2C_TIMING1_REG_RESVAL 0x0u |
Definition at line 248 of file i2c_regs.h.
| #define I2C_TIMING1_T_F_FIELD ((bitfield_field32_t) { .mask = I2C_TIMING1_T_F_MASK, .index = I2C_TIMING1_T_F_OFFSET }) |
Definition at line 255 of file i2c_regs.h.
| #define I2C_TIMING1_T_F_MASK 0x1ffu |
Definition at line 253 of file i2c_regs.h.
| #define I2C_TIMING1_T_F_OFFSET 16 |
Definition at line 254 of file i2c_regs.h.
| #define I2C_TIMING1_T_R_FIELD ((bitfield_field32_t) { .mask = I2C_TIMING1_T_R_MASK, .index = I2C_TIMING1_T_R_OFFSET }) |
Definition at line 251 of file i2c_regs.h.
| #define I2C_TIMING1_T_R_MASK 0x3ffu |
Definition at line 249 of file i2c_regs.h.
| #define I2C_TIMING1_T_R_OFFSET 0 |
Definition at line 250 of file i2c_regs.h.
| #define I2C_TIMING2_REG_OFFSET 0x44 |
Definition at line 260 of file i2c_regs.h.
| #define I2C_TIMING2_REG_RESVAL 0x0u |
Definition at line 261 of file i2c_regs.h.
| #define I2C_TIMING2_THD_STA_FIELD ((bitfield_field32_t) { .mask = I2C_TIMING2_THD_STA_MASK, .index = I2C_TIMING2_THD_STA_OFFSET }) |
Definition at line 268 of file i2c_regs.h.
| #define I2C_TIMING2_THD_STA_MASK 0x1fffu |
Definition at line 266 of file i2c_regs.h.
| #define I2C_TIMING2_THD_STA_OFFSET 16 |
Definition at line 267 of file i2c_regs.h.
| #define I2C_TIMING2_TSU_STA_FIELD ((bitfield_field32_t) { .mask = I2C_TIMING2_TSU_STA_MASK, .index = I2C_TIMING2_TSU_STA_OFFSET }) |
Definition at line 264 of file i2c_regs.h.
| #define I2C_TIMING2_TSU_STA_MASK 0x1fffu |
Definition at line 262 of file i2c_regs.h.
| #define I2C_TIMING2_TSU_STA_OFFSET 0 |
Definition at line 263 of file i2c_regs.h.
| #define I2C_TIMING3_REG_OFFSET 0x48 |
Definition at line 273 of file i2c_regs.h.
| #define I2C_TIMING3_REG_RESVAL 0x0u |
Definition at line 274 of file i2c_regs.h.
| #define I2C_TIMING3_THD_DAT_FIELD ((bitfield_field32_t) { .mask = I2C_TIMING3_THD_DAT_MASK, .index = I2C_TIMING3_THD_DAT_OFFSET }) |
Definition at line 281 of file i2c_regs.h.
| #define I2C_TIMING3_THD_DAT_MASK 0x1fffu |
Definition at line 279 of file i2c_regs.h.
| #define I2C_TIMING3_THD_DAT_OFFSET 16 |
Definition at line 280 of file i2c_regs.h.
| #define I2C_TIMING3_TSU_DAT_FIELD ((bitfield_field32_t) { .mask = I2C_TIMING3_TSU_DAT_MASK, .index = I2C_TIMING3_TSU_DAT_OFFSET }) |
Definition at line 277 of file i2c_regs.h.
| #define I2C_TIMING3_TSU_DAT_MASK 0x1ffu |
Definition at line 275 of file i2c_regs.h.
| #define I2C_TIMING3_TSU_DAT_OFFSET 0 |
Definition at line 276 of file i2c_regs.h.
| #define I2C_TIMING4_REG_OFFSET 0x4c |
Definition at line 286 of file i2c_regs.h.
| #define I2C_TIMING4_REG_RESVAL 0x0u |
Definition at line 287 of file i2c_regs.h.
| #define I2C_TIMING4_T_BUF_FIELD ((bitfield_field32_t) { .mask = I2C_TIMING4_T_BUF_MASK, .index = I2C_TIMING4_T_BUF_OFFSET }) |
Definition at line 294 of file i2c_regs.h.
| #define I2C_TIMING4_T_BUF_MASK 0x1fffu |
Definition at line 292 of file i2c_regs.h.
| #define I2C_TIMING4_T_BUF_OFFSET 16 |
Definition at line 293 of file i2c_regs.h.
| #define I2C_TIMING4_TSU_STO_FIELD ((bitfield_field32_t) { .mask = I2C_TIMING4_TSU_STO_MASK, .index = I2C_TIMING4_TSU_STO_OFFSET }) |
Definition at line 290 of file i2c_regs.h.
| #define I2C_TIMING4_TSU_STO_MASK 0x1fffu |
Definition at line 288 of file i2c_regs.h.
| #define I2C_TIMING4_TSU_STO_OFFSET 0 |
Definition at line 289 of file i2c_regs.h.
| #define I2C_TXDATA_REG_OFFSET 0x5c |
Definition at line 349 of file i2c_regs.h.
| #define I2C_TXDATA_REG_RESVAL 0x0u |
Definition at line 350 of file i2c_regs.h.
| #define I2C_TXDATA_TXDATA_FIELD ((bitfield_field32_t) { .mask = I2C_TXDATA_TXDATA_MASK, .index = I2C_TXDATA_TXDATA_OFFSET }) |
Definition at line 353 of file i2c_regs.h.
| #define I2C_TXDATA_TXDATA_MASK 0xffu |
Definition at line 351 of file i2c_regs.h.
| #define I2C_TXDATA_TXDATA_OFFSET 0 |
Definition at line 352 of file i2c_regs.h.
| #define I2C_VAL_REG_OFFSET 0x38 |
Definition at line 221 of file i2c_regs.h.
| #define I2C_VAL_REG_RESVAL 0x0u |
Definition at line 222 of file i2c_regs.h.
| #define I2C_VAL_SCL_RX_FIELD ((bitfield_field32_t) { .mask = I2C_VAL_SCL_RX_MASK, .index = I2C_VAL_SCL_RX_OFFSET }) |
Definition at line 225 of file i2c_regs.h.
| #define I2C_VAL_SCL_RX_MASK 0xffffu |
Definition at line 223 of file i2c_regs.h.
| #define I2C_VAL_SCL_RX_OFFSET 0 |
Definition at line 224 of file i2c_regs.h.
| #define I2C_VAL_SDA_RX_FIELD ((bitfield_field32_t) { .mask = I2C_VAL_SDA_RX_MASK, .index = I2C_VAL_SDA_RX_OFFSET }) |
Definition at line 229 of file i2c_regs.h.
| #define I2C_VAL_SDA_RX_MASK 0xffffu |
Definition at line 227 of file i2c_regs.h.
| #define I2C_VAL_SDA_RX_OFFSET 16 |
Definition at line 228 of file i2c_regs.h.