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Software APIs
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Software APIs
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Generated register defines for gpio. More...
Go to the source code of this file.
Generated register defines for gpio.
Definition in file gpio_regs.h.
| #define GPIO_ALERT_TEST_FATAL_FAULT_BIT 0 |
Definition at line 48 of file gpio_regs.h.
| #define GPIO_ALERT_TEST_REG_OFFSET 0xc |
Definition at line 46 of file gpio_regs.h.
| #define GPIO_ALERT_TEST_REG_RESVAL 0x0u |
Definition at line 47 of file gpio_regs.h.
| #define GPIO_CTRL_EN_INPUT_FILTER_REG_OFFSET 0x3c |
Definition at line 127 of file gpio_regs.h.
| #define GPIO_CTRL_EN_INPUT_FILTER_REG_RESVAL 0x0u |
Definition at line 128 of file gpio_regs.h.
| #define GPIO_DATA_IN_REG_OFFSET 0x10 |
Definition at line 51 of file gpio_regs.h.
| #define GPIO_DATA_IN_REG_RESVAL 0x0u |
Definition at line 52 of file gpio_regs.h.
| #define GPIO_DIRECT_OE_REG_OFFSET 0x20 |
Definition at line 83 of file gpio_regs.h.
| #define GPIO_DIRECT_OE_REG_RESVAL 0x0u |
Definition at line 84 of file gpio_regs.h.
| #define GPIO_DIRECT_OUT_REG_OFFSET 0x14 |
Definition at line 55 of file gpio_regs.h.
| #define GPIO_DIRECT_OUT_REG_RESVAL 0x0u |
Definition at line 56 of file gpio_regs.h.
| #define GPIO_HW_STRAPS_DATA_IN_REG_OFFSET 0x44 |
Definition at line 136 of file gpio_regs.h.
| #define GPIO_HW_STRAPS_DATA_IN_REG_RESVAL 0x0u |
Definition at line 137 of file gpio_regs.h.
| #define GPIO_HW_STRAPS_DATA_IN_VALID_HW_STRAPS_DATA_IN_VALID_BIT 0 |
Definition at line 133 of file gpio_regs.h.
| #define GPIO_HW_STRAPS_DATA_IN_VALID_REG_OFFSET 0x40 |
Definition at line 131 of file gpio_regs.h.
| #define GPIO_HW_STRAPS_DATA_IN_VALID_REG_RESVAL 0x0u |
Definition at line 132 of file gpio_regs.h.
| #define GPIO_INP_PRD_CNT_CTRL_0_CONTINUOUS_MODE_0_BIT 1 |
Definition at line 151 of file gpio_regs.h.
| #define GPIO_INP_PRD_CNT_CTRL_0_ENABLE_0_BIT 0 |
Definition at line 150 of file gpio_regs.h.
| #define GPIO_INP_PRD_CNT_CTRL_0_INPUT_SELECT_0_FIELD ((bitfield_field32_t) { .mask = GPIO_INP_PRD_CNT_CTRL_0_INPUT_SELECT_0_MASK, .index = GPIO_INP_PRD_CNT_CTRL_0_INPUT_SELECT_0_OFFSET }) |
Definition at line 155 of file gpio_regs.h.
| #define GPIO_INP_PRD_CNT_CTRL_0_INPUT_SELECT_0_MASK 0xffu |
Definition at line 153 of file gpio_regs.h.
| #define GPIO_INP_PRD_CNT_CTRL_0_INPUT_SELECT_0_OFFSET 8 |
Definition at line 154 of file gpio_regs.h.
| #define GPIO_INP_PRD_CNT_CTRL_0_POLARITY_0_BIT 2 |
Definition at line 152 of file gpio_regs.h.
| #define GPIO_INP_PRD_CNT_CTRL_0_PRESCALER_0_FIELD ((bitfield_field32_t) { .mask = GPIO_INP_PRD_CNT_CTRL_0_PRESCALER_0_MASK, .index = GPIO_INP_PRD_CNT_CTRL_0_PRESCALER_0_OFFSET }) |
Definition at line 159 of file gpio_regs.h.
| #define GPIO_INP_PRD_CNT_CTRL_0_PRESCALER_0_MASK 0xffu |
Definition at line 157 of file gpio_regs.h.
| #define GPIO_INP_PRD_CNT_CTRL_0_PRESCALER_0_OFFSET 16 |
Definition at line 158 of file gpio_regs.h.
| #define GPIO_INP_PRD_CNT_CTRL_0_REG_OFFSET 0x48 |
Definition at line 148 of file gpio_regs.h.
| #define GPIO_INP_PRD_CNT_CTRL_0_REG_RESVAL 0x4u |
Definition at line 149 of file gpio_regs.h.
| #define GPIO_INP_PRD_CNT_CTRL_1_CONTINUOUS_MODE_1_BIT 1 |
Definition at line 166 of file gpio_regs.h.
| #define GPIO_INP_PRD_CNT_CTRL_1_ENABLE_1_BIT 0 |
Definition at line 165 of file gpio_regs.h.
| #define GPIO_INP_PRD_CNT_CTRL_1_INPUT_SELECT_1_FIELD ((bitfield_field32_t) { .mask = GPIO_INP_PRD_CNT_CTRL_1_INPUT_SELECT_1_MASK, .index = GPIO_INP_PRD_CNT_CTRL_1_INPUT_SELECT_1_OFFSET }) |
Definition at line 170 of file gpio_regs.h.
| #define GPIO_INP_PRD_CNT_CTRL_1_INPUT_SELECT_1_MASK 0xffu |
Definition at line 168 of file gpio_regs.h.
| #define GPIO_INP_PRD_CNT_CTRL_1_INPUT_SELECT_1_OFFSET 8 |
Definition at line 169 of file gpio_regs.h.
| #define GPIO_INP_PRD_CNT_CTRL_1_POLARITY_1_BIT 2 |
Definition at line 167 of file gpio_regs.h.
| #define GPIO_INP_PRD_CNT_CTRL_1_PRESCALER_1_FIELD ((bitfield_field32_t) { .mask = GPIO_INP_PRD_CNT_CTRL_1_PRESCALER_1_MASK, .index = GPIO_INP_PRD_CNT_CTRL_1_PRESCALER_1_OFFSET }) |
Definition at line 174 of file gpio_regs.h.
| #define GPIO_INP_PRD_CNT_CTRL_1_PRESCALER_1_MASK 0xffu |
Definition at line 172 of file gpio_regs.h.
| #define GPIO_INP_PRD_CNT_CTRL_1_PRESCALER_1_OFFSET 16 |
Definition at line 173 of file gpio_regs.h.
| #define GPIO_INP_PRD_CNT_CTRL_1_REG_OFFSET 0x4c |
Definition at line 163 of file gpio_regs.h.
| #define GPIO_INP_PRD_CNT_CTRL_1_REG_RESVAL 0x4u |
Definition at line 164 of file gpio_regs.h.
| #define GPIO_INP_PRD_CNT_CTRL_2_CONTINUOUS_MODE_2_BIT 1 |
Definition at line 181 of file gpio_regs.h.
| #define GPIO_INP_PRD_CNT_CTRL_2_ENABLE_2_BIT 0 |
Definition at line 180 of file gpio_regs.h.
| #define GPIO_INP_PRD_CNT_CTRL_2_INPUT_SELECT_2_FIELD ((bitfield_field32_t) { .mask = GPIO_INP_PRD_CNT_CTRL_2_INPUT_SELECT_2_MASK, .index = GPIO_INP_PRD_CNT_CTRL_2_INPUT_SELECT_2_OFFSET }) |
Definition at line 185 of file gpio_regs.h.
| #define GPIO_INP_PRD_CNT_CTRL_2_INPUT_SELECT_2_MASK 0xffu |
Definition at line 183 of file gpio_regs.h.
| #define GPIO_INP_PRD_CNT_CTRL_2_INPUT_SELECT_2_OFFSET 8 |
Definition at line 184 of file gpio_regs.h.
| #define GPIO_INP_PRD_CNT_CTRL_2_POLARITY_2_BIT 2 |
Definition at line 182 of file gpio_regs.h.
| #define GPIO_INP_PRD_CNT_CTRL_2_PRESCALER_2_FIELD ((bitfield_field32_t) { .mask = GPIO_INP_PRD_CNT_CTRL_2_PRESCALER_2_MASK, .index = GPIO_INP_PRD_CNT_CTRL_2_PRESCALER_2_OFFSET }) |
Definition at line 189 of file gpio_regs.h.
| #define GPIO_INP_PRD_CNT_CTRL_2_PRESCALER_2_MASK 0xffu |
Definition at line 187 of file gpio_regs.h.
| #define GPIO_INP_PRD_CNT_CTRL_2_PRESCALER_2_OFFSET 16 |
Definition at line 188 of file gpio_regs.h.
| #define GPIO_INP_PRD_CNT_CTRL_2_REG_OFFSET 0x50 |
Definition at line 178 of file gpio_regs.h.
| #define GPIO_INP_PRD_CNT_CTRL_2_REG_RESVAL 0x4u |
Definition at line 179 of file gpio_regs.h.
| #define GPIO_INP_PRD_CNT_CTRL_3_CONTINUOUS_MODE_3_BIT 1 |
Definition at line 196 of file gpio_regs.h.
| #define GPIO_INP_PRD_CNT_CTRL_3_ENABLE_3_BIT 0 |
Definition at line 195 of file gpio_regs.h.
| #define GPIO_INP_PRD_CNT_CTRL_3_INPUT_SELECT_3_FIELD ((bitfield_field32_t) { .mask = GPIO_INP_PRD_CNT_CTRL_3_INPUT_SELECT_3_MASK, .index = GPIO_INP_PRD_CNT_CTRL_3_INPUT_SELECT_3_OFFSET }) |
Definition at line 200 of file gpio_regs.h.
| #define GPIO_INP_PRD_CNT_CTRL_3_INPUT_SELECT_3_MASK 0xffu |
Definition at line 198 of file gpio_regs.h.
| #define GPIO_INP_PRD_CNT_CTRL_3_INPUT_SELECT_3_OFFSET 8 |
Definition at line 199 of file gpio_regs.h.
| #define GPIO_INP_PRD_CNT_CTRL_3_POLARITY_3_BIT 2 |
Definition at line 197 of file gpio_regs.h.
| #define GPIO_INP_PRD_CNT_CTRL_3_PRESCALER_3_FIELD ((bitfield_field32_t) { .mask = GPIO_INP_PRD_CNT_CTRL_3_PRESCALER_3_MASK, .index = GPIO_INP_PRD_CNT_CTRL_3_PRESCALER_3_OFFSET }) |
Definition at line 204 of file gpio_regs.h.
| #define GPIO_INP_PRD_CNT_CTRL_3_PRESCALER_3_MASK 0xffu |
Definition at line 202 of file gpio_regs.h.
| #define GPIO_INP_PRD_CNT_CTRL_3_PRESCALER_3_OFFSET 16 |
Definition at line 203 of file gpio_regs.h.
| #define GPIO_INP_PRD_CNT_CTRL_3_REG_OFFSET 0x54 |
Definition at line 193 of file gpio_regs.h.
| #define GPIO_INP_PRD_CNT_CTRL_3_REG_RESVAL 0x4u |
Definition at line 194 of file gpio_regs.h.
| #define GPIO_INP_PRD_CNT_CTRL_4_CONTINUOUS_MODE_4_BIT 1 |
Definition at line 211 of file gpio_regs.h.
| #define GPIO_INP_PRD_CNT_CTRL_4_ENABLE_4_BIT 0 |
Definition at line 210 of file gpio_regs.h.
| #define GPIO_INP_PRD_CNT_CTRL_4_INPUT_SELECT_4_FIELD ((bitfield_field32_t) { .mask = GPIO_INP_PRD_CNT_CTRL_4_INPUT_SELECT_4_MASK, .index = GPIO_INP_PRD_CNT_CTRL_4_INPUT_SELECT_4_OFFSET }) |
Definition at line 215 of file gpio_regs.h.
| #define GPIO_INP_PRD_CNT_CTRL_4_INPUT_SELECT_4_MASK 0xffu |
Definition at line 213 of file gpio_regs.h.
| #define GPIO_INP_PRD_CNT_CTRL_4_INPUT_SELECT_4_OFFSET 8 |
Definition at line 214 of file gpio_regs.h.
| #define GPIO_INP_PRD_CNT_CTRL_4_POLARITY_4_BIT 2 |
Definition at line 212 of file gpio_regs.h.
| #define GPIO_INP_PRD_CNT_CTRL_4_PRESCALER_4_FIELD ((bitfield_field32_t) { .mask = GPIO_INP_PRD_CNT_CTRL_4_PRESCALER_4_MASK, .index = GPIO_INP_PRD_CNT_CTRL_4_PRESCALER_4_OFFSET }) |
Definition at line 219 of file gpio_regs.h.
| #define GPIO_INP_PRD_CNT_CTRL_4_PRESCALER_4_MASK 0xffu |
Definition at line 217 of file gpio_regs.h.
| #define GPIO_INP_PRD_CNT_CTRL_4_PRESCALER_4_OFFSET 16 |
Definition at line 218 of file gpio_regs.h.
| #define GPIO_INP_PRD_CNT_CTRL_4_REG_OFFSET 0x58 |
Definition at line 208 of file gpio_regs.h.
| #define GPIO_INP_PRD_CNT_CTRL_4_REG_RESVAL 0x4u |
Definition at line 209 of file gpio_regs.h.
| #define GPIO_INP_PRD_CNT_CTRL_5_CONTINUOUS_MODE_5_BIT 1 |
Definition at line 226 of file gpio_regs.h.
| #define GPIO_INP_PRD_CNT_CTRL_5_ENABLE_5_BIT 0 |
Definition at line 225 of file gpio_regs.h.
| #define GPIO_INP_PRD_CNT_CTRL_5_INPUT_SELECT_5_FIELD ((bitfield_field32_t) { .mask = GPIO_INP_PRD_CNT_CTRL_5_INPUT_SELECT_5_MASK, .index = GPIO_INP_PRD_CNT_CTRL_5_INPUT_SELECT_5_OFFSET }) |
Definition at line 230 of file gpio_regs.h.
| #define GPIO_INP_PRD_CNT_CTRL_5_INPUT_SELECT_5_MASK 0xffu |
Definition at line 228 of file gpio_regs.h.
| #define GPIO_INP_PRD_CNT_CTRL_5_INPUT_SELECT_5_OFFSET 8 |
Definition at line 229 of file gpio_regs.h.
| #define GPIO_INP_PRD_CNT_CTRL_5_POLARITY_5_BIT 2 |
Definition at line 227 of file gpio_regs.h.
| #define GPIO_INP_PRD_CNT_CTRL_5_PRESCALER_5_FIELD ((bitfield_field32_t) { .mask = GPIO_INP_PRD_CNT_CTRL_5_PRESCALER_5_MASK, .index = GPIO_INP_PRD_CNT_CTRL_5_PRESCALER_5_OFFSET }) |
Definition at line 234 of file gpio_regs.h.
| #define GPIO_INP_PRD_CNT_CTRL_5_PRESCALER_5_MASK 0xffu |
Definition at line 232 of file gpio_regs.h.
| #define GPIO_INP_PRD_CNT_CTRL_5_PRESCALER_5_OFFSET 16 |
Definition at line 233 of file gpio_regs.h.
| #define GPIO_INP_PRD_CNT_CTRL_5_REG_OFFSET 0x5c |
Definition at line 223 of file gpio_regs.h.
| #define GPIO_INP_PRD_CNT_CTRL_5_REG_RESVAL 0x4u |
Definition at line 224 of file gpio_regs.h.
| #define GPIO_INP_PRD_CNT_CTRL_6_CONTINUOUS_MODE_6_BIT 1 |
Definition at line 241 of file gpio_regs.h.
| #define GPIO_INP_PRD_CNT_CTRL_6_ENABLE_6_BIT 0 |
Definition at line 240 of file gpio_regs.h.
| #define GPIO_INP_PRD_CNT_CTRL_6_INPUT_SELECT_6_FIELD ((bitfield_field32_t) { .mask = GPIO_INP_PRD_CNT_CTRL_6_INPUT_SELECT_6_MASK, .index = GPIO_INP_PRD_CNT_CTRL_6_INPUT_SELECT_6_OFFSET }) |
Definition at line 245 of file gpio_regs.h.
| #define GPIO_INP_PRD_CNT_CTRL_6_INPUT_SELECT_6_MASK 0xffu |
Definition at line 243 of file gpio_regs.h.
| #define GPIO_INP_PRD_CNT_CTRL_6_INPUT_SELECT_6_OFFSET 8 |
Definition at line 244 of file gpio_regs.h.
| #define GPIO_INP_PRD_CNT_CTRL_6_POLARITY_6_BIT 2 |
Definition at line 242 of file gpio_regs.h.
| #define GPIO_INP_PRD_CNT_CTRL_6_PRESCALER_6_FIELD ((bitfield_field32_t) { .mask = GPIO_INP_PRD_CNT_CTRL_6_PRESCALER_6_MASK, .index = GPIO_INP_PRD_CNT_CTRL_6_PRESCALER_6_OFFSET }) |
Definition at line 249 of file gpio_regs.h.
| #define GPIO_INP_PRD_CNT_CTRL_6_PRESCALER_6_MASK 0xffu |
Definition at line 247 of file gpio_regs.h.
| #define GPIO_INP_PRD_CNT_CTRL_6_PRESCALER_6_OFFSET 16 |
Definition at line 248 of file gpio_regs.h.
| #define GPIO_INP_PRD_CNT_CTRL_6_REG_OFFSET 0x60 |
Definition at line 238 of file gpio_regs.h.
| #define GPIO_INP_PRD_CNT_CTRL_6_REG_RESVAL 0x4u |
Definition at line 239 of file gpio_regs.h.
| #define GPIO_INP_PRD_CNT_CTRL_7_CONTINUOUS_MODE_7_BIT 1 |
Definition at line 256 of file gpio_regs.h.
| #define GPIO_INP_PRD_CNT_CTRL_7_ENABLE_7_BIT 0 |
Definition at line 255 of file gpio_regs.h.
| #define GPIO_INP_PRD_CNT_CTRL_7_INPUT_SELECT_7_FIELD ((bitfield_field32_t) { .mask = GPIO_INP_PRD_CNT_CTRL_7_INPUT_SELECT_7_MASK, .index = GPIO_INP_PRD_CNT_CTRL_7_INPUT_SELECT_7_OFFSET }) |
Definition at line 260 of file gpio_regs.h.
| #define GPIO_INP_PRD_CNT_CTRL_7_INPUT_SELECT_7_MASK 0xffu |
Definition at line 258 of file gpio_regs.h.
| #define GPIO_INP_PRD_CNT_CTRL_7_INPUT_SELECT_7_OFFSET 8 |
Definition at line 259 of file gpio_regs.h.
| #define GPIO_INP_PRD_CNT_CTRL_7_POLARITY_7_BIT 2 |
Definition at line 257 of file gpio_regs.h.
| #define GPIO_INP_PRD_CNT_CTRL_7_PRESCALER_7_FIELD ((bitfield_field32_t) { .mask = GPIO_INP_PRD_CNT_CTRL_7_PRESCALER_7_MASK, .index = GPIO_INP_PRD_CNT_CTRL_7_PRESCALER_7_OFFSET }) |
Definition at line 264 of file gpio_regs.h.
| #define GPIO_INP_PRD_CNT_CTRL_7_PRESCALER_7_MASK 0xffu |
Definition at line 262 of file gpio_regs.h.
| #define GPIO_INP_PRD_CNT_CTRL_7_PRESCALER_7_OFFSET 16 |
Definition at line 263 of file gpio_regs.h.
| #define GPIO_INP_PRD_CNT_CTRL_7_REG_OFFSET 0x64 |
Definition at line 253 of file gpio_regs.h.
| #define GPIO_INP_PRD_CNT_CTRL_7_REG_RESVAL 0x4u |
Definition at line 254 of file gpio_regs.h.
| #define GPIO_INP_PRD_CNT_CTRL_CONTINUOUS_MODE_FIELD_WIDTH 1 |
Definition at line 141 of file gpio_regs.h.
| #define GPIO_INP_PRD_CNT_CTRL_ENABLE_FIELD_WIDTH 1 |
Definition at line 140 of file gpio_regs.h.
| #define GPIO_INP_PRD_CNT_CTRL_INPUT_SELECT_FIELD_WIDTH 8 |
Definition at line 143 of file gpio_regs.h.
| #define GPIO_INP_PRD_CNT_CTRL_MULTIREG_COUNT 8 |
Definition at line 145 of file gpio_regs.h.
| #define GPIO_INP_PRD_CNT_CTRL_POLARITY_FIELD_WIDTH 1 |
Definition at line 142 of file gpio_regs.h.
| #define GPIO_INP_PRD_CNT_CTRL_PRESCALER_FIELD_WIDTH 8 |
Definition at line 144 of file gpio_regs.h.
| #define GPIO_INP_PRD_CNT_VAL_0_REG_OFFSET 0x68 |
Definition at line 272 of file gpio_regs.h.
| #define GPIO_INP_PRD_CNT_VAL_0_REG_RESVAL 0x0u |
Definition at line 273 of file gpio_regs.h.
| #define GPIO_INP_PRD_CNT_VAL_1_REG_OFFSET 0x6c |
Definition at line 276 of file gpio_regs.h.
| #define GPIO_INP_PRD_CNT_VAL_1_REG_RESVAL 0x0u |
Definition at line 277 of file gpio_regs.h.
| #define GPIO_INP_PRD_CNT_VAL_2_REG_OFFSET 0x70 |
Definition at line 280 of file gpio_regs.h.
| #define GPIO_INP_PRD_CNT_VAL_2_REG_RESVAL 0x0u |
Definition at line 281 of file gpio_regs.h.
| #define GPIO_INP_PRD_CNT_VAL_3_REG_OFFSET 0x74 |
Definition at line 284 of file gpio_regs.h.
| #define GPIO_INP_PRD_CNT_VAL_3_REG_RESVAL 0x0u |
Definition at line 285 of file gpio_regs.h.
| #define GPIO_INP_PRD_CNT_VAL_4_REG_OFFSET 0x78 |
Definition at line 288 of file gpio_regs.h.
| #define GPIO_INP_PRD_CNT_VAL_4_REG_RESVAL 0x0u |
Definition at line 289 of file gpio_regs.h.
| #define GPIO_INP_PRD_CNT_VAL_5_REG_OFFSET 0x7c |
Definition at line 292 of file gpio_regs.h.
| #define GPIO_INP_PRD_CNT_VAL_5_REG_RESVAL 0x0u |
Definition at line 293 of file gpio_regs.h.
| #define GPIO_INP_PRD_CNT_VAL_6_REG_OFFSET 0x80 |
Definition at line 296 of file gpio_regs.h.
| #define GPIO_INP_PRD_CNT_VAL_6_REG_RESVAL 0x0u |
Definition at line 297 of file gpio_regs.h.
| #define GPIO_INP_PRD_CNT_VAL_7_REG_OFFSET 0x84 |
Definition at line 300 of file gpio_regs.h.
| #define GPIO_INP_PRD_CNT_VAL_7_REG_RESVAL 0x0u |
Definition at line 301 of file gpio_regs.h.
| #define GPIO_INP_PRD_CNT_VAL_MULTIREG_COUNT 8 |
Definition at line 269 of file gpio_regs.h.
| #define GPIO_INP_PRD_CNT_VAL_VALUE_FIELD_WIDTH 32 |
Definition at line 268 of file gpio_regs.h.
| #define GPIO_INTR_CTRL_EN_FALLING_REG_OFFSET 0x30 |
Definition at line 115 of file gpio_regs.h.
| #define GPIO_INTR_CTRL_EN_FALLING_REG_RESVAL 0x0u |
Definition at line 116 of file gpio_regs.h.
| #define GPIO_INTR_CTRL_EN_LVLHIGH_REG_OFFSET 0x34 |
Definition at line 119 of file gpio_regs.h.
| #define GPIO_INTR_CTRL_EN_LVLHIGH_REG_RESVAL 0x0u |
Definition at line 120 of file gpio_regs.h.
| #define GPIO_INTR_CTRL_EN_LVLLOW_REG_OFFSET 0x38 |
Definition at line 123 of file gpio_regs.h.
| #define GPIO_INTR_CTRL_EN_LVLLOW_REG_RESVAL 0x0u |
Definition at line 124 of file gpio_regs.h.
| #define GPIO_INTR_CTRL_EN_RISING_REG_OFFSET 0x2c |
Definition at line 111 of file gpio_regs.h.
| #define GPIO_INTR_CTRL_EN_RISING_REG_RESVAL 0x0u |
Definition at line 112 of file gpio_regs.h.
| #define GPIO_INTR_ENABLE_REG_OFFSET 0x4 |
Definition at line 38 of file gpio_regs.h.
| #define GPIO_INTR_ENABLE_REG_RESVAL 0x0u |
Definition at line 39 of file gpio_regs.h.
| #define GPIO_INTR_STATE_REG_OFFSET 0x0 |
Definition at line 34 of file gpio_regs.h.
| #define GPIO_INTR_STATE_REG_RESVAL 0x0u |
Definition at line 35 of file gpio_regs.h.
| #define GPIO_INTR_TEST_REG_OFFSET 0x8 |
Definition at line 42 of file gpio_regs.h.
| #define GPIO_INTR_TEST_REG_RESVAL 0x0u |
Definition at line 43 of file gpio_regs.h.
| #define GPIO_MASKED_OE_LOWER_DATA_FIELD ((bitfield_field32_t) { .mask = GPIO_MASKED_OE_LOWER_DATA_MASK, .index = GPIO_MASKED_OE_LOWER_DATA_OFFSET }) |
Definition at line 91 of file gpio_regs.h.
| #define GPIO_MASKED_OE_LOWER_DATA_MASK 0xffffu |
Definition at line 89 of file gpio_regs.h.
| #define GPIO_MASKED_OE_LOWER_DATA_OFFSET 0 |
Definition at line 90 of file gpio_regs.h.
| #define GPIO_MASKED_OE_LOWER_MASK_FIELD ((bitfield_field32_t) { .mask = GPIO_MASKED_OE_LOWER_MASK_MASK, .index = GPIO_MASKED_OE_LOWER_MASK_OFFSET }) |
Definition at line 95 of file gpio_regs.h.
| #define GPIO_MASKED_OE_LOWER_MASK_MASK 0xffffu |
Definition at line 93 of file gpio_regs.h.
| #define GPIO_MASKED_OE_LOWER_MASK_OFFSET 16 |
Definition at line 94 of file gpio_regs.h.
| #define GPIO_MASKED_OE_LOWER_REG_OFFSET 0x24 |
Definition at line 87 of file gpio_regs.h.
| #define GPIO_MASKED_OE_LOWER_REG_RESVAL 0x0u |
Definition at line 88 of file gpio_regs.h.
| #define GPIO_MASKED_OE_UPPER_DATA_FIELD ((bitfield_field32_t) { .mask = GPIO_MASKED_OE_UPPER_DATA_MASK, .index = GPIO_MASKED_OE_UPPER_DATA_OFFSET }) |
Definition at line 103 of file gpio_regs.h.
| #define GPIO_MASKED_OE_UPPER_DATA_MASK 0xffffu |
Definition at line 101 of file gpio_regs.h.
| #define GPIO_MASKED_OE_UPPER_DATA_OFFSET 0 |
Definition at line 102 of file gpio_regs.h.
| #define GPIO_MASKED_OE_UPPER_MASK_FIELD ((bitfield_field32_t) { .mask = GPIO_MASKED_OE_UPPER_MASK_MASK, .index = GPIO_MASKED_OE_UPPER_MASK_OFFSET }) |
Definition at line 107 of file gpio_regs.h.
| #define GPIO_MASKED_OE_UPPER_MASK_MASK 0xffffu |
Definition at line 105 of file gpio_regs.h.
| #define GPIO_MASKED_OE_UPPER_MASK_OFFSET 16 |
Definition at line 106 of file gpio_regs.h.
| #define GPIO_MASKED_OE_UPPER_REG_OFFSET 0x28 |
Definition at line 99 of file gpio_regs.h.
| #define GPIO_MASKED_OE_UPPER_REG_RESVAL 0x0u |
Definition at line 100 of file gpio_regs.h.
| #define GPIO_MASKED_OUT_LOWER_DATA_FIELD ((bitfield_field32_t) { .mask = GPIO_MASKED_OUT_LOWER_DATA_MASK, .index = GPIO_MASKED_OUT_LOWER_DATA_OFFSET }) |
Definition at line 63 of file gpio_regs.h.
| #define GPIO_MASKED_OUT_LOWER_DATA_MASK 0xffffu |
Definition at line 61 of file gpio_regs.h.
| #define GPIO_MASKED_OUT_LOWER_DATA_OFFSET 0 |
Definition at line 62 of file gpio_regs.h.
| #define GPIO_MASKED_OUT_LOWER_MASK_FIELD ((bitfield_field32_t) { .mask = GPIO_MASKED_OUT_LOWER_MASK_MASK, .index = GPIO_MASKED_OUT_LOWER_MASK_OFFSET }) |
Definition at line 67 of file gpio_regs.h.
| #define GPIO_MASKED_OUT_LOWER_MASK_MASK 0xffffu |
Definition at line 65 of file gpio_regs.h.
| #define GPIO_MASKED_OUT_LOWER_MASK_OFFSET 16 |
Definition at line 66 of file gpio_regs.h.
| #define GPIO_MASKED_OUT_LOWER_REG_OFFSET 0x18 |
Definition at line 59 of file gpio_regs.h.
| #define GPIO_MASKED_OUT_LOWER_REG_RESVAL 0x0u |
Definition at line 60 of file gpio_regs.h.
| #define GPIO_MASKED_OUT_UPPER_DATA_FIELD ((bitfield_field32_t) { .mask = GPIO_MASKED_OUT_UPPER_DATA_MASK, .index = GPIO_MASKED_OUT_UPPER_DATA_OFFSET }) |
Definition at line 75 of file gpio_regs.h.
| #define GPIO_MASKED_OUT_UPPER_DATA_MASK 0xffffu |
Definition at line 73 of file gpio_regs.h.
| #define GPIO_MASKED_OUT_UPPER_DATA_OFFSET 0 |
Definition at line 74 of file gpio_regs.h.
| #define GPIO_MASKED_OUT_UPPER_MASK_FIELD ((bitfield_field32_t) { .mask = GPIO_MASKED_OUT_UPPER_MASK_MASK, .index = GPIO_MASKED_OUT_UPPER_MASK_OFFSET }) |
Definition at line 79 of file gpio_regs.h.
| #define GPIO_MASKED_OUT_UPPER_MASK_MASK 0xffffu |
Definition at line 77 of file gpio_regs.h.
| #define GPIO_MASKED_OUT_UPPER_MASK_OFFSET 16 |
Definition at line 78 of file gpio_regs.h.
| #define GPIO_MASKED_OUT_UPPER_REG_OFFSET 0x1c |
Definition at line 71 of file gpio_regs.h.
| #define GPIO_MASKED_OUT_UPPER_REG_RESVAL 0x0u |
Definition at line 72 of file gpio_regs.h.
| #define GPIO_PARAM_NUM_ALERTS 1 |
Definition at line 26 of file gpio_regs.h.
| #define GPIO_PARAM_NUM_I_OS 32 |
Definition at line 20 of file gpio_regs.h.
| #define GPIO_PARAM_NUM_INP_PERIOD_COUNTERS 8 |
Definition at line 23 of file gpio_regs.h.
| #define GPIO_PARAM_REG_WIDTH 32 |
Definition at line 29 of file gpio_regs.h.