opentitanlib::transport::common::fpga

Struct FpgaProgram

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pub struct FpgaProgram<'a> {
    pub bitstream: Vec<u8>,
    pub rom_reset_pulse: Duration,
    pub rom_timeout: Duration,
    pub progress: Box<dyn ProgressIndicator + 'a>,
}
Expand description

Command for Transport::dispatch().

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§bitstream: Vec<u8>

The bitstream content to load into the FPGA.

§rom_reset_pulse: Duration

How long of a reset pulse to send to the device.

§rom_timeout: Duration

How long to wait for the ROM to print its type and version.

§progress: Box<dyn ProgressIndicator + 'a>

A progress function to provide user feedback. Will be called with the address and length of each chunk sent to the target device.

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impl FpgaProgram<'_>

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pub fn should_skip(&self, transport: &TransportWrapper) -> Result<bool>

Auto Trait Implementations§

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impl<'a> Freeze for FpgaProgram<'a>

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impl<'a> !RefUnwindSafe for FpgaProgram<'a>

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impl<'a> !Send for FpgaProgram<'a>

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impl<'a> !Sync for FpgaProgram<'a>

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impl<'a> Unpin for FpgaProgram<'a>

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impl<'a> !UnwindSafe for FpgaProgram<'a>

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impl<T> Any for T
where T: 'static + ?Sized,

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