Struct opentitanlib::transport::chip_whisperer::usb::Backend
source · pub struct Backend<B: Board> { /* private fields */ }Expand description
The Backend struct provides high-level access to the Chip Whisperer board.
Implementations§
source§impl<B: Board> Backend<B>
impl<B: Board> Backend<B>
sourcepub const CMD_FW_VERSION: u8 = 23u8
pub const CMD_FW_VERSION: u8 = 23u8
Commands for the Chip Whisperer board board.
pub const CMD_CDC_SETTINGS_EN: u8 = 49u8
pub const CMD_READMEM_BULK: u8 = 16u8
pub const CMD_WRITEMEM_BULK: u8 = 17u8
pub const CMD_READMEM_CTRL: u8 = 18u8
pub const CMD_WRITEMEM_CTRL: u8 = 19u8
pub const CMD_MEMSTREAM: u8 = 20u8
pub const CMD_WRITEMEM_CTRL_SAM3U: u8 = 21u8
pub const CMD_SMC_READ_SPEED: u8 = 39u8
pub const CMD_FW_BUILD_DATE: u8 = 64u8
pub const CMD_SAM3X_CFG: u8 = 34u8
pub const SAM3X_RESET: u16 = 16u16
pub const CMD_PLL: u8 = 48u8
pub const REQ_PLL_WRITE: u8 = 1u8
pub const REQ_PLL_READ: u8 = 0u8
pub const RESP_PLL_OK: u8 = 2u8
pub const ADDR_PLL_ENABLE: u8 = 12u8
sourcepub const CMD_FPGAIO_UTIL: u8 = 52u8
pub const CMD_FPGAIO_UTIL: u8 = 52u8
CMD_FPGAIO_UTIL is used to configure gpio pins on the SAM3U chip
which are connected to the FPGA.
sourcepub const REQ_IO_CONFIG: u16 = 160u16
pub const REQ_IO_CONFIG: u16 = 160u16
Requests to the FPGAIO_UTIL command.
pub const REQ_IO_RELEASE: u16 = 161u16
pub const REQ_IO_OUTPUT: u16 = 162u16
sourcepub const CONFIG_PIN_INPUT: u8 = 1u8
pub const CONFIG_PIN_INPUT: u8 = 1u8
Configuration requests are used in the data packet sent with REQ_IO_CONFIG.
pub const CONFIG_PIN_OUTPUT: u8 = 2u8
pub const CONFIG_PIN_SPI1_SDO: u8 = 16u8
pub const CONFIG_PIN_SPI1_SDI: u8 = 17u8
pub const CONFIG_PIN_SPI1_SCK: u8 = 18u8
pub const CONFIG_PIN_SPI1_CS: u8 = 19u8
sourcepub const CMD_FPGASPI1_XFER: u8 = 53u8
pub const CMD_FPGASPI1_XFER: u8 = 53u8
CMD_FPGASPI1_XFER is used to configure and drive SPI transactions
between the SAM3U chip and the FPGA.
pub const REQ_ENABLE_SPI: u16 = 160u16
pub const REQ_DISABLE_SPI: u16 = 161u16
pub const REQ_CS_LOW: u16 = 162u16
pub const REQ_CS_HIGH: u16 = 163u16
pub const REQ_SEND_DATA: u16 = 164u16
sourcepub const FPGA_PROG_SPEED: u32 = 20_000_000u32
pub const FPGA_PROG_SPEED: u32 = 20_000_000u32
FPGA programming speed in Hz.
sourcepub const CMD_FPGA_STATUS: u8 = 21u8
pub const CMD_FPGA_STATUS: u8 = 21u8
Commands for programming the bitstream into the FPGA.
pub const CMD_FPGA_PROGRAM: u8 = 22u8
pub const PROGRAM_INIT: u16 = 160u16
pub const PROGRAM_PREPARE: u16 = 161u16
pub const PROGRAM_EXIT: u16 = 162u16
sourcepub const BULK_IN_EP: u8 = 129u8
pub const BULK_IN_EP: u8 = 129u8
Bulk endpoint numbers for the Chip Whisperer board.
pub const BULK_OUT_EP: u8 = 2u8
sourcepub fn new(
usb_vid: Option<u16>,
usb_pid: Option<u16>,
usb_serial: Option<&str>
) -> Result<Self>
pub fn new( usb_vid: Option<u16>, usb_pid: Option<u16>, usb_serial: Option<&str> ) -> Result<Self>
Create a new connection to a Chip Whisperer board.
sourcepub fn send_ctrl(&self, cmd: u8, value: u16, data: &[u8]) -> Result<usize>
pub fn send_ctrl(&self, cmd: u8, value: u16, data: &[u8]) -> Result<usize>
Send a control write transaction to the Chip Whisperer board.
sourcepub fn read_ctrl(&self, cmd: u8, value: u16, data: &mut [u8]) -> Result<usize>
pub fn read_ctrl(&self, cmd: u8, value: u16, data: &mut [u8]) -> Result<usize>
Send a control read transaction to the Chip Whisperer board.
sourcepub fn get_serial_number(&self) -> &str
pub fn get_serial_number(&self) -> &str
Gets the usb serial number of the device.
sourcepub fn get_firmware_build_date(&self) -> Result<String>
pub fn get_firmware_build_date(&self) -> Result<String>
Get the firmware build date as a string.
sourcepub fn get_firmware_version(&self) -> Result<FirmwareVersion>
pub fn get_firmware_version(&self) -> Result<FirmwareVersion>
Get the firmware version.
sourcepub fn pin_set_output(&self, pinname: &str, output: bool) -> Result<()>
pub fn pin_set_output(&self, pinname: &str, output: bool) -> Result<()>
Set GPIO pinname to either output or input mode.
sourcepub fn pin_get_state(&self, pinname: &str) -> Result<u8>
pub fn pin_get_state(&self, pinname: &str) -> Result<u8>
Get the state of GPIO pinname.
sourcepub fn pin_set_state(&self, pinname: &str, value: bool) -> Result<()>
pub fn pin_set_state(&self, pinname: &str, value: bool) -> Result<()>
Set the state of GPIO pinname.
sourcepub fn reset_sam3x(&self) -> Result<()>
pub fn reset_sam3x(&self) -> Result<()>
Sends a reset signal to the SAM3U chip. Does not wait for the SAM3U to finish resetting.
sourcepub fn spi1_setpins(
&self,
sdo: &str,
sdi: &str,
sck: &str,
cs: &str
) -> Result<()>
pub fn spi1_setpins( &self, sdo: &str, sdi: &str, sck: &str, cs: &str ) -> Result<()>
Configure the SAM3U to perform SPI using the named pins.
sourcepub fn spi1_enable(&self, enable: bool) -> Result<()>
pub fn spi1_enable(&self, enable: bool) -> Result<()>
Enable the spi interface on the SAM3U chip.
sourcepub fn spi1_set_cs_pin(&self, status: bool) -> Result<()>
pub fn spi1_set_cs_pin(&self, status: bool) -> Result<()>
Set the value of the SPI chip-select pin.
sourcepub fn spi1_tx_rx(&self, txdata: &[u8], rxdata: &mut [u8]) -> Result<()>
pub fn spi1_tx_rx(&self, txdata: &[u8], rxdata: &mut [u8]) -> Result<()>
Perform an up to 64-byte transfer on the SPI interface. This is a low-level function and does not affect the CS pin.
sourcepub fn spi1_read(&self, buffer: &mut [u8]) -> Result<()>
pub fn spi1_read(&self, buffer: &mut [u8]) -> Result<()>
Read a buffer slice from the SPI interface.
This is a low-level function and does not affect the CS pin.
sourcepub fn spi1_write(&self, buffer: &[u8]) -> Result<()>
pub fn spi1_write(&self, buffer: &[u8]) -> Result<()>
Write a buffer slice to the SPI interface.
This is a low-level function and does not affect the CS pin.
sourcepub fn spi1_both(&self, txbuf: &[u8], rxbuf: &mut [u8]) -> Result<()>
pub fn spi1_both(&self, txbuf: &[u8], rxbuf: &mut [u8]) -> Result<()>
Perform a write & read transaction to the SPI interface. This is a low-level function and does not affect the CS pin.
sourcepub fn fpga_is_programmed(&self) -> Result<bool>
pub fn fpga_is_programmed(&self) -> Result<bool>
Query whether the FPGA is programmed.
sourcepub fn fpga_program(
&self,
bitstream: &[u8],
progress: &dyn ProgressIndicator
) -> Result<()>
pub fn fpga_program( &self, bitstream: &[u8], progress: &dyn ProgressIndicator ) -> Result<()>
Program a bitstream into the FPGA.
pub fn clear_bitstream(&self) -> Result<()>
sourcepub fn pin_name_to_number(pinname: &str) -> Result<u8>
pub fn pin_name_to_number(pinname: &str) -> Result<u8>
Given a Chip Whisperer board pin name, return its pin number.
sourcepub fn pll_enable(&self, enable: bool) -> Result<()>
pub fn pll_enable(&self, enable: bool) -> Result<()>
Enable or disable the CDCE906 PLL chip.
sourcepub fn pll_out_freq_set(&self, pll_num: u8, target_freq: u32) -> Result<()>
pub fn pll_out_freq_set(&self, pll_num: u8, target_freq: u32) -> Result<()>
Set the frequency of the given PLL in the CDCE906 PLL chip.
sourcepub fn pll_out_enable(&self, pll_num: u8, enable: bool) -> Result<()>
pub fn pll_out_enable(&self, pll_num: u8, enable: bool) -> Result<()>
Enable or disable the given PLL in CDCE906 PLL chip.
sourcepub fn pll_write_defaults(&self) -> Result<()>
pub fn pll_write_defaults(&self) -> Result<()>
Save PLL settings to EEPROM, making them power-on defaults.
Auto Trait Implementations§
impl<B> RefUnwindSafe for Backend<B>where B: RefUnwindSafe,
impl<B> Send for Backend<B>where B: Send,
impl<B> Sync for Backend<B>where B: Sync,
impl<B> Unpin for Backend<B>where B: Unpin,
impl<B> UnwindSafe for Backend<B>where B: UnwindSafe,
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