10 #include "sw/device/silicon_creator/lib/drivers/lifecycle.h"
11 #include "sw/device/silicon_creator/lib/manifest_def.h"
13 #include "aon_timer_regs.h"
16 OTTF_DEFINE_TEST_CONFIG();
25 #ifdef EXPECT_WATCHDOG_DISABLED
27 kExpectEnabled =
false,
28 kExpectedWdogCtrl = 0,
32 #ifdef EXPECT_WATCHDOG_ENABLED
34 kExpectEnabled =
true,
35 kExpectedWdogCtrl = (1 << AON_TIMER_WDOG_CTRL_ENABLE_BIT),
42 uint32_t regwen = abs_mmio_read8(kBase + AON_TIMER_WDOG_REGWEN_REG_OFFSET);
43 if (regwen != AON_TIMER_WDOG_REGWEN_REG_RESVAL) {
44 LOG_ERROR(
"WDOG_REGWEN=%x, expected %x", regwen,
45 AON_TIMER_WDOG_REGWEN_REG_RESVAL);
49 uint32_t ctrl = abs_mmio_read8(kBase + AON_TIMER_WDOG_CTRL_REG_OFFSET);
50 if (ctrl != kExpectedWdogCtrl) {
51 LOG_ERROR(
"WDOG_CTRL=%x, expected %x", ctrl, kExpectedWdogCtrl);
62 uint32_t bark_threshold =
63 abs_mmio_read32(kBase + AON_TIMER_WDOG_BARK_THOLD_REG_OFFSET);
64 if (bark_threshold < WATCHDOG_BITE_THRESHOLD) {
65 LOG_ERROR(
"WDOG_BARK_THOLD=%x, expected < %x", bark_threshold,
66 WATCHDOG_BITE_THRESHOLD);
70 uint32_t bite_threshold =
71 abs_mmio_read32(kBase + AON_TIMER_WDOG_BITE_THOLD_REG_OFFSET);
72 if (bite_threshold != WATCHDOG_BITE_THRESHOLD) {
73 LOG_ERROR(
"WDOG_BITE_THOLD=%x, expected %x", bite_threshold,
74 WATCHDOG_BITE_THRESHOLD);