epmp_state Struct Reference

In-memory copy of the ePMP register state. More...

#include <sw/device/silicon_creator/lib/epmp_state.h>

Data Fields
uint32_t	pmpcfg [kEpmpNumRegions/4]
	PMP configuration values (pmpcfg0 - pmpcfg3). More...
uint32_t	pmpaddr [kEpmpNumRegions]
	PMP address registers (pmpaddr0 - pmpaddr15). More...
uint32_t	mseccfg
	Machine Security Configuration register (mseccfg). More...

Detailed Description

In-memory copy of the ePMP register state.

Definition at line 110 of file epmp_state.h.

Field Documentation

mseccfg

uint32_t epmp_state::mseccfg

Machine Security Configuration register (mseccfg).

+—...—+---—+---—+---—+ | 0 | RLB | MMWP | MML | +—...—+---—+---—+---—+ 63 3 2 1 0

Key:

RLB = Rule Locking Bypass MMWP = Machine Mode Whitelist Policy MML = Machine Mode Lockdown

See the PMP Enhancements specification for more details.

Note: these are the low 32 bits of mseccfg only. The high 32 bits are set to 0.

Definition at line 168 of file epmp_state.h.

pmpaddr

uint32_t epmp_state::pmpaddr[kEpmpNumRegions]

PMP address registers (pmpaddr0 - pmpaddr15).

The way that address register values are interpreted differs depending on the address-matching mode (A) in the relevant pmpcfg register(s).

Definition at line 147 of file epmp_state.h.

pmpcfg

uint32_t epmp_state::pmpcfg[kEpmpNumRegions/4]

PMP configuration values (pmpcfg0 - pmpcfg3).

The 8-bit configuration values (pmp0cfg - pmp15cfg) are packed into these registers in little-endian byte order.

Each 8-bit configuration value is encoded as follows:

Layout:

+—+----—+----—+—+—+—+ | L | 0 | A | X | W | R | +—+----—+----—+—+—+—+ 8 7 6 5 4 3 2 1 0

Key:

L = Locked A = Address-matching Mode (OFF=0, TOR=1, NA4=2, NAPOT=3) X = Executable W = Writeable R = Readable

Note: the interpretation of these configuration bits depends on whether Machine Mode Lockdown (mseccfg.MML) is enabled or not. See the PMP Enhancements specification for more details.

Definition at line 138 of file epmp_state.h.