16 #include "sw/device/lib/testing/test_framework/check.h"
18 #include "sw/device/silicon_creator/lib/drivers/retention_sram.h"
21 #include "sram_ctrl_regs.h"
25 kSramCtrlTestDataSizeWords = 16,
28 OTTF_DEFINE_TEST_CONFIG();
34 static const uint32_t kRandomData[kSramCtrlTestDataSizeWords] = {
35 0x6b4abfae, 0x63bdb6e7, 0x87f99b1a, 0xa214dffe, 0xb12291f9, 0xd0cd1abe,
36 0x5c95e716, 0xe887aab1, 0x307f6ef9, 0x6f5c0464, 0x5882279d, 0x44c19574,
37 0x1bd20079, 0xf8250ead, 0x4bf362a4, 0xad41437d};
41 for (
int i = 0; i < kSramCtrlTestDataSizeWords; ++i) {
42 mmio_region_write32(sram_region, i * (ptrdiff_t)
sizeof(uint32_t),
52 static void check_data_matches(
mmio_region_t sram_region,
bool matches) {
53 for (
int i = 0; i < kSramCtrlTestDataSizeWords; ++i) {
55 mmio_region_read32(sram_region, i * (ptrdiff_t)
sizeof(uint32_t));
58 CHECK(word == kRandomData[i],
59 "Data at index %u mismached, expected: %04x, got: %04x", i,
60 kRandomData[i], word);
61 }
else if (word != kRandomData[i]) {
67 CHECK(matches,
"Data in SRAM was not rescrambled correctly");
71 static void init_sram(dif_sram_ctrl_t sram_ctrl) {
73 mmio_region_write32(sram_ctrl.base_addr, SRAM_CTRL_CTRL_REG_OFFSET, init);
81 CHECK((
status & kStatusRegMask) == 0x0,
82 "SRAM ret status error bits set, status = %08x.",
status);
87 dif_sram_ctrl_t sram_ctrl_ret;
88 CHECK_DIF_OK(dif_sram_ctrl_init(
92 init_sram(sram_ctrl_ret);
94 uintptr_t sram_ret_buffer_addr =
102 write_data(sram_region_ret_addr);
104 check_data_matches(sram_region_ret_addr,
true);
107 init_sram(sram_ctrl_ret);
108 check_data_matches(sram_region_ret_addr,
false);