5 #include "sw/device/silicon_creator/lib/drivers/pinmux.h"
12 #include "sw/device/silicon_creator/lib/drivers/otp.h"
14 #include "gpio_regs.h"
16 #include "otp_ctrl_regs.h"
17 #include "pinmux_regs.h"
50 .pad = kTopEarlgreyMuxedPadsIoc3,
59 .pad = kTopEarlgreyMuxedPadsIoc4,
65 #define PINMUX_ASSERT_EQ_(a, b) \
66 static_assert((a) == (b), "Unexpected software strap configuration.")
79 PINMUX_ASSERT_EQ_(SW_STRAP_1_PAD, kTopEarlgreyMuxedPadsIoc1);
81 .periph = SW_STRAP_1_PERIPH,
82 .insel = SW_STRAP_1_INSEL,
83 .pad = SW_STRAP_1_PAD,
88 PINMUX_ASSERT_EQ_(SW_STRAP_2_PAD, kTopEarlgreyMuxedPadsIoc2);
90 .periph = SW_STRAP_2_PERIPH,
91 .insel = SW_STRAP_2_INSEL,
92 .pad = SW_STRAP_2_PAD,
101 abs_mmio_write32(kBase + PINMUX_MIO_PERIPH_INSEL_0_REG_OFFSET +
102 input.periph *
sizeof(uint32_t),
118 kBase + PINMUX_MIO_PAD_ATTR_0_REG_OFFSET + pad *
sizeof(uint32_t), reg);
125 static void pinmux_prop_delay(
void) {
142 enable_pull(input.pad,
false,
false);
147 uint32_t res = state ? 2 : 0;
152 enable_pull(input.pad,
true, !state);
157 res += state ? 1 : 0;
168 kBase + PINMUX_MIO_OUTSEL_0_REG_OFFSET + output.mio *
sizeof(uint32_t),
172 void pinmux_init_uart0_tx(
void) { configure_output(kOutputUart0); }
174 void pinmux_init(
void) {
175 uint32_t bootstrap_dis =
176 otp_read32(OTP_CTRL_PARAM_OWNER_SW_CFG_ROM_BOOTSTRAP_DIS_OFFSET);
181 enable_pull(kInputSwStrap0.pad,
true,
false);
182 enable_pull(kInputSwStrap1.pad,
true,
false);
183 enable_pull(kInputSwStrap2.pad,
true,
false);
187 configure_input(kInputSwStrap0);
188 configure_input(kInputSwStrap1);
189 configure_input(kInputSwStrap2);
194 enable_pull(kInputUart0.pad,
true,
true);
195 configure_input(kInputUart0);
196 configure_output(kOutputUart0);
199 uint32_t pinmux_read_straps(
void) {
201 value |= read_strap_pin(kInputSwStrap0);
202 value |= read_strap_pin(kInputSwStrap1) << 2;
203 value |= read_strap_pin(kInputSwStrap2) << 4;