Software APIs
pwrmgr_normal_sleep_all_reset_reqs_test.c
1 // Copyright lowRISC contributors (OpenTitan project).
2 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
3 // SPDX-License-Identifier: Apache-2.0
4 
5 #include <assert.h>
6 #include <limits.h>
7 #include <stdbool.h>
8 #include <stdint.h>
9 
16 #include "sw/device/lib/runtime/irq.h"
18 #include "sw/device/lib/testing/ret_sram_testutils.h"
19 #include "sw/device/lib/testing/rstmgr_testutils.h"
20 #include "sw/device/lib/testing/rv_plic_testutils.h"
21 #include "sw/device/lib/testing/test_framework/FreeRTOSConfig.h"
22 #include "sw/device/lib/testing/test_framework/check.h"
24 #include "sw/device/tests/pwrmgr_sleep_resets_lib.h"
25 
27 
28 OTTF_DEFINE_TEST_CONFIG(.enable_uart_flow_control = true);
29 static const uint32_t kPlicTarget = kTopEarlgreyPlicTargetIbex0;
30 
31 bool test_main(void) {
32  // Enable global and external IRQ at Ibex.
33  irq_global_ctrl(true);
34  irq_external_ctrl(true);
35 
36  init_peripherals();
37 
38  ret_sram_testutils_init();
39 
40  // Enable all the AON interrupts used in this test.
41  rv_plic_testutils_irq_range_enable(plic, kPlicTarget,
44 
45  config_alert_handler();
46 
47  // Check if there was a HW reset caused by expected cases.
49  rst_info = rstmgr_testutils_reason_get();
50  rstmgr_testutils_reason_clear();
51 
52  enum { kCounterResets = 0 };
53  if (rst_info == kDifRstmgrResetInfoPor) {
54  CHECK_STATUS_OK(ret_sram_testutils_counter_clear(kCounterResets));
55  }
56  CHECK_STATUS_OK(rstmgr_testutils_pre_reset(rstmgr));
57  CHECK(rst_info == kDifRstmgrResetInfoPor ||
58  rst_info == kDifRstmgrResetInfoSysRstCtrl ||
59  rst_info == kDifRstmgrResetInfoWatchdog ||
60  rst_info == kDifRstmgrResetInfoEscalation ||
61  rst_info == kDifRstmgrResetInfoLowPowerExit ||
62  rst_info == (kDifRstmgrResetInfoSysRstCtrl |
64  rst_info ==
66  rst_info == (kDifRstmgrResetInfoWatchdog |
68  rst_info == (kDifRstmgrResetInfoEscalation |
70  rst_info == kDifRstmgrResetInfoSw,
71  "Wrong reset reason %02X", rst_info);
72 
73  uint32_t reset_case = 0;
74  CHECK_STATUS_OK(ret_sram_testutils_counter_get(kCounterResets, &reset_case));
75  CHECK_STATUS_OK(ret_sram_testutils_counter_increment(kCounterResets));
76  LOG_INFO("New reset event");
77  LOG_INFO(" case %d, normal sleep mode", reset_case);
78 
79  switch (reset_case) {
80  case 0:
83  prepare_for_sysrst(kPwrmgrSleepResetsLibModesNormalSleep);
84  break;
85  case 1:
86  LOG_INFO("Watchdog reset in normal sleep mode");
87  LOG_INFO("Let SV wait timer reset");
88  CHECK_STATUS_OK(rstmgr_testutils_pre_reset(rstmgr));
89  config_wdog(/*bark_micros=*/200, /*bite_micros=*/2 * 200);
90  prepare_for_wdog(kPwrmgrSleepResetsLibModesNormalSleep);
91  break;
92  case 2:
93  LOG_INFO("Rstmgr software reset in normal sleep mode");
94  LOG_INFO("Let SV wait timer reset");
95  CHECK_STATUS_OK(rstmgr_testutils_pre_reset(rstmgr));
96  LOG_INFO("Device reset from sw");
97  // Triggering a sw reset will prevent the device from completing the
98  // setup required to enter sleep mode. This sets a watchdog, but it will
99  // most likely be wiped out by the software reset, unless they land in
100  // very close temporal proximity.
101  config_wdog(/*bark_micros=*/200, /*bite_micros=*/2 * 200);
102  // Assert rstmgr software reset request.
103  CHECK_DIF_OK(dif_rstmgr_software_device_reset(rstmgr));
104  prepare_for_wdog(kPwrmgrSleepResetsLibModesNormalSleep);
105  break;
106  case 3:
107  LOG_INFO("Escalation reset in normal sleep mode");
108  LOG_INFO("Let SV wait timer reset");
109  trigger_escalation();
110  break;
111  case 4:
112  LOG_INFO("Last Booting");
113  return true;
114  default:
115  LOG_INFO("Booting for undefined case %0d", reset_case);
116  }
117 
118  return false;
119 }