Software APIs
pwrmgr_deep_sleep_all_reset_reqs_test.c
1 // Copyright lowRISC contributors (OpenTitan project).
2 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
3 // SPDX-License-Identifier: Apache-2.0
4 
5 #include <assert.h>
6 #include <limits.h>
7 #include <stdbool.h>
8 #include <stdint.h>
9 
16 #include "sw/device/lib/runtime/irq.h"
18 #include "sw/device/lib/testing/ret_sram_testutils.h"
19 #include "sw/device/lib/testing/rstmgr_testutils.h"
20 #include "sw/device/lib/testing/rv_plic_testutils.h"
21 #include "sw/device/lib/testing/test_framework/FreeRTOSConfig.h"
22 #include "sw/device/lib/testing/test_framework/check.h"
24 #include "sw/device/tests/pwrmgr_sleep_resets_lib.h"
25 
27 
28 // In dvsim, one run
29 // with --waves can take
30 // 1.874h | 38.068ms
31 // without --waves,
32 // 38.072m | 39.484ms
33 
34 OTTF_DEFINE_TEST_CONFIG(.enable_uart_flow_control = true);
35 
36 static const uint32_t kPlicTarget = kTopEarlgreyPlicTargetIbex0;
37 
38 bool test_main(void) {
39  // Enable global and external IRQ at Ibex.
40  irq_global_ctrl(true);
41  irq_external_ctrl(true);
42 
43  init_peripherals();
44 
45  ret_sram_testutils_init();
46 
47  // Enable all the AON interrupts used in this test.
48  rv_plic_testutils_irq_range_enable(plic, kPlicTarget,
51 
52  config_alert_handler();
53 
54  // Check if there was a HW reset caused by expected cases.
56  rst_info = rstmgr_testutils_reason_get();
57  rstmgr_testutils_reason_clear();
58 
59  enum { kCounterResets = 0 };
60  if (rst_info == kDifRstmgrResetInfoPor) {
61  CHECK_STATUS_OK(ret_sram_testutils_counter_clear(kCounterResets));
62  }
63  CHECK_STATUS_OK(rstmgr_testutils_pre_reset(rstmgr));
64  CHECK(rst_info == kDifRstmgrResetInfoPor ||
65  rst_info == kDifRstmgrResetInfoSysRstCtrl ||
66  rst_info == kDifRstmgrResetInfoWatchdog ||
67  rst_info == kDifRstmgrResetInfoEscalation ||
68  rst_info == kDifRstmgrResetInfoLowPowerExit ||
69  rst_info == (kDifRstmgrResetInfoSysRstCtrl |
71  rst_info ==
73  rst_info == (kDifRstmgrResetInfoWatchdog |
75  rst_info == (kDifRstmgrResetInfoEscalation |
77  rst_info == kDifRstmgrResetInfoSw,
78  "Wrong reset reason %02X", rst_info);
79 
80  uint32_t reset_case = 0;
81  CHECK_STATUS_OK(ret_sram_testutils_counter_get(kCounterResets, &reset_case));
82  CHECK_STATUS_OK(ret_sram_testutils_counter_increment(kCounterResets));
83  LOG_INFO("New reset event");
84  LOG_INFO(" case %d, deep sleep mode", reset_case);
85 
86  switch (reset_case) {
87  case 0:
90  prepare_for_sysrst(kPwrmgrSleepResetsLibModesDeepSleep);
91  break;
92  case 1:
93  LOG_INFO("Watchdog reset in deep sleep mode");
94  LOG_INFO("Let SV wait timer reset");
95  CHECK_STATUS_OK(rstmgr_testutils_pre_reset(rstmgr));
96  config_wdog(/*bark_micros=*/200, /*bite_micros=*/2 * 200);
97  prepare_for_wdog(kPwrmgrSleepResetsLibModesDeepSleep);
98  break;
99  case 2:
100  LOG_INFO("Rstmgr software reset in deep sleep mode");
101  LOG_INFO("Let SV wait timer reset");
102  CHECK_STATUS_OK(rstmgr_testutils_pre_reset(rstmgr));
103  LOG_INFO("Device reset from sw");
104  // Triggering a sw reset will prevent the device from completing the
105  // setup required to enter sleep mode. This sets a watchdog, but it will
106  // most likely be wiped out by the software reset, unless they land in
107  // very close temporal proximity.
108  config_wdog(/*bark_micros=*/200, /*bite_micros=*/2 * 200);
109  // Assert rstmgr software reset request.
110  CHECK_DIF_OK(dif_rstmgr_software_device_reset(rstmgr));
111  prepare_for_wdog(kPwrmgrSleepResetsLibModesDeepSleep);
112  break;
113  case 3:
114  LOG_INFO("Booting and running normal sleep followed by escalation reset");
115  LOG_INFO("Let SV wait timer reset");
116  trigger_escalation();
117  break;
118  case 4:
119  LOG_INFO("Last Booting");
120  return true;
121  default:
122  LOG_INFO("Booting for undefined case %0d", reset_case);
123  }
124 
125  return false;
126 }