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Software APIs
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Software APIs
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Generated register defines for pwm. More...
Go to the source code of this file.
Generated register defines for pwm.
Definition in file pwm_regs.h.
| #define PWM_ALERT_TEST_FATAL_FAULT_BIT 0 |
Definition at line 31 of file pwm_regs.h.
| #define PWM_ALERT_TEST_REG_OFFSET 0x0 |
Definition at line 29 of file pwm_regs.h.
| #define PWM_ALERT_TEST_REG_RESVAL 0x0u |
Definition at line 30 of file pwm_regs.h.
| #define PWM_BLINK_PARAM_0_REG_OFFSET 0x44 |
Definition at line 228 of file pwm_regs.h.
| #define PWM_BLINK_PARAM_0_REG_RESVAL 0x0u |
Definition at line 229 of file pwm_regs.h.
| #define PWM_BLINK_PARAM_0_X_0_FIELD ((bitfield_field32_t) { .mask = PWM_BLINK_PARAM_0_X_0_MASK, .index = PWM_BLINK_PARAM_0_X_0_OFFSET }) |
Definition at line 232 of file pwm_regs.h.
| #define PWM_BLINK_PARAM_0_X_0_MASK 0xffffu |
Definition at line 230 of file pwm_regs.h.
| #define PWM_BLINK_PARAM_0_X_0_OFFSET 0 |
Definition at line 231 of file pwm_regs.h.
| #define PWM_BLINK_PARAM_0_Y_0_FIELD ((bitfield_field32_t) { .mask = PWM_BLINK_PARAM_0_Y_0_MASK, .index = PWM_BLINK_PARAM_0_Y_0_OFFSET }) |
Definition at line 236 of file pwm_regs.h.
| #define PWM_BLINK_PARAM_0_Y_0_MASK 0xffffu |
Definition at line 234 of file pwm_regs.h.
| #define PWM_BLINK_PARAM_0_Y_0_OFFSET 16 |
Definition at line 235 of file pwm_regs.h.
| #define PWM_BLINK_PARAM_1_REG_OFFSET 0x48 |
Definition at line 240 of file pwm_regs.h.
| #define PWM_BLINK_PARAM_1_REG_RESVAL 0x0u |
Definition at line 241 of file pwm_regs.h.
| #define PWM_BLINK_PARAM_1_X_1_FIELD ((bitfield_field32_t) { .mask = PWM_BLINK_PARAM_1_X_1_MASK, .index = PWM_BLINK_PARAM_1_X_1_OFFSET }) |
Definition at line 244 of file pwm_regs.h.
| #define PWM_BLINK_PARAM_1_X_1_MASK 0xffffu |
Definition at line 242 of file pwm_regs.h.
| #define PWM_BLINK_PARAM_1_X_1_OFFSET 0 |
Definition at line 243 of file pwm_regs.h.
| #define PWM_BLINK_PARAM_1_Y_1_FIELD ((bitfield_field32_t) { .mask = PWM_BLINK_PARAM_1_Y_1_MASK, .index = PWM_BLINK_PARAM_1_Y_1_OFFSET }) |
Definition at line 248 of file pwm_regs.h.
| #define PWM_BLINK_PARAM_1_Y_1_MASK 0xffffu |
Definition at line 246 of file pwm_regs.h.
| #define PWM_BLINK_PARAM_1_Y_1_OFFSET 16 |
Definition at line 247 of file pwm_regs.h.
| #define PWM_BLINK_PARAM_2_REG_OFFSET 0x4c |
Definition at line 252 of file pwm_regs.h.
| #define PWM_BLINK_PARAM_2_REG_RESVAL 0x0u |
Definition at line 253 of file pwm_regs.h.
| #define PWM_BLINK_PARAM_2_X_2_FIELD ((bitfield_field32_t) { .mask = PWM_BLINK_PARAM_2_X_2_MASK, .index = PWM_BLINK_PARAM_2_X_2_OFFSET }) |
Definition at line 256 of file pwm_regs.h.
| #define PWM_BLINK_PARAM_2_X_2_MASK 0xffffu |
Definition at line 254 of file pwm_regs.h.
| #define PWM_BLINK_PARAM_2_X_2_OFFSET 0 |
Definition at line 255 of file pwm_regs.h.
| #define PWM_BLINK_PARAM_2_Y_2_FIELD ((bitfield_field32_t) { .mask = PWM_BLINK_PARAM_2_Y_2_MASK, .index = PWM_BLINK_PARAM_2_Y_2_OFFSET }) |
Definition at line 260 of file pwm_regs.h.
| #define PWM_BLINK_PARAM_2_Y_2_MASK 0xffffu |
Definition at line 258 of file pwm_regs.h.
| #define PWM_BLINK_PARAM_2_Y_2_OFFSET 16 |
Definition at line 259 of file pwm_regs.h.
| #define PWM_BLINK_PARAM_3_REG_OFFSET 0x50 |
Definition at line 264 of file pwm_regs.h.
| #define PWM_BLINK_PARAM_3_REG_RESVAL 0x0u |
Definition at line 265 of file pwm_regs.h.
| #define PWM_BLINK_PARAM_3_X_3_FIELD ((bitfield_field32_t) { .mask = PWM_BLINK_PARAM_3_X_3_MASK, .index = PWM_BLINK_PARAM_3_X_3_OFFSET }) |
Definition at line 268 of file pwm_regs.h.
| #define PWM_BLINK_PARAM_3_X_3_MASK 0xffffu |
Definition at line 266 of file pwm_regs.h.
| #define PWM_BLINK_PARAM_3_X_3_OFFSET 0 |
Definition at line 267 of file pwm_regs.h.
| #define PWM_BLINK_PARAM_3_Y_3_FIELD ((bitfield_field32_t) { .mask = PWM_BLINK_PARAM_3_Y_3_MASK, .index = PWM_BLINK_PARAM_3_Y_3_OFFSET }) |
Definition at line 272 of file pwm_regs.h.
| #define PWM_BLINK_PARAM_3_Y_3_MASK 0xffffu |
Definition at line 270 of file pwm_regs.h.
| #define PWM_BLINK_PARAM_3_Y_3_OFFSET 16 |
Definition at line 271 of file pwm_regs.h.
| #define PWM_BLINK_PARAM_4_REG_OFFSET 0x54 |
Definition at line 276 of file pwm_regs.h.
| #define PWM_BLINK_PARAM_4_REG_RESVAL 0x0u |
Definition at line 277 of file pwm_regs.h.
| #define PWM_BLINK_PARAM_4_X_4_FIELD ((bitfield_field32_t) { .mask = PWM_BLINK_PARAM_4_X_4_MASK, .index = PWM_BLINK_PARAM_4_X_4_OFFSET }) |
Definition at line 280 of file pwm_regs.h.
| #define PWM_BLINK_PARAM_4_X_4_MASK 0xffffu |
Definition at line 278 of file pwm_regs.h.
| #define PWM_BLINK_PARAM_4_X_4_OFFSET 0 |
Definition at line 279 of file pwm_regs.h.
| #define PWM_BLINK_PARAM_4_Y_4_FIELD ((bitfield_field32_t) { .mask = PWM_BLINK_PARAM_4_Y_4_MASK, .index = PWM_BLINK_PARAM_4_Y_4_OFFSET }) |
Definition at line 284 of file pwm_regs.h.
| #define PWM_BLINK_PARAM_4_Y_4_MASK 0xffffu |
Definition at line 282 of file pwm_regs.h.
| #define PWM_BLINK_PARAM_4_Y_4_OFFSET 16 |
Definition at line 283 of file pwm_regs.h.
| #define PWM_BLINK_PARAM_5_REG_OFFSET 0x58 |
Definition at line 288 of file pwm_regs.h.
| #define PWM_BLINK_PARAM_5_REG_RESVAL 0x0u |
Definition at line 289 of file pwm_regs.h.
| #define PWM_BLINK_PARAM_5_X_5_FIELD ((bitfield_field32_t) { .mask = PWM_BLINK_PARAM_5_X_5_MASK, .index = PWM_BLINK_PARAM_5_X_5_OFFSET }) |
Definition at line 292 of file pwm_regs.h.
| #define PWM_BLINK_PARAM_5_X_5_MASK 0xffffu |
Definition at line 290 of file pwm_regs.h.
| #define PWM_BLINK_PARAM_5_X_5_OFFSET 0 |
Definition at line 291 of file pwm_regs.h.
| #define PWM_BLINK_PARAM_5_Y_5_FIELD ((bitfield_field32_t) { .mask = PWM_BLINK_PARAM_5_Y_5_MASK, .index = PWM_BLINK_PARAM_5_Y_5_OFFSET }) |
Definition at line 296 of file pwm_regs.h.
| #define PWM_BLINK_PARAM_5_Y_5_MASK 0xffffu |
Definition at line 294 of file pwm_regs.h.
| #define PWM_BLINK_PARAM_5_Y_5_OFFSET 16 |
Definition at line 295 of file pwm_regs.h.
| #define PWM_BLINK_PARAM_MULTIREG_COUNT 6 |
Definition at line 225 of file pwm_regs.h.
| #define PWM_BLINK_PARAM_X_FIELD_WIDTH 16 |
Definition at line 223 of file pwm_regs.h.
| #define PWM_BLINK_PARAM_Y_FIELD_WIDTH 16 |
Definition at line 224 of file pwm_regs.h.
| #define PWM_CFG_CLK_DIV_FIELD ((bitfield_field32_t) { .mask = PWM_CFG_CLK_DIV_MASK, .index = PWM_CFG_CLK_DIV_OFFSET }) |
Definition at line 43 of file pwm_regs.h.
| #define PWM_CFG_CLK_DIV_MASK 0x7ffffffu |
Definition at line 41 of file pwm_regs.h.
| #define PWM_CFG_CLK_DIV_OFFSET 0 |
Definition at line 42 of file pwm_regs.h.
| #define PWM_CFG_CNTR_EN_BIT 31 |
Definition at line 49 of file pwm_regs.h.
| #define PWM_CFG_DC_RESN_FIELD ((bitfield_field32_t) { .mask = PWM_CFG_DC_RESN_MASK, .index = PWM_CFG_DC_RESN_OFFSET }) |
Definition at line 47 of file pwm_regs.h.
| #define PWM_CFG_DC_RESN_MASK 0xfu |
Definition at line 45 of file pwm_regs.h.
| #define PWM_CFG_DC_RESN_OFFSET 27 |
Definition at line 46 of file pwm_regs.h.
| #define PWM_CFG_REG_OFFSET 0x8 |
Definition at line 39 of file pwm_regs.h.
| #define PWM_CFG_REG_RESVAL 0x38008000u |
Definition at line 40 of file pwm_regs.h.
| #define PWM_DUTY_CYCLE_0_A_0_FIELD ((bitfield_field32_t) { .mask = PWM_DUTY_CYCLE_0_A_0_MASK, .index = PWM_DUTY_CYCLE_0_A_0_OFFSET }) |
Definition at line 155 of file pwm_regs.h.
| #define PWM_DUTY_CYCLE_0_A_0_MASK 0xffffu |
Definition at line 153 of file pwm_regs.h.
| #define PWM_DUTY_CYCLE_0_A_0_OFFSET 0 |
Definition at line 154 of file pwm_regs.h.
| #define PWM_DUTY_CYCLE_0_B_0_FIELD ((bitfield_field32_t) { .mask = PWM_DUTY_CYCLE_0_B_0_MASK, .index = PWM_DUTY_CYCLE_0_B_0_OFFSET }) |
Definition at line 159 of file pwm_regs.h.
| #define PWM_DUTY_CYCLE_0_B_0_MASK 0xffffu |
Definition at line 157 of file pwm_regs.h.
| #define PWM_DUTY_CYCLE_0_B_0_OFFSET 16 |
Definition at line 158 of file pwm_regs.h.
| #define PWM_DUTY_CYCLE_0_REG_OFFSET 0x2c |
Definition at line 151 of file pwm_regs.h.
| #define PWM_DUTY_CYCLE_0_REG_RESVAL 0x7fff7fffu |
Definition at line 152 of file pwm_regs.h.
| #define PWM_DUTY_CYCLE_1_A_1_FIELD ((bitfield_field32_t) { .mask = PWM_DUTY_CYCLE_1_A_1_MASK, .index = PWM_DUTY_CYCLE_1_A_1_OFFSET }) |
Definition at line 167 of file pwm_regs.h.
| #define PWM_DUTY_CYCLE_1_A_1_MASK 0xffffu |
Definition at line 165 of file pwm_regs.h.
| #define PWM_DUTY_CYCLE_1_A_1_OFFSET 0 |
Definition at line 166 of file pwm_regs.h.
| #define PWM_DUTY_CYCLE_1_B_1_FIELD ((bitfield_field32_t) { .mask = PWM_DUTY_CYCLE_1_B_1_MASK, .index = PWM_DUTY_CYCLE_1_B_1_OFFSET }) |
Definition at line 171 of file pwm_regs.h.
| #define PWM_DUTY_CYCLE_1_B_1_MASK 0xffffu |
Definition at line 169 of file pwm_regs.h.
| #define PWM_DUTY_CYCLE_1_B_1_OFFSET 16 |
Definition at line 170 of file pwm_regs.h.
| #define PWM_DUTY_CYCLE_1_REG_OFFSET 0x30 |
Definition at line 163 of file pwm_regs.h.
| #define PWM_DUTY_CYCLE_1_REG_RESVAL 0x7fff7fffu |
Definition at line 164 of file pwm_regs.h.
| #define PWM_DUTY_CYCLE_2_A_2_FIELD ((bitfield_field32_t) { .mask = PWM_DUTY_CYCLE_2_A_2_MASK, .index = PWM_DUTY_CYCLE_2_A_2_OFFSET }) |
Definition at line 179 of file pwm_regs.h.
| #define PWM_DUTY_CYCLE_2_A_2_MASK 0xffffu |
Definition at line 177 of file pwm_regs.h.
| #define PWM_DUTY_CYCLE_2_A_2_OFFSET 0 |
Definition at line 178 of file pwm_regs.h.
| #define PWM_DUTY_CYCLE_2_B_2_FIELD ((bitfield_field32_t) { .mask = PWM_DUTY_CYCLE_2_B_2_MASK, .index = PWM_DUTY_CYCLE_2_B_2_OFFSET }) |
Definition at line 183 of file pwm_regs.h.
| #define PWM_DUTY_CYCLE_2_B_2_MASK 0xffffu |
Definition at line 181 of file pwm_regs.h.
| #define PWM_DUTY_CYCLE_2_B_2_OFFSET 16 |
Definition at line 182 of file pwm_regs.h.
| #define PWM_DUTY_CYCLE_2_REG_OFFSET 0x34 |
Definition at line 175 of file pwm_regs.h.
| #define PWM_DUTY_CYCLE_2_REG_RESVAL 0x7fff7fffu |
Definition at line 176 of file pwm_regs.h.
| #define PWM_DUTY_CYCLE_3_A_3_FIELD ((bitfield_field32_t) { .mask = PWM_DUTY_CYCLE_3_A_3_MASK, .index = PWM_DUTY_CYCLE_3_A_3_OFFSET }) |
Definition at line 191 of file pwm_regs.h.
| #define PWM_DUTY_CYCLE_3_A_3_MASK 0xffffu |
Definition at line 189 of file pwm_regs.h.
| #define PWM_DUTY_CYCLE_3_A_3_OFFSET 0 |
Definition at line 190 of file pwm_regs.h.
| #define PWM_DUTY_CYCLE_3_B_3_FIELD ((bitfield_field32_t) { .mask = PWM_DUTY_CYCLE_3_B_3_MASK, .index = PWM_DUTY_CYCLE_3_B_3_OFFSET }) |
Definition at line 195 of file pwm_regs.h.
| #define PWM_DUTY_CYCLE_3_B_3_MASK 0xffffu |
Definition at line 193 of file pwm_regs.h.
| #define PWM_DUTY_CYCLE_3_B_3_OFFSET 16 |
Definition at line 194 of file pwm_regs.h.
| #define PWM_DUTY_CYCLE_3_REG_OFFSET 0x38 |
Definition at line 187 of file pwm_regs.h.
| #define PWM_DUTY_CYCLE_3_REG_RESVAL 0x7fff7fffu |
Definition at line 188 of file pwm_regs.h.
| #define PWM_DUTY_CYCLE_4_A_4_FIELD ((bitfield_field32_t) { .mask = PWM_DUTY_CYCLE_4_A_4_MASK, .index = PWM_DUTY_CYCLE_4_A_4_OFFSET }) |
Definition at line 203 of file pwm_regs.h.
| #define PWM_DUTY_CYCLE_4_A_4_MASK 0xffffu |
Definition at line 201 of file pwm_regs.h.
| #define PWM_DUTY_CYCLE_4_A_4_OFFSET 0 |
Definition at line 202 of file pwm_regs.h.
| #define PWM_DUTY_CYCLE_4_B_4_FIELD ((bitfield_field32_t) { .mask = PWM_DUTY_CYCLE_4_B_4_MASK, .index = PWM_DUTY_CYCLE_4_B_4_OFFSET }) |
Definition at line 207 of file pwm_regs.h.
| #define PWM_DUTY_CYCLE_4_B_4_MASK 0xffffu |
Definition at line 205 of file pwm_regs.h.
| #define PWM_DUTY_CYCLE_4_B_4_OFFSET 16 |
Definition at line 206 of file pwm_regs.h.
| #define PWM_DUTY_CYCLE_4_REG_OFFSET 0x3c |
Definition at line 199 of file pwm_regs.h.
| #define PWM_DUTY_CYCLE_4_REG_RESVAL 0x7fff7fffu |
Definition at line 200 of file pwm_regs.h.
| #define PWM_DUTY_CYCLE_5_A_5_FIELD ((bitfield_field32_t) { .mask = PWM_DUTY_CYCLE_5_A_5_MASK, .index = PWM_DUTY_CYCLE_5_A_5_OFFSET }) |
Definition at line 215 of file pwm_regs.h.
| #define PWM_DUTY_CYCLE_5_A_5_MASK 0xffffu |
Definition at line 213 of file pwm_regs.h.
| #define PWM_DUTY_CYCLE_5_A_5_OFFSET 0 |
Definition at line 214 of file pwm_regs.h.
| #define PWM_DUTY_CYCLE_5_B_5_FIELD ((bitfield_field32_t) { .mask = PWM_DUTY_CYCLE_5_B_5_MASK, .index = PWM_DUTY_CYCLE_5_B_5_OFFSET }) |
Definition at line 219 of file pwm_regs.h.
| #define PWM_DUTY_CYCLE_5_B_5_MASK 0xffffu |
Definition at line 217 of file pwm_regs.h.
| #define PWM_DUTY_CYCLE_5_B_5_OFFSET 16 |
Definition at line 218 of file pwm_regs.h.
| #define PWM_DUTY_CYCLE_5_REG_OFFSET 0x40 |
Definition at line 211 of file pwm_regs.h.
| #define PWM_DUTY_CYCLE_5_REG_RESVAL 0x7fff7fffu |
Definition at line 212 of file pwm_regs.h.
| #define PWM_DUTY_CYCLE_A_FIELD_WIDTH 16 |
Definition at line 146 of file pwm_regs.h.
| #define PWM_DUTY_CYCLE_B_FIELD_WIDTH 16 |
Definition at line 147 of file pwm_regs.h.
| #define PWM_DUTY_CYCLE_MULTIREG_COUNT 6 |
Definition at line 148 of file pwm_regs.h.
| #define PWM_INVERT_INVERT_0_BIT 0 |
Definition at line 72 of file pwm_regs.h.
| #define PWM_INVERT_INVERT_1_BIT 1 |
Definition at line 73 of file pwm_regs.h.
| #define PWM_INVERT_INVERT_2_BIT 2 |
Definition at line 74 of file pwm_regs.h.
| #define PWM_INVERT_INVERT_3_BIT 3 |
Definition at line 75 of file pwm_regs.h.
| #define PWM_INVERT_INVERT_4_BIT 4 |
Definition at line 76 of file pwm_regs.h.
| #define PWM_INVERT_INVERT_5_BIT 5 |
Definition at line 77 of file pwm_regs.h.
| #define PWM_INVERT_INVERT_FIELD_WIDTH 1 |
Definition at line 66 of file pwm_regs.h.
| #define PWM_INVERT_MULTIREG_COUNT 1 |
Definition at line 67 of file pwm_regs.h.
| #define PWM_INVERT_REG_OFFSET 0x10 |
Definition at line 70 of file pwm_regs.h.
| #define PWM_INVERT_REG_RESVAL 0x0u |
Definition at line 71 of file pwm_regs.h.
| #define PWM_PARAM_N_OUTPUTS 6 |
Definition at line 20 of file pwm_regs.h.
| #define PWM_PARAM_NUM_ALERTS 1 |
Definition at line 23 of file pwm_regs.h.
| #define PWM_PARAM_REG_WIDTH 32 |
Definition at line 26 of file pwm_regs.h.
| #define PWM_PWM_EN_EN_0_BIT 0 |
Definition at line 58 of file pwm_regs.h.
| #define PWM_PWM_EN_EN_1_BIT 1 |
Definition at line 59 of file pwm_regs.h.
| #define PWM_PWM_EN_EN_2_BIT 2 |
Definition at line 60 of file pwm_regs.h.
| #define PWM_PWM_EN_EN_3_BIT 3 |
Definition at line 61 of file pwm_regs.h.
| #define PWM_PWM_EN_EN_4_BIT 4 |
Definition at line 62 of file pwm_regs.h.
| #define PWM_PWM_EN_EN_5_BIT 5 |
Definition at line 63 of file pwm_regs.h.
| #define PWM_PWM_EN_EN_FIELD_WIDTH 1 |
Definition at line 52 of file pwm_regs.h.
| #define PWM_PWM_EN_MULTIREG_COUNT 1 |
Definition at line 53 of file pwm_regs.h.
| #define PWM_PWM_EN_REG_OFFSET 0xc |
Definition at line 56 of file pwm_regs.h.
| #define PWM_PWM_EN_REG_RESVAL 0x0u |
Definition at line 57 of file pwm_regs.h.
| #define PWM_PWM_PARAM_0_BLINK_EN_0_BIT 31 |
Definition at line 93 of file pwm_regs.h.
| #define PWM_PWM_PARAM_0_HTBT_EN_0_BIT 30 |
Definition at line 92 of file pwm_regs.h.
| #define PWM_PWM_PARAM_0_PHASE_DELAY_0_FIELD ((bitfield_field32_t) { .mask = PWM_PWM_PARAM_0_PHASE_DELAY_0_MASK, .index = PWM_PWM_PARAM_0_PHASE_DELAY_0_OFFSET }) |
Definition at line 90 of file pwm_regs.h.
| #define PWM_PWM_PARAM_0_PHASE_DELAY_0_MASK 0xffffu |
Definition at line 88 of file pwm_regs.h.
| #define PWM_PWM_PARAM_0_PHASE_DELAY_0_OFFSET 0 |
Definition at line 89 of file pwm_regs.h.
| #define PWM_PWM_PARAM_0_REG_OFFSET 0x14 |
Definition at line 86 of file pwm_regs.h.
| #define PWM_PWM_PARAM_0_REG_RESVAL 0x0u |
Definition at line 87 of file pwm_regs.h.
| #define PWM_PWM_PARAM_1_BLINK_EN_1_BIT 31 |
Definition at line 103 of file pwm_regs.h.
| #define PWM_PWM_PARAM_1_HTBT_EN_1_BIT 30 |
Definition at line 102 of file pwm_regs.h.
| #define PWM_PWM_PARAM_1_PHASE_DELAY_1_FIELD ((bitfield_field32_t) { .mask = PWM_PWM_PARAM_1_PHASE_DELAY_1_MASK, .index = PWM_PWM_PARAM_1_PHASE_DELAY_1_OFFSET }) |
Definition at line 100 of file pwm_regs.h.
| #define PWM_PWM_PARAM_1_PHASE_DELAY_1_MASK 0xffffu |
Definition at line 98 of file pwm_regs.h.
| #define PWM_PWM_PARAM_1_PHASE_DELAY_1_OFFSET 0 |
Definition at line 99 of file pwm_regs.h.
| #define PWM_PWM_PARAM_1_REG_OFFSET 0x18 |
Definition at line 96 of file pwm_regs.h.
| #define PWM_PWM_PARAM_1_REG_RESVAL 0x0u |
Definition at line 97 of file pwm_regs.h.
| #define PWM_PWM_PARAM_2_BLINK_EN_2_BIT 31 |
Definition at line 113 of file pwm_regs.h.
| #define PWM_PWM_PARAM_2_HTBT_EN_2_BIT 30 |
Definition at line 112 of file pwm_regs.h.
| #define PWM_PWM_PARAM_2_PHASE_DELAY_2_FIELD ((bitfield_field32_t) { .mask = PWM_PWM_PARAM_2_PHASE_DELAY_2_MASK, .index = PWM_PWM_PARAM_2_PHASE_DELAY_2_OFFSET }) |
Definition at line 110 of file pwm_regs.h.
| #define PWM_PWM_PARAM_2_PHASE_DELAY_2_MASK 0xffffu |
Definition at line 108 of file pwm_regs.h.
| #define PWM_PWM_PARAM_2_PHASE_DELAY_2_OFFSET 0 |
Definition at line 109 of file pwm_regs.h.
| #define PWM_PWM_PARAM_2_REG_OFFSET 0x1c |
Definition at line 106 of file pwm_regs.h.
| #define PWM_PWM_PARAM_2_REG_RESVAL 0x0u |
Definition at line 107 of file pwm_regs.h.
| #define PWM_PWM_PARAM_3_BLINK_EN_3_BIT 31 |
Definition at line 123 of file pwm_regs.h.
| #define PWM_PWM_PARAM_3_HTBT_EN_3_BIT 30 |
Definition at line 122 of file pwm_regs.h.
| #define PWM_PWM_PARAM_3_PHASE_DELAY_3_FIELD ((bitfield_field32_t) { .mask = PWM_PWM_PARAM_3_PHASE_DELAY_3_MASK, .index = PWM_PWM_PARAM_3_PHASE_DELAY_3_OFFSET }) |
Definition at line 120 of file pwm_regs.h.
| #define PWM_PWM_PARAM_3_PHASE_DELAY_3_MASK 0xffffu |
Definition at line 118 of file pwm_regs.h.
| #define PWM_PWM_PARAM_3_PHASE_DELAY_3_OFFSET 0 |
Definition at line 119 of file pwm_regs.h.
| #define PWM_PWM_PARAM_3_REG_OFFSET 0x20 |
Definition at line 116 of file pwm_regs.h.
| #define PWM_PWM_PARAM_3_REG_RESVAL 0x0u |
Definition at line 117 of file pwm_regs.h.
| #define PWM_PWM_PARAM_4_BLINK_EN_4_BIT 31 |
Definition at line 133 of file pwm_regs.h.
| #define PWM_PWM_PARAM_4_HTBT_EN_4_BIT 30 |
Definition at line 132 of file pwm_regs.h.
| #define PWM_PWM_PARAM_4_PHASE_DELAY_4_FIELD ((bitfield_field32_t) { .mask = PWM_PWM_PARAM_4_PHASE_DELAY_4_MASK, .index = PWM_PWM_PARAM_4_PHASE_DELAY_4_OFFSET }) |
Definition at line 130 of file pwm_regs.h.
| #define PWM_PWM_PARAM_4_PHASE_DELAY_4_MASK 0xffffu |
Definition at line 128 of file pwm_regs.h.
| #define PWM_PWM_PARAM_4_PHASE_DELAY_4_OFFSET 0 |
Definition at line 129 of file pwm_regs.h.
| #define PWM_PWM_PARAM_4_REG_OFFSET 0x24 |
Definition at line 126 of file pwm_regs.h.
| #define PWM_PWM_PARAM_4_REG_RESVAL 0x0u |
Definition at line 127 of file pwm_regs.h.
| #define PWM_PWM_PARAM_5_BLINK_EN_5_BIT 31 |
Definition at line 143 of file pwm_regs.h.
| #define PWM_PWM_PARAM_5_HTBT_EN_5_BIT 30 |
Definition at line 142 of file pwm_regs.h.
| #define PWM_PWM_PARAM_5_PHASE_DELAY_5_FIELD ((bitfield_field32_t) { .mask = PWM_PWM_PARAM_5_PHASE_DELAY_5_MASK, .index = PWM_PWM_PARAM_5_PHASE_DELAY_5_OFFSET }) |
Definition at line 140 of file pwm_regs.h.
| #define PWM_PWM_PARAM_5_PHASE_DELAY_5_MASK 0xffffu |
Definition at line 138 of file pwm_regs.h.
| #define PWM_PWM_PARAM_5_PHASE_DELAY_5_OFFSET 0 |
Definition at line 139 of file pwm_regs.h.
| #define PWM_PWM_PARAM_5_REG_OFFSET 0x28 |
Definition at line 136 of file pwm_regs.h.
| #define PWM_PWM_PARAM_5_REG_RESVAL 0x0u |
Definition at line 137 of file pwm_regs.h.
| #define PWM_PWM_PARAM_BLINK_EN_FIELD_WIDTH 1 |
Definition at line 82 of file pwm_regs.h.
| #define PWM_PWM_PARAM_HTBT_EN_FIELD_WIDTH 1 |
Definition at line 81 of file pwm_regs.h.
| #define PWM_PWM_PARAM_MULTIREG_COUNT 6 |
Definition at line 83 of file pwm_regs.h.
| #define PWM_PWM_PARAM_PHASE_DELAY_FIELD_WIDTH 16 |
Definition at line 80 of file pwm_regs.h.
| #define PWM_REGWEN_REG_OFFSET 0x4 |
Definition at line 34 of file pwm_regs.h.
| #define PWM_REGWEN_REG_RESVAL 0x1u |
Definition at line 35 of file pwm_regs.h.
| #define PWM_REGWEN_REGWEN_BIT 0 |
Definition at line 36 of file pwm_regs.h.