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Software APIs
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Software APIs
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Generated register defines for keymgr_dpe. More...
Go to the source code of this file.
Generated register defines for keymgr_dpe.
Definition in file keymgr_dpe_regs.h.
| #define KEYMGR_DPE_ALERT_TEST_FATAL_FAULT_ERR_BIT 1 |
Definition at line 62 of file keymgr_dpe_regs.h.
| #define KEYMGR_DPE_ALERT_TEST_RECOV_OPERATION_ERR_BIT 0 |
Definition at line 61 of file keymgr_dpe_regs.h.
| #define KEYMGR_DPE_ALERT_TEST_REG_OFFSET 0xc |
Definition at line 59 of file keymgr_dpe_regs.h.
| #define KEYMGR_DPE_ALERT_TEST_REG_RESVAL 0x0u |
Definition at line 60 of file keymgr_dpe_regs.h.
| #define KEYMGR_DPE_CFG_REGWEN_EN_BIT 0 |
Definition at line 67 of file keymgr_dpe_regs.h.
| #define KEYMGR_DPE_CFG_REGWEN_REG_OFFSET 0x10 |
Definition at line 65 of file keymgr_dpe_regs.h.
| #define KEYMGR_DPE_CFG_REGWEN_REG_RESVAL 0x1u |
Definition at line 66 of file keymgr_dpe_regs.h.
| #define KEYMGR_DPE_CONTROL_SHADOWED_DEST_SEL_FIELD ((bitfield_field32_t) { .mask = KEYMGR_DPE_CONTROL_SHADOWED_DEST_SEL_MASK, .index = KEYMGR_DPE_CONTROL_SHADOWED_DEST_SEL_OFFSET }) |
Definition at line 89 of file keymgr_dpe_regs.h.
| #define KEYMGR_DPE_CONTROL_SHADOWED_DEST_SEL_MASK 0x3u |
Definition at line 87 of file keymgr_dpe_regs.h.
| #define KEYMGR_DPE_CONTROL_SHADOWED_DEST_SEL_OFFSET 12 |
Definition at line 88 of file keymgr_dpe_regs.h.
| #define KEYMGR_DPE_CONTROL_SHADOWED_DEST_SEL_VALUE_AES 0x1 |
Definition at line 92 of file keymgr_dpe_regs.h.
| #define KEYMGR_DPE_CONTROL_SHADOWED_DEST_SEL_VALUE_KMAC 0x2 |
Definition at line 93 of file keymgr_dpe_regs.h.
| #define KEYMGR_DPE_CONTROL_SHADOWED_DEST_SEL_VALUE_NONE 0x0 |
Definition at line 91 of file keymgr_dpe_regs.h.
| #define KEYMGR_DPE_CONTROL_SHADOWED_DEST_SEL_VALUE_OTBN 0x3 |
Definition at line 94 of file keymgr_dpe_regs.h.
| #define KEYMGR_DPE_CONTROL_SHADOWED_OPERATION_FIELD ((bitfield_field32_t) { .mask = KEYMGR_DPE_CONTROL_SHADOWED_OPERATION_MASK, .index = KEYMGR_DPE_CONTROL_SHADOWED_OPERATION_OFFSET }) |
Definition at line 80 of file keymgr_dpe_regs.h.
| #define KEYMGR_DPE_CONTROL_SHADOWED_OPERATION_MASK 0x7u |
Definition at line 78 of file keymgr_dpe_regs.h.
| #define KEYMGR_DPE_CONTROL_SHADOWED_OPERATION_OFFSET 4 |
Definition at line 79 of file keymgr_dpe_regs.h.
| #define KEYMGR_DPE_CONTROL_SHADOWED_OPERATION_VALUE_ADVANCE 0x0 |
Definition at line 82 of file keymgr_dpe_regs.h.
| #define KEYMGR_DPE_CONTROL_SHADOWED_OPERATION_VALUE_DISABLE 0x4 |
Definition at line 86 of file keymgr_dpe_regs.h.
| #define KEYMGR_DPE_CONTROL_SHADOWED_OPERATION_VALUE_ERASE_SLOT 0x1 |
Definition at line 83 of file keymgr_dpe_regs.h.
| #define KEYMGR_DPE_CONTROL_SHADOWED_OPERATION_VALUE_GENERATE_HW_OUTPUT 0x3 |
Definition at line 85 of file keymgr_dpe_regs.h.
| #define KEYMGR_DPE_CONTROL_SHADOWED_OPERATION_VALUE_GENERATE_SW_OUTPUT 0x2 |
Definition at line 84 of file keymgr_dpe_regs.h.
| #define KEYMGR_DPE_CONTROL_SHADOWED_REG_OFFSET 0x18 |
Definition at line 76 of file keymgr_dpe_regs.h.
| #define KEYMGR_DPE_CONTROL_SHADOWED_REG_RESVAL 0x10u |
Definition at line 77 of file keymgr_dpe_regs.h.
| #define KEYMGR_DPE_CONTROL_SHADOWED_SLOT_DST_SEL_FIELD ((bitfield_field32_t) { .mask = KEYMGR_DPE_CONTROL_SHADOWED_SLOT_DST_SEL_MASK, .index = KEYMGR_DPE_CONTROL_SHADOWED_SLOT_DST_SEL_OFFSET }) |
Definition at line 101 of file keymgr_dpe_regs.h.
| #define KEYMGR_DPE_CONTROL_SHADOWED_SLOT_DST_SEL_MASK 0x3u |
Definition at line 99 of file keymgr_dpe_regs.h.
| #define KEYMGR_DPE_CONTROL_SHADOWED_SLOT_DST_SEL_OFFSET 18 |
Definition at line 100 of file keymgr_dpe_regs.h.
| #define KEYMGR_DPE_CONTROL_SHADOWED_SLOT_SRC_SEL_FIELD ((bitfield_field32_t) { .mask = KEYMGR_DPE_CONTROL_SHADOWED_SLOT_SRC_SEL_MASK, .index = KEYMGR_DPE_CONTROL_SHADOWED_SLOT_SRC_SEL_OFFSET }) |
Definition at line 97 of file keymgr_dpe_regs.h.
| #define KEYMGR_DPE_CONTROL_SHADOWED_SLOT_SRC_SEL_MASK 0x3u |
Definition at line 95 of file keymgr_dpe_regs.h.
| #define KEYMGR_DPE_CONTROL_SHADOWED_SLOT_SRC_SEL_OFFSET 14 |
Definition at line 96 of file keymgr_dpe_regs.h.
| #define KEYMGR_DPE_DEBUG_INACTIVE_LC_EN_BIT 8 |
Definition at line 367 of file keymgr_dpe_regs.h.
| #define KEYMGR_DPE_DEBUG_INVALID_CREATOR_SEED_BIT 0 |
Definition at line 359 of file keymgr_dpe_regs.h.
| #define KEYMGR_DPE_DEBUG_INVALID_DEV_ID_BIT 2 |
Definition at line 361 of file keymgr_dpe_regs.h.
| #define KEYMGR_DPE_DEBUG_INVALID_DIGEST_BIT 6 |
Definition at line 365 of file keymgr_dpe_regs.h.
| #define KEYMGR_DPE_DEBUG_INVALID_HEALTH_STATE_BIT 3 |
Definition at line 362 of file keymgr_dpe_regs.h.
| #define KEYMGR_DPE_DEBUG_INVALID_KEY_BIT 5 |
Definition at line 364 of file keymgr_dpe_regs.h.
| #define KEYMGR_DPE_DEBUG_INVALID_KEY_VERSION_BIT 4 |
Definition at line 363 of file keymgr_dpe_regs.h.
| #define KEYMGR_DPE_DEBUG_INVALID_OWNER_SEED_BIT 1 |
Definition at line 360 of file keymgr_dpe_regs.h.
| #define KEYMGR_DPE_DEBUG_INVALID_ROOT_KEY_BIT 7 |
Definition at line 366 of file keymgr_dpe_regs.h.
| #define KEYMGR_DPE_DEBUG_REG_OFFSET 0xd0 |
Definition at line 357 of file keymgr_dpe_regs.h.
| #define KEYMGR_DPE_DEBUG_REG_RESVAL 0x0u |
Definition at line 358 of file keymgr_dpe_regs.h.
| #define KEYMGR_DPE_ERR_CODE_INVALID_KMAC_INPUT_BIT 1 |
Definition at line 335 of file keymgr_dpe_regs.h.
| #define KEYMGR_DPE_ERR_CODE_INVALID_OP_BIT 0 |
Definition at line 334 of file keymgr_dpe_regs.h.
| #define KEYMGR_DPE_ERR_CODE_INVALID_SHADOW_UPDATE_BIT 2 |
Definition at line 336 of file keymgr_dpe_regs.h.
| #define KEYMGR_DPE_ERR_CODE_REG_OFFSET 0xc8 |
Definition at line 332 of file keymgr_dpe_regs.h.
| #define KEYMGR_DPE_ERR_CODE_REG_RESVAL 0x0u |
Definition at line 333 of file keymgr_dpe_regs.h.
| #define KEYMGR_DPE_FAULT_STATUS_CMD_BIT 0 |
Definition at line 341 of file keymgr_dpe_regs.h.
| #define KEYMGR_DPE_FAULT_STATUS_CTRL_FSM_CHK_BIT 8 |
Definition at line 349 of file keymgr_dpe_regs.h.
| #define KEYMGR_DPE_FAULT_STATUS_CTRL_FSM_CNT_BIT 9 |
Definition at line 350 of file keymgr_dpe_regs.h.
| #define KEYMGR_DPE_FAULT_STATUS_CTRL_FSM_INTG_BIT 7 |
Definition at line 348 of file keymgr_dpe_regs.h.
| #define KEYMGR_DPE_FAULT_STATUS_KEY_ECC_BIT 13 |
Definition at line 354 of file keymgr_dpe_regs.h.
| #define KEYMGR_DPE_FAULT_STATUS_KMAC_DONE_BIT 2 |
Definition at line 343 of file keymgr_dpe_regs.h.
| #define KEYMGR_DPE_FAULT_STATUS_KMAC_FSM_BIT 1 |
Definition at line 342 of file keymgr_dpe_regs.h.
| #define KEYMGR_DPE_FAULT_STATUS_KMAC_OP_BIT 3 |
Definition at line 344 of file keymgr_dpe_regs.h.
| #define KEYMGR_DPE_FAULT_STATUS_KMAC_OUT_BIT 4 |
Definition at line 345 of file keymgr_dpe_regs.h.
| #define KEYMGR_DPE_FAULT_STATUS_REG_OFFSET 0xcc |
Definition at line 339 of file keymgr_dpe_regs.h.
| #define KEYMGR_DPE_FAULT_STATUS_REG_RESVAL 0x0u |
Definition at line 340 of file keymgr_dpe_regs.h.
| #define KEYMGR_DPE_FAULT_STATUS_REGFILE_INTG_BIT 5 |
Definition at line 346 of file keymgr_dpe_regs.h.
| #define KEYMGR_DPE_FAULT_STATUS_RESEED_CNT_BIT 10 |
Definition at line 351 of file keymgr_dpe_regs.h.
| #define KEYMGR_DPE_FAULT_STATUS_SHADOW_BIT 6 |
Definition at line 347 of file keymgr_dpe_regs.h.
| #define KEYMGR_DPE_FAULT_STATUS_SIDE_CTRL_FSM_BIT 11 |
Definition at line 352 of file keymgr_dpe_regs.h.
| #define KEYMGR_DPE_FAULT_STATUS_SIDE_CTRL_SEL_BIT 12 |
Definition at line 353 of file keymgr_dpe_regs.h.
| #define KEYMGR_DPE_INTR_COMMON_OP_DONE_BIT 0 |
Definition at line 41 of file keymgr_dpe_regs.h.
| #define KEYMGR_DPE_INTR_ENABLE_OP_DONE_BIT 0 |
Definition at line 51 of file keymgr_dpe_regs.h.
| #define KEYMGR_DPE_INTR_ENABLE_REG_OFFSET 0x4 |
Definition at line 49 of file keymgr_dpe_regs.h.
| #define KEYMGR_DPE_INTR_ENABLE_REG_RESVAL 0x0u |
Definition at line 50 of file keymgr_dpe_regs.h.
| #define KEYMGR_DPE_INTR_STATE_OP_DONE_BIT 0 |
Definition at line 46 of file keymgr_dpe_regs.h.
| #define KEYMGR_DPE_INTR_STATE_REG_OFFSET 0x0 |
Definition at line 44 of file keymgr_dpe_regs.h.
| #define KEYMGR_DPE_INTR_STATE_REG_RESVAL 0x0u |
Definition at line 45 of file keymgr_dpe_regs.h.
| #define KEYMGR_DPE_INTR_TEST_OP_DONE_BIT 0 |
Definition at line 56 of file keymgr_dpe_regs.h.
| #define KEYMGR_DPE_INTR_TEST_REG_OFFSET 0x8 |
Definition at line 54 of file keymgr_dpe_regs.h.
| #define KEYMGR_DPE_INTR_TEST_REG_RESVAL 0x0u |
Definition at line 55 of file keymgr_dpe_regs.h.
| #define KEYMGR_DPE_KEY_VERSION_MULTIREG_COUNT 1 |
Definition at line 220 of file keymgr_dpe_regs.h.
| #define KEYMGR_DPE_KEY_VERSION_REG_OFFSET 0x74 |
Definition at line 223 of file keymgr_dpe_regs.h.
| #define KEYMGR_DPE_KEY_VERSION_REG_RESVAL 0x0u |
Definition at line 224 of file keymgr_dpe_regs.h.
| #define KEYMGR_DPE_KEY_VERSION_VAL_FIELD_WIDTH 32 |
Definition at line 219 of file keymgr_dpe_regs.h.
| #define KEYMGR_DPE_MAX_KEY_VER_REGWEN_EN_BIT 0 |
Definition at line 229 of file keymgr_dpe_regs.h.
| #define KEYMGR_DPE_MAX_KEY_VER_REGWEN_REG_OFFSET 0x78 |
Definition at line 227 of file keymgr_dpe_regs.h.
| #define KEYMGR_DPE_MAX_KEY_VER_REGWEN_REG_RESVAL 0x1u |
Definition at line 228 of file keymgr_dpe_regs.h.
| #define KEYMGR_DPE_MAX_KEY_VER_SHADOWED_REG_OFFSET 0x7c |
Definition at line 232 of file keymgr_dpe_regs.h.
| #define KEYMGR_DPE_MAX_KEY_VER_SHADOWED_REG_RESVAL 0x0u |
Definition at line 233 of file keymgr_dpe_regs.h.
| #define KEYMGR_DPE_OP_STATUS_REG_OFFSET 0xc4 |
Definition at line 320 of file keymgr_dpe_regs.h.
| #define KEYMGR_DPE_OP_STATUS_REG_RESVAL 0x0u |
Definition at line 321 of file keymgr_dpe_regs.h.
| #define KEYMGR_DPE_OP_STATUS_STATUS_FIELD ((bitfield_field32_t) { .mask = KEYMGR_DPE_OP_STATUS_STATUS_MASK, .index = KEYMGR_DPE_OP_STATUS_STATUS_OFFSET }) |
Definition at line 324 of file keymgr_dpe_regs.h.
| #define KEYMGR_DPE_OP_STATUS_STATUS_MASK 0x3u |
Definition at line 322 of file keymgr_dpe_regs.h.
| #define KEYMGR_DPE_OP_STATUS_STATUS_OFFSET 0 |
Definition at line 323 of file keymgr_dpe_regs.h.
| #define KEYMGR_DPE_OP_STATUS_STATUS_VALUE_DONE_ERROR 0x3 |
Definition at line 329 of file keymgr_dpe_regs.h.
| #define KEYMGR_DPE_OP_STATUS_STATUS_VALUE_DONE_SUCCESS 0x2 |
Definition at line 328 of file keymgr_dpe_regs.h.
| #define KEYMGR_DPE_OP_STATUS_STATUS_VALUE_IDLE 0x0 |
Definition at line 326 of file keymgr_dpe_regs.h.
| #define KEYMGR_DPE_OP_STATUS_STATUS_VALUE_WIP 0x1 |
Definition at line 327 of file keymgr_dpe_regs.h.
| #define KEYMGR_DPE_PARAM_NUM_ALERTS 2 |
Definition at line 35 of file keymgr_dpe_regs.h.
| #define KEYMGR_DPE_PARAM_NUM_KEY_VERSION 1 |
Definition at line 29 of file keymgr_dpe_regs.h.
| #define KEYMGR_DPE_PARAM_NUM_OUT_REG 8 |
Definition at line 26 of file keymgr_dpe_regs.h.
| #define KEYMGR_DPE_PARAM_NUM_ROM_DIGEST_INPUTS 2 |
Definition at line 32 of file keymgr_dpe_regs.h.
| #define KEYMGR_DPE_PARAM_NUM_SALT_REG 8 |
Definition at line 20 of file keymgr_dpe_regs.h.
| #define KEYMGR_DPE_PARAM_NUM_SW_BINDING_REG 8 |
Definition at line 23 of file keymgr_dpe_regs.h.
| #define KEYMGR_DPE_PARAM_REG_WIDTH 32 |
Definition at line 38 of file keymgr_dpe_regs.h.
| #define KEYMGR_DPE_RESEED_INTERVAL_REGWEN_EN_BIT 0 |
Definition at line 119 of file keymgr_dpe_regs.h.
| #define KEYMGR_DPE_RESEED_INTERVAL_REGWEN_REG_OFFSET 0x20 |
Definition at line 117 of file keymgr_dpe_regs.h.
| #define KEYMGR_DPE_RESEED_INTERVAL_REGWEN_REG_RESVAL 0x1u |
Definition at line 118 of file keymgr_dpe_regs.h.
| #define KEYMGR_DPE_RESEED_INTERVAL_SHADOWED_REG_OFFSET 0x24 |
Definition at line 122 of file keymgr_dpe_regs.h.
| #define KEYMGR_DPE_RESEED_INTERVAL_SHADOWED_REG_RESVAL 0x100u |
Definition at line 123 of file keymgr_dpe_regs.h.
| #define KEYMGR_DPE_RESEED_INTERVAL_SHADOWED_VAL_FIELD ((bitfield_field32_t) { .mask = KEYMGR_DPE_RESEED_INTERVAL_SHADOWED_VAL_MASK, .index = KEYMGR_DPE_RESEED_INTERVAL_SHADOWED_VAL_OFFSET }) |
Definition at line 126 of file keymgr_dpe_regs.h.
| #define KEYMGR_DPE_RESEED_INTERVAL_SHADOWED_VAL_MASK 0xffffu |
Definition at line 124 of file keymgr_dpe_regs.h.
| #define KEYMGR_DPE_RESEED_INTERVAL_SHADOWED_VAL_OFFSET 0 |
Definition at line 125 of file keymgr_dpe_regs.h.
| #define KEYMGR_DPE_SALT_0_REG_OFFSET 0x54 |
Definition at line 187 of file keymgr_dpe_regs.h.
| #define KEYMGR_DPE_SALT_0_REG_RESVAL 0x0u |
Definition at line 188 of file keymgr_dpe_regs.h.
| #define KEYMGR_DPE_SALT_1_REG_OFFSET 0x58 |
Definition at line 191 of file keymgr_dpe_regs.h.
| #define KEYMGR_DPE_SALT_1_REG_RESVAL 0x0u |
Definition at line 192 of file keymgr_dpe_regs.h.
| #define KEYMGR_DPE_SALT_2_REG_OFFSET 0x5c |
Definition at line 195 of file keymgr_dpe_regs.h.
| #define KEYMGR_DPE_SALT_2_REG_RESVAL 0x0u |
Definition at line 196 of file keymgr_dpe_regs.h.
| #define KEYMGR_DPE_SALT_3_REG_OFFSET 0x60 |
Definition at line 199 of file keymgr_dpe_regs.h.
| #define KEYMGR_DPE_SALT_3_REG_RESVAL 0x0u |
Definition at line 200 of file keymgr_dpe_regs.h.
| #define KEYMGR_DPE_SALT_4_REG_OFFSET 0x64 |
Definition at line 203 of file keymgr_dpe_regs.h.
| #define KEYMGR_DPE_SALT_4_REG_RESVAL 0x0u |
Definition at line 204 of file keymgr_dpe_regs.h.
| #define KEYMGR_DPE_SALT_5_REG_OFFSET 0x68 |
Definition at line 207 of file keymgr_dpe_regs.h.
| #define KEYMGR_DPE_SALT_5_REG_RESVAL 0x0u |
Definition at line 208 of file keymgr_dpe_regs.h.
| #define KEYMGR_DPE_SALT_6_REG_OFFSET 0x6c |
Definition at line 211 of file keymgr_dpe_regs.h.
| #define KEYMGR_DPE_SALT_6_REG_RESVAL 0x0u |
Definition at line 212 of file keymgr_dpe_regs.h.
| #define KEYMGR_DPE_SALT_7_REG_OFFSET 0x70 |
Definition at line 215 of file keymgr_dpe_regs.h.
| #define KEYMGR_DPE_SALT_7_REG_RESVAL 0x0u |
Definition at line 216 of file keymgr_dpe_regs.h.
| #define KEYMGR_DPE_SALT_MULTIREG_COUNT 8 |
Definition at line 184 of file keymgr_dpe_regs.h.
| #define KEYMGR_DPE_SALT_VAL_FIELD_WIDTH 32 |
Definition at line 183 of file keymgr_dpe_regs.h.
| #define KEYMGR_DPE_SIDELOAD_CLEAR_REG_OFFSET 0x1c |
Definition at line 105 of file keymgr_dpe_regs.h.
| #define KEYMGR_DPE_SIDELOAD_CLEAR_REG_RESVAL 0x0u |
Definition at line 106 of file keymgr_dpe_regs.h.
| #define KEYMGR_DPE_SIDELOAD_CLEAR_VAL_FIELD ((bitfield_field32_t) { .mask = KEYMGR_DPE_SIDELOAD_CLEAR_VAL_MASK, .index = KEYMGR_DPE_SIDELOAD_CLEAR_VAL_OFFSET }) |
Definition at line 109 of file keymgr_dpe_regs.h.
| #define KEYMGR_DPE_SIDELOAD_CLEAR_VAL_MASK 0x7u |
Definition at line 107 of file keymgr_dpe_regs.h.
| #define KEYMGR_DPE_SIDELOAD_CLEAR_VAL_OFFSET 0 |
Definition at line 108 of file keymgr_dpe_regs.h.
| #define KEYMGR_DPE_SIDELOAD_CLEAR_VAL_VALUE_AES 0x1 |
Definition at line 112 of file keymgr_dpe_regs.h.
| #define KEYMGR_DPE_SIDELOAD_CLEAR_VAL_VALUE_KMAC 0x2 |
Definition at line 113 of file keymgr_dpe_regs.h.
| #define KEYMGR_DPE_SIDELOAD_CLEAR_VAL_VALUE_NONE 0x0 |
Definition at line 111 of file keymgr_dpe_regs.h.
| #define KEYMGR_DPE_SIDELOAD_CLEAR_VAL_VALUE_OTBN 0x3 |
Definition at line 114 of file keymgr_dpe_regs.h.
| #define KEYMGR_DPE_SLOT_POLICY_ALLOW_CHILD_BIT 0 |
Definition at line 137 of file keymgr_dpe_regs.h.
| #define KEYMGR_DPE_SLOT_POLICY_EXPORTABLE_BIT 1 |
Definition at line 138 of file keymgr_dpe_regs.h.
| #define KEYMGR_DPE_SLOT_POLICY_REG_OFFSET 0x2c |
Definition at line 135 of file keymgr_dpe_regs.h.
| #define KEYMGR_DPE_SLOT_POLICY_REG_RESVAL 0x0u |
Definition at line 136 of file keymgr_dpe_regs.h.
| #define KEYMGR_DPE_SLOT_POLICY_REGWEN_EN_BIT 0 |
Definition at line 132 of file keymgr_dpe_regs.h.
| #define KEYMGR_DPE_SLOT_POLICY_REGWEN_REG_OFFSET 0x28 |
Definition at line 130 of file keymgr_dpe_regs.h.
| #define KEYMGR_DPE_SLOT_POLICY_REGWEN_REG_RESVAL 0x1u |
Definition at line 131 of file keymgr_dpe_regs.h.
| #define KEYMGR_DPE_SLOT_POLICY_RETAIN_PARENT_BIT 2 |
Definition at line 139 of file keymgr_dpe_regs.h.
| #define KEYMGR_DPE_START_EN_BIT 0 |
Definition at line 72 of file keymgr_dpe_regs.h.
| #define KEYMGR_DPE_START_EN_VALUE_VALID_STATE 0x1 |
Definition at line 73 of file keymgr_dpe_regs.h.
| #define KEYMGR_DPE_START_REG_OFFSET 0x14 |
Definition at line 70 of file keymgr_dpe_regs.h.
| #define KEYMGR_DPE_START_REG_RESVAL 0x0u |
Definition at line 71 of file keymgr_dpe_regs.h.
| #define KEYMGR_DPE_SW_BINDING_0_REG_OFFSET 0x34 |
Definition at line 151 of file keymgr_dpe_regs.h.
| #define KEYMGR_DPE_SW_BINDING_0_REG_RESVAL 0x0u |
Definition at line 152 of file keymgr_dpe_regs.h.
| #define KEYMGR_DPE_SW_BINDING_1_REG_OFFSET 0x38 |
Definition at line 155 of file keymgr_dpe_regs.h.
| #define KEYMGR_DPE_SW_BINDING_1_REG_RESVAL 0x0u |
Definition at line 156 of file keymgr_dpe_regs.h.
| #define KEYMGR_DPE_SW_BINDING_2_REG_OFFSET 0x3c |
Definition at line 159 of file keymgr_dpe_regs.h.
| #define KEYMGR_DPE_SW_BINDING_2_REG_RESVAL 0x0u |
Definition at line 160 of file keymgr_dpe_regs.h.
| #define KEYMGR_DPE_SW_BINDING_3_REG_OFFSET 0x40 |
Definition at line 163 of file keymgr_dpe_regs.h.
| #define KEYMGR_DPE_SW_BINDING_3_REG_RESVAL 0x0u |
Definition at line 164 of file keymgr_dpe_regs.h.
| #define KEYMGR_DPE_SW_BINDING_4_REG_OFFSET 0x44 |
Definition at line 167 of file keymgr_dpe_regs.h.
| #define KEYMGR_DPE_SW_BINDING_4_REG_RESVAL 0x0u |
Definition at line 168 of file keymgr_dpe_regs.h.
| #define KEYMGR_DPE_SW_BINDING_5_REG_OFFSET 0x48 |
Definition at line 171 of file keymgr_dpe_regs.h.
| #define KEYMGR_DPE_SW_BINDING_5_REG_RESVAL 0x0u |
Definition at line 172 of file keymgr_dpe_regs.h.
| #define KEYMGR_DPE_SW_BINDING_6_REG_OFFSET 0x4c |
Definition at line 175 of file keymgr_dpe_regs.h.
| #define KEYMGR_DPE_SW_BINDING_6_REG_RESVAL 0x0u |
Definition at line 176 of file keymgr_dpe_regs.h.
| #define KEYMGR_DPE_SW_BINDING_7_REG_OFFSET 0x50 |
Definition at line 179 of file keymgr_dpe_regs.h.
| #define KEYMGR_DPE_SW_BINDING_7_REG_RESVAL 0x0u |
Definition at line 180 of file keymgr_dpe_regs.h.
| #define KEYMGR_DPE_SW_BINDING_MULTIREG_COUNT 8 |
Definition at line 148 of file keymgr_dpe_regs.h.
| #define KEYMGR_DPE_SW_BINDING_REGWEN_EN_BIT 0 |
Definition at line 144 of file keymgr_dpe_regs.h.
| #define KEYMGR_DPE_SW_BINDING_REGWEN_REG_OFFSET 0x30 |
Definition at line 142 of file keymgr_dpe_regs.h.
| #define KEYMGR_DPE_SW_BINDING_REGWEN_REG_RESVAL 0x1u |
Definition at line 143 of file keymgr_dpe_regs.h.
| #define KEYMGR_DPE_SW_BINDING_VAL_FIELD_WIDTH 32 |
Definition at line 147 of file keymgr_dpe_regs.h.
| #define KEYMGR_DPE_SW_SHARE0_OUTPUT_0_REG_OFFSET 0x80 |
Definition at line 240 of file keymgr_dpe_regs.h.
| #define KEYMGR_DPE_SW_SHARE0_OUTPUT_0_REG_RESVAL 0x0u |
Definition at line 241 of file keymgr_dpe_regs.h.
| #define KEYMGR_DPE_SW_SHARE0_OUTPUT_1_REG_OFFSET 0x84 |
Definition at line 244 of file keymgr_dpe_regs.h.
| #define KEYMGR_DPE_SW_SHARE0_OUTPUT_1_REG_RESVAL 0x0u |
Definition at line 245 of file keymgr_dpe_regs.h.
| #define KEYMGR_DPE_SW_SHARE0_OUTPUT_2_REG_OFFSET 0x88 |
Definition at line 248 of file keymgr_dpe_regs.h.
| #define KEYMGR_DPE_SW_SHARE0_OUTPUT_2_REG_RESVAL 0x0u |
Definition at line 249 of file keymgr_dpe_regs.h.
| #define KEYMGR_DPE_SW_SHARE0_OUTPUT_3_REG_OFFSET 0x8c |
Definition at line 252 of file keymgr_dpe_regs.h.
| #define KEYMGR_DPE_SW_SHARE0_OUTPUT_3_REG_RESVAL 0x0u |
Definition at line 253 of file keymgr_dpe_regs.h.
| #define KEYMGR_DPE_SW_SHARE0_OUTPUT_4_REG_OFFSET 0x90 |
Definition at line 256 of file keymgr_dpe_regs.h.
| #define KEYMGR_DPE_SW_SHARE0_OUTPUT_4_REG_RESVAL 0x0u |
Definition at line 257 of file keymgr_dpe_regs.h.
| #define KEYMGR_DPE_SW_SHARE0_OUTPUT_5_REG_OFFSET 0x94 |
Definition at line 260 of file keymgr_dpe_regs.h.
| #define KEYMGR_DPE_SW_SHARE0_OUTPUT_5_REG_RESVAL 0x0u |
Definition at line 261 of file keymgr_dpe_regs.h.
| #define KEYMGR_DPE_SW_SHARE0_OUTPUT_6_REG_OFFSET 0x98 |
Definition at line 264 of file keymgr_dpe_regs.h.
| #define KEYMGR_DPE_SW_SHARE0_OUTPUT_6_REG_RESVAL 0x0u |
Definition at line 265 of file keymgr_dpe_regs.h.
| #define KEYMGR_DPE_SW_SHARE0_OUTPUT_7_REG_OFFSET 0x9c |
Definition at line 268 of file keymgr_dpe_regs.h.
| #define KEYMGR_DPE_SW_SHARE0_OUTPUT_7_REG_RESVAL 0x0u |
Definition at line 269 of file keymgr_dpe_regs.h.
| #define KEYMGR_DPE_SW_SHARE0_OUTPUT_MULTIREG_COUNT 8 |
Definition at line 237 of file keymgr_dpe_regs.h.
| #define KEYMGR_DPE_SW_SHARE0_OUTPUT_VAL_FIELD_WIDTH 32 |
Definition at line 236 of file keymgr_dpe_regs.h.
| #define KEYMGR_DPE_SW_SHARE1_OUTPUT_0_REG_OFFSET 0xa0 |
Definition at line 276 of file keymgr_dpe_regs.h.
| #define KEYMGR_DPE_SW_SHARE1_OUTPUT_0_REG_RESVAL 0x0u |
Definition at line 277 of file keymgr_dpe_regs.h.
| #define KEYMGR_DPE_SW_SHARE1_OUTPUT_1_REG_OFFSET 0xa4 |
Definition at line 280 of file keymgr_dpe_regs.h.
| #define KEYMGR_DPE_SW_SHARE1_OUTPUT_1_REG_RESVAL 0x0u |
Definition at line 281 of file keymgr_dpe_regs.h.
| #define KEYMGR_DPE_SW_SHARE1_OUTPUT_2_REG_OFFSET 0xa8 |
Definition at line 284 of file keymgr_dpe_regs.h.
| #define KEYMGR_DPE_SW_SHARE1_OUTPUT_2_REG_RESVAL 0x0u |
Definition at line 285 of file keymgr_dpe_regs.h.
| #define KEYMGR_DPE_SW_SHARE1_OUTPUT_3_REG_OFFSET 0xac |
Definition at line 288 of file keymgr_dpe_regs.h.
| #define KEYMGR_DPE_SW_SHARE1_OUTPUT_3_REG_RESVAL 0x0u |
Definition at line 289 of file keymgr_dpe_regs.h.
| #define KEYMGR_DPE_SW_SHARE1_OUTPUT_4_REG_OFFSET 0xb0 |
Definition at line 292 of file keymgr_dpe_regs.h.
| #define KEYMGR_DPE_SW_SHARE1_OUTPUT_4_REG_RESVAL 0x0u |
Definition at line 293 of file keymgr_dpe_regs.h.
| #define KEYMGR_DPE_SW_SHARE1_OUTPUT_5_REG_OFFSET 0xb4 |
Definition at line 296 of file keymgr_dpe_regs.h.
| #define KEYMGR_DPE_SW_SHARE1_OUTPUT_5_REG_RESVAL 0x0u |
Definition at line 297 of file keymgr_dpe_regs.h.
| #define KEYMGR_DPE_SW_SHARE1_OUTPUT_6_REG_OFFSET 0xb8 |
Definition at line 300 of file keymgr_dpe_regs.h.
| #define KEYMGR_DPE_SW_SHARE1_OUTPUT_6_REG_RESVAL 0x0u |
Definition at line 301 of file keymgr_dpe_regs.h.
| #define KEYMGR_DPE_SW_SHARE1_OUTPUT_7_REG_OFFSET 0xbc |
Definition at line 304 of file keymgr_dpe_regs.h.
| #define KEYMGR_DPE_SW_SHARE1_OUTPUT_7_REG_RESVAL 0x0u |
Definition at line 305 of file keymgr_dpe_regs.h.
| #define KEYMGR_DPE_SW_SHARE1_OUTPUT_MULTIREG_COUNT 8 |
Definition at line 273 of file keymgr_dpe_regs.h.
| #define KEYMGR_DPE_SW_SHARE1_OUTPUT_VAL_FIELD_WIDTH 32 |
Definition at line 272 of file keymgr_dpe_regs.h.
| #define KEYMGR_DPE_WORKING_STATE_REG_OFFSET 0xc0 |
Definition at line 308 of file keymgr_dpe_regs.h.
| #define KEYMGR_DPE_WORKING_STATE_REG_RESVAL 0x0u |
Definition at line 309 of file keymgr_dpe_regs.h.
| #define KEYMGR_DPE_WORKING_STATE_STATE_FIELD ((bitfield_field32_t) { .mask = KEYMGR_DPE_WORKING_STATE_STATE_MASK, .index = KEYMGR_DPE_WORKING_STATE_STATE_OFFSET }) |
Definition at line 312 of file keymgr_dpe_regs.h.
| #define KEYMGR_DPE_WORKING_STATE_STATE_MASK 0x3u |
Definition at line 310 of file keymgr_dpe_regs.h.
| #define KEYMGR_DPE_WORKING_STATE_STATE_OFFSET 0 |
Definition at line 311 of file keymgr_dpe_regs.h.
| #define KEYMGR_DPE_WORKING_STATE_STATE_VALUE_AVAILABLE 0x1 |
Definition at line 315 of file keymgr_dpe_regs.h.
| #define KEYMGR_DPE_WORKING_STATE_STATE_VALUE_DISABLED 0x2 |
Definition at line 316 of file keymgr_dpe_regs.h.
| #define KEYMGR_DPE_WORKING_STATE_STATE_VALUE_INVALID 0x3 |
Definition at line 317 of file keymgr_dpe_regs.h.
| #define KEYMGR_DPE_WORKING_STATE_STATE_VALUE_RESET 0x0 |
Definition at line 314 of file keymgr_dpe_regs.h.