Software APIs
i2c_host_power_monitor_test.c
1 // Copyright lowRISC contributors (OpenTitan project).
2 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
3 // SPDX-License-Identifier: Apache-2.0
4 #include <assert.h>
5 
6 #include "sw/device/lib/arch/device.h"
7 #include "sw/device/lib/base/macros.h"
8 #include "sw/device/lib/base/memory.h"
9 #include "sw/device/lib/base/mmio.h"
10 #include "sw/device/lib/dif/dif_i2c.h"
11 #include "sw/device/lib/runtime/hart.h"
12 #include "sw/device/lib/runtime/irq.h"
13 #include "sw/device/lib/runtime/log.h"
14 #include "sw/device/lib/runtime/print.h"
15 #include "sw/device/lib/testing/i2c_testutils.h"
16 #include "sw/device/lib/testing/rv_core_ibex_testutils.h"
17 #include "sw/device/lib/testing/test_framework/check.h"
18 #include "sw/device/lib/testing/test_framework/ottf_main.h"
19 
20 #include "hw/top_earlgrey/sw/autogen/top_earlgrey.h"
21 #include "i2c_regs.h" // Generated.
22 
23 static_assert(__BYTE_ORDER__ == __ORDER_LITTLE_ENDIAN__,
24  "This test assumes the target platform is little endian.");
25 
26 OTTF_DEFINE_TEST_CONFIG();
27 
28 enum {
29  kDeviceAddr = 0x10,
30 
31  // Registers
32  kManufacturerIdReg = 0xFE,
33  kProductIdReg = 0xFD,
34  kAccumConfigReg = 0x25,
35  kCtrActReg = 0x21,
36  kVSensenAvgReg = 0x13,
37  kVPowerNReg = 0x17,
38  kOcLimitNReg = 0x30,
39 
40  // Registers values
41  kManufacturerId = 0x54,
42  kProductId = 0x7b,
43 
44  // Other
45  kDefaultTimeoutMicros = 5000,
46 };
47 
48 static dif_rv_core_ibex_t rv_core_ibex;
49 static dif_pinmux_t pinmux;
50 static dif_i2c_t i2c;
51 
52 static status_t read_manufacture_id(void) {
53  uint8_t reg = kManufacturerIdReg, data = 0;
54  TRY(i2c_testutils_write(&i2c, kDeviceAddr, 1, &reg, true));
55  TRY(i2c_testutils_read(&i2c, kDeviceAddr, 1, &data, kDefaultTimeoutMicros));
56  TRY_CHECK(data == kManufacturerId, "Unexpected value %x", data);
57  return OK_STATUS();
58 }
59 
60 static status_t read_product_id(void) {
61  uint8_t reg = kProductIdReg, data = 0;
62  TRY(i2c_testutils_write(&i2c, kDeviceAddr, 1, &reg, true));
63  TRY(i2c_testutils_read(&i2c, kDeviceAddr, 1, &data, kDefaultTimeoutMicros));
64  TRY_CHECK(data == kProductId, "Unexpected value %x", data);
65  return OK_STATUS();
66 }
67 
68 static status_t read_write_1byte(void) {
69  uint8_t reg = kAccumConfigReg, read_data = 0;
70 
71  // Write config=1.
72  uint8_t write_data[2] = {reg, 0x01};
73  TRY(i2c_testutils_write(&i2c, kDeviceAddr, sizeof(write_data), write_data,
74  true));
75 
76  // Check the write worked.
77  read_data = 0;
78  TRY(i2c_testutils_write(&i2c, kDeviceAddr, sizeof(reg), &reg, true));
79  TRY(i2c_testutils_read(&i2c, kDeviceAddr, sizeof(read_data), &read_data,
80  kDefaultTimeoutMicros));
81  TRY_CHECK(read_data == 0x01, "Unexpected value %x", read_data,
82  kDefaultTimeoutMicros);
83 
84  // Write config=0.
85  write_data[1] = 0x00;
86  TRY(i2c_testutils_write(&i2c, kDeviceAddr, sizeof(write_data), write_data,
87  true));
88 
89  // Check the write worked.
90  read_data = 0x01;
91  TRY(i2c_testutils_write(&i2c, kDeviceAddr, sizeof(reg), &reg, true));
92  TRY(i2c_testutils_read(&i2c, kDeviceAddr, sizeof(read_data), &read_data,
93  kDefaultTimeoutMicros));
94  TRY_CHECK(read_data == 0x00, "Unexpected value %x", read_data);
95 
96  return OK_STATUS();
97 }
98 
99 static status_t read_write_2bytes(void) {
100  uint8_t reg = kOcLimitNReg, read_data[2] = {0};
101 
102  // Write new value.
103  uint8_t write_data[3] = {reg, 0xCA, 0xFE};
104  TRY(i2c_testutils_write(&i2c, kDeviceAddr, sizeof(write_data), write_data,
105  true));
106 
107  // Check the new value.
108  TRY(i2c_testutils_write(&i2c, kDeviceAddr, sizeof(reg), &reg, true));
109  TRY(i2c_testutils_read(&i2c, kDeviceAddr, sizeof(read_data), read_data,
110  kDefaultTimeoutMicros));
111  TRY_CHECK(read_data[1] == 0xFE && read_data[0] == 0xCA,
112  "Unexpected value %02x%02x", read_data[1], read_data[0]);
113 
114  return OK_STATUS();
115 }
116 
117 static status_t read_write_block(void) {
118  uint8_t reg = kOcLimitNReg, read_data[8] = {0};
119  uint8_t rnd_data[sizeof(read_data)];
120  uint8_t write_data[sizeof(read_data) + 1];
121 
122  // Init buffer with random data.
123  for (int i = 0; i < sizeof(rnd_data); ++i) {
124  uint32_t rand;
125  TRY(rv_core_ibex_testutils_get_rnd_data(&rv_core_ibex, 1000, &rand));
126  rnd_data[i] = rand & 0xFF;
127  }
128  write_data[0] = reg;
129  memcpy(&write_data[1], rnd_data, sizeof(rnd_data));
130  // Write new value.
131  TRY(i2c_testutils_write(&i2c, kDeviceAddr, sizeof(write_data), write_data,
132  true));
133 
134  // Check the new value.
135  TRY(i2c_testutils_write(&i2c, kDeviceAddr, sizeof(reg), &reg, true));
136  TRY(i2c_testutils_read(&i2c, kDeviceAddr, sizeof(read_data), read_data,
137  kDefaultTimeoutMicros));
138  TRY_CHECK_ARRAYS_EQ(read_data, rnd_data, sizeof(read_data));
139 
140  return OK_STATUS();
141 }
142 
143 static status_t test_init(void) {
144  mmio_region_t base_addr =
145  mmio_region_from_addr(TOP_EARLGREY_RV_CORE_IBEX_CFG_BASE_ADDR);
146 
147  TRY(dif_rv_core_ibex_init(base_addr, &rv_core_ibex));
148 
149  base_addr = mmio_region_from_addr(TOP_EARLGREY_I2C2_BASE_ADDR);
150  TRY(dif_i2c_init(base_addr, &i2c));
151 
152  base_addr = mmio_region_from_addr(TOP_EARLGREY_PINMUX_AON_BASE_ADDR);
153  TRY(dif_pinmux_init(base_addr, &pinmux));
154 
155  TRY(i2c_testutils_select_pinmux(&pinmux, 2, I2cPinmuxPlatformIdCw310Pmod));
156 
157  TRY(dif_i2c_host_set_enabled(&i2c, kDifToggleEnabled));
158  // Enable the external IRQ at Ibex.
159  irq_global_ctrl(true);
160  irq_external_ctrl(true);
161 
162  return OK_STATUS();
163 }
164 
165 bool test_main(void) {
166  status_t test_result;
167  CHECK_STATUS_OK(test_init());
168 
169  dif_i2c_speed_t speeds[] = {kDifI2cSpeedStandard, kDifI2cSpeedFast,
170  kDifI2cSpeedFastPlus};
171 
172  test_result = OK_STATUS();
173  for (size_t i = 0; i < ARRAYSIZE(speeds); ++i) {
174  CHECK_STATUS_OK(i2c_testutils_set_speed(&i2c, speeds[i]));
175  EXECUTE_TEST(test_result, read_manufacture_id);
176  EXECUTE_TEST(test_result, read_product_id);
177  EXECUTE_TEST(test_result, read_write_1byte);
178  EXECUTE_TEST(test_result, read_write_2bytes);
179  EXECUTE_TEST(test_result, read_write_block);
180  }
181 
182  return status_ok(test_result);
183 }
Return to OpenTitan Documentation