Software APIs
dt_keymgr.c
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1// Copyright lowRISC contributors (OpenTitan project).
2// Licensed under the Apache License, Version 2.0, see LICENSE for details.
3// SPDX-License-Identifier: Apache-2.0
4//
5// Device table API auto-generated by `dtgen`
6
7/**
8 * @file
9 * @brief Device Tables (DT) for IP keymgr and top earlgrey.
10 */
11
12#include "hw/top/dt/dt_keymgr.h"
13
14
15
16/**
17 * Description of instances.
18 */
19typedef struct dt_desc_keymgr {
20 dt_instance_id_t inst_id; /**< Instance ID */
21 uint32_t reg_addr[kDtKeymgrRegBlockCount]; /**< Base address of each register block */
22 uint32_t mem_addr[kDtKeymgrMemoryCount]; /**< Base address of each memory */
23 uint32_t mem_size[kDtKeymgrMemoryCount]; /**< Size in bytes of each memory */
24 /**
25 * PLIC ID of the first IRQ of this instance
26 *
27 * This can be `kDtPlicIrqIdNone` if the block is not connected to the PLIC.
28 */
30 /**
31 * Alert ID of the first Alert of this instance.
32 *
33 * This value is undefined if the block is not connected to the Alert Handler.
34 */
36 dt_clock_t clock[kDtKeymgrClockCount]; /**< Clock signal connected to each clock port */
37 dt_reset_t reset[kDtKeymgrResetCount]; /**< Reset signal connected to each reset port */
39
40
41
42
43static const dt_desc_keymgr_t keymgr_desc[kDtKeymgrCount] = {
44 [kDtKeymgr] = {
45 .inst_id = kDtInstanceIdKeymgr,
46 .reg_addr = {
47 [kDtKeymgrRegBlockCore] = 0x41140000,
48 },
49 .mem_addr = {
50 },
51 .mem_size = {
52 },
55 .clock = {
58 },
59 .reset = {
62 },
63 },
64};
65
66/**
67 * Return a pointer to the `dt_keymgr_desc_t` structure of the requested
68 * `dt` if it's a valid index. Otherwise, this macro will `return` (i.e. exit
69 * the function) with the provided default value.
70 */
71#define TRY_GET_DT(dt, default) ({ if ((dt) < (dt_keymgr_t)0 || (dt) >= kDtKeymgrCount) return (default); &keymgr_desc[dt]; })
72
74 if (inst_id >= kDtInstanceIdKeymgr && inst_id <= kDtInstanceIdKeymgr) {
75 return (dt_keymgr_t)(inst_id - kDtInstanceIdKeymgr);
76 }
77 return (dt_keymgr_t)0;
78}
79
84
86 dt_keymgr_t dt,
87 dt_keymgr_reg_block_t reg_block) {
88 // Return a recognizable address in case of wrong argument.
89 return TRY_GET_DT(dt, 0xdeadbeef)->reg_addr[reg_block];
90}
91
93 dt_keymgr_t dt,
95 // Return a recognizable address in case of wrong argument.
96 return TRY_GET_DT(dt, 0xdeadbeef)->mem_addr[mem];
97}
98
100 dt_keymgr_t dt,
101 dt_keymgr_memory_t mem) {
102 // Return an empty size in case of wrong argument.
103 return TRY_GET_DT(dt, 0)->mem_size[mem];
104}
105
107 dt_keymgr_t dt,
108 dt_keymgr_irq_t irq) {
109 dt_plic_irq_id_t first_irq = TRY_GET_DT(dt, kDtPlicIrqIdNone)->first_irq;
110 if (first_irq == kDtPlicIrqIdNone) {
111 return kDtPlicIrqIdNone;
112 }
113 return (dt_plic_irq_id_t)((uint32_t)first_irq + (uint32_t)irq);
114}
115
117 dt_keymgr_t dt,
118 dt_plic_irq_id_t irq) {
119 dt_keymgr_irq_t count = kDtKeymgrIrqCount;
120 dt_plic_irq_id_t first_irq = TRY_GET_DT(dt, count)->first_irq;
121 if (first_irq == kDtPlicIrqIdNone) {
122 return count;
123 }
124 if (irq < first_irq || irq >= first_irq + (dt_plic_irq_id_t)count) {
125 return count;
126 }
127 return (dt_keymgr_irq_t)(irq - first_irq);
128}
129
130
132 dt_keymgr_t dt,
133 dt_keymgr_alert_t alert) {
134 return (dt_alert_id_t)((uint32_t)keymgr_desc[dt].first_alert + (uint32_t)alert);
135}
136
138 dt_keymgr_t dt,
139 dt_alert_id_t alert) {
140 dt_keymgr_alert_t count = kDtKeymgrAlertCount;
141 if (alert < keymgr_desc[dt].first_alert || alert >= keymgr_desc[dt].first_alert + (dt_alert_id_t)count) {
142 return count;
143 }
144 return (dt_keymgr_alert_t)(alert - keymgr_desc[dt].first_alert);
145}
146
147
148
150 dt_keymgr_t dt,
151 dt_keymgr_clock_t clk) {
152 // Return the first clock in case of invalid argument.
153 return TRY_GET_DT(dt, (dt_clock_t)0)->clock[clk];
154}
155
157 dt_keymgr_t dt,
158 dt_keymgr_reset_t rst) {
159 const dt_keymgr_reset_t count = kDtKeymgrResetCount;
160 if (rst >= count) {
161 return kDtResetUnknown;
162 }
163 return TRY_GET_DT(dt, kDtResetUnknown)->reset[rst];
164}
165
166