Software APIs
dt_gpio.c
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1// Copyright lowRISC contributors (OpenTitan project).
2// Licensed under the Apache License, Version 2.0, see LICENSE for details.
3// SPDX-License-Identifier: Apache-2.0
4//
5// Device table API auto-generated by `dtgen`
6
7/**
8 * @file
9 * @brief Device Tables (DT) for IP gpio and top englishbreakfast.
10 */
11
12#include "hw/top/dt/dt_gpio.h"
13
14
15
16
17
18/**
19 * Description of instances.
20 */
21typedef struct dt_desc_gpio {
22 dt_instance_id_t inst_id; /**< Instance ID */
23 uint32_t reg_addr[kDtGpioRegBlockCount]; /**< Base address of each register block */
24 uint32_t mem_addr[kDtGpioMemoryCount]; /**< Base address of each memory */
25 uint32_t mem_size[kDtGpioMemoryCount]; /**< Size in bytes of each memory */
26 /**
27 * PLIC ID of the first IRQ of this instance
28 *
29 * This can be `kDtPlicIrqIdNone` if the block is not connected to the PLIC.
30 */
31 top_englishbreakfast_plic_irq_id_t first_irq;
32 dt_clock_t clock[kDtGpioClockCount]; /**< Clock signal connected to each clock port */
33 dt_reset_t reset[kDtGpioResetCount]; /**< Reset signal connected to each reset port */
34 dt_periph_io_t periph_io[kDtGpioPeriphIoCount]; /**< Description of each peripheral I/O */
35 struct {
36 uint8_t input_period_counter_count; /**< number of input period counters */
37 } ipgen_ext; /**< Extension */
38} dt_desc_gpio_t;
39
40
41
42
43static const dt_desc_gpio_t gpio_desc[kDtGpioCount] = {
44 [kDtGpio] = {
45 .inst_id = kDtInstanceIdGpio,
46 .reg_addr = {
47 [kDtGpioRegBlockCore] = 0x40040000,
48 },
49 .mem_addr = {
50 },
51 .mem_size = {
52 },
53 .first_irq = kTopEnglishbreakfastPlicIrqIdGpioGpio0,
54 .clock = {
55 [kDtGpioClockClk] = kDtClockIoDiv4,
56 },
57 .reset = {
58 [kDtGpioResetRst] = kDtResetSysIoDiv4,
59 },
60 .periph_io = {
61 [kDtGpioPeriphIoGpio0] = {
62 .__internal = {
63 .type = kDtPeriphIoTypeMio,
64 .dir = kDtPeriphIoDirInout,
65 .periph_input_or_direct_pad = kTopEnglishbreakfastPinmuxPeripheralInGpioGpio0,
66 .outsel_or_dt_pad = kTopEnglishbreakfastPinmuxOutselGpioGpio0,
67 },
68 },
69 [kDtGpioPeriphIoGpio1] = {
70 .__internal = {
71 .type = kDtPeriphIoTypeMio,
72 .dir = kDtPeriphIoDirInout,
73 .periph_input_or_direct_pad = kTopEnglishbreakfastPinmuxPeripheralInGpioGpio1,
74 .outsel_or_dt_pad = kTopEnglishbreakfastPinmuxOutselGpioGpio1,
75 },
76 },
77 [kDtGpioPeriphIoGpio2] = {
78 .__internal = {
79 .type = kDtPeriphIoTypeMio,
80 .dir = kDtPeriphIoDirInout,
81 .periph_input_or_direct_pad = kTopEnglishbreakfastPinmuxPeripheralInGpioGpio2,
82 .outsel_or_dt_pad = kTopEnglishbreakfastPinmuxOutselGpioGpio2,
83 },
84 },
85 [kDtGpioPeriphIoGpio3] = {
86 .__internal = {
87 .type = kDtPeriphIoTypeMio,
88 .dir = kDtPeriphIoDirInout,
89 .periph_input_or_direct_pad = kTopEnglishbreakfastPinmuxPeripheralInGpioGpio3,
90 .outsel_or_dt_pad = kTopEnglishbreakfastPinmuxOutselGpioGpio3,
91 },
92 },
93 [kDtGpioPeriphIoGpio4] = {
94 .__internal = {
95 .type = kDtPeriphIoTypeMio,
96 .dir = kDtPeriphIoDirInout,
97 .periph_input_or_direct_pad = kTopEnglishbreakfastPinmuxPeripheralInGpioGpio4,
98 .outsel_or_dt_pad = kTopEnglishbreakfastPinmuxOutselGpioGpio4,
99 },
100 },
101 [kDtGpioPeriphIoGpio5] = {
102 .__internal = {
103 .type = kDtPeriphIoTypeMio,
104 .dir = kDtPeriphIoDirInout,
105 .periph_input_or_direct_pad = kTopEnglishbreakfastPinmuxPeripheralInGpioGpio5,
106 .outsel_or_dt_pad = kTopEnglishbreakfastPinmuxOutselGpioGpio5,
107 },
108 },
109 [kDtGpioPeriphIoGpio6] = {
110 .__internal = {
111 .type = kDtPeriphIoTypeMio,
112 .dir = kDtPeriphIoDirInout,
113 .periph_input_or_direct_pad = kTopEnglishbreakfastPinmuxPeripheralInGpioGpio6,
114 .outsel_or_dt_pad = kTopEnglishbreakfastPinmuxOutselGpioGpio6,
115 },
116 },
117 [kDtGpioPeriphIoGpio7] = {
118 .__internal = {
119 .type = kDtPeriphIoTypeMio,
120 .dir = kDtPeriphIoDirInout,
121 .periph_input_or_direct_pad = kTopEnglishbreakfastPinmuxPeripheralInGpioGpio7,
122 .outsel_or_dt_pad = kTopEnglishbreakfastPinmuxOutselGpioGpio7,
123 },
124 },
125 [kDtGpioPeriphIoGpio8] = {
126 .__internal = {
127 .type = kDtPeriphIoTypeMio,
128 .dir = kDtPeriphIoDirInout,
129 .periph_input_or_direct_pad = kTopEnglishbreakfastPinmuxPeripheralInGpioGpio8,
130 .outsel_or_dt_pad = kTopEnglishbreakfastPinmuxOutselGpioGpio8,
131 },
132 },
133 [kDtGpioPeriphIoGpio9] = {
134 .__internal = {
135 .type = kDtPeriphIoTypeMio,
136 .dir = kDtPeriphIoDirInout,
137 .periph_input_or_direct_pad = kTopEnglishbreakfastPinmuxPeripheralInGpioGpio9,
138 .outsel_or_dt_pad = kTopEnglishbreakfastPinmuxOutselGpioGpio9,
139 },
140 },
141 [kDtGpioPeriphIoGpio10] = {
142 .__internal = {
143 .type = kDtPeriphIoTypeMio,
144 .dir = kDtPeriphIoDirInout,
145 .periph_input_or_direct_pad = kTopEnglishbreakfastPinmuxPeripheralInGpioGpio10,
146 .outsel_or_dt_pad = kTopEnglishbreakfastPinmuxOutselGpioGpio10,
147 },
148 },
149 [kDtGpioPeriphIoGpio11] = {
150 .__internal = {
151 .type = kDtPeriphIoTypeMio,
152 .dir = kDtPeriphIoDirInout,
153 .periph_input_or_direct_pad = kTopEnglishbreakfastPinmuxPeripheralInGpioGpio11,
154 .outsel_or_dt_pad = kTopEnglishbreakfastPinmuxOutselGpioGpio11,
155 },
156 },
157 [kDtGpioPeriphIoGpio12] = {
158 .__internal = {
159 .type = kDtPeriphIoTypeMio,
160 .dir = kDtPeriphIoDirInout,
161 .periph_input_or_direct_pad = kTopEnglishbreakfastPinmuxPeripheralInGpioGpio12,
162 .outsel_or_dt_pad = kTopEnglishbreakfastPinmuxOutselGpioGpio12,
163 },
164 },
165 [kDtGpioPeriphIoGpio13] = {
166 .__internal = {
167 .type = kDtPeriphIoTypeMio,
168 .dir = kDtPeriphIoDirInout,
169 .periph_input_or_direct_pad = kTopEnglishbreakfastPinmuxPeripheralInGpioGpio13,
170 .outsel_or_dt_pad = kTopEnglishbreakfastPinmuxOutselGpioGpio13,
171 },
172 },
173 [kDtGpioPeriphIoGpio14] = {
174 .__internal = {
175 .type = kDtPeriphIoTypeMio,
176 .dir = kDtPeriphIoDirInout,
177 .periph_input_or_direct_pad = kTopEnglishbreakfastPinmuxPeripheralInGpioGpio14,
178 .outsel_or_dt_pad = kTopEnglishbreakfastPinmuxOutselGpioGpio14,
179 },
180 },
181 [kDtGpioPeriphIoGpio15] = {
182 .__internal = {
183 .type = kDtPeriphIoTypeMio,
184 .dir = kDtPeriphIoDirInout,
185 .periph_input_or_direct_pad = kTopEnglishbreakfastPinmuxPeripheralInGpioGpio15,
186 .outsel_or_dt_pad = kTopEnglishbreakfastPinmuxOutselGpioGpio15,
187 },
188 },
189 [kDtGpioPeriphIoGpio16] = {
190 .__internal = {
191 .type = kDtPeriphIoTypeMio,
192 .dir = kDtPeriphIoDirInout,
193 .periph_input_or_direct_pad = kTopEnglishbreakfastPinmuxPeripheralInGpioGpio16,
194 .outsel_or_dt_pad = kTopEnglishbreakfastPinmuxOutselGpioGpio16,
195 },
196 },
197 [kDtGpioPeriphIoGpio17] = {
198 .__internal = {
199 .type = kDtPeriphIoTypeMio,
200 .dir = kDtPeriphIoDirInout,
201 .periph_input_or_direct_pad = kTopEnglishbreakfastPinmuxPeripheralInGpioGpio17,
202 .outsel_or_dt_pad = kTopEnglishbreakfastPinmuxOutselGpioGpio17,
203 },
204 },
205 [kDtGpioPeriphIoGpio18] = {
206 .__internal = {
207 .type = kDtPeriphIoTypeMio,
208 .dir = kDtPeriphIoDirInout,
209 .periph_input_or_direct_pad = kTopEnglishbreakfastPinmuxPeripheralInGpioGpio18,
210 .outsel_or_dt_pad = kTopEnglishbreakfastPinmuxOutselGpioGpio18,
211 },
212 },
213 [kDtGpioPeriphIoGpio19] = {
214 .__internal = {
215 .type = kDtPeriphIoTypeMio,
216 .dir = kDtPeriphIoDirInout,
217 .periph_input_or_direct_pad = kTopEnglishbreakfastPinmuxPeripheralInGpioGpio19,
218 .outsel_or_dt_pad = kTopEnglishbreakfastPinmuxOutselGpioGpio19,
219 },
220 },
221 [kDtGpioPeriphIoGpio20] = {
222 .__internal = {
223 .type = kDtPeriphIoTypeMio,
224 .dir = kDtPeriphIoDirInout,
225 .periph_input_or_direct_pad = kTopEnglishbreakfastPinmuxPeripheralInGpioGpio20,
226 .outsel_or_dt_pad = kTopEnglishbreakfastPinmuxOutselGpioGpio20,
227 },
228 },
229 [kDtGpioPeriphIoGpio21] = {
230 .__internal = {
231 .type = kDtPeriphIoTypeMio,
232 .dir = kDtPeriphIoDirInout,
233 .periph_input_or_direct_pad = kTopEnglishbreakfastPinmuxPeripheralInGpioGpio21,
234 .outsel_or_dt_pad = kTopEnglishbreakfastPinmuxOutselGpioGpio21,
235 },
236 },
237 [kDtGpioPeriphIoGpio22] = {
238 .__internal = {
239 .type = kDtPeriphIoTypeMio,
240 .dir = kDtPeriphIoDirInout,
241 .periph_input_or_direct_pad = kTopEnglishbreakfastPinmuxPeripheralInGpioGpio22,
242 .outsel_or_dt_pad = kTopEnglishbreakfastPinmuxOutselGpioGpio22,
243 },
244 },
245 [kDtGpioPeriphIoGpio23] = {
246 .__internal = {
247 .type = kDtPeriphIoTypeMio,
248 .dir = kDtPeriphIoDirInout,
249 .periph_input_or_direct_pad = kTopEnglishbreakfastPinmuxPeripheralInGpioGpio23,
250 .outsel_or_dt_pad = kTopEnglishbreakfastPinmuxOutselGpioGpio23,
251 },
252 },
253 [kDtGpioPeriphIoGpio24] = {
254 .__internal = {
255 .type = kDtPeriphIoTypeMio,
256 .dir = kDtPeriphIoDirInout,
257 .periph_input_or_direct_pad = kTopEnglishbreakfastPinmuxPeripheralInGpioGpio24,
258 .outsel_or_dt_pad = kTopEnglishbreakfastPinmuxOutselGpioGpio24,
259 },
260 },
261 [kDtGpioPeriphIoGpio25] = {
262 .__internal = {
263 .type = kDtPeriphIoTypeMio,
264 .dir = kDtPeriphIoDirInout,
265 .periph_input_or_direct_pad = kTopEnglishbreakfastPinmuxPeripheralInGpioGpio25,
266 .outsel_or_dt_pad = kTopEnglishbreakfastPinmuxOutselGpioGpio25,
267 },
268 },
269 [kDtGpioPeriphIoGpio26] = {
270 .__internal = {
271 .type = kDtPeriphIoTypeMio,
272 .dir = kDtPeriphIoDirInout,
273 .periph_input_or_direct_pad = kTopEnglishbreakfastPinmuxPeripheralInGpioGpio26,
274 .outsel_or_dt_pad = kTopEnglishbreakfastPinmuxOutselGpioGpio26,
275 },
276 },
277 [kDtGpioPeriphIoGpio27] = {
278 .__internal = {
279 .type = kDtPeriphIoTypeMio,
280 .dir = kDtPeriphIoDirInout,
281 .periph_input_or_direct_pad = kTopEnglishbreakfastPinmuxPeripheralInGpioGpio27,
282 .outsel_or_dt_pad = kTopEnglishbreakfastPinmuxOutselGpioGpio27,
283 },
284 },
285 [kDtGpioPeriphIoGpio28] = {
286 .__internal = {
287 .type = kDtPeriphIoTypeMio,
288 .dir = kDtPeriphIoDirInout,
289 .periph_input_or_direct_pad = kTopEnglishbreakfastPinmuxPeripheralInGpioGpio28,
290 .outsel_or_dt_pad = kTopEnglishbreakfastPinmuxOutselGpioGpio28,
291 },
292 },
293 [kDtGpioPeriphIoGpio29] = {
294 .__internal = {
295 .type = kDtPeriphIoTypeMio,
296 .dir = kDtPeriphIoDirInout,
297 .periph_input_or_direct_pad = kTopEnglishbreakfastPinmuxPeripheralInGpioGpio29,
298 .outsel_or_dt_pad = kTopEnglishbreakfastPinmuxOutselGpioGpio29,
299 },
300 },
301 [kDtGpioPeriphIoGpio30] = {
302 .__internal = {
303 .type = kDtPeriphIoTypeMio,
304 .dir = kDtPeriphIoDirInout,
305 .periph_input_or_direct_pad = kTopEnglishbreakfastPinmuxPeripheralInGpioGpio30,
306 .outsel_or_dt_pad = kTopEnglishbreakfastPinmuxOutselGpioGpio30,
307 },
308 },
309 [kDtGpioPeriphIoGpio31] = {
310 .__internal = {
311 .type = kDtPeriphIoTypeMio,
312 .dir = kDtPeriphIoDirInout,
313 .periph_input_or_direct_pad = kTopEnglishbreakfastPinmuxPeripheralInGpioGpio31,
314 .outsel_or_dt_pad = kTopEnglishbreakfastPinmuxOutselGpioGpio31,
315 },
316 },
317 },
318 .ipgen_ext = {
319 .input_period_counter_count = 0,
320 },
321 },
322};
323
324/**
325 * Return a pointer to the `dt_gpio_desc_t` structure of the requested
326 * `dt` if it's a valid index. Otherwise, this macro will `return` (i.e. exit
327 * the function) with the provided default value.
328 */
329#define TRY_GET_DT(dt, default) ({ if ((dt) < (dt_gpio_t)0 || (dt) >= kDtGpioCount) return (default); &gpio_desc[dt]; })
330
331dt_gpio_t dt_gpio_from_instance_id(dt_instance_id_t inst_id) {
332 if (inst_id >= kDtInstanceIdGpio && inst_id <= kDtInstanceIdGpio) {
333 return (dt_gpio_t)(inst_id - kDtInstanceIdGpio);
334 }
335 return (dt_gpio_t)0;
336}
337
342
343uint32_t dt_gpio_reg_block(
344 dt_gpio_t dt,
345 dt_gpio_reg_block_t reg_block) {
346 // Return a recognizable address in case of wrong argument.
347 return TRY_GET_DT(dt, 0xdeadbeef)->reg_addr[reg_block];
348}
349
350uint32_t dt_gpio_memory_base(
351 dt_gpio_t dt,
352 dt_gpio_memory_t mem) {
353 // Return a recognizable address in case of wrong argument.
354 return TRY_GET_DT(dt, 0xdeadbeef)->mem_addr[mem];
355}
356
357uint32_t dt_gpio_memory_size(
358 dt_gpio_t dt,
359 dt_gpio_memory_t mem) {
360 // Return an empty size in case of wrong argument.
361 return TRY_GET_DT(dt, 0)->mem_size[mem];
362}
363
364dt_plic_irq_id_t dt_gpio_irq_to_plic_id(
365 dt_gpio_t dt,
366 dt_gpio_irq_t irq) {
367 dt_plic_irq_id_t first_irq = TRY_GET_DT(dt, kDtPlicIrqIdNone)->first_irq;
368 if (first_irq == kDtPlicIrqIdNone) {
369 return kDtPlicIrqIdNone;
370 }
371 return (dt_plic_irq_id_t)((uint32_t)first_irq + (uint32_t)irq);
372}
373
374dt_gpio_irq_t dt_gpio_irq_from_plic_id(
375 dt_gpio_t dt,
376 dt_plic_irq_id_t irq) {
377 dt_gpio_irq_t count = kDtGpioIrqCount;
378 dt_plic_irq_id_t first_irq = TRY_GET_DT(dt, count)->first_irq;
379 if (first_irq == kDtPlicIrqIdNone) {
380 return count;
381 }
382 if (irq < first_irq || irq >= first_irq + (dt_plic_irq_id_t)count) {
383 return count;
384 }
385 return (dt_gpio_irq_t)(irq - first_irq);
386}
387
388
389
390dt_periph_io_t dt_gpio_periph_io(
391 dt_gpio_t dt,
392 dt_gpio_periph_io_t sig) {
393 // Return a harmless value in case of wrong argument.
394 return TRY_GET_DT(dt, kDtPeriphIoConstantHighZ)->periph_io[sig];
395}
396
397dt_clock_t dt_gpio_clock(
398 dt_gpio_t dt,
399 dt_gpio_clock_t clk) {
400 // Return the first clock in case of invalid argument.
401 return TRY_GET_DT(dt, (dt_clock_t)0)->clock[clk];
402}
403
404dt_reset_t dt_gpio_reset(
405 dt_gpio_t dt,
406 dt_gpio_reset_t rst) {
407 const dt_gpio_reset_t count = kDtGpioResetCount;
408 if (rst >= count) {
409 return kDtResetUnknown;
410 }
411 return TRY_GET_DT(dt, kDtResetUnknown)->reset[rst];
412}
413
414
415
416uint8_t dt_gpio_input_period_counter_count(dt_gpio_t dt) {
417 return TRY_GET_DT(dt, 0)->ipgen_ext.input_period_counter_count;
418}
419
420