flash_ctrl_regs.h File Reference

Generated register defines for flash_ctrl. More...

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Macros
#define	FLASH_CTRL_PARAM_REG_NUM_BANKS   2
#define	FLASH_CTRL_PARAM_REG_PAGES_PER_BANK   256
#define	FLASH_CTRL_PARAM_REG_BUS_PGM_RES_BYTES   64
#define	FLASH_CTRL_PARAM_REG_PAGE_WIDTH   8
#define	FLASH_CTRL_PARAM_REG_BANK_WIDTH   1
#define	FLASH_CTRL_PARAM_NUM_REGIONS   8
#define	FLASH_CTRL_PARAM_NUM_INFO_TYPES   3
#define	FLASH_CTRL_PARAM_NUM_INFOS0   10
#define	FLASH_CTRL_PARAM_NUM_INFOS1   1
#define	FLASH_CTRL_PARAM_NUM_INFOS2   2
#define	FLASH_CTRL_PARAM_WORDS_PER_PAGE   256
#define	FLASH_CTRL_PARAM_BYTES_PER_WORD   8
#define	FLASH_CTRL_PARAM_BYTES_PER_PAGE   2048
#define	FLASH_CTRL_PARAM_BYTES_PER_BANK   524288
#define	FLASH_CTRL_PARAM_EXEC_EN   2724870391
#define	FLASH_CTRL_PARAM_MAX_FIFO_DEPTH   16
#define	FLASH_CTRL_PARAM_MAX_FIFO_WIDTH   5
#define	FLASH_CTRL_PARAM_NUM_ALERTS   5
#define	FLASH_CTRL_PARAM_REG_WIDTH   32
#define	FLASH_CTRL_INTR_COMMON_PROG_EMPTY_BIT   0
#define	FLASH_CTRL_INTR_COMMON_PROG_LVL_BIT   1
#define	FLASH_CTRL_INTR_COMMON_RD_FULL_BIT   2
#define	FLASH_CTRL_INTR_COMMON_RD_LVL_BIT   3
#define	FLASH_CTRL_INTR_COMMON_OP_DONE_BIT   4
#define	FLASH_CTRL_INTR_COMMON_CORR_ERR_BIT   5
#define	FLASH_CTRL_INTR_STATE_REG_OFFSET   0x0
#define	FLASH_CTRL_INTR_STATE_REG_RESVAL   0x3u
#define	FLASH_CTRL_INTR_STATE_PROG_EMPTY_BIT   0
#define	FLASH_CTRL_INTR_STATE_PROG_LVL_BIT   1
#define	FLASH_CTRL_INTR_STATE_RD_FULL_BIT   2
#define	FLASH_CTRL_INTR_STATE_RD_LVL_BIT   3
#define	FLASH_CTRL_INTR_STATE_OP_DONE_BIT   4
#define	FLASH_CTRL_INTR_STATE_CORR_ERR_BIT   5
#define	FLASH_CTRL_INTR_ENABLE_REG_OFFSET   0x4
#define	FLASH_CTRL_INTR_ENABLE_REG_RESVAL   0x0u
#define	FLASH_CTRL_INTR_ENABLE_PROG_EMPTY_BIT   0
#define	FLASH_CTRL_INTR_ENABLE_PROG_LVL_BIT   1
#define	FLASH_CTRL_INTR_ENABLE_RD_FULL_BIT   2
#define	FLASH_CTRL_INTR_ENABLE_RD_LVL_BIT   3
#define	FLASH_CTRL_INTR_ENABLE_OP_DONE_BIT   4
#define	FLASH_CTRL_INTR_ENABLE_CORR_ERR_BIT   5
#define	FLASH_CTRL_INTR_TEST_REG_OFFSET   0x8
#define	FLASH_CTRL_INTR_TEST_REG_RESVAL   0x0u
#define	FLASH_CTRL_INTR_TEST_PROG_EMPTY_BIT   0
#define	FLASH_CTRL_INTR_TEST_PROG_LVL_BIT   1
#define	FLASH_CTRL_INTR_TEST_RD_FULL_BIT   2
#define	FLASH_CTRL_INTR_TEST_RD_LVL_BIT   3
#define	FLASH_CTRL_INTR_TEST_OP_DONE_BIT   4
#define	FLASH_CTRL_INTR_TEST_CORR_ERR_BIT   5
#define	FLASH_CTRL_ALERT_TEST_REG_OFFSET   0xc
#define	FLASH_CTRL_ALERT_TEST_REG_RESVAL   0x0u
#define	FLASH_CTRL_ALERT_TEST_RECOV_ERR_BIT   0
#define	FLASH_CTRL_ALERT_TEST_FATAL_STD_ERR_BIT   1
#define	FLASH_CTRL_ALERT_TEST_FATAL_ERR_BIT   2
#define	FLASH_CTRL_ALERT_TEST_FATAL_PRIM_FLASH_ALERT_BIT   3
#define	FLASH_CTRL_ALERT_TEST_RECOV_PRIM_FLASH_ALERT_BIT   4
#define	FLASH_CTRL_DIS_REG_OFFSET   0x10
#define	FLASH_CTRL_DIS_REG_RESVAL   0x9u
#define	FLASH_CTRL_DIS_VAL_MASK   0xfu
#define	FLASH_CTRL_DIS_VAL_OFFSET   0
#define	FLASH_CTRL_DIS_VAL_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_DIS_VAL_MASK, .index = FLASH_CTRL_DIS_VAL_OFFSET })
#define	FLASH_CTRL_EXEC_REG_OFFSET   0x14
#define	FLASH_CTRL_EXEC_REG_RESVAL   0x0u
#define	FLASH_CTRL_INIT_REG_OFFSET   0x18
#define	FLASH_CTRL_INIT_REG_RESVAL   0x0u
#define	FLASH_CTRL_INIT_VAL_BIT   0
#define	FLASH_CTRL_CTRL_REGWEN_REG_OFFSET   0x1c
#define	FLASH_CTRL_CTRL_REGWEN_REG_RESVAL   0x1u
#define	FLASH_CTRL_CTRL_REGWEN_EN_BIT   0
#define	FLASH_CTRL_CONTROL_REG_OFFSET   0x20
#define	FLASH_CTRL_CONTROL_REG_RESVAL   0x0u
#define	FLASH_CTRL_CONTROL_START_BIT   0
#define	FLASH_CTRL_CONTROL_OP_MASK   0x3u
#define	FLASH_CTRL_CONTROL_OP_OFFSET   4
#define	FLASH_CTRL_CONTROL_OP_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_CONTROL_OP_MASK, .index = FLASH_CTRL_CONTROL_OP_OFFSET })
#define	FLASH_CTRL_CONTROL_OP_VALUE_READ   0x0
#define	FLASH_CTRL_CONTROL_OP_VALUE_PROG   0x1
#define	FLASH_CTRL_CONTROL_OP_VALUE_ERASE   0x2
#define	FLASH_CTRL_CONTROL_PROG_SEL_BIT   6
#define	FLASH_CTRL_CONTROL_PROG_SEL_VALUE_NORMAL_PROGRAM   0x0
#define	FLASH_CTRL_CONTROL_PROG_SEL_VALUE_PROGRAM_REPAIR   0x1
#define	FLASH_CTRL_CONTROL_ERASE_SEL_BIT   7
#define	FLASH_CTRL_CONTROL_ERASE_SEL_VALUE_PAGE_ERASE   0x0
#define	FLASH_CTRL_CONTROL_ERASE_SEL_VALUE_BANK_ERASE   0x1
#define	FLASH_CTRL_CONTROL_PARTITION_SEL_BIT   8
#define	FLASH_CTRL_CONTROL_INFO_SEL_MASK   0x3u
#define	FLASH_CTRL_CONTROL_INFO_SEL_OFFSET   9
#define	FLASH_CTRL_CONTROL_INFO_SEL_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_CONTROL_INFO_SEL_MASK, .index = FLASH_CTRL_CONTROL_INFO_SEL_OFFSET })
#define	FLASH_CTRL_CONTROL_NUM_MASK   0xfffu
#define	FLASH_CTRL_CONTROL_NUM_OFFSET   16
#define	FLASH_CTRL_CONTROL_NUM_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_CONTROL_NUM_MASK, .index = FLASH_CTRL_CONTROL_NUM_OFFSET })
#define	FLASH_CTRL_ADDR_REG_OFFSET   0x24
#define	FLASH_CTRL_ADDR_REG_RESVAL   0x0u
#define	FLASH_CTRL_ADDR_START_MASK   0xfffffu
#define	FLASH_CTRL_ADDR_START_OFFSET   0
#define	FLASH_CTRL_ADDR_START_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_ADDR_START_MASK, .index = FLASH_CTRL_ADDR_START_OFFSET })
#define	FLASH_CTRL_PROG_TYPE_EN_REG_OFFSET   0x28
#define	FLASH_CTRL_PROG_TYPE_EN_REG_RESVAL   0x3u
#define	FLASH_CTRL_PROG_TYPE_EN_NORMAL_BIT   0
#define	FLASH_CTRL_PROG_TYPE_EN_REPAIR_BIT   1
#define	FLASH_CTRL_ERASE_SUSPEND_REG_OFFSET   0x2c
#define	FLASH_CTRL_ERASE_SUSPEND_REG_RESVAL   0x0u
#define	FLASH_CTRL_ERASE_SUSPEND_REQ_BIT   0
#define	FLASH_CTRL_REGION_CFG_REGWEN_REGION_FIELD_WIDTH   1
#define	FLASH_CTRL_REGION_CFG_REGWEN_MULTIREG_COUNT   8
#define	FLASH_CTRL_REGION_CFG_REGWEN_0_REG_OFFSET   0x30
#define	FLASH_CTRL_REGION_CFG_REGWEN_0_REG_RESVAL   0x1u
#define	FLASH_CTRL_REGION_CFG_REGWEN_0_REGION_0_BIT   0
#define	FLASH_CTRL_REGION_CFG_REGWEN_0_REGION_0_VALUE_REGION_LOCKED   0x0
#define	FLASH_CTRL_REGION_CFG_REGWEN_0_REGION_0_VALUE_REGION_ENABLED   0x1
#define	FLASH_CTRL_REGION_CFG_REGWEN_1_REG_OFFSET   0x34
#define	FLASH_CTRL_REGION_CFG_REGWEN_1_REG_RESVAL   0x1u
#define	FLASH_CTRL_REGION_CFG_REGWEN_1_REGION_1_BIT   0
#define	FLASH_CTRL_REGION_CFG_REGWEN_2_REG_OFFSET   0x38
#define	FLASH_CTRL_REGION_CFG_REGWEN_2_REG_RESVAL   0x1u
#define	FLASH_CTRL_REGION_CFG_REGWEN_2_REGION_2_BIT   0
#define	FLASH_CTRL_REGION_CFG_REGWEN_3_REG_OFFSET   0x3c
#define	FLASH_CTRL_REGION_CFG_REGWEN_3_REG_RESVAL   0x1u
#define	FLASH_CTRL_REGION_CFG_REGWEN_3_REGION_3_BIT   0
#define	FLASH_CTRL_REGION_CFG_REGWEN_4_REG_OFFSET   0x40
#define	FLASH_CTRL_REGION_CFG_REGWEN_4_REG_RESVAL   0x1u
#define	FLASH_CTRL_REGION_CFG_REGWEN_4_REGION_4_BIT   0
#define	FLASH_CTRL_REGION_CFG_REGWEN_5_REG_OFFSET   0x44
#define	FLASH_CTRL_REGION_CFG_REGWEN_5_REG_RESVAL   0x1u
#define	FLASH_CTRL_REGION_CFG_REGWEN_5_REGION_5_BIT   0
#define	FLASH_CTRL_REGION_CFG_REGWEN_6_REG_OFFSET   0x48
#define	FLASH_CTRL_REGION_CFG_REGWEN_6_REG_RESVAL   0x1u
#define	FLASH_CTRL_REGION_CFG_REGWEN_6_REGION_6_BIT   0
#define	FLASH_CTRL_REGION_CFG_REGWEN_7_REG_OFFSET   0x4c
#define	FLASH_CTRL_REGION_CFG_REGWEN_7_REG_RESVAL   0x1u
#define	FLASH_CTRL_REGION_CFG_REGWEN_7_REGION_7_BIT   0
#define	FLASH_CTRL_MP_REGION_CFG_EN_FIELD_WIDTH   4
#define	FLASH_CTRL_MP_REGION_CFG_RD_EN_FIELD_WIDTH   4
#define	FLASH_CTRL_MP_REGION_CFG_PROG_EN_FIELD_WIDTH   4
#define	FLASH_CTRL_MP_REGION_CFG_ERASE_EN_FIELD_WIDTH   4
#define	FLASH_CTRL_MP_REGION_CFG_SCRAMBLE_EN_FIELD_WIDTH   4
#define	FLASH_CTRL_MP_REGION_CFG_ECC_EN_FIELD_WIDTH   4
#define	FLASH_CTRL_MP_REGION_CFG_HE_EN_FIELD_WIDTH   4
#define	FLASH_CTRL_MP_REGION_CFG_MULTIREG_COUNT   8
#define	FLASH_CTRL_MP_REGION_CFG_0_REG_OFFSET   0x50
#define	FLASH_CTRL_MP_REGION_CFG_0_REG_RESVAL   0x9999999u
#define	FLASH_CTRL_MP_REGION_CFG_0_EN_0_MASK   0xfu
#define	FLASH_CTRL_MP_REGION_CFG_0_EN_0_OFFSET   0
#define	FLASH_CTRL_MP_REGION_CFG_0_EN_0_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_MP_REGION_CFG_0_EN_0_MASK, .index = FLASH_CTRL_MP_REGION_CFG_0_EN_0_OFFSET })
#define	FLASH_CTRL_MP_REGION_CFG_0_RD_EN_0_MASK   0xfu
#define	FLASH_CTRL_MP_REGION_CFG_0_RD_EN_0_OFFSET   4
#define	FLASH_CTRL_MP_REGION_CFG_0_RD_EN_0_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_MP_REGION_CFG_0_RD_EN_0_MASK, .index = FLASH_CTRL_MP_REGION_CFG_0_RD_EN_0_OFFSET })
#define	FLASH_CTRL_MP_REGION_CFG_0_PROG_EN_0_MASK   0xfu
#define	FLASH_CTRL_MP_REGION_CFG_0_PROG_EN_0_OFFSET   8
#define	FLASH_CTRL_MP_REGION_CFG_0_PROG_EN_0_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_MP_REGION_CFG_0_PROG_EN_0_MASK, .index = FLASH_CTRL_MP_REGION_CFG_0_PROG_EN_0_OFFSET })
#define	FLASH_CTRL_MP_REGION_CFG_0_ERASE_EN_0_MASK   0xfu
#define	FLASH_CTRL_MP_REGION_CFG_0_ERASE_EN_0_OFFSET   12
#define	FLASH_CTRL_MP_REGION_CFG_0_ERASE_EN_0_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_MP_REGION_CFG_0_ERASE_EN_0_MASK, .index = FLASH_CTRL_MP_REGION_CFG_0_ERASE_EN_0_OFFSET })
#define	FLASH_CTRL_MP_REGION_CFG_0_SCRAMBLE_EN_0_MASK   0xfu
#define	FLASH_CTRL_MP_REGION_CFG_0_SCRAMBLE_EN_0_OFFSET   16
#define	FLASH_CTRL_MP_REGION_CFG_0_SCRAMBLE_EN_0_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_MP_REGION_CFG_0_SCRAMBLE_EN_0_MASK, .index = FLASH_CTRL_MP_REGION_CFG_0_SCRAMBLE_EN_0_OFFSET })
#define	FLASH_CTRL_MP_REGION_CFG_0_ECC_EN_0_MASK   0xfu
#define	FLASH_CTRL_MP_REGION_CFG_0_ECC_EN_0_OFFSET   20
#define	FLASH_CTRL_MP_REGION_CFG_0_ECC_EN_0_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_MP_REGION_CFG_0_ECC_EN_0_MASK, .index = FLASH_CTRL_MP_REGION_CFG_0_ECC_EN_0_OFFSET })
#define	FLASH_CTRL_MP_REGION_CFG_0_HE_EN_0_MASK   0xfu
#define	FLASH_CTRL_MP_REGION_CFG_0_HE_EN_0_OFFSET   24
#define	FLASH_CTRL_MP_REGION_CFG_0_HE_EN_0_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_MP_REGION_CFG_0_HE_EN_0_MASK, .index = FLASH_CTRL_MP_REGION_CFG_0_HE_EN_0_OFFSET })
#define	FLASH_CTRL_MP_REGION_CFG_1_REG_OFFSET   0x54
#define	FLASH_CTRL_MP_REGION_CFG_1_REG_RESVAL   0x9999999u
#define	FLASH_CTRL_MP_REGION_CFG_1_EN_1_MASK   0xfu
#define	FLASH_CTRL_MP_REGION_CFG_1_EN_1_OFFSET   0
#define	FLASH_CTRL_MP_REGION_CFG_1_EN_1_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_MP_REGION_CFG_1_EN_1_MASK, .index = FLASH_CTRL_MP_REGION_CFG_1_EN_1_OFFSET })
#define	FLASH_CTRL_MP_REGION_CFG_1_RD_EN_1_MASK   0xfu
#define	FLASH_CTRL_MP_REGION_CFG_1_RD_EN_1_OFFSET   4
#define	FLASH_CTRL_MP_REGION_CFG_1_RD_EN_1_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_MP_REGION_CFG_1_RD_EN_1_MASK, .index = FLASH_CTRL_MP_REGION_CFG_1_RD_EN_1_OFFSET })
#define	FLASH_CTRL_MP_REGION_CFG_1_PROG_EN_1_MASK   0xfu
#define	FLASH_CTRL_MP_REGION_CFG_1_PROG_EN_1_OFFSET   8
#define	FLASH_CTRL_MP_REGION_CFG_1_PROG_EN_1_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_MP_REGION_CFG_1_PROG_EN_1_MASK, .index = FLASH_CTRL_MP_REGION_CFG_1_PROG_EN_1_OFFSET })
#define	FLASH_CTRL_MP_REGION_CFG_1_ERASE_EN_1_MASK   0xfu
#define	FLASH_CTRL_MP_REGION_CFG_1_ERASE_EN_1_OFFSET   12
#define	FLASH_CTRL_MP_REGION_CFG_1_ERASE_EN_1_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_MP_REGION_CFG_1_ERASE_EN_1_MASK, .index = FLASH_CTRL_MP_REGION_CFG_1_ERASE_EN_1_OFFSET })
#define	FLASH_CTRL_MP_REGION_CFG_1_SCRAMBLE_EN_1_MASK   0xfu
#define	FLASH_CTRL_MP_REGION_CFG_1_SCRAMBLE_EN_1_OFFSET   16
#define	FLASH_CTRL_MP_REGION_CFG_1_SCRAMBLE_EN_1_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_MP_REGION_CFG_1_SCRAMBLE_EN_1_MASK, .index = FLASH_CTRL_MP_REGION_CFG_1_SCRAMBLE_EN_1_OFFSET })
#define	FLASH_CTRL_MP_REGION_CFG_1_ECC_EN_1_MASK   0xfu
#define	FLASH_CTRL_MP_REGION_CFG_1_ECC_EN_1_OFFSET   20
#define	FLASH_CTRL_MP_REGION_CFG_1_ECC_EN_1_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_MP_REGION_CFG_1_ECC_EN_1_MASK, .index = FLASH_CTRL_MP_REGION_CFG_1_ECC_EN_1_OFFSET })
#define	FLASH_CTRL_MP_REGION_CFG_1_HE_EN_1_MASK   0xfu
#define	FLASH_CTRL_MP_REGION_CFG_1_HE_EN_1_OFFSET   24
#define	FLASH_CTRL_MP_REGION_CFG_1_HE_EN_1_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_MP_REGION_CFG_1_HE_EN_1_MASK, .index = FLASH_CTRL_MP_REGION_CFG_1_HE_EN_1_OFFSET })
#define	FLASH_CTRL_MP_REGION_CFG_2_REG_OFFSET   0x58
#define	FLASH_CTRL_MP_REGION_CFG_2_REG_RESVAL   0x9999999u
#define	FLASH_CTRL_MP_REGION_CFG_2_EN_2_MASK   0xfu
#define	FLASH_CTRL_MP_REGION_CFG_2_EN_2_OFFSET   0
#define	FLASH_CTRL_MP_REGION_CFG_2_EN_2_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_MP_REGION_CFG_2_EN_2_MASK, .index = FLASH_CTRL_MP_REGION_CFG_2_EN_2_OFFSET })
#define	FLASH_CTRL_MP_REGION_CFG_2_RD_EN_2_MASK   0xfu
#define	FLASH_CTRL_MP_REGION_CFG_2_RD_EN_2_OFFSET   4
#define	FLASH_CTRL_MP_REGION_CFG_2_RD_EN_2_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_MP_REGION_CFG_2_RD_EN_2_MASK, .index = FLASH_CTRL_MP_REGION_CFG_2_RD_EN_2_OFFSET })
#define	FLASH_CTRL_MP_REGION_CFG_2_PROG_EN_2_MASK   0xfu
#define	FLASH_CTRL_MP_REGION_CFG_2_PROG_EN_2_OFFSET   8
#define	FLASH_CTRL_MP_REGION_CFG_2_PROG_EN_2_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_MP_REGION_CFG_2_PROG_EN_2_MASK, .index = FLASH_CTRL_MP_REGION_CFG_2_PROG_EN_2_OFFSET })
#define	FLASH_CTRL_MP_REGION_CFG_2_ERASE_EN_2_MASK   0xfu
#define	FLASH_CTRL_MP_REGION_CFG_2_ERASE_EN_2_OFFSET   12
#define	FLASH_CTRL_MP_REGION_CFG_2_ERASE_EN_2_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_MP_REGION_CFG_2_ERASE_EN_2_MASK, .index = FLASH_CTRL_MP_REGION_CFG_2_ERASE_EN_2_OFFSET })
#define	FLASH_CTRL_MP_REGION_CFG_2_SCRAMBLE_EN_2_MASK   0xfu
#define	FLASH_CTRL_MP_REGION_CFG_2_SCRAMBLE_EN_2_OFFSET   16
#define	FLASH_CTRL_MP_REGION_CFG_2_SCRAMBLE_EN_2_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_MP_REGION_CFG_2_SCRAMBLE_EN_2_MASK, .index = FLASH_CTRL_MP_REGION_CFG_2_SCRAMBLE_EN_2_OFFSET })
#define	FLASH_CTRL_MP_REGION_CFG_2_ECC_EN_2_MASK   0xfu
#define	FLASH_CTRL_MP_REGION_CFG_2_ECC_EN_2_OFFSET   20
#define	FLASH_CTRL_MP_REGION_CFG_2_ECC_EN_2_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_MP_REGION_CFG_2_ECC_EN_2_MASK, .index = FLASH_CTRL_MP_REGION_CFG_2_ECC_EN_2_OFFSET })
#define	FLASH_CTRL_MP_REGION_CFG_2_HE_EN_2_MASK   0xfu
#define	FLASH_CTRL_MP_REGION_CFG_2_HE_EN_2_OFFSET   24
#define	FLASH_CTRL_MP_REGION_CFG_2_HE_EN_2_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_MP_REGION_CFG_2_HE_EN_2_MASK, .index = FLASH_CTRL_MP_REGION_CFG_2_HE_EN_2_OFFSET })
#define	FLASH_CTRL_MP_REGION_CFG_3_REG_OFFSET   0x5c
#define	FLASH_CTRL_MP_REGION_CFG_3_REG_RESVAL   0x9999999u
#define	FLASH_CTRL_MP_REGION_CFG_3_EN_3_MASK   0xfu
#define	FLASH_CTRL_MP_REGION_CFG_3_EN_3_OFFSET   0
#define	FLASH_CTRL_MP_REGION_CFG_3_EN_3_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_MP_REGION_CFG_3_EN_3_MASK, .index = FLASH_CTRL_MP_REGION_CFG_3_EN_3_OFFSET })
#define	FLASH_CTRL_MP_REGION_CFG_3_RD_EN_3_MASK   0xfu
#define	FLASH_CTRL_MP_REGION_CFG_3_RD_EN_3_OFFSET   4
#define	FLASH_CTRL_MP_REGION_CFG_3_RD_EN_3_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_MP_REGION_CFG_3_RD_EN_3_MASK, .index = FLASH_CTRL_MP_REGION_CFG_3_RD_EN_3_OFFSET })
#define	FLASH_CTRL_MP_REGION_CFG_3_PROG_EN_3_MASK   0xfu
#define	FLASH_CTRL_MP_REGION_CFG_3_PROG_EN_3_OFFSET   8
#define	FLASH_CTRL_MP_REGION_CFG_3_PROG_EN_3_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_MP_REGION_CFG_3_PROG_EN_3_MASK, .index = FLASH_CTRL_MP_REGION_CFG_3_PROG_EN_3_OFFSET })
#define	FLASH_CTRL_MP_REGION_CFG_3_ERASE_EN_3_MASK   0xfu
#define	FLASH_CTRL_MP_REGION_CFG_3_ERASE_EN_3_OFFSET   12
#define	FLASH_CTRL_MP_REGION_CFG_3_ERASE_EN_3_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_MP_REGION_CFG_3_ERASE_EN_3_MASK, .index = FLASH_CTRL_MP_REGION_CFG_3_ERASE_EN_3_OFFSET })
#define	FLASH_CTRL_MP_REGION_CFG_3_SCRAMBLE_EN_3_MASK   0xfu
#define	FLASH_CTRL_MP_REGION_CFG_3_SCRAMBLE_EN_3_OFFSET   16
#define	FLASH_CTRL_MP_REGION_CFG_3_SCRAMBLE_EN_3_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_MP_REGION_CFG_3_SCRAMBLE_EN_3_MASK, .index = FLASH_CTRL_MP_REGION_CFG_3_SCRAMBLE_EN_3_OFFSET })
#define	FLASH_CTRL_MP_REGION_CFG_3_ECC_EN_3_MASK   0xfu
#define	FLASH_CTRL_MP_REGION_CFG_3_ECC_EN_3_OFFSET   20
#define	FLASH_CTRL_MP_REGION_CFG_3_ECC_EN_3_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_MP_REGION_CFG_3_ECC_EN_3_MASK, .index = FLASH_CTRL_MP_REGION_CFG_3_ECC_EN_3_OFFSET })
#define	FLASH_CTRL_MP_REGION_CFG_3_HE_EN_3_MASK   0xfu
#define	FLASH_CTRL_MP_REGION_CFG_3_HE_EN_3_OFFSET   24
#define	FLASH_CTRL_MP_REGION_CFG_3_HE_EN_3_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_MP_REGION_CFG_3_HE_EN_3_MASK, .index = FLASH_CTRL_MP_REGION_CFG_3_HE_EN_3_OFFSET })
#define	FLASH_CTRL_MP_REGION_CFG_4_REG_OFFSET   0x60
#define	FLASH_CTRL_MP_REGION_CFG_4_REG_RESVAL   0x9999999u
#define	FLASH_CTRL_MP_REGION_CFG_4_EN_4_MASK   0xfu
#define	FLASH_CTRL_MP_REGION_CFG_4_EN_4_OFFSET   0
#define	FLASH_CTRL_MP_REGION_CFG_4_EN_4_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_MP_REGION_CFG_4_EN_4_MASK, .index = FLASH_CTRL_MP_REGION_CFG_4_EN_4_OFFSET })
#define	FLASH_CTRL_MP_REGION_CFG_4_RD_EN_4_MASK   0xfu
#define	FLASH_CTRL_MP_REGION_CFG_4_RD_EN_4_OFFSET   4
#define	FLASH_CTRL_MP_REGION_CFG_4_RD_EN_4_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_MP_REGION_CFG_4_RD_EN_4_MASK, .index = FLASH_CTRL_MP_REGION_CFG_4_RD_EN_4_OFFSET })
#define	FLASH_CTRL_MP_REGION_CFG_4_PROG_EN_4_MASK   0xfu
#define	FLASH_CTRL_MP_REGION_CFG_4_PROG_EN_4_OFFSET   8
#define	FLASH_CTRL_MP_REGION_CFG_4_PROG_EN_4_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_MP_REGION_CFG_4_PROG_EN_4_MASK, .index = FLASH_CTRL_MP_REGION_CFG_4_PROG_EN_4_OFFSET })
#define	FLASH_CTRL_MP_REGION_CFG_4_ERASE_EN_4_MASK   0xfu
#define	FLASH_CTRL_MP_REGION_CFG_4_ERASE_EN_4_OFFSET   12
#define	FLASH_CTRL_MP_REGION_CFG_4_ERASE_EN_4_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_MP_REGION_CFG_4_ERASE_EN_4_MASK, .index = FLASH_CTRL_MP_REGION_CFG_4_ERASE_EN_4_OFFSET })
#define	FLASH_CTRL_MP_REGION_CFG_4_SCRAMBLE_EN_4_MASK   0xfu
#define	FLASH_CTRL_MP_REGION_CFG_4_SCRAMBLE_EN_4_OFFSET   16
#define	FLASH_CTRL_MP_REGION_CFG_4_SCRAMBLE_EN_4_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_MP_REGION_CFG_4_SCRAMBLE_EN_4_MASK, .index = FLASH_CTRL_MP_REGION_CFG_4_SCRAMBLE_EN_4_OFFSET })
#define	FLASH_CTRL_MP_REGION_CFG_4_ECC_EN_4_MASK   0xfu
#define	FLASH_CTRL_MP_REGION_CFG_4_ECC_EN_4_OFFSET   20
#define	FLASH_CTRL_MP_REGION_CFG_4_ECC_EN_4_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_MP_REGION_CFG_4_ECC_EN_4_MASK, .index = FLASH_CTRL_MP_REGION_CFG_4_ECC_EN_4_OFFSET })
#define	FLASH_CTRL_MP_REGION_CFG_4_HE_EN_4_MASK   0xfu
#define	FLASH_CTRL_MP_REGION_CFG_4_HE_EN_4_OFFSET   24
#define	FLASH_CTRL_MP_REGION_CFG_4_HE_EN_4_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_MP_REGION_CFG_4_HE_EN_4_MASK, .index = FLASH_CTRL_MP_REGION_CFG_4_HE_EN_4_OFFSET })
#define	FLASH_CTRL_MP_REGION_CFG_5_REG_OFFSET   0x64
#define	FLASH_CTRL_MP_REGION_CFG_5_REG_RESVAL   0x9999999u
#define	FLASH_CTRL_MP_REGION_CFG_5_EN_5_MASK   0xfu
#define	FLASH_CTRL_MP_REGION_CFG_5_EN_5_OFFSET   0
#define	FLASH_CTRL_MP_REGION_CFG_5_EN_5_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_MP_REGION_CFG_5_EN_5_MASK, .index = FLASH_CTRL_MP_REGION_CFG_5_EN_5_OFFSET })
#define	FLASH_CTRL_MP_REGION_CFG_5_RD_EN_5_MASK   0xfu
#define	FLASH_CTRL_MP_REGION_CFG_5_RD_EN_5_OFFSET   4
#define	FLASH_CTRL_MP_REGION_CFG_5_RD_EN_5_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_MP_REGION_CFG_5_RD_EN_5_MASK, .index = FLASH_CTRL_MP_REGION_CFG_5_RD_EN_5_OFFSET })
#define	FLASH_CTRL_MP_REGION_CFG_5_PROG_EN_5_MASK   0xfu
#define	FLASH_CTRL_MP_REGION_CFG_5_PROG_EN_5_OFFSET   8
#define	FLASH_CTRL_MP_REGION_CFG_5_PROG_EN_5_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_MP_REGION_CFG_5_PROG_EN_5_MASK, .index = FLASH_CTRL_MP_REGION_CFG_5_PROG_EN_5_OFFSET })
#define	FLASH_CTRL_MP_REGION_CFG_5_ERASE_EN_5_MASK   0xfu
#define	FLASH_CTRL_MP_REGION_CFG_5_ERASE_EN_5_OFFSET   12
#define	FLASH_CTRL_MP_REGION_CFG_5_ERASE_EN_5_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_MP_REGION_CFG_5_ERASE_EN_5_MASK, .index = FLASH_CTRL_MP_REGION_CFG_5_ERASE_EN_5_OFFSET })
#define	FLASH_CTRL_MP_REGION_CFG_5_SCRAMBLE_EN_5_MASK   0xfu
#define	FLASH_CTRL_MP_REGION_CFG_5_SCRAMBLE_EN_5_OFFSET   16
#define	FLASH_CTRL_MP_REGION_CFG_5_SCRAMBLE_EN_5_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_MP_REGION_CFG_5_SCRAMBLE_EN_5_MASK, .index = FLASH_CTRL_MP_REGION_CFG_5_SCRAMBLE_EN_5_OFFSET })
#define	FLASH_CTRL_MP_REGION_CFG_5_ECC_EN_5_MASK   0xfu
#define	FLASH_CTRL_MP_REGION_CFG_5_ECC_EN_5_OFFSET   20
#define	FLASH_CTRL_MP_REGION_CFG_5_ECC_EN_5_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_MP_REGION_CFG_5_ECC_EN_5_MASK, .index = FLASH_CTRL_MP_REGION_CFG_5_ECC_EN_5_OFFSET })
#define	FLASH_CTRL_MP_REGION_CFG_5_HE_EN_5_MASK   0xfu
#define	FLASH_CTRL_MP_REGION_CFG_5_HE_EN_5_OFFSET   24
#define	FLASH_CTRL_MP_REGION_CFG_5_HE_EN_5_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_MP_REGION_CFG_5_HE_EN_5_MASK, .index = FLASH_CTRL_MP_REGION_CFG_5_HE_EN_5_OFFSET })
#define	FLASH_CTRL_MP_REGION_CFG_6_REG_OFFSET   0x68
#define	FLASH_CTRL_MP_REGION_CFG_6_REG_RESVAL   0x9999999u
#define	FLASH_CTRL_MP_REGION_CFG_6_EN_6_MASK   0xfu
#define	FLASH_CTRL_MP_REGION_CFG_6_EN_6_OFFSET   0
#define	FLASH_CTRL_MP_REGION_CFG_6_EN_6_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_MP_REGION_CFG_6_EN_6_MASK, .index = FLASH_CTRL_MP_REGION_CFG_6_EN_6_OFFSET })
#define	FLASH_CTRL_MP_REGION_CFG_6_RD_EN_6_MASK   0xfu
#define	FLASH_CTRL_MP_REGION_CFG_6_RD_EN_6_OFFSET   4
#define	FLASH_CTRL_MP_REGION_CFG_6_RD_EN_6_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_MP_REGION_CFG_6_RD_EN_6_MASK, .index = FLASH_CTRL_MP_REGION_CFG_6_RD_EN_6_OFFSET })
#define	FLASH_CTRL_MP_REGION_CFG_6_PROG_EN_6_MASK   0xfu
#define	FLASH_CTRL_MP_REGION_CFG_6_PROG_EN_6_OFFSET   8
#define	FLASH_CTRL_MP_REGION_CFG_6_PROG_EN_6_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_MP_REGION_CFG_6_PROG_EN_6_MASK, .index = FLASH_CTRL_MP_REGION_CFG_6_PROG_EN_6_OFFSET })
#define	FLASH_CTRL_MP_REGION_CFG_6_ERASE_EN_6_MASK   0xfu
#define	FLASH_CTRL_MP_REGION_CFG_6_ERASE_EN_6_OFFSET   12
#define	FLASH_CTRL_MP_REGION_CFG_6_ERASE_EN_6_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_MP_REGION_CFG_6_ERASE_EN_6_MASK, .index = FLASH_CTRL_MP_REGION_CFG_6_ERASE_EN_6_OFFSET })
#define	FLASH_CTRL_MP_REGION_CFG_6_SCRAMBLE_EN_6_MASK   0xfu
#define	FLASH_CTRL_MP_REGION_CFG_6_SCRAMBLE_EN_6_OFFSET   16
#define	FLASH_CTRL_MP_REGION_CFG_6_SCRAMBLE_EN_6_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_MP_REGION_CFG_6_SCRAMBLE_EN_6_MASK, .index = FLASH_CTRL_MP_REGION_CFG_6_SCRAMBLE_EN_6_OFFSET })
#define	FLASH_CTRL_MP_REGION_CFG_6_ECC_EN_6_MASK   0xfu
#define	FLASH_CTRL_MP_REGION_CFG_6_ECC_EN_6_OFFSET   20
#define	FLASH_CTRL_MP_REGION_CFG_6_ECC_EN_6_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_MP_REGION_CFG_6_ECC_EN_6_MASK, .index = FLASH_CTRL_MP_REGION_CFG_6_ECC_EN_6_OFFSET })
#define	FLASH_CTRL_MP_REGION_CFG_6_HE_EN_6_MASK   0xfu
#define	FLASH_CTRL_MP_REGION_CFG_6_HE_EN_6_OFFSET   24
#define	FLASH_CTRL_MP_REGION_CFG_6_HE_EN_6_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_MP_REGION_CFG_6_HE_EN_6_MASK, .index = FLASH_CTRL_MP_REGION_CFG_6_HE_EN_6_OFFSET })
#define	FLASH_CTRL_MP_REGION_CFG_7_REG_OFFSET   0x6c
#define	FLASH_CTRL_MP_REGION_CFG_7_REG_RESVAL   0x9999999u
#define	FLASH_CTRL_MP_REGION_CFG_7_EN_7_MASK   0xfu
#define	FLASH_CTRL_MP_REGION_CFG_7_EN_7_OFFSET   0
#define	FLASH_CTRL_MP_REGION_CFG_7_EN_7_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_MP_REGION_CFG_7_EN_7_MASK, .index = FLASH_CTRL_MP_REGION_CFG_7_EN_7_OFFSET })
#define	FLASH_CTRL_MP_REGION_CFG_7_RD_EN_7_MASK   0xfu
#define	FLASH_CTRL_MP_REGION_CFG_7_RD_EN_7_OFFSET   4
#define	FLASH_CTRL_MP_REGION_CFG_7_RD_EN_7_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_MP_REGION_CFG_7_RD_EN_7_MASK, .index = FLASH_CTRL_MP_REGION_CFG_7_RD_EN_7_OFFSET })
#define	FLASH_CTRL_MP_REGION_CFG_7_PROG_EN_7_MASK   0xfu
#define	FLASH_CTRL_MP_REGION_CFG_7_PROG_EN_7_OFFSET   8
#define	FLASH_CTRL_MP_REGION_CFG_7_PROG_EN_7_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_MP_REGION_CFG_7_PROG_EN_7_MASK, .index = FLASH_CTRL_MP_REGION_CFG_7_PROG_EN_7_OFFSET })
#define	FLASH_CTRL_MP_REGION_CFG_7_ERASE_EN_7_MASK   0xfu
#define	FLASH_CTRL_MP_REGION_CFG_7_ERASE_EN_7_OFFSET   12
#define	FLASH_CTRL_MP_REGION_CFG_7_ERASE_EN_7_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_MP_REGION_CFG_7_ERASE_EN_7_MASK, .index = FLASH_CTRL_MP_REGION_CFG_7_ERASE_EN_7_OFFSET })
#define	FLASH_CTRL_MP_REGION_CFG_7_SCRAMBLE_EN_7_MASK   0xfu
#define	FLASH_CTRL_MP_REGION_CFG_7_SCRAMBLE_EN_7_OFFSET   16
#define	FLASH_CTRL_MP_REGION_CFG_7_SCRAMBLE_EN_7_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_MP_REGION_CFG_7_SCRAMBLE_EN_7_MASK, .index = FLASH_CTRL_MP_REGION_CFG_7_SCRAMBLE_EN_7_OFFSET })
#define	FLASH_CTRL_MP_REGION_CFG_7_ECC_EN_7_MASK   0xfu
#define	FLASH_CTRL_MP_REGION_CFG_7_ECC_EN_7_OFFSET   20
#define	FLASH_CTRL_MP_REGION_CFG_7_ECC_EN_7_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_MP_REGION_CFG_7_ECC_EN_7_MASK, .index = FLASH_CTRL_MP_REGION_CFG_7_ECC_EN_7_OFFSET })
#define	FLASH_CTRL_MP_REGION_CFG_7_HE_EN_7_MASK   0xfu
#define	FLASH_CTRL_MP_REGION_CFG_7_HE_EN_7_OFFSET   24
#define	FLASH_CTRL_MP_REGION_CFG_7_HE_EN_7_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_MP_REGION_CFG_7_HE_EN_7_MASK, .index = FLASH_CTRL_MP_REGION_CFG_7_HE_EN_7_OFFSET })
#define	FLASH_CTRL_MP_REGION_BASE_FIELD_WIDTH   9
#define	FLASH_CTRL_MP_REGION_SIZE_FIELD_WIDTH   10
#define	FLASH_CTRL_MP_REGION_MULTIREG_COUNT   8
#define	FLASH_CTRL_MP_REGION_0_REG_OFFSET   0x70
#define	FLASH_CTRL_MP_REGION_0_REG_RESVAL   0x0u
#define	FLASH_CTRL_MP_REGION_0_BASE_0_MASK   0x1ffu
#define	FLASH_CTRL_MP_REGION_0_BASE_0_OFFSET   0
#define	FLASH_CTRL_MP_REGION_0_BASE_0_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_MP_REGION_0_BASE_0_MASK, .index = FLASH_CTRL_MP_REGION_0_BASE_0_OFFSET })
#define	FLASH_CTRL_MP_REGION_0_SIZE_0_MASK   0x3ffu
#define	FLASH_CTRL_MP_REGION_0_SIZE_0_OFFSET   9
#define	FLASH_CTRL_MP_REGION_0_SIZE_0_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_MP_REGION_0_SIZE_0_MASK, .index = FLASH_CTRL_MP_REGION_0_SIZE_0_OFFSET })
#define	FLASH_CTRL_MP_REGION_1_REG_OFFSET   0x74
#define	FLASH_CTRL_MP_REGION_1_REG_RESVAL   0x0u
#define	FLASH_CTRL_MP_REGION_1_BASE_1_MASK   0x1ffu
#define	FLASH_CTRL_MP_REGION_1_BASE_1_OFFSET   0
#define	FLASH_CTRL_MP_REGION_1_BASE_1_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_MP_REGION_1_BASE_1_MASK, .index = FLASH_CTRL_MP_REGION_1_BASE_1_OFFSET })
#define	FLASH_CTRL_MP_REGION_1_SIZE_1_MASK   0x3ffu
#define	FLASH_CTRL_MP_REGION_1_SIZE_1_OFFSET   9
#define	FLASH_CTRL_MP_REGION_1_SIZE_1_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_MP_REGION_1_SIZE_1_MASK, .index = FLASH_CTRL_MP_REGION_1_SIZE_1_OFFSET })
#define	FLASH_CTRL_MP_REGION_2_REG_OFFSET   0x78
#define	FLASH_CTRL_MP_REGION_2_REG_RESVAL   0x0u
#define	FLASH_CTRL_MP_REGION_2_BASE_2_MASK   0x1ffu
#define	FLASH_CTRL_MP_REGION_2_BASE_2_OFFSET   0
#define	FLASH_CTRL_MP_REGION_2_BASE_2_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_MP_REGION_2_BASE_2_MASK, .index = FLASH_CTRL_MP_REGION_2_BASE_2_OFFSET })
#define	FLASH_CTRL_MP_REGION_2_SIZE_2_MASK   0x3ffu
#define	FLASH_CTRL_MP_REGION_2_SIZE_2_OFFSET   9
#define	FLASH_CTRL_MP_REGION_2_SIZE_2_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_MP_REGION_2_SIZE_2_MASK, .index = FLASH_CTRL_MP_REGION_2_SIZE_2_OFFSET })
#define	FLASH_CTRL_MP_REGION_3_REG_OFFSET   0x7c
#define	FLASH_CTRL_MP_REGION_3_REG_RESVAL   0x0u
#define	FLASH_CTRL_MP_REGION_3_BASE_3_MASK   0x1ffu
#define	FLASH_CTRL_MP_REGION_3_BASE_3_OFFSET   0
#define	FLASH_CTRL_MP_REGION_3_BASE_3_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_MP_REGION_3_BASE_3_MASK, .index = FLASH_CTRL_MP_REGION_3_BASE_3_OFFSET })
#define	FLASH_CTRL_MP_REGION_3_SIZE_3_MASK   0x3ffu
#define	FLASH_CTRL_MP_REGION_3_SIZE_3_OFFSET   9
#define	FLASH_CTRL_MP_REGION_3_SIZE_3_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_MP_REGION_3_SIZE_3_MASK, .index = FLASH_CTRL_MP_REGION_3_SIZE_3_OFFSET })
#define	FLASH_CTRL_MP_REGION_4_REG_OFFSET   0x80
#define	FLASH_CTRL_MP_REGION_4_REG_RESVAL   0x0u
#define	FLASH_CTRL_MP_REGION_4_BASE_4_MASK   0x1ffu
#define	FLASH_CTRL_MP_REGION_4_BASE_4_OFFSET   0
#define	FLASH_CTRL_MP_REGION_4_BASE_4_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_MP_REGION_4_BASE_4_MASK, .index = FLASH_CTRL_MP_REGION_4_BASE_4_OFFSET })
#define	FLASH_CTRL_MP_REGION_4_SIZE_4_MASK   0x3ffu
#define	FLASH_CTRL_MP_REGION_4_SIZE_4_OFFSET   9
#define	FLASH_CTRL_MP_REGION_4_SIZE_4_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_MP_REGION_4_SIZE_4_MASK, .index = FLASH_CTRL_MP_REGION_4_SIZE_4_OFFSET })
#define	FLASH_CTRL_MP_REGION_5_REG_OFFSET   0x84
#define	FLASH_CTRL_MP_REGION_5_REG_RESVAL   0x0u
#define	FLASH_CTRL_MP_REGION_5_BASE_5_MASK   0x1ffu
#define	FLASH_CTRL_MP_REGION_5_BASE_5_OFFSET   0
#define	FLASH_CTRL_MP_REGION_5_BASE_5_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_MP_REGION_5_BASE_5_MASK, .index = FLASH_CTRL_MP_REGION_5_BASE_5_OFFSET })
#define	FLASH_CTRL_MP_REGION_5_SIZE_5_MASK   0x3ffu
#define	FLASH_CTRL_MP_REGION_5_SIZE_5_OFFSET   9
#define	FLASH_CTRL_MP_REGION_5_SIZE_5_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_MP_REGION_5_SIZE_5_MASK, .index = FLASH_CTRL_MP_REGION_5_SIZE_5_OFFSET })
#define	FLASH_CTRL_MP_REGION_6_REG_OFFSET   0x88
#define	FLASH_CTRL_MP_REGION_6_REG_RESVAL   0x0u
#define	FLASH_CTRL_MP_REGION_6_BASE_6_MASK   0x1ffu
#define	FLASH_CTRL_MP_REGION_6_BASE_6_OFFSET   0
#define	FLASH_CTRL_MP_REGION_6_BASE_6_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_MP_REGION_6_BASE_6_MASK, .index = FLASH_CTRL_MP_REGION_6_BASE_6_OFFSET })
#define	FLASH_CTRL_MP_REGION_6_SIZE_6_MASK   0x3ffu
#define	FLASH_CTRL_MP_REGION_6_SIZE_6_OFFSET   9
#define	FLASH_CTRL_MP_REGION_6_SIZE_6_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_MP_REGION_6_SIZE_6_MASK, .index = FLASH_CTRL_MP_REGION_6_SIZE_6_OFFSET })
#define	FLASH_CTRL_MP_REGION_7_REG_OFFSET   0x8c
#define	FLASH_CTRL_MP_REGION_7_REG_RESVAL   0x0u
#define	FLASH_CTRL_MP_REGION_7_BASE_7_MASK   0x1ffu
#define	FLASH_CTRL_MP_REGION_7_BASE_7_OFFSET   0
#define	FLASH_CTRL_MP_REGION_7_BASE_7_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_MP_REGION_7_BASE_7_MASK, .index = FLASH_CTRL_MP_REGION_7_BASE_7_OFFSET })
#define	FLASH_CTRL_MP_REGION_7_SIZE_7_MASK   0x3ffu
#define	FLASH_CTRL_MP_REGION_7_SIZE_7_OFFSET   9
#define	FLASH_CTRL_MP_REGION_7_SIZE_7_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_MP_REGION_7_SIZE_7_MASK, .index = FLASH_CTRL_MP_REGION_7_SIZE_7_OFFSET })
#define	FLASH_CTRL_DEFAULT_REGION_REG_OFFSET   0x90
#define	FLASH_CTRL_DEFAULT_REGION_REG_RESVAL   0x999999u
#define	FLASH_CTRL_DEFAULT_REGION_RD_EN_MASK   0xfu
#define	FLASH_CTRL_DEFAULT_REGION_RD_EN_OFFSET   0
#define	FLASH_CTRL_DEFAULT_REGION_RD_EN_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_DEFAULT_REGION_RD_EN_MASK, .index = FLASH_CTRL_DEFAULT_REGION_RD_EN_OFFSET })
#define	FLASH_CTRL_DEFAULT_REGION_PROG_EN_MASK   0xfu
#define	FLASH_CTRL_DEFAULT_REGION_PROG_EN_OFFSET   4
#define	FLASH_CTRL_DEFAULT_REGION_PROG_EN_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_DEFAULT_REGION_PROG_EN_MASK, .index = FLASH_CTRL_DEFAULT_REGION_PROG_EN_OFFSET })
#define	FLASH_CTRL_DEFAULT_REGION_ERASE_EN_MASK   0xfu
#define	FLASH_CTRL_DEFAULT_REGION_ERASE_EN_OFFSET   8
#define	FLASH_CTRL_DEFAULT_REGION_ERASE_EN_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_DEFAULT_REGION_ERASE_EN_MASK, .index = FLASH_CTRL_DEFAULT_REGION_ERASE_EN_OFFSET })
#define	FLASH_CTRL_DEFAULT_REGION_SCRAMBLE_EN_MASK   0xfu
#define	FLASH_CTRL_DEFAULT_REGION_SCRAMBLE_EN_OFFSET   12
#define	FLASH_CTRL_DEFAULT_REGION_SCRAMBLE_EN_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_DEFAULT_REGION_SCRAMBLE_EN_MASK, .index = FLASH_CTRL_DEFAULT_REGION_SCRAMBLE_EN_OFFSET })
#define	FLASH_CTRL_DEFAULT_REGION_ECC_EN_MASK   0xfu
#define	FLASH_CTRL_DEFAULT_REGION_ECC_EN_OFFSET   16
#define	FLASH_CTRL_DEFAULT_REGION_ECC_EN_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_DEFAULT_REGION_ECC_EN_MASK, .index = FLASH_CTRL_DEFAULT_REGION_ECC_EN_OFFSET })
#define	FLASH_CTRL_DEFAULT_REGION_HE_EN_MASK   0xfu
#define	FLASH_CTRL_DEFAULT_REGION_HE_EN_OFFSET   20
#define	FLASH_CTRL_DEFAULT_REGION_HE_EN_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_DEFAULT_REGION_HE_EN_MASK, .index = FLASH_CTRL_DEFAULT_REGION_HE_EN_OFFSET })
#define	FLASH_CTRL_BANK0_INFO0_REGWEN_REGION_FIELD_WIDTH   1
#define	FLASH_CTRL_BANK0_INFO0_REGWEN_MULTIREG_COUNT   10
#define	FLASH_CTRL_BANK0_INFO0_REGWEN_0_REG_OFFSET   0x94
#define	FLASH_CTRL_BANK0_INFO0_REGWEN_0_REG_RESVAL   0x1u
#define	FLASH_CTRL_BANK0_INFO0_REGWEN_0_REGION_0_BIT   0
#define	FLASH_CTRL_BANK0_INFO0_REGWEN_0_REGION_0_VALUE_PAGE_LOCKED   0x0
#define	FLASH_CTRL_BANK0_INFO0_REGWEN_0_REGION_0_VALUE_PAGE_ENABLED   0x1
#define	FLASH_CTRL_BANK0_INFO0_REGWEN_1_REG_OFFSET   0x98
#define	FLASH_CTRL_BANK0_INFO0_REGWEN_1_REG_RESVAL   0x1u
#define	FLASH_CTRL_BANK0_INFO0_REGWEN_1_REGION_1_BIT   0
#define	FLASH_CTRL_BANK0_INFO0_REGWEN_2_REG_OFFSET   0x9c
#define	FLASH_CTRL_BANK0_INFO0_REGWEN_2_REG_RESVAL   0x1u
#define	FLASH_CTRL_BANK0_INFO0_REGWEN_2_REGION_2_BIT   0
#define	FLASH_CTRL_BANK0_INFO0_REGWEN_3_REG_OFFSET   0xa0
#define	FLASH_CTRL_BANK0_INFO0_REGWEN_3_REG_RESVAL   0x1u
#define	FLASH_CTRL_BANK0_INFO0_REGWEN_3_REGION_3_BIT   0
#define	FLASH_CTRL_BANK0_INFO0_REGWEN_4_REG_OFFSET   0xa4
#define	FLASH_CTRL_BANK0_INFO0_REGWEN_4_REG_RESVAL   0x1u
#define	FLASH_CTRL_BANK0_INFO0_REGWEN_4_REGION_4_BIT   0
#define	FLASH_CTRL_BANK0_INFO0_REGWEN_5_REG_OFFSET   0xa8
#define	FLASH_CTRL_BANK0_INFO0_REGWEN_5_REG_RESVAL   0x1u
#define	FLASH_CTRL_BANK0_INFO0_REGWEN_5_REGION_5_BIT   0
#define	FLASH_CTRL_BANK0_INFO0_REGWEN_6_REG_OFFSET   0xac
#define	FLASH_CTRL_BANK0_INFO0_REGWEN_6_REG_RESVAL   0x1u
#define	FLASH_CTRL_BANK0_INFO0_REGWEN_6_REGION_6_BIT   0
#define	FLASH_CTRL_BANK0_INFO0_REGWEN_7_REG_OFFSET   0xb0
#define	FLASH_CTRL_BANK0_INFO0_REGWEN_7_REG_RESVAL   0x1u
#define	FLASH_CTRL_BANK0_INFO0_REGWEN_7_REGION_7_BIT   0
#define	FLASH_CTRL_BANK0_INFO0_REGWEN_8_REG_OFFSET   0xb4
#define	FLASH_CTRL_BANK0_INFO0_REGWEN_8_REG_RESVAL   0x1u
#define	FLASH_CTRL_BANK0_INFO0_REGWEN_8_REGION_8_BIT   0
#define	FLASH_CTRL_BANK0_INFO0_REGWEN_9_REG_OFFSET   0xb8
#define	FLASH_CTRL_BANK0_INFO0_REGWEN_9_REG_RESVAL   0x1u
#define	FLASH_CTRL_BANK0_INFO0_REGWEN_9_REGION_9_BIT   0
#define	FLASH_CTRL_BANK0_INFO0_PAGE_CFG_EN_FIELD_WIDTH   4
#define	FLASH_CTRL_BANK0_INFO0_PAGE_CFG_RD_EN_FIELD_WIDTH   4
#define	FLASH_CTRL_BANK0_INFO0_PAGE_CFG_PROG_EN_FIELD_WIDTH   4
#define	FLASH_CTRL_BANK0_INFO0_PAGE_CFG_ERASE_EN_FIELD_WIDTH   4
#define	FLASH_CTRL_BANK0_INFO0_PAGE_CFG_SCRAMBLE_EN_FIELD_WIDTH   4
#define	FLASH_CTRL_BANK0_INFO0_PAGE_CFG_ECC_EN_FIELD_WIDTH   4
#define	FLASH_CTRL_BANK0_INFO0_PAGE_CFG_HE_EN_FIELD_WIDTH   4
#define	FLASH_CTRL_BANK0_INFO0_PAGE_CFG_MULTIREG_COUNT   10
#define	FLASH_CTRL_BANK0_INFO0_PAGE_CFG_0_REG_OFFSET   0xbc
#define	FLASH_CTRL_BANK0_INFO0_PAGE_CFG_0_REG_RESVAL   0x9999999u
#define	FLASH_CTRL_BANK0_INFO0_PAGE_CFG_0_EN_0_MASK   0xfu
#define	FLASH_CTRL_BANK0_INFO0_PAGE_CFG_0_EN_0_OFFSET   0
#define	FLASH_CTRL_BANK0_INFO0_PAGE_CFG_0_EN_0_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK0_INFO0_PAGE_CFG_0_EN_0_MASK, .index = FLASH_CTRL_BANK0_INFO0_PAGE_CFG_0_EN_0_OFFSET })
#define	FLASH_CTRL_BANK0_INFO0_PAGE_CFG_0_RD_EN_0_MASK   0xfu
#define	FLASH_CTRL_BANK0_INFO0_PAGE_CFG_0_RD_EN_0_OFFSET   4
#define	FLASH_CTRL_BANK0_INFO0_PAGE_CFG_0_RD_EN_0_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK0_INFO0_PAGE_CFG_0_RD_EN_0_MASK, .index = FLASH_CTRL_BANK0_INFO0_PAGE_CFG_0_RD_EN_0_OFFSET })
#define	FLASH_CTRL_BANK0_INFO0_PAGE_CFG_0_PROG_EN_0_MASK   0xfu
#define	FLASH_CTRL_BANK0_INFO0_PAGE_CFG_0_PROG_EN_0_OFFSET   8
#define	FLASH_CTRL_BANK0_INFO0_PAGE_CFG_0_PROG_EN_0_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK0_INFO0_PAGE_CFG_0_PROG_EN_0_MASK, .index = FLASH_CTRL_BANK0_INFO0_PAGE_CFG_0_PROG_EN_0_OFFSET })
#define	FLASH_CTRL_BANK0_INFO0_PAGE_CFG_0_ERASE_EN_0_MASK   0xfu
#define	FLASH_CTRL_BANK0_INFO0_PAGE_CFG_0_ERASE_EN_0_OFFSET   12
#define	FLASH_CTRL_BANK0_INFO0_PAGE_CFG_0_ERASE_EN_0_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK0_INFO0_PAGE_CFG_0_ERASE_EN_0_MASK, .index = FLASH_CTRL_BANK0_INFO0_PAGE_CFG_0_ERASE_EN_0_OFFSET })
#define	FLASH_CTRL_BANK0_INFO0_PAGE_CFG_0_SCRAMBLE_EN_0_MASK   0xfu
#define	FLASH_CTRL_BANK0_INFO0_PAGE_CFG_0_SCRAMBLE_EN_0_OFFSET   16
#define	FLASH_CTRL_BANK0_INFO0_PAGE_CFG_0_SCRAMBLE_EN_0_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK0_INFO0_PAGE_CFG_0_SCRAMBLE_EN_0_MASK, .index = FLASH_CTRL_BANK0_INFO0_PAGE_CFG_0_SCRAMBLE_EN_0_OFFSET })
#define	FLASH_CTRL_BANK0_INFO0_PAGE_CFG_0_ECC_EN_0_MASK   0xfu
#define	FLASH_CTRL_BANK0_INFO0_PAGE_CFG_0_ECC_EN_0_OFFSET   20
#define	FLASH_CTRL_BANK0_INFO0_PAGE_CFG_0_ECC_EN_0_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK0_INFO0_PAGE_CFG_0_ECC_EN_0_MASK, .index = FLASH_CTRL_BANK0_INFO0_PAGE_CFG_0_ECC_EN_0_OFFSET })
#define	FLASH_CTRL_BANK0_INFO0_PAGE_CFG_0_HE_EN_0_MASK   0xfu
#define	FLASH_CTRL_BANK0_INFO0_PAGE_CFG_0_HE_EN_0_OFFSET   24
#define	FLASH_CTRL_BANK0_INFO0_PAGE_CFG_0_HE_EN_0_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK0_INFO0_PAGE_CFG_0_HE_EN_0_MASK, .index = FLASH_CTRL_BANK0_INFO0_PAGE_CFG_0_HE_EN_0_OFFSET })
#define	FLASH_CTRL_BANK0_INFO0_PAGE_CFG_1_REG_OFFSET   0xc0
#define	FLASH_CTRL_BANK0_INFO0_PAGE_CFG_1_REG_RESVAL   0x9999999u
#define	FLASH_CTRL_BANK0_INFO0_PAGE_CFG_1_EN_1_MASK   0xfu
#define	FLASH_CTRL_BANK0_INFO0_PAGE_CFG_1_EN_1_OFFSET   0
#define	FLASH_CTRL_BANK0_INFO0_PAGE_CFG_1_EN_1_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK0_INFO0_PAGE_CFG_1_EN_1_MASK, .index = FLASH_CTRL_BANK0_INFO0_PAGE_CFG_1_EN_1_OFFSET })
#define	FLASH_CTRL_BANK0_INFO0_PAGE_CFG_1_RD_EN_1_MASK   0xfu
#define	FLASH_CTRL_BANK0_INFO0_PAGE_CFG_1_RD_EN_1_OFFSET   4
#define	FLASH_CTRL_BANK0_INFO0_PAGE_CFG_1_RD_EN_1_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK0_INFO0_PAGE_CFG_1_RD_EN_1_MASK, .index = FLASH_CTRL_BANK0_INFO0_PAGE_CFG_1_RD_EN_1_OFFSET })
#define	FLASH_CTRL_BANK0_INFO0_PAGE_CFG_1_PROG_EN_1_MASK   0xfu
#define	FLASH_CTRL_BANK0_INFO0_PAGE_CFG_1_PROG_EN_1_OFFSET   8
#define	FLASH_CTRL_BANK0_INFO0_PAGE_CFG_1_PROG_EN_1_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK0_INFO0_PAGE_CFG_1_PROG_EN_1_MASK, .index = FLASH_CTRL_BANK0_INFO0_PAGE_CFG_1_PROG_EN_1_OFFSET })
#define	FLASH_CTRL_BANK0_INFO0_PAGE_CFG_1_ERASE_EN_1_MASK   0xfu
#define	FLASH_CTRL_BANK0_INFO0_PAGE_CFG_1_ERASE_EN_1_OFFSET   12
#define	FLASH_CTRL_BANK0_INFO0_PAGE_CFG_1_ERASE_EN_1_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK0_INFO0_PAGE_CFG_1_ERASE_EN_1_MASK, .index = FLASH_CTRL_BANK0_INFO0_PAGE_CFG_1_ERASE_EN_1_OFFSET })
#define	FLASH_CTRL_BANK0_INFO0_PAGE_CFG_1_SCRAMBLE_EN_1_MASK   0xfu
#define	FLASH_CTRL_BANK0_INFO0_PAGE_CFG_1_SCRAMBLE_EN_1_OFFSET   16
#define	FLASH_CTRL_BANK0_INFO0_PAGE_CFG_1_SCRAMBLE_EN_1_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK0_INFO0_PAGE_CFG_1_SCRAMBLE_EN_1_MASK, .index = FLASH_CTRL_BANK0_INFO0_PAGE_CFG_1_SCRAMBLE_EN_1_OFFSET })
#define	FLASH_CTRL_BANK0_INFO0_PAGE_CFG_1_ECC_EN_1_MASK   0xfu
#define	FLASH_CTRL_BANK0_INFO0_PAGE_CFG_1_ECC_EN_1_OFFSET   20
#define	FLASH_CTRL_BANK0_INFO0_PAGE_CFG_1_ECC_EN_1_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK0_INFO0_PAGE_CFG_1_ECC_EN_1_MASK, .index = FLASH_CTRL_BANK0_INFO0_PAGE_CFG_1_ECC_EN_1_OFFSET })
#define	FLASH_CTRL_BANK0_INFO0_PAGE_CFG_1_HE_EN_1_MASK   0xfu
#define	FLASH_CTRL_BANK0_INFO0_PAGE_CFG_1_HE_EN_1_OFFSET   24
#define	FLASH_CTRL_BANK0_INFO0_PAGE_CFG_1_HE_EN_1_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK0_INFO0_PAGE_CFG_1_HE_EN_1_MASK, .index = FLASH_CTRL_BANK0_INFO0_PAGE_CFG_1_HE_EN_1_OFFSET })
#define	FLASH_CTRL_BANK0_INFO0_PAGE_CFG_2_REG_OFFSET   0xc4
#define	FLASH_CTRL_BANK0_INFO0_PAGE_CFG_2_REG_RESVAL   0x9999999u
#define	FLASH_CTRL_BANK0_INFO0_PAGE_CFG_2_EN_2_MASK   0xfu
#define	FLASH_CTRL_BANK0_INFO0_PAGE_CFG_2_EN_2_OFFSET   0
#define	FLASH_CTRL_BANK0_INFO0_PAGE_CFG_2_EN_2_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK0_INFO0_PAGE_CFG_2_EN_2_MASK, .index = FLASH_CTRL_BANK0_INFO0_PAGE_CFG_2_EN_2_OFFSET })
#define	FLASH_CTRL_BANK0_INFO0_PAGE_CFG_2_RD_EN_2_MASK   0xfu
#define	FLASH_CTRL_BANK0_INFO0_PAGE_CFG_2_RD_EN_2_OFFSET   4
#define	FLASH_CTRL_BANK0_INFO0_PAGE_CFG_2_RD_EN_2_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK0_INFO0_PAGE_CFG_2_RD_EN_2_MASK, .index = FLASH_CTRL_BANK0_INFO0_PAGE_CFG_2_RD_EN_2_OFFSET })
#define	FLASH_CTRL_BANK0_INFO0_PAGE_CFG_2_PROG_EN_2_MASK   0xfu
#define	FLASH_CTRL_BANK0_INFO0_PAGE_CFG_2_PROG_EN_2_OFFSET   8
#define	FLASH_CTRL_BANK0_INFO0_PAGE_CFG_2_PROG_EN_2_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK0_INFO0_PAGE_CFG_2_PROG_EN_2_MASK, .index = FLASH_CTRL_BANK0_INFO0_PAGE_CFG_2_PROG_EN_2_OFFSET })
#define	FLASH_CTRL_BANK0_INFO0_PAGE_CFG_2_ERASE_EN_2_MASK   0xfu
#define	FLASH_CTRL_BANK0_INFO0_PAGE_CFG_2_ERASE_EN_2_OFFSET   12
#define	FLASH_CTRL_BANK0_INFO0_PAGE_CFG_2_ERASE_EN_2_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK0_INFO0_PAGE_CFG_2_ERASE_EN_2_MASK, .index = FLASH_CTRL_BANK0_INFO0_PAGE_CFG_2_ERASE_EN_2_OFFSET })
#define	FLASH_CTRL_BANK0_INFO0_PAGE_CFG_2_SCRAMBLE_EN_2_MASK   0xfu
#define	FLASH_CTRL_BANK0_INFO0_PAGE_CFG_2_SCRAMBLE_EN_2_OFFSET   16
#define	FLASH_CTRL_BANK0_INFO0_PAGE_CFG_2_SCRAMBLE_EN_2_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK0_INFO0_PAGE_CFG_2_SCRAMBLE_EN_2_MASK, .index = FLASH_CTRL_BANK0_INFO0_PAGE_CFG_2_SCRAMBLE_EN_2_OFFSET })
#define	FLASH_CTRL_BANK0_INFO0_PAGE_CFG_2_ECC_EN_2_MASK   0xfu
#define	FLASH_CTRL_BANK0_INFO0_PAGE_CFG_2_ECC_EN_2_OFFSET   20
#define	FLASH_CTRL_BANK0_INFO0_PAGE_CFG_2_ECC_EN_2_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK0_INFO0_PAGE_CFG_2_ECC_EN_2_MASK, .index = FLASH_CTRL_BANK0_INFO0_PAGE_CFG_2_ECC_EN_2_OFFSET })
#define	FLASH_CTRL_BANK0_INFO0_PAGE_CFG_2_HE_EN_2_MASK   0xfu
#define	FLASH_CTRL_BANK0_INFO0_PAGE_CFG_2_HE_EN_2_OFFSET   24
#define	FLASH_CTRL_BANK0_INFO0_PAGE_CFG_2_HE_EN_2_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK0_INFO0_PAGE_CFG_2_HE_EN_2_MASK, .index = FLASH_CTRL_BANK0_INFO0_PAGE_CFG_2_HE_EN_2_OFFSET })
#define	FLASH_CTRL_BANK0_INFO0_PAGE_CFG_3_REG_OFFSET   0xc8
#define	FLASH_CTRL_BANK0_INFO0_PAGE_CFG_3_REG_RESVAL   0x9999999u
#define	FLASH_CTRL_BANK0_INFO0_PAGE_CFG_3_EN_3_MASK   0xfu
#define	FLASH_CTRL_BANK0_INFO0_PAGE_CFG_3_EN_3_OFFSET   0
#define	FLASH_CTRL_BANK0_INFO0_PAGE_CFG_3_EN_3_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK0_INFO0_PAGE_CFG_3_EN_3_MASK, .index = FLASH_CTRL_BANK0_INFO0_PAGE_CFG_3_EN_3_OFFSET })
#define	FLASH_CTRL_BANK0_INFO0_PAGE_CFG_3_RD_EN_3_MASK   0xfu
#define	FLASH_CTRL_BANK0_INFO0_PAGE_CFG_3_RD_EN_3_OFFSET   4
#define	FLASH_CTRL_BANK0_INFO0_PAGE_CFG_3_RD_EN_3_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK0_INFO0_PAGE_CFG_3_RD_EN_3_MASK, .index = FLASH_CTRL_BANK0_INFO0_PAGE_CFG_3_RD_EN_3_OFFSET })
#define	FLASH_CTRL_BANK0_INFO0_PAGE_CFG_3_PROG_EN_3_MASK   0xfu
#define	FLASH_CTRL_BANK0_INFO0_PAGE_CFG_3_PROG_EN_3_OFFSET   8
#define	FLASH_CTRL_BANK0_INFO0_PAGE_CFG_3_PROG_EN_3_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK0_INFO0_PAGE_CFG_3_PROG_EN_3_MASK, .index = FLASH_CTRL_BANK0_INFO0_PAGE_CFG_3_PROG_EN_3_OFFSET })
#define	FLASH_CTRL_BANK0_INFO0_PAGE_CFG_3_ERASE_EN_3_MASK   0xfu
#define	FLASH_CTRL_BANK0_INFO0_PAGE_CFG_3_ERASE_EN_3_OFFSET   12
#define	FLASH_CTRL_BANK0_INFO0_PAGE_CFG_3_ERASE_EN_3_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK0_INFO0_PAGE_CFG_3_ERASE_EN_3_MASK, .index = FLASH_CTRL_BANK0_INFO0_PAGE_CFG_3_ERASE_EN_3_OFFSET })
#define	FLASH_CTRL_BANK0_INFO0_PAGE_CFG_3_SCRAMBLE_EN_3_MASK   0xfu
#define	FLASH_CTRL_BANK0_INFO0_PAGE_CFG_3_SCRAMBLE_EN_3_OFFSET   16
#define	FLASH_CTRL_BANK0_INFO0_PAGE_CFG_3_SCRAMBLE_EN_3_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK0_INFO0_PAGE_CFG_3_SCRAMBLE_EN_3_MASK, .index = FLASH_CTRL_BANK0_INFO0_PAGE_CFG_3_SCRAMBLE_EN_3_OFFSET })
#define	FLASH_CTRL_BANK0_INFO0_PAGE_CFG_3_ECC_EN_3_MASK   0xfu
#define	FLASH_CTRL_BANK0_INFO0_PAGE_CFG_3_ECC_EN_3_OFFSET   20
#define	FLASH_CTRL_BANK0_INFO0_PAGE_CFG_3_ECC_EN_3_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK0_INFO0_PAGE_CFG_3_ECC_EN_3_MASK, .index = FLASH_CTRL_BANK0_INFO0_PAGE_CFG_3_ECC_EN_3_OFFSET })
#define	FLASH_CTRL_BANK0_INFO0_PAGE_CFG_3_HE_EN_3_MASK   0xfu
#define	FLASH_CTRL_BANK0_INFO0_PAGE_CFG_3_HE_EN_3_OFFSET   24
#define	FLASH_CTRL_BANK0_INFO0_PAGE_CFG_3_HE_EN_3_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK0_INFO0_PAGE_CFG_3_HE_EN_3_MASK, .index = FLASH_CTRL_BANK0_INFO0_PAGE_CFG_3_HE_EN_3_OFFSET })
#define	FLASH_CTRL_BANK0_INFO0_PAGE_CFG_4_REG_OFFSET   0xcc
#define	FLASH_CTRL_BANK0_INFO0_PAGE_CFG_4_REG_RESVAL   0x9999999u
#define	FLASH_CTRL_BANK0_INFO0_PAGE_CFG_4_EN_4_MASK   0xfu
#define	FLASH_CTRL_BANK0_INFO0_PAGE_CFG_4_EN_4_OFFSET   0
#define	FLASH_CTRL_BANK0_INFO0_PAGE_CFG_4_EN_4_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK0_INFO0_PAGE_CFG_4_EN_4_MASK, .index = FLASH_CTRL_BANK0_INFO0_PAGE_CFG_4_EN_4_OFFSET })
#define	FLASH_CTRL_BANK0_INFO0_PAGE_CFG_4_RD_EN_4_MASK   0xfu
#define	FLASH_CTRL_BANK0_INFO0_PAGE_CFG_4_RD_EN_4_OFFSET   4
#define	FLASH_CTRL_BANK0_INFO0_PAGE_CFG_4_RD_EN_4_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK0_INFO0_PAGE_CFG_4_RD_EN_4_MASK, .index = FLASH_CTRL_BANK0_INFO0_PAGE_CFG_4_RD_EN_4_OFFSET })
#define	FLASH_CTRL_BANK0_INFO0_PAGE_CFG_4_PROG_EN_4_MASK   0xfu
#define	FLASH_CTRL_BANK0_INFO0_PAGE_CFG_4_PROG_EN_4_OFFSET   8
#define	FLASH_CTRL_BANK0_INFO0_PAGE_CFG_4_PROG_EN_4_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK0_INFO0_PAGE_CFG_4_PROG_EN_4_MASK, .index = FLASH_CTRL_BANK0_INFO0_PAGE_CFG_4_PROG_EN_4_OFFSET })
#define	FLASH_CTRL_BANK0_INFO0_PAGE_CFG_4_ERASE_EN_4_MASK   0xfu
#define	FLASH_CTRL_BANK0_INFO0_PAGE_CFG_4_ERASE_EN_4_OFFSET   12
#define	FLASH_CTRL_BANK0_INFO0_PAGE_CFG_4_ERASE_EN_4_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK0_INFO0_PAGE_CFG_4_ERASE_EN_4_MASK, .index = FLASH_CTRL_BANK0_INFO0_PAGE_CFG_4_ERASE_EN_4_OFFSET })
#define	FLASH_CTRL_BANK0_INFO0_PAGE_CFG_4_SCRAMBLE_EN_4_MASK   0xfu
#define	FLASH_CTRL_BANK0_INFO0_PAGE_CFG_4_SCRAMBLE_EN_4_OFFSET   16
#define	FLASH_CTRL_BANK0_INFO0_PAGE_CFG_4_SCRAMBLE_EN_4_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK0_INFO0_PAGE_CFG_4_SCRAMBLE_EN_4_MASK, .index = FLASH_CTRL_BANK0_INFO0_PAGE_CFG_4_SCRAMBLE_EN_4_OFFSET })
#define	FLASH_CTRL_BANK0_INFO0_PAGE_CFG_4_ECC_EN_4_MASK   0xfu
#define	FLASH_CTRL_BANK0_INFO0_PAGE_CFG_4_ECC_EN_4_OFFSET   20
#define	FLASH_CTRL_BANK0_INFO0_PAGE_CFG_4_ECC_EN_4_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK0_INFO0_PAGE_CFG_4_ECC_EN_4_MASK, .index = FLASH_CTRL_BANK0_INFO0_PAGE_CFG_4_ECC_EN_4_OFFSET })
#define	FLASH_CTRL_BANK0_INFO0_PAGE_CFG_4_HE_EN_4_MASK   0xfu
#define	FLASH_CTRL_BANK0_INFO0_PAGE_CFG_4_HE_EN_4_OFFSET   24
#define	FLASH_CTRL_BANK0_INFO0_PAGE_CFG_4_HE_EN_4_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK0_INFO0_PAGE_CFG_4_HE_EN_4_MASK, .index = FLASH_CTRL_BANK0_INFO0_PAGE_CFG_4_HE_EN_4_OFFSET })
#define	FLASH_CTRL_BANK0_INFO0_PAGE_CFG_5_REG_OFFSET   0xd0
#define	FLASH_CTRL_BANK0_INFO0_PAGE_CFG_5_REG_RESVAL   0x9999999u
#define	FLASH_CTRL_BANK0_INFO0_PAGE_CFG_5_EN_5_MASK   0xfu
#define	FLASH_CTRL_BANK0_INFO0_PAGE_CFG_5_EN_5_OFFSET   0
#define	FLASH_CTRL_BANK0_INFO0_PAGE_CFG_5_EN_5_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK0_INFO0_PAGE_CFG_5_EN_5_MASK, .index = FLASH_CTRL_BANK0_INFO0_PAGE_CFG_5_EN_5_OFFSET })
#define	FLASH_CTRL_BANK0_INFO0_PAGE_CFG_5_RD_EN_5_MASK   0xfu
#define	FLASH_CTRL_BANK0_INFO0_PAGE_CFG_5_RD_EN_5_OFFSET   4
#define	FLASH_CTRL_BANK0_INFO0_PAGE_CFG_5_RD_EN_5_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK0_INFO0_PAGE_CFG_5_RD_EN_5_MASK, .index = FLASH_CTRL_BANK0_INFO0_PAGE_CFG_5_RD_EN_5_OFFSET })
#define	FLASH_CTRL_BANK0_INFO0_PAGE_CFG_5_PROG_EN_5_MASK   0xfu
#define	FLASH_CTRL_BANK0_INFO0_PAGE_CFG_5_PROG_EN_5_OFFSET   8
#define	FLASH_CTRL_BANK0_INFO0_PAGE_CFG_5_PROG_EN_5_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK0_INFO0_PAGE_CFG_5_PROG_EN_5_MASK, .index = FLASH_CTRL_BANK0_INFO0_PAGE_CFG_5_PROG_EN_5_OFFSET })
#define	FLASH_CTRL_BANK0_INFO0_PAGE_CFG_5_ERASE_EN_5_MASK   0xfu
#define	FLASH_CTRL_BANK0_INFO0_PAGE_CFG_5_ERASE_EN_5_OFFSET   12
#define	FLASH_CTRL_BANK0_INFO0_PAGE_CFG_5_ERASE_EN_5_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK0_INFO0_PAGE_CFG_5_ERASE_EN_5_MASK, .index = FLASH_CTRL_BANK0_INFO0_PAGE_CFG_5_ERASE_EN_5_OFFSET })
#define	FLASH_CTRL_BANK0_INFO0_PAGE_CFG_5_SCRAMBLE_EN_5_MASK   0xfu
#define	FLASH_CTRL_BANK0_INFO0_PAGE_CFG_5_SCRAMBLE_EN_5_OFFSET   16
#define	FLASH_CTRL_BANK0_INFO0_PAGE_CFG_5_SCRAMBLE_EN_5_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK0_INFO0_PAGE_CFG_5_SCRAMBLE_EN_5_MASK, .index = FLASH_CTRL_BANK0_INFO0_PAGE_CFG_5_SCRAMBLE_EN_5_OFFSET })
#define	FLASH_CTRL_BANK0_INFO0_PAGE_CFG_5_ECC_EN_5_MASK   0xfu
#define	FLASH_CTRL_BANK0_INFO0_PAGE_CFG_5_ECC_EN_5_OFFSET   20
#define	FLASH_CTRL_BANK0_INFO0_PAGE_CFG_5_ECC_EN_5_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK0_INFO0_PAGE_CFG_5_ECC_EN_5_MASK, .index = FLASH_CTRL_BANK0_INFO0_PAGE_CFG_5_ECC_EN_5_OFFSET })
#define	FLASH_CTRL_BANK0_INFO0_PAGE_CFG_5_HE_EN_5_MASK   0xfu
#define	FLASH_CTRL_BANK0_INFO0_PAGE_CFG_5_HE_EN_5_OFFSET   24
#define	FLASH_CTRL_BANK0_INFO0_PAGE_CFG_5_HE_EN_5_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK0_INFO0_PAGE_CFG_5_HE_EN_5_MASK, .index = FLASH_CTRL_BANK0_INFO0_PAGE_CFG_5_HE_EN_5_OFFSET })
#define	FLASH_CTRL_BANK0_INFO0_PAGE_CFG_6_REG_OFFSET   0xd4
#define	FLASH_CTRL_BANK0_INFO0_PAGE_CFG_6_REG_RESVAL   0x9999999u
#define	FLASH_CTRL_BANK0_INFO0_PAGE_CFG_6_EN_6_MASK   0xfu
#define	FLASH_CTRL_BANK0_INFO0_PAGE_CFG_6_EN_6_OFFSET   0
#define	FLASH_CTRL_BANK0_INFO0_PAGE_CFG_6_EN_6_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK0_INFO0_PAGE_CFG_6_EN_6_MASK, .index = FLASH_CTRL_BANK0_INFO0_PAGE_CFG_6_EN_6_OFFSET })
#define	FLASH_CTRL_BANK0_INFO0_PAGE_CFG_6_RD_EN_6_MASK   0xfu
#define	FLASH_CTRL_BANK0_INFO0_PAGE_CFG_6_RD_EN_6_OFFSET   4
#define	FLASH_CTRL_BANK0_INFO0_PAGE_CFG_6_RD_EN_6_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK0_INFO0_PAGE_CFG_6_RD_EN_6_MASK, .index = FLASH_CTRL_BANK0_INFO0_PAGE_CFG_6_RD_EN_6_OFFSET })
#define	FLASH_CTRL_BANK0_INFO0_PAGE_CFG_6_PROG_EN_6_MASK   0xfu
#define	FLASH_CTRL_BANK0_INFO0_PAGE_CFG_6_PROG_EN_6_OFFSET   8
#define	FLASH_CTRL_BANK0_INFO0_PAGE_CFG_6_PROG_EN_6_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK0_INFO0_PAGE_CFG_6_PROG_EN_6_MASK, .index = FLASH_CTRL_BANK0_INFO0_PAGE_CFG_6_PROG_EN_6_OFFSET })
#define	FLASH_CTRL_BANK0_INFO0_PAGE_CFG_6_ERASE_EN_6_MASK   0xfu
#define	FLASH_CTRL_BANK0_INFO0_PAGE_CFG_6_ERASE_EN_6_OFFSET   12
#define	FLASH_CTRL_BANK0_INFO0_PAGE_CFG_6_ERASE_EN_6_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK0_INFO0_PAGE_CFG_6_ERASE_EN_6_MASK, .index = FLASH_CTRL_BANK0_INFO0_PAGE_CFG_6_ERASE_EN_6_OFFSET })
#define	FLASH_CTRL_BANK0_INFO0_PAGE_CFG_6_SCRAMBLE_EN_6_MASK   0xfu
#define	FLASH_CTRL_BANK0_INFO0_PAGE_CFG_6_SCRAMBLE_EN_6_OFFSET   16
#define	FLASH_CTRL_BANK0_INFO0_PAGE_CFG_6_SCRAMBLE_EN_6_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK0_INFO0_PAGE_CFG_6_SCRAMBLE_EN_6_MASK, .index = FLASH_CTRL_BANK0_INFO0_PAGE_CFG_6_SCRAMBLE_EN_6_OFFSET })
#define	FLASH_CTRL_BANK0_INFO0_PAGE_CFG_6_ECC_EN_6_MASK   0xfu
#define	FLASH_CTRL_BANK0_INFO0_PAGE_CFG_6_ECC_EN_6_OFFSET   20
#define	FLASH_CTRL_BANK0_INFO0_PAGE_CFG_6_ECC_EN_6_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK0_INFO0_PAGE_CFG_6_ECC_EN_6_MASK, .index = FLASH_CTRL_BANK0_INFO0_PAGE_CFG_6_ECC_EN_6_OFFSET })
#define	FLASH_CTRL_BANK0_INFO0_PAGE_CFG_6_HE_EN_6_MASK   0xfu
#define	FLASH_CTRL_BANK0_INFO0_PAGE_CFG_6_HE_EN_6_OFFSET   24
#define	FLASH_CTRL_BANK0_INFO0_PAGE_CFG_6_HE_EN_6_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK0_INFO0_PAGE_CFG_6_HE_EN_6_MASK, .index = FLASH_CTRL_BANK0_INFO0_PAGE_CFG_6_HE_EN_6_OFFSET })
#define	FLASH_CTRL_BANK0_INFO0_PAGE_CFG_7_REG_OFFSET   0xd8
#define	FLASH_CTRL_BANK0_INFO0_PAGE_CFG_7_REG_RESVAL   0x9999999u
#define	FLASH_CTRL_BANK0_INFO0_PAGE_CFG_7_EN_7_MASK   0xfu
#define	FLASH_CTRL_BANK0_INFO0_PAGE_CFG_7_EN_7_OFFSET   0
#define	FLASH_CTRL_BANK0_INFO0_PAGE_CFG_7_EN_7_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK0_INFO0_PAGE_CFG_7_EN_7_MASK, .index = FLASH_CTRL_BANK0_INFO0_PAGE_CFG_7_EN_7_OFFSET })
#define	FLASH_CTRL_BANK0_INFO0_PAGE_CFG_7_RD_EN_7_MASK   0xfu
#define	FLASH_CTRL_BANK0_INFO0_PAGE_CFG_7_RD_EN_7_OFFSET   4
#define	FLASH_CTRL_BANK0_INFO0_PAGE_CFG_7_RD_EN_7_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK0_INFO0_PAGE_CFG_7_RD_EN_7_MASK, .index = FLASH_CTRL_BANK0_INFO0_PAGE_CFG_7_RD_EN_7_OFFSET })
#define	FLASH_CTRL_BANK0_INFO0_PAGE_CFG_7_PROG_EN_7_MASK   0xfu
#define	FLASH_CTRL_BANK0_INFO0_PAGE_CFG_7_PROG_EN_7_OFFSET   8
#define	FLASH_CTRL_BANK0_INFO0_PAGE_CFG_7_PROG_EN_7_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK0_INFO0_PAGE_CFG_7_PROG_EN_7_MASK, .index = FLASH_CTRL_BANK0_INFO0_PAGE_CFG_7_PROG_EN_7_OFFSET })
#define	FLASH_CTRL_BANK0_INFO0_PAGE_CFG_7_ERASE_EN_7_MASK   0xfu
#define	FLASH_CTRL_BANK0_INFO0_PAGE_CFG_7_ERASE_EN_7_OFFSET   12
#define	FLASH_CTRL_BANK0_INFO0_PAGE_CFG_7_ERASE_EN_7_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK0_INFO0_PAGE_CFG_7_ERASE_EN_7_MASK, .index = FLASH_CTRL_BANK0_INFO0_PAGE_CFG_7_ERASE_EN_7_OFFSET })
#define	FLASH_CTRL_BANK0_INFO0_PAGE_CFG_7_SCRAMBLE_EN_7_MASK   0xfu
#define	FLASH_CTRL_BANK0_INFO0_PAGE_CFG_7_SCRAMBLE_EN_7_OFFSET   16
#define	FLASH_CTRL_BANK0_INFO0_PAGE_CFG_7_SCRAMBLE_EN_7_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK0_INFO0_PAGE_CFG_7_SCRAMBLE_EN_7_MASK, .index = FLASH_CTRL_BANK0_INFO0_PAGE_CFG_7_SCRAMBLE_EN_7_OFFSET })
#define	FLASH_CTRL_BANK0_INFO0_PAGE_CFG_7_ECC_EN_7_MASK   0xfu
#define	FLASH_CTRL_BANK0_INFO0_PAGE_CFG_7_ECC_EN_7_OFFSET   20
#define	FLASH_CTRL_BANK0_INFO0_PAGE_CFG_7_ECC_EN_7_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK0_INFO0_PAGE_CFG_7_ECC_EN_7_MASK, .index = FLASH_CTRL_BANK0_INFO0_PAGE_CFG_7_ECC_EN_7_OFFSET })
#define	FLASH_CTRL_BANK0_INFO0_PAGE_CFG_7_HE_EN_7_MASK   0xfu
#define	FLASH_CTRL_BANK0_INFO0_PAGE_CFG_7_HE_EN_7_OFFSET   24
#define	FLASH_CTRL_BANK0_INFO0_PAGE_CFG_7_HE_EN_7_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK0_INFO0_PAGE_CFG_7_HE_EN_7_MASK, .index = FLASH_CTRL_BANK0_INFO0_PAGE_CFG_7_HE_EN_7_OFFSET })
#define	FLASH_CTRL_BANK0_INFO0_PAGE_CFG_8_REG_OFFSET   0xdc
#define	FLASH_CTRL_BANK0_INFO0_PAGE_CFG_8_REG_RESVAL   0x9999999u
#define	FLASH_CTRL_BANK0_INFO0_PAGE_CFG_8_EN_8_MASK   0xfu
#define	FLASH_CTRL_BANK0_INFO0_PAGE_CFG_8_EN_8_OFFSET   0
#define	FLASH_CTRL_BANK0_INFO0_PAGE_CFG_8_EN_8_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK0_INFO0_PAGE_CFG_8_EN_8_MASK, .index = FLASH_CTRL_BANK0_INFO0_PAGE_CFG_8_EN_8_OFFSET })
#define	FLASH_CTRL_BANK0_INFO0_PAGE_CFG_8_RD_EN_8_MASK   0xfu
#define	FLASH_CTRL_BANK0_INFO0_PAGE_CFG_8_RD_EN_8_OFFSET   4
#define	FLASH_CTRL_BANK0_INFO0_PAGE_CFG_8_RD_EN_8_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK0_INFO0_PAGE_CFG_8_RD_EN_8_MASK, .index = FLASH_CTRL_BANK0_INFO0_PAGE_CFG_8_RD_EN_8_OFFSET })
#define	FLASH_CTRL_BANK0_INFO0_PAGE_CFG_8_PROG_EN_8_MASK   0xfu
#define	FLASH_CTRL_BANK0_INFO0_PAGE_CFG_8_PROG_EN_8_OFFSET   8
#define	FLASH_CTRL_BANK0_INFO0_PAGE_CFG_8_PROG_EN_8_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK0_INFO0_PAGE_CFG_8_PROG_EN_8_MASK, .index = FLASH_CTRL_BANK0_INFO0_PAGE_CFG_8_PROG_EN_8_OFFSET })
#define	FLASH_CTRL_BANK0_INFO0_PAGE_CFG_8_ERASE_EN_8_MASK   0xfu
#define	FLASH_CTRL_BANK0_INFO0_PAGE_CFG_8_ERASE_EN_8_OFFSET   12
#define	FLASH_CTRL_BANK0_INFO0_PAGE_CFG_8_ERASE_EN_8_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK0_INFO0_PAGE_CFG_8_ERASE_EN_8_MASK, .index = FLASH_CTRL_BANK0_INFO0_PAGE_CFG_8_ERASE_EN_8_OFFSET })
#define	FLASH_CTRL_BANK0_INFO0_PAGE_CFG_8_SCRAMBLE_EN_8_MASK   0xfu
#define	FLASH_CTRL_BANK0_INFO0_PAGE_CFG_8_SCRAMBLE_EN_8_OFFSET   16
#define	FLASH_CTRL_BANK0_INFO0_PAGE_CFG_8_SCRAMBLE_EN_8_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK0_INFO0_PAGE_CFG_8_SCRAMBLE_EN_8_MASK, .index = FLASH_CTRL_BANK0_INFO0_PAGE_CFG_8_SCRAMBLE_EN_8_OFFSET })
#define	FLASH_CTRL_BANK0_INFO0_PAGE_CFG_8_ECC_EN_8_MASK   0xfu
#define	FLASH_CTRL_BANK0_INFO0_PAGE_CFG_8_ECC_EN_8_OFFSET   20
#define	FLASH_CTRL_BANK0_INFO0_PAGE_CFG_8_ECC_EN_8_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK0_INFO0_PAGE_CFG_8_ECC_EN_8_MASK, .index = FLASH_CTRL_BANK0_INFO0_PAGE_CFG_8_ECC_EN_8_OFFSET })
#define	FLASH_CTRL_BANK0_INFO0_PAGE_CFG_8_HE_EN_8_MASK   0xfu
#define	FLASH_CTRL_BANK0_INFO0_PAGE_CFG_8_HE_EN_8_OFFSET   24
#define	FLASH_CTRL_BANK0_INFO0_PAGE_CFG_8_HE_EN_8_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK0_INFO0_PAGE_CFG_8_HE_EN_8_MASK, .index = FLASH_CTRL_BANK0_INFO0_PAGE_CFG_8_HE_EN_8_OFFSET })
#define	FLASH_CTRL_BANK0_INFO0_PAGE_CFG_9_REG_OFFSET   0xe0
#define	FLASH_CTRL_BANK0_INFO0_PAGE_CFG_9_REG_RESVAL   0x9999999u
#define	FLASH_CTRL_BANK0_INFO0_PAGE_CFG_9_EN_9_MASK   0xfu
#define	FLASH_CTRL_BANK0_INFO0_PAGE_CFG_9_EN_9_OFFSET   0
#define	FLASH_CTRL_BANK0_INFO0_PAGE_CFG_9_EN_9_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK0_INFO0_PAGE_CFG_9_EN_9_MASK, .index = FLASH_CTRL_BANK0_INFO0_PAGE_CFG_9_EN_9_OFFSET })
#define	FLASH_CTRL_BANK0_INFO0_PAGE_CFG_9_RD_EN_9_MASK   0xfu
#define	FLASH_CTRL_BANK0_INFO0_PAGE_CFG_9_RD_EN_9_OFFSET   4
#define	FLASH_CTRL_BANK0_INFO0_PAGE_CFG_9_RD_EN_9_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK0_INFO0_PAGE_CFG_9_RD_EN_9_MASK, .index = FLASH_CTRL_BANK0_INFO0_PAGE_CFG_9_RD_EN_9_OFFSET })
#define	FLASH_CTRL_BANK0_INFO0_PAGE_CFG_9_PROG_EN_9_MASK   0xfu
#define	FLASH_CTRL_BANK0_INFO0_PAGE_CFG_9_PROG_EN_9_OFFSET   8
#define	FLASH_CTRL_BANK0_INFO0_PAGE_CFG_9_PROG_EN_9_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK0_INFO0_PAGE_CFG_9_PROG_EN_9_MASK, .index = FLASH_CTRL_BANK0_INFO0_PAGE_CFG_9_PROG_EN_9_OFFSET })
#define	FLASH_CTRL_BANK0_INFO0_PAGE_CFG_9_ERASE_EN_9_MASK   0xfu
#define	FLASH_CTRL_BANK0_INFO0_PAGE_CFG_9_ERASE_EN_9_OFFSET   12
#define	FLASH_CTRL_BANK0_INFO0_PAGE_CFG_9_ERASE_EN_9_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK0_INFO0_PAGE_CFG_9_ERASE_EN_9_MASK, .index = FLASH_CTRL_BANK0_INFO0_PAGE_CFG_9_ERASE_EN_9_OFFSET })
#define	FLASH_CTRL_BANK0_INFO0_PAGE_CFG_9_SCRAMBLE_EN_9_MASK   0xfu
#define	FLASH_CTRL_BANK0_INFO0_PAGE_CFG_9_SCRAMBLE_EN_9_OFFSET   16
#define	FLASH_CTRL_BANK0_INFO0_PAGE_CFG_9_SCRAMBLE_EN_9_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK0_INFO0_PAGE_CFG_9_SCRAMBLE_EN_9_MASK, .index = FLASH_CTRL_BANK0_INFO0_PAGE_CFG_9_SCRAMBLE_EN_9_OFFSET })
#define	FLASH_CTRL_BANK0_INFO0_PAGE_CFG_9_ECC_EN_9_MASK   0xfu
#define	FLASH_CTRL_BANK0_INFO0_PAGE_CFG_9_ECC_EN_9_OFFSET   20
#define	FLASH_CTRL_BANK0_INFO0_PAGE_CFG_9_ECC_EN_9_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK0_INFO0_PAGE_CFG_9_ECC_EN_9_MASK, .index = FLASH_CTRL_BANK0_INFO0_PAGE_CFG_9_ECC_EN_9_OFFSET })
#define	FLASH_CTRL_BANK0_INFO0_PAGE_CFG_9_HE_EN_9_MASK   0xfu
#define	FLASH_CTRL_BANK0_INFO0_PAGE_CFG_9_HE_EN_9_OFFSET   24
#define	FLASH_CTRL_BANK0_INFO0_PAGE_CFG_9_HE_EN_9_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK0_INFO0_PAGE_CFG_9_HE_EN_9_MASK, .index = FLASH_CTRL_BANK0_INFO0_PAGE_CFG_9_HE_EN_9_OFFSET })
#define	FLASH_CTRL_BANK0_INFO1_REGWEN_REGION_FIELD_WIDTH   1
#define	FLASH_CTRL_BANK0_INFO1_REGWEN_MULTIREG_COUNT   1
#define	FLASH_CTRL_BANK0_INFO1_REGWEN_REG_OFFSET   0xe4
#define	FLASH_CTRL_BANK0_INFO1_REGWEN_REG_RESVAL   0x1u
#define	FLASH_CTRL_BANK0_INFO1_REGWEN_REGION_0_BIT   0
#define	FLASH_CTRL_BANK0_INFO1_REGWEN_REGION_0_VALUE_PAGE_LOCKED   0x0
#define	FLASH_CTRL_BANK0_INFO1_REGWEN_REGION_0_VALUE_PAGE_ENABLED   0x1
#define	FLASH_CTRL_BANK0_INFO1_PAGE_CFG_EN_FIELD_WIDTH   4
#define	FLASH_CTRL_BANK0_INFO1_PAGE_CFG_RD_EN_FIELD_WIDTH   4
#define	FLASH_CTRL_BANK0_INFO1_PAGE_CFG_PROG_EN_FIELD_WIDTH   4
#define	FLASH_CTRL_BANK0_INFO1_PAGE_CFG_ERASE_EN_FIELD_WIDTH   4
#define	FLASH_CTRL_BANK0_INFO1_PAGE_CFG_SCRAMBLE_EN_FIELD_WIDTH   4
#define	FLASH_CTRL_BANK0_INFO1_PAGE_CFG_ECC_EN_FIELD_WIDTH   4
#define	FLASH_CTRL_BANK0_INFO1_PAGE_CFG_HE_EN_FIELD_WIDTH   4
#define	FLASH_CTRL_BANK0_INFO1_PAGE_CFG_MULTIREG_COUNT   1
#define	FLASH_CTRL_BANK0_INFO1_PAGE_CFG_REG_OFFSET   0xe8
#define	FLASH_CTRL_BANK0_INFO1_PAGE_CFG_REG_RESVAL   0x9999999u
#define	FLASH_CTRL_BANK0_INFO1_PAGE_CFG_EN_0_MASK   0xfu
#define	FLASH_CTRL_BANK0_INFO1_PAGE_CFG_EN_0_OFFSET   0
#define	FLASH_CTRL_BANK0_INFO1_PAGE_CFG_EN_0_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK0_INFO1_PAGE_CFG_EN_0_MASK, .index = FLASH_CTRL_BANK0_INFO1_PAGE_CFG_EN_0_OFFSET })
#define	FLASH_CTRL_BANK0_INFO1_PAGE_CFG_RD_EN_0_MASK   0xfu
#define	FLASH_CTRL_BANK0_INFO1_PAGE_CFG_RD_EN_0_OFFSET   4
#define	FLASH_CTRL_BANK0_INFO1_PAGE_CFG_RD_EN_0_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK0_INFO1_PAGE_CFG_RD_EN_0_MASK, .index = FLASH_CTRL_BANK0_INFO1_PAGE_CFG_RD_EN_0_OFFSET })
#define	FLASH_CTRL_BANK0_INFO1_PAGE_CFG_PROG_EN_0_MASK   0xfu
#define	FLASH_CTRL_BANK0_INFO1_PAGE_CFG_PROG_EN_0_OFFSET   8
#define	FLASH_CTRL_BANK0_INFO1_PAGE_CFG_PROG_EN_0_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK0_INFO1_PAGE_CFG_PROG_EN_0_MASK, .index = FLASH_CTRL_BANK0_INFO1_PAGE_CFG_PROG_EN_0_OFFSET })
#define	FLASH_CTRL_BANK0_INFO1_PAGE_CFG_ERASE_EN_0_MASK   0xfu
#define	FLASH_CTRL_BANK0_INFO1_PAGE_CFG_ERASE_EN_0_OFFSET   12
#define	FLASH_CTRL_BANK0_INFO1_PAGE_CFG_ERASE_EN_0_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK0_INFO1_PAGE_CFG_ERASE_EN_0_MASK, .index = FLASH_CTRL_BANK0_INFO1_PAGE_CFG_ERASE_EN_0_OFFSET })
#define	FLASH_CTRL_BANK0_INFO1_PAGE_CFG_SCRAMBLE_EN_0_MASK   0xfu
#define	FLASH_CTRL_BANK0_INFO1_PAGE_CFG_SCRAMBLE_EN_0_OFFSET   16
#define	FLASH_CTRL_BANK0_INFO1_PAGE_CFG_SCRAMBLE_EN_0_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK0_INFO1_PAGE_CFG_SCRAMBLE_EN_0_MASK, .index = FLASH_CTRL_BANK0_INFO1_PAGE_CFG_SCRAMBLE_EN_0_OFFSET })
#define	FLASH_CTRL_BANK0_INFO1_PAGE_CFG_ECC_EN_0_MASK   0xfu
#define	FLASH_CTRL_BANK0_INFO1_PAGE_CFG_ECC_EN_0_OFFSET   20
#define	FLASH_CTRL_BANK0_INFO1_PAGE_CFG_ECC_EN_0_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK0_INFO1_PAGE_CFG_ECC_EN_0_MASK, .index = FLASH_CTRL_BANK0_INFO1_PAGE_CFG_ECC_EN_0_OFFSET })
#define	FLASH_CTRL_BANK0_INFO1_PAGE_CFG_HE_EN_0_MASK   0xfu
#define	FLASH_CTRL_BANK0_INFO1_PAGE_CFG_HE_EN_0_OFFSET   24
#define	FLASH_CTRL_BANK0_INFO1_PAGE_CFG_HE_EN_0_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK0_INFO1_PAGE_CFG_HE_EN_0_MASK, .index = FLASH_CTRL_BANK0_INFO1_PAGE_CFG_HE_EN_0_OFFSET })
#define	FLASH_CTRL_BANK0_INFO2_REGWEN_REGION_FIELD_WIDTH   1
#define	FLASH_CTRL_BANK0_INFO2_REGWEN_MULTIREG_COUNT   2
#define	FLASH_CTRL_BANK0_INFO2_REGWEN_0_REG_OFFSET   0xec
#define	FLASH_CTRL_BANK0_INFO2_REGWEN_0_REG_RESVAL   0x1u
#define	FLASH_CTRL_BANK0_INFO2_REGWEN_0_REGION_0_BIT   0
#define	FLASH_CTRL_BANK0_INFO2_REGWEN_0_REGION_0_VALUE_PAGE_LOCKED   0x0
#define	FLASH_CTRL_BANK0_INFO2_REGWEN_0_REGION_0_VALUE_PAGE_ENABLED   0x1
#define	FLASH_CTRL_BANK0_INFO2_REGWEN_1_REG_OFFSET   0xf0
#define	FLASH_CTRL_BANK0_INFO2_REGWEN_1_REG_RESVAL   0x1u
#define	FLASH_CTRL_BANK0_INFO2_REGWEN_1_REGION_1_BIT   0
#define	FLASH_CTRL_BANK0_INFO2_PAGE_CFG_EN_FIELD_WIDTH   4
#define	FLASH_CTRL_BANK0_INFO2_PAGE_CFG_RD_EN_FIELD_WIDTH   4
#define	FLASH_CTRL_BANK0_INFO2_PAGE_CFG_PROG_EN_FIELD_WIDTH   4
#define	FLASH_CTRL_BANK0_INFO2_PAGE_CFG_ERASE_EN_FIELD_WIDTH   4
#define	FLASH_CTRL_BANK0_INFO2_PAGE_CFG_SCRAMBLE_EN_FIELD_WIDTH   4
#define	FLASH_CTRL_BANK0_INFO2_PAGE_CFG_ECC_EN_FIELD_WIDTH   4
#define	FLASH_CTRL_BANK0_INFO2_PAGE_CFG_HE_EN_FIELD_WIDTH   4
#define	FLASH_CTRL_BANK0_INFO2_PAGE_CFG_MULTIREG_COUNT   2
#define	FLASH_CTRL_BANK0_INFO2_PAGE_CFG_0_REG_OFFSET   0xf4
#define	FLASH_CTRL_BANK0_INFO2_PAGE_CFG_0_REG_RESVAL   0x9999999u
#define	FLASH_CTRL_BANK0_INFO2_PAGE_CFG_0_EN_0_MASK   0xfu
#define	FLASH_CTRL_BANK0_INFO2_PAGE_CFG_0_EN_0_OFFSET   0
#define	FLASH_CTRL_BANK0_INFO2_PAGE_CFG_0_EN_0_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK0_INFO2_PAGE_CFG_0_EN_0_MASK, .index = FLASH_CTRL_BANK0_INFO2_PAGE_CFG_0_EN_0_OFFSET })
#define	FLASH_CTRL_BANK0_INFO2_PAGE_CFG_0_RD_EN_0_MASK   0xfu
#define	FLASH_CTRL_BANK0_INFO2_PAGE_CFG_0_RD_EN_0_OFFSET   4
#define	FLASH_CTRL_BANK0_INFO2_PAGE_CFG_0_RD_EN_0_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK0_INFO2_PAGE_CFG_0_RD_EN_0_MASK, .index = FLASH_CTRL_BANK0_INFO2_PAGE_CFG_0_RD_EN_0_OFFSET })
#define	FLASH_CTRL_BANK0_INFO2_PAGE_CFG_0_PROG_EN_0_MASK   0xfu
#define	FLASH_CTRL_BANK0_INFO2_PAGE_CFG_0_PROG_EN_0_OFFSET   8
#define	FLASH_CTRL_BANK0_INFO2_PAGE_CFG_0_PROG_EN_0_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK0_INFO2_PAGE_CFG_0_PROG_EN_0_MASK, .index = FLASH_CTRL_BANK0_INFO2_PAGE_CFG_0_PROG_EN_0_OFFSET })
#define	FLASH_CTRL_BANK0_INFO2_PAGE_CFG_0_ERASE_EN_0_MASK   0xfu
#define	FLASH_CTRL_BANK0_INFO2_PAGE_CFG_0_ERASE_EN_0_OFFSET   12
#define	FLASH_CTRL_BANK0_INFO2_PAGE_CFG_0_ERASE_EN_0_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK0_INFO2_PAGE_CFG_0_ERASE_EN_0_MASK, .index = FLASH_CTRL_BANK0_INFO2_PAGE_CFG_0_ERASE_EN_0_OFFSET })
#define	FLASH_CTRL_BANK0_INFO2_PAGE_CFG_0_SCRAMBLE_EN_0_MASK   0xfu
#define	FLASH_CTRL_BANK0_INFO2_PAGE_CFG_0_SCRAMBLE_EN_0_OFFSET   16
#define	FLASH_CTRL_BANK0_INFO2_PAGE_CFG_0_SCRAMBLE_EN_0_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK0_INFO2_PAGE_CFG_0_SCRAMBLE_EN_0_MASK, .index = FLASH_CTRL_BANK0_INFO2_PAGE_CFG_0_SCRAMBLE_EN_0_OFFSET })
#define	FLASH_CTRL_BANK0_INFO2_PAGE_CFG_0_ECC_EN_0_MASK   0xfu
#define	FLASH_CTRL_BANK0_INFO2_PAGE_CFG_0_ECC_EN_0_OFFSET   20
#define	FLASH_CTRL_BANK0_INFO2_PAGE_CFG_0_ECC_EN_0_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK0_INFO2_PAGE_CFG_0_ECC_EN_0_MASK, .index = FLASH_CTRL_BANK0_INFO2_PAGE_CFG_0_ECC_EN_0_OFFSET })
#define	FLASH_CTRL_BANK0_INFO2_PAGE_CFG_0_HE_EN_0_MASK   0xfu
#define	FLASH_CTRL_BANK0_INFO2_PAGE_CFG_0_HE_EN_0_OFFSET   24
#define	FLASH_CTRL_BANK0_INFO2_PAGE_CFG_0_HE_EN_0_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK0_INFO2_PAGE_CFG_0_HE_EN_0_MASK, .index = FLASH_CTRL_BANK0_INFO2_PAGE_CFG_0_HE_EN_0_OFFSET })
#define	FLASH_CTRL_BANK0_INFO2_PAGE_CFG_1_REG_OFFSET   0xf8
#define	FLASH_CTRL_BANK0_INFO2_PAGE_CFG_1_REG_RESVAL   0x9999999u
#define	FLASH_CTRL_BANK0_INFO2_PAGE_CFG_1_EN_1_MASK   0xfu
#define	FLASH_CTRL_BANK0_INFO2_PAGE_CFG_1_EN_1_OFFSET   0
#define	FLASH_CTRL_BANK0_INFO2_PAGE_CFG_1_EN_1_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK0_INFO2_PAGE_CFG_1_EN_1_MASK, .index = FLASH_CTRL_BANK0_INFO2_PAGE_CFG_1_EN_1_OFFSET })
#define	FLASH_CTRL_BANK0_INFO2_PAGE_CFG_1_RD_EN_1_MASK   0xfu
#define	FLASH_CTRL_BANK0_INFO2_PAGE_CFG_1_RD_EN_1_OFFSET   4
#define	FLASH_CTRL_BANK0_INFO2_PAGE_CFG_1_RD_EN_1_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK0_INFO2_PAGE_CFG_1_RD_EN_1_MASK, .index = FLASH_CTRL_BANK0_INFO2_PAGE_CFG_1_RD_EN_1_OFFSET })
#define	FLASH_CTRL_BANK0_INFO2_PAGE_CFG_1_PROG_EN_1_MASK   0xfu
#define	FLASH_CTRL_BANK0_INFO2_PAGE_CFG_1_PROG_EN_1_OFFSET   8
#define	FLASH_CTRL_BANK0_INFO2_PAGE_CFG_1_PROG_EN_1_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK0_INFO2_PAGE_CFG_1_PROG_EN_1_MASK, .index = FLASH_CTRL_BANK0_INFO2_PAGE_CFG_1_PROG_EN_1_OFFSET })
#define	FLASH_CTRL_BANK0_INFO2_PAGE_CFG_1_ERASE_EN_1_MASK   0xfu
#define	FLASH_CTRL_BANK0_INFO2_PAGE_CFG_1_ERASE_EN_1_OFFSET   12
#define	FLASH_CTRL_BANK0_INFO2_PAGE_CFG_1_ERASE_EN_1_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK0_INFO2_PAGE_CFG_1_ERASE_EN_1_MASK, .index = FLASH_CTRL_BANK0_INFO2_PAGE_CFG_1_ERASE_EN_1_OFFSET })
#define	FLASH_CTRL_BANK0_INFO2_PAGE_CFG_1_SCRAMBLE_EN_1_MASK   0xfu
#define	FLASH_CTRL_BANK0_INFO2_PAGE_CFG_1_SCRAMBLE_EN_1_OFFSET   16
#define	FLASH_CTRL_BANK0_INFO2_PAGE_CFG_1_SCRAMBLE_EN_1_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK0_INFO2_PAGE_CFG_1_SCRAMBLE_EN_1_MASK, .index = FLASH_CTRL_BANK0_INFO2_PAGE_CFG_1_SCRAMBLE_EN_1_OFFSET })
#define	FLASH_CTRL_BANK0_INFO2_PAGE_CFG_1_ECC_EN_1_MASK   0xfu
#define	FLASH_CTRL_BANK0_INFO2_PAGE_CFG_1_ECC_EN_1_OFFSET   20
#define	FLASH_CTRL_BANK0_INFO2_PAGE_CFG_1_ECC_EN_1_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK0_INFO2_PAGE_CFG_1_ECC_EN_1_MASK, .index = FLASH_CTRL_BANK0_INFO2_PAGE_CFG_1_ECC_EN_1_OFFSET })
#define	FLASH_CTRL_BANK0_INFO2_PAGE_CFG_1_HE_EN_1_MASK   0xfu
#define	FLASH_CTRL_BANK0_INFO2_PAGE_CFG_1_HE_EN_1_OFFSET   24
#define	FLASH_CTRL_BANK0_INFO2_PAGE_CFG_1_HE_EN_1_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK0_INFO2_PAGE_CFG_1_HE_EN_1_MASK, .index = FLASH_CTRL_BANK0_INFO2_PAGE_CFG_1_HE_EN_1_OFFSET })
#define	FLASH_CTRL_BANK1_INFO0_REGWEN_REGION_FIELD_WIDTH   1
#define	FLASH_CTRL_BANK1_INFO0_REGWEN_MULTIREG_COUNT   10
#define	FLASH_CTRL_BANK1_INFO0_REGWEN_0_REG_OFFSET   0xfc
#define	FLASH_CTRL_BANK1_INFO0_REGWEN_0_REG_RESVAL   0x1u
#define	FLASH_CTRL_BANK1_INFO0_REGWEN_0_REGION_0_BIT   0
#define	FLASH_CTRL_BANK1_INFO0_REGWEN_0_REGION_0_VALUE_PAGE_LOCKED   0x0
#define	FLASH_CTRL_BANK1_INFO0_REGWEN_0_REGION_0_VALUE_PAGE_ENABLED   0x1
#define	FLASH_CTRL_BANK1_INFO0_REGWEN_1_REG_OFFSET   0x100
#define	FLASH_CTRL_BANK1_INFO0_REGWEN_1_REG_RESVAL   0x1u
#define	FLASH_CTRL_BANK1_INFO0_REGWEN_1_REGION_1_BIT   0
#define	FLASH_CTRL_BANK1_INFO0_REGWEN_2_REG_OFFSET   0x104
#define	FLASH_CTRL_BANK1_INFO0_REGWEN_2_REG_RESVAL   0x1u
#define	FLASH_CTRL_BANK1_INFO0_REGWEN_2_REGION_2_BIT   0
#define	FLASH_CTRL_BANK1_INFO0_REGWEN_3_REG_OFFSET   0x108
#define	FLASH_CTRL_BANK1_INFO0_REGWEN_3_REG_RESVAL   0x1u
#define	FLASH_CTRL_BANK1_INFO0_REGWEN_3_REGION_3_BIT   0
#define	FLASH_CTRL_BANK1_INFO0_REGWEN_4_REG_OFFSET   0x10c
#define	FLASH_CTRL_BANK1_INFO0_REGWEN_4_REG_RESVAL   0x1u
#define	FLASH_CTRL_BANK1_INFO0_REGWEN_4_REGION_4_BIT   0
#define	FLASH_CTRL_BANK1_INFO0_REGWEN_5_REG_OFFSET   0x110
#define	FLASH_CTRL_BANK1_INFO0_REGWEN_5_REG_RESVAL   0x1u
#define	FLASH_CTRL_BANK1_INFO0_REGWEN_5_REGION_5_BIT   0
#define	FLASH_CTRL_BANK1_INFO0_REGWEN_6_REG_OFFSET   0x114
#define	FLASH_CTRL_BANK1_INFO0_REGWEN_6_REG_RESVAL   0x1u
#define	FLASH_CTRL_BANK1_INFO0_REGWEN_6_REGION_6_BIT   0
#define	FLASH_CTRL_BANK1_INFO0_REGWEN_7_REG_OFFSET   0x118
#define	FLASH_CTRL_BANK1_INFO0_REGWEN_7_REG_RESVAL   0x1u
#define	FLASH_CTRL_BANK1_INFO0_REGWEN_7_REGION_7_BIT   0
#define	FLASH_CTRL_BANK1_INFO0_REGWEN_8_REG_OFFSET   0x11c
#define	FLASH_CTRL_BANK1_INFO0_REGWEN_8_REG_RESVAL   0x1u
#define	FLASH_CTRL_BANK1_INFO0_REGWEN_8_REGION_8_BIT   0
#define	FLASH_CTRL_BANK1_INFO0_REGWEN_9_REG_OFFSET   0x120
#define	FLASH_CTRL_BANK1_INFO0_REGWEN_9_REG_RESVAL   0x1u
#define	FLASH_CTRL_BANK1_INFO0_REGWEN_9_REGION_9_BIT   0
#define	FLASH_CTRL_BANK1_INFO0_PAGE_CFG_EN_FIELD_WIDTH   4
#define	FLASH_CTRL_BANK1_INFO0_PAGE_CFG_RD_EN_FIELD_WIDTH   4
#define	FLASH_CTRL_BANK1_INFO0_PAGE_CFG_PROG_EN_FIELD_WIDTH   4
#define	FLASH_CTRL_BANK1_INFO0_PAGE_CFG_ERASE_EN_FIELD_WIDTH   4
#define	FLASH_CTRL_BANK1_INFO0_PAGE_CFG_SCRAMBLE_EN_FIELD_WIDTH   4
#define	FLASH_CTRL_BANK1_INFO0_PAGE_CFG_ECC_EN_FIELD_WIDTH   4
#define	FLASH_CTRL_BANK1_INFO0_PAGE_CFG_HE_EN_FIELD_WIDTH   4
#define	FLASH_CTRL_BANK1_INFO0_PAGE_CFG_MULTIREG_COUNT   10
#define	FLASH_CTRL_BANK1_INFO0_PAGE_CFG_0_REG_OFFSET   0x124
#define	FLASH_CTRL_BANK1_INFO0_PAGE_CFG_0_REG_RESVAL   0x9999999u
#define	FLASH_CTRL_BANK1_INFO0_PAGE_CFG_0_EN_0_MASK   0xfu
#define	FLASH_CTRL_BANK1_INFO0_PAGE_CFG_0_EN_0_OFFSET   0
#define	FLASH_CTRL_BANK1_INFO0_PAGE_CFG_0_EN_0_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK1_INFO0_PAGE_CFG_0_EN_0_MASK, .index = FLASH_CTRL_BANK1_INFO0_PAGE_CFG_0_EN_0_OFFSET })
#define	FLASH_CTRL_BANK1_INFO0_PAGE_CFG_0_RD_EN_0_MASK   0xfu
#define	FLASH_CTRL_BANK1_INFO0_PAGE_CFG_0_RD_EN_0_OFFSET   4
#define	FLASH_CTRL_BANK1_INFO0_PAGE_CFG_0_RD_EN_0_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK1_INFO0_PAGE_CFG_0_RD_EN_0_MASK, .index = FLASH_CTRL_BANK1_INFO0_PAGE_CFG_0_RD_EN_0_OFFSET })
#define	FLASH_CTRL_BANK1_INFO0_PAGE_CFG_0_PROG_EN_0_MASK   0xfu
#define	FLASH_CTRL_BANK1_INFO0_PAGE_CFG_0_PROG_EN_0_OFFSET   8
#define	FLASH_CTRL_BANK1_INFO0_PAGE_CFG_0_PROG_EN_0_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK1_INFO0_PAGE_CFG_0_PROG_EN_0_MASK, .index = FLASH_CTRL_BANK1_INFO0_PAGE_CFG_0_PROG_EN_0_OFFSET })
#define	FLASH_CTRL_BANK1_INFO0_PAGE_CFG_0_ERASE_EN_0_MASK   0xfu
#define	FLASH_CTRL_BANK1_INFO0_PAGE_CFG_0_ERASE_EN_0_OFFSET   12
#define	FLASH_CTRL_BANK1_INFO0_PAGE_CFG_0_ERASE_EN_0_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK1_INFO0_PAGE_CFG_0_ERASE_EN_0_MASK, .index = FLASH_CTRL_BANK1_INFO0_PAGE_CFG_0_ERASE_EN_0_OFFSET })
#define	FLASH_CTRL_BANK1_INFO0_PAGE_CFG_0_SCRAMBLE_EN_0_MASK   0xfu
#define	FLASH_CTRL_BANK1_INFO0_PAGE_CFG_0_SCRAMBLE_EN_0_OFFSET   16
#define	FLASH_CTRL_BANK1_INFO0_PAGE_CFG_0_SCRAMBLE_EN_0_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK1_INFO0_PAGE_CFG_0_SCRAMBLE_EN_0_MASK, .index = FLASH_CTRL_BANK1_INFO0_PAGE_CFG_0_SCRAMBLE_EN_0_OFFSET })
#define	FLASH_CTRL_BANK1_INFO0_PAGE_CFG_0_ECC_EN_0_MASK   0xfu
#define	FLASH_CTRL_BANK1_INFO0_PAGE_CFG_0_ECC_EN_0_OFFSET   20
#define	FLASH_CTRL_BANK1_INFO0_PAGE_CFG_0_ECC_EN_0_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK1_INFO0_PAGE_CFG_0_ECC_EN_0_MASK, .index = FLASH_CTRL_BANK1_INFO0_PAGE_CFG_0_ECC_EN_0_OFFSET })
#define	FLASH_CTRL_BANK1_INFO0_PAGE_CFG_0_HE_EN_0_MASK   0xfu
#define	FLASH_CTRL_BANK1_INFO0_PAGE_CFG_0_HE_EN_0_OFFSET   24
#define	FLASH_CTRL_BANK1_INFO0_PAGE_CFG_0_HE_EN_0_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK1_INFO0_PAGE_CFG_0_HE_EN_0_MASK, .index = FLASH_CTRL_BANK1_INFO0_PAGE_CFG_0_HE_EN_0_OFFSET })
#define	FLASH_CTRL_BANK1_INFO0_PAGE_CFG_1_REG_OFFSET   0x128
#define	FLASH_CTRL_BANK1_INFO0_PAGE_CFG_1_REG_RESVAL   0x9999999u
#define	FLASH_CTRL_BANK1_INFO0_PAGE_CFG_1_EN_1_MASK   0xfu
#define	FLASH_CTRL_BANK1_INFO0_PAGE_CFG_1_EN_1_OFFSET   0
#define	FLASH_CTRL_BANK1_INFO0_PAGE_CFG_1_EN_1_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK1_INFO0_PAGE_CFG_1_EN_1_MASK, .index = FLASH_CTRL_BANK1_INFO0_PAGE_CFG_1_EN_1_OFFSET })
#define	FLASH_CTRL_BANK1_INFO0_PAGE_CFG_1_RD_EN_1_MASK   0xfu
#define	FLASH_CTRL_BANK1_INFO0_PAGE_CFG_1_RD_EN_1_OFFSET   4
#define	FLASH_CTRL_BANK1_INFO0_PAGE_CFG_1_RD_EN_1_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK1_INFO0_PAGE_CFG_1_RD_EN_1_MASK, .index = FLASH_CTRL_BANK1_INFO0_PAGE_CFG_1_RD_EN_1_OFFSET })
#define	FLASH_CTRL_BANK1_INFO0_PAGE_CFG_1_PROG_EN_1_MASK   0xfu
#define	FLASH_CTRL_BANK1_INFO0_PAGE_CFG_1_PROG_EN_1_OFFSET   8
#define	FLASH_CTRL_BANK1_INFO0_PAGE_CFG_1_PROG_EN_1_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK1_INFO0_PAGE_CFG_1_PROG_EN_1_MASK, .index = FLASH_CTRL_BANK1_INFO0_PAGE_CFG_1_PROG_EN_1_OFFSET })
#define	FLASH_CTRL_BANK1_INFO0_PAGE_CFG_1_ERASE_EN_1_MASK   0xfu
#define	FLASH_CTRL_BANK1_INFO0_PAGE_CFG_1_ERASE_EN_1_OFFSET   12
#define	FLASH_CTRL_BANK1_INFO0_PAGE_CFG_1_ERASE_EN_1_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK1_INFO0_PAGE_CFG_1_ERASE_EN_1_MASK, .index = FLASH_CTRL_BANK1_INFO0_PAGE_CFG_1_ERASE_EN_1_OFFSET })
#define	FLASH_CTRL_BANK1_INFO0_PAGE_CFG_1_SCRAMBLE_EN_1_MASK   0xfu
#define	FLASH_CTRL_BANK1_INFO0_PAGE_CFG_1_SCRAMBLE_EN_1_OFFSET   16
#define	FLASH_CTRL_BANK1_INFO0_PAGE_CFG_1_SCRAMBLE_EN_1_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK1_INFO0_PAGE_CFG_1_SCRAMBLE_EN_1_MASK, .index = FLASH_CTRL_BANK1_INFO0_PAGE_CFG_1_SCRAMBLE_EN_1_OFFSET })
#define	FLASH_CTRL_BANK1_INFO0_PAGE_CFG_1_ECC_EN_1_MASK   0xfu
#define	FLASH_CTRL_BANK1_INFO0_PAGE_CFG_1_ECC_EN_1_OFFSET   20
#define	FLASH_CTRL_BANK1_INFO0_PAGE_CFG_1_ECC_EN_1_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK1_INFO0_PAGE_CFG_1_ECC_EN_1_MASK, .index = FLASH_CTRL_BANK1_INFO0_PAGE_CFG_1_ECC_EN_1_OFFSET })
#define	FLASH_CTRL_BANK1_INFO0_PAGE_CFG_1_HE_EN_1_MASK   0xfu
#define	FLASH_CTRL_BANK1_INFO0_PAGE_CFG_1_HE_EN_1_OFFSET   24
#define	FLASH_CTRL_BANK1_INFO0_PAGE_CFG_1_HE_EN_1_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK1_INFO0_PAGE_CFG_1_HE_EN_1_MASK, .index = FLASH_CTRL_BANK1_INFO0_PAGE_CFG_1_HE_EN_1_OFFSET })
#define	FLASH_CTRL_BANK1_INFO0_PAGE_CFG_2_REG_OFFSET   0x12c
#define	FLASH_CTRL_BANK1_INFO0_PAGE_CFG_2_REG_RESVAL   0x9999999u
#define	FLASH_CTRL_BANK1_INFO0_PAGE_CFG_2_EN_2_MASK   0xfu
#define	FLASH_CTRL_BANK1_INFO0_PAGE_CFG_2_EN_2_OFFSET   0
#define	FLASH_CTRL_BANK1_INFO0_PAGE_CFG_2_EN_2_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK1_INFO0_PAGE_CFG_2_EN_2_MASK, .index = FLASH_CTRL_BANK1_INFO0_PAGE_CFG_2_EN_2_OFFSET })
#define	FLASH_CTRL_BANK1_INFO0_PAGE_CFG_2_RD_EN_2_MASK   0xfu
#define	FLASH_CTRL_BANK1_INFO0_PAGE_CFG_2_RD_EN_2_OFFSET   4
#define	FLASH_CTRL_BANK1_INFO0_PAGE_CFG_2_RD_EN_2_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK1_INFO0_PAGE_CFG_2_RD_EN_2_MASK, .index = FLASH_CTRL_BANK1_INFO0_PAGE_CFG_2_RD_EN_2_OFFSET })
#define	FLASH_CTRL_BANK1_INFO0_PAGE_CFG_2_PROG_EN_2_MASK   0xfu
#define	FLASH_CTRL_BANK1_INFO0_PAGE_CFG_2_PROG_EN_2_OFFSET   8
#define	FLASH_CTRL_BANK1_INFO0_PAGE_CFG_2_PROG_EN_2_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK1_INFO0_PAGE_CFG_2_PROG_EN_2_MASK, .index = FLASH_CTRL_BANK1_INFO0_PAGE_CFG_2_PROG_EN_2_OFFSET })
#define	FLASH_CTRL_BANK1_INFO0_PAGE_CFG_2_ERASE_EN_2_MASK   0xfu
#define	FLASH_CTRL_BANK1_INFO0_PAGE_CFG_2_ERASE_EN_2_OFFSET   12
#define	FLASH_CTRL_BANK1_INFO0_PAGE_CFG_2_ERASE_EN_2_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK1_INFO0_PAGE_CFG_2_ERASE_EN_2_MASK, .index = FLASH_CTRL_BANK1_INFO0_PAGE_CFG_2_ERASE_EN_2_OFFSET })
#define	FLASH_CTRL_BANK1_INFO0_PAGE_CFG_2_SCRAMBLE_EN_2_MASK   0xfu
#define	FLASH_CTRL_BANK1_INFO0_PAGE_CFG_2_SCRAMBLE_EN_2_OFFSET   16
#define	FLASH_CTRL_BANK1_INFO0_PAGE_CFG_2_SCRAMBLE_EN_2_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK1_INFO0_PAGE_CFG_2_SCRAMBLE_EN_2_MASK, .index = FLASH_CTRL_BANK1_INFO0_PAGE_CFG_2_SCRAMBLE_EN_2_OFFSET })
#define	FLASH_CTRL_BANK1_INFO0_PAGE_CFG_2_ECC_EN_2_MASK   0xfu
#define	FLASH_CTRL_BANK1_INFO0_PAGE_CFG_2_ECC_EN_2_OFFSET   20
#define	FLASH_CTRL_BANK1_INFO0_PAGE_CFG_2_ECC_EN_2_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK1_INFO0_PAGE_CFG_2_ECC_EN_2_MASK, .index = FLASH_CTRL_BANK1_INFO0_PAGE_CFG_2_ECC_EN_2_OFFSET })
#define	FLASH_CTRL_BANK1_INFO0_PAGE_CFG_2_HE_EN_2_MASK   0xfu
#define	FLASH_CTRL_BANK1_INFO0_PAGE_CFG_2_HE_EN_2_OFFSET   24
#define	FLASH_CTRL_BANK1_INFO0_PAGE_CFG_2_HE_EN_2_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK1_INFO0_PAGE_CFG_2_HE_EN_2_MASK, .index = FLASH_CTRL_BANK1_INFO0_PAGE_CFG_2_HE_EN_2_OFFSET })
#define	FLASH_CTRL_BANK1_INFO0_PAGE_CFG_3_REG_OFFSET   0x130
#define	FLASH_CTRL_BANK1_INFO0_PAGE_CFG_3_REG_RESVAL   0x9999999u
#define	FLASH_CTRL_BANK1_INFO0_PAGE_CFG_3_EN_3_MASK   0xfu
#define	FLASH_CTRL_BANK1_INFO0_PAGE_CFG_3_EN_3_OFFSET   0
#define	FLASH_CTRL_BANK1_INFO0_PAGE_CFG_3_EN_3_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK1_INFO0_PAGE_CFG_3_EN_3_MASK, .index = FLASH_CTRL_BANK1_INFO0_PAGE_CFG_3_EN_3_OFFSET })
#define	FLASH_CTRL_BANK1_INFO0_PAGE_CFG_3_RD_EN_3_MASK   0xfu
#define	FLASH_CTRL_BANK1_INFO0_PAGE_CFG_3_RD_EN_3_OFFSET   4
#define	FLASH_CTRL_BANK1_INFO0_PAGE_CFG_3_RD_EN_3_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK1_INFO0_PAGE_CFG_3_RD_EN_3_MASK, .index = FLASH_CTRL_BANK1_INFO0_PAGE_CFG_3_RD_EN_3_OFFSET })
#define	FLASH_CTRL_BANK1_INFO0_PAGE_CFG_3_PROG_EN_3_MASK   0xfu
#define	FLASH_CTRL_BANK1_INFO0_PAGE_CFG_3_PROG_EN_3_OFFSET   8
#define	FLASH_CTRL_BANK1_INFO0_PAGE_CFG_3_PROG_EN_3_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK1_INFO0_PAGE_CFG_3_PROG_EN_3_MASK, .index = FLASH_CTRL_BANK1_INFO0_PAGE_CFG_3_PROG_EN_3_OFFSET })
#define	FLASH_CTRL_BANK1_INFO0_PAGE_CFG_3_ERASE_EN_3_MASK   0xfu
#define	FLASH_CTRL_BANK1_INFO0_PAGE_CFG_3_ERASE_EN_3_OFFSET   12
#define	FLASH_CTRL_BANK1_INFO0_PAGE_CFG_3_ERASE_EN_3_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK1_INFO0_PAGE_CFG_3_ERASE_EN_3_MASK, .index = FLASH_CTRL_BANK1_INFO0_PAGE_CFG_3_ERASE_EN_3_OFFSET })
#define	FLASH_CTRL_BANK1_INFO0_PAGE_CFG_3_SCRAMBLE_EN_3_MASK   0xfu
#define	FLASH_CTRL_BANK1_INFO0_PAGE_CFG_3_SCRAMBLE_EN_3_OFFSET   16
#define	FLASH_CTRL_BANK1_INFO0_PAGE_CFG_3_SCRAMBLE_EN_3_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK1_INFO0_PAGE_CFG_3_SCRAMBLE_EN_3_MASK, .index = FLASH_CTRL_BANK1_INFO0_PAGE_CFG_3_SCRAMBLE_EN_3_OFFSET })
#define	FLASH_CTRL_BANK1_INFO0_PAGE_CFG_3_ECC_EN_3_MASK   0xfu
#define	FLASH_CTRL_BANK1_INFO0_PAGE_CFG_3_ECC_EN_3_OFFSET   20
#define	FLASH_CTRL_BANK1_INFO0_PAGE_CFG_3_ECC_EN_3_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK1_INFO0_PAGE_CFG_3_ECC_EN_3_MASK, .index = FLASH_CTRL_BANK1_INFO0_PAGE_CFG_3_ECC_EN_3_OFFSET })
#define	FLASH_CTRL_BANK1_INFO0_PAGE_CFG_3_HE_EN_3_MASK   0xfu
#define	FLASH_CTRL_BANK1_INFO0_PAGE_CFG_3_HE_EN_3_OFFSET   24
#define	FLASH_CTRL_BANK1_INFO0_PAGE_CFG_3_HE_EN_3_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK1_INFO0_PAGE_CFG_3_HE_EN_3_MASK, .index = FLASH_CTRL_BANK1_INFO0_PAGE_CFG_3_HE_EN_3_OFFSET })
#define	FLASH_CTRL_BANK1_INFO0_PAGE_CFG_4_REG_OFFSET   0x134
#define	FLASH_CTRL_BANK1_INFO0_PAGE_CFG_4_REG_RESVAL   0x9999999u
#define	FLASH_CTRL_BANK1_INFO0_PAGE_CFG_4_EN_4_MASK   0xfu
#define	FLASH_CTRL_BANK1_INFO0_PAGE_CFG_4_EN_4_OFFSET   0
#define	FLASH_CTRL_BANK1_INFO0_PAGE_CFG_4_EN_4_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK1_INFO0_PAGE_CFG_4_EN_4_MASK, .index = FLASH_CTRL_BANK1_INFO0_PAGE_CFG_4_EN_4_OFFSET })
#define	FLASH_CTRL_BANK1_INFO0_PAGE_CFG_4_RD_EN_4_MASK   0xfu
#define	FLASH_CTRL_BANK1_INFO0_PAGE_CFG_4_RD_EN_4_OFFSET   4
#define	FLASH_CTRL_BANK1_INFO0_PAGE_CFG_4_RD_EN_4_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK1_INFO0_PAGE_CFG_4_RD_EN_4_MASK, .index = FLASH_CTRL_BANK1_INFO0_PAGE_CFG_4_RD_EN_4_OFFSET })
#define	FLASH_CTRL_BANK1_INFO0_PAGE_CFG_4_PROG_EN_4_MASK   0xfu
#define	FLASH_CTRL_BANK1_INFO0_PAGE_CFG_4_PROG_EN_4_OFFSET   8
#define	FLASH_CTRL_BANK1_INFO0_PAGE_CFG_4_PROG_EN_4_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK1_INFO0_PAGE_CFG_4_PROG_EN_4_MASK, .index = FLASH_CTRL_BANK1_INFO0_PAGE_CFG_4_PROG_EN_4_OFFSET })
#define	FLASH_CTRL_BANK1_INFO0_PAGE_CFG_4_ERASE_EN_4_MASK   0xfu
#define	FLASH_CTRL_BANK1_INFO0_PAGE_CFG_4_ERASE_EN_4_OFFSET   12
#define	FLASH_CTRL_BANK1_INFO0_PAGE_CFG_4_ERASE_EN_4_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK1_INFO0_PAGE_CFG_4_ERASE_EN_4_MASK, .index = FLASH_CTRL_BANK1_INFO0_PAGE_CFG_4_ERASE_EN_4_OFFSET })
#define	FLASH_CTRL_BANK1_INFO0_PAGE_CFG_4_SCRAMBLE_EN_4_MASK   0xfu
#define	FLASH_CTRL_BANK1_INFO0_PAGE_CFG_4_SCRAMBLE_EN_4_OFFSET   16
#define	FLASH_CTRL_BANK1_INFO0_PAGE_CFG_4_SCRAMBLE_EN_4_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK1_INFO0_PAGE_CFG_4_SCRAMBLE_EN_4_MASK, .index = FLASH_CTRL_BANK1_INFO0_PAGE_CFG_4_SCRAMBLE_EN_4_OFFSET })
#define	FLASH_CTRL_BANK1_INFO0_PAGE_CFG_4_ECC_EN_4_MASK   0xfu
#define	FLASH_CTRL_BANK1_INFO0_PAGE_CFG_4_ECC_EN_4_OFFSET   20
#define	FLASH_CTRL_BANK1_INFO0_PAGE_CFG_4_ECC_EN_4_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK1_INFO0_PAGE_CFG_4_ECC_EN_4_MASK, .index = FLASH_CTRL_BANK1_INFO0_PAGE_CFG_4_ECC_EN_4_OFFSET })
#define	FLASH_CTRL_BANK1_INFO0_PAGE_CFG_4_HE_EN_4_MASK   0xfu
#define	FLASH_CTRL_BANK1_INFO0_PAGE_CFG_4_HE_EN_4_OFFSET   24
#define	FLASH_CTRL_BANK1_INFO0_PAGE_CFG_4_HE_EN_4_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK1_INFO0_PAGE_CFG_4_HE_EN_4_MASK, .index = FLASH_CTRL_BANK1_INFO0_PAGE_CFG_4_HE_EN_4_OFFSET })
#define	FLASH_CTRL_BANK1_INFO0_PAGE_CFG_5_REG_OFFSET   0x138
#define	FLASH_CTRL_BANK1_INFO0_PAGE_CFG_5_REG_RESVAL   0x9999999u
#define	FLASH_CTRL_BANK1_INFO0_PAGE_CFG_5_EN_5_MASK   0xfu
#define	FLASH_CTRL_BANK1_INFO0_PAGE_CFG_5_EN_5_OFFSET   0
#define	FLASH_CTRL_BANK1_INFO0_PAGE_CFG_5_EN_5_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK1_INFO0_PAGE_CFG_5_EN_5_MASK, .index = FLASH_CTRL_BANK1_INFO0_PAGE_CFG_5_EN_5_OFFSET })
#define	FLASH_CTRL_BANK1_INFO0_PAGE_CFG_5_RD_EN_5_MASK   0xfu
#define	FLASH_CTRL_BANK1_INFO0_PAGE_CFG_5_RD_EN_5_OFFSET   4
#define	FLASH_CTRL_BANK1_INFO0_PAGE_CFG_5_RD_EN_5_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK1_INFO0_PAGE_CFG_5_RD_EN_5_MASK, .index = FLASH_CTRL_BANK1_INFO0_PAGE_CFG_5_RD_EN_5_OFFSET })
#define	FLASH_CTRL_BANK1_INFO0_PAGE_CFG_5_PROG_EN_5_MASK   0xfu
#define	FLASH_CTRL_BANK1_INFO0_PAGE_CFG_5_PROG_EN_5_OFFSET   8
#define	FLASH_CTRL_BANK1_INFO0_PAGE_CFG_5_PROG_EN_5_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK1_INFO0_PAGE_CFG_5_PROG_EN_5_MASK, .index = FLASH_CTRL_BANK1_INFO0_PAGE_CFG_5_PROG_EN_5_OFFSET })
#define	FLASH_CTRL_BANK1_INFO0_PAGE_CFG_5_ERASE_EN_5_MASK   0xfu
#define	FLASH_CTRL_BANK1_INFO0_PAGE_CFG_5_ERASE_EN_5_OFFSET   12
#define	FLASH_CTRL_BANK1_INFO0_PAGE_CFG_5_ERASE_EN_5_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK1_INFO0_PAGE_CFG_5_ERASE_EN_5_MASK, .index = FLASH_CTRL_BANK1_INFO0_PAGE_CFG_5_ERASE_EN_5_OFFSET })
#define	FLASH_CTRL_BANK1_INFO0_PAGE_CFG_5_SCRAMBLE_EN_5_MASK   0xfu
#define	FLASH_CTRL_BANK1_INFO0_PAGE_CFG_5_SCRAMBLE_EN_5_OFFSET   16
#define	FLASH_CTRL_BANK1_INFO0_PAGE_CFG_5_SCRAMBLE_EN_5_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK1_INFO0_PAGE_CFG_5_SCRAMBLE_EN_5_MASK, .index = FLASH_CTRL_BANK1_INFO0_PAGE_CFG_5_SCRAMBLE_EN_5_OFFSET })
#define	FLASH_CTRL_BANK1_INFO0_PAGE_CFG_5_ECC_EN_5_MASK   0xfu
#define	FLASH_CTRL_BANK1_INFO0_PAGE_CFG_5_ECC_EN_5_OFFSET   20
#define	FLASH_CTRL_BANK1_INFO0_PAGE_CFG_5_ECC_EN_5_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK1_INFO0_PAGE_CFG_5_ECC_EN_5_MASK, .index = FLASH_CTRL_BANK1_INFO0_PAGE_CFG_5_ECC_EN_5_OFFSET })
#define	FLASH_CTRL_BANK1_INFO0_PAGE_CFG_5_HE_EN_5_MASK   0xfu
#define	FLASH_CTRL_BANK1_INFO0_PAGE_CFG_5_HE_EN_5_OFFSET   24
#define	FLASH_CTRL_BANK1_INFO0_PAGE_CFG_5_HE_EN_5_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK1_INFO0_PAGE_CFG_5_HE_EN_5_MASK, .index = FLASH_CTRL_BANK1_INFO0_PAGE_CFG_5_HE_EN_5_OFFSET })
#define	FLASH_CTRL_BANK1_INFO0_PAGE_CFG_6_REG_OFFSET   0x13c
#define	FLASH_CTRL_BANK1_INFO0_PAGE_CFG_6_REG_RESVAL   0x9999999u
#define	FLASH_CTRL_BANK1_INFO0_PAGE_CFG_6_EN_6_MASK   0xfu
#define	FLASH_CTRL_BANK1_INFO0_PAGE_CFG_6_EN_6_OFFSET   0
#define	FLASH_CTRL_BANK1_INFO0_PAGE_CFG_6_EN_6_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK1_INFO0_PAGE_CFG_6_EN_6_MASK, .index = FLASH_CTRL_BANK1_INFO0_PAGE_CFG_6_EN_6_OFFSET })
#define	FLASH_CTRL_BANK1_INFO0_PAGE_CFG_6_RD_EN_6_MASK   0xfu
#define	FLASH_CTRL_BANK1_INFO0_PAGE_CFG_6_RD_EN_6_OFFSET   4
#define	FLASH_CTRL_BANK1_INFO0_PAGE_CFG_6_RD_EN_6_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK1_INFO0_PAGE_CFG_6_RD_EN_6_MASK, .index = FLASH_CTRL_BANK1_INFO0_PAGE_CFG_6_RD_EN_6_OFFSET })
#define	FLASH_CTRL_BANK1_INFO0_PAGE_CFG_6_PROG_EN_6_MASK   0xfu
#define	FLASH_CTRL_BANK1_INFO0_PAGE_CFG_6_PROG_EN_6_OFFSET   8
#define	FLASH_CTRL_BANK1_INFO0_PAGE_CFG_6_PROG_EN_6_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK1_INFO0_PAGE_CFG_6_PROG_EN_6_MASK, .index = FLASH_CTRL_BANK1_INFO0_PAGE_CFG_6_PROG_EN_6_OFFSET })
#define	FLASH_CTRL_BANK1_INFO0_PAGE_CFG_6_ERASE_EN_6_MASK   0xfu
#define	FLASH_CTRL_BANK1_INFO0_PAGE_CFG_6_ERASE_EN_6_OFFSET   12
#define	FLASH_CTRL_BANK1_INFO0_PAGE_CFG_6_ERASE_EN_6_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK1_INFO0_PAGE_CFG_6_ERASE_EN_6_MASK, .index = FLASH_CTRL_BANK1_INFO0_PAGE_CFG_6_ERASE_EN_6_OFFSET })
#define	FLASH_CTRL_BANK1_INFO0_PAGE_CFG_6_SCRAMBLE_EN_6_MASK   0xfu
#define	FLASH_CTRL_BANK1_INFO0_PAGE_CFG_6_SCRAMBLE_EN_6_OFFSET   16
#define	FLASH_CTRL_BANK1_INFO0_PAGE_CFG_6_SCRAMBLE_EN_6_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK1_INFO0_PAGE_CFG_6_SCRAMBLE_EN_6_MASK, .index = FLASH_CTRL_BANK1_INFO0_PAGE_CFG_6_SCRAMBLE_EN_6_OFFSET })
#define	FLASH_CTRL_BANK1_INFO0_PAGE_CFG_6_ECC_EN_6_MASK   0xfu
#define	FLASH_CTRL_BANK1_INFO0_PAGE_CFG_6_ECC_EN_6_OFFSET   20
#define	FLASH_CTRL_BANK1_INFO0_PAGE_CFG_6_ECC_EN_6_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK1_INFO0_PAGE_CFG_6_ECC_EN_6_MASK, .index = FLASH_CTRL_BANK1_INFO0_PAGE_CFG_6_ECC_EN_6_OFFSET })
#define	FLASH_CTRL_BANK1_INFO0_PAGE_CFG_6_HE_EN_6_MASK   0xfu
#define	FLASH_CTRL_BANK1_INFO0_PAGE_CFG_6_HE_EN_6_OFFSET   24
#define	FLASH_CTRL_BANK1_INFO0_PAGE_CFG_6_HE_EN_6_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK1_INFO0_PAGE_CFG_6_HE_EN_6_MASK, .index = FLASH_CTRL_BANK1_INFO0_PAGE_CFG_6_HE_EN_6_OFFSET })
#define	FLASH_CTRL_BANK1_INFO0_PAGE_CFG_7_REG_OFFSET   0x140
#define	FLASH_CTRL_BANK1_INFO0_PAGE_CFG_7_REG_RESVAL   0x9999999u
#define	FLASH_CTRL_BANK1_INFO0_PAGE_CFG_7_EN_7_MASK   0xfu
#define	FLASH_CTRL_BANK1_INFO0_PAGE_CFG_7_EN_7_OFFSET   0
#define	FLASH_CTRL_BANK1_INFO0_PAGE_CFG_7_EN_7_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK1_INFO0_PAGE_CFG_7_EN_7_MASK, .index = FLASH_CTRL_BANK1_INFO0_PAGE_CFG_7_EN_7_OFFSET })
#define	FLASH_CTRL_BANK1_INFO0_PAGE_CFG_7_RD_EN_7_MASK   0xfu
#define	FLASH_CTRL_BANK1_INFO0_PAGE_CFG_7_RD_EN_7_OFFSET   4
#define	FLASH_CTRL_BANK1_INFO0_PAGE_CFG_7_RD_EN_7_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK1_INFO0_PAGE_CFG_7_RD_EN_7_MASK, .index = FLASH_CTRL_BANK1_INFO0_PAGE_CFG_7_RD_EN_7_OFFSET })
#define	FLASH_CTRL_BANK1_INFO0_PAGE_CFG_7_PROG_EN_7_MASK   0xfu
#define	FLASH_CTRL_BANK1_INFO0_PAGE_CFG_7_PROG_EN_7_OFFSET   8
#define	FLASH_CTRL_BANK1_INFO0_PAGE_CFG_7_PROG_EN_7_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK1_INFO0_PAGE_CFG_7_PROG_EN_7_MASK, .index = FLASH_CTRL_BANK1_INFO0_PAGE_CFG_7_PROG_EN_7_OFFSET })
#define	FLASH_CTRL_BANK1_INFO0_PAGE_CFG_7_ERASE_EN_7_MASK   0xfu
#define	FLASH_CTRL_BANK1_INFO0_PAGE_CFG_7_ERASE_EN_7_OFFSET   12
#define	FLASH_CTRL_BANK1_INFO0_PAGE_CFG_7_ERASE_EN_7_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK1_INFO0_PAGE_CFG_7_ERASE_EN_7_MASK, .index = FLASH_CTRL_BANK1_INFO0_PAGE_CFG_7_ERASE_EN_7_OFFSET })
#define	FLASH_CTRL_BANK1_INFO0_PAGE_CFG_7_SCRAMBLE_EN_7_MASK   0xfu
#define	FLASH_CTRL_BANK1_INFO0_PAGE_CFG_7_SCRAMBLE_EN_7_OFFSET   16
#define	FLASH_CTRL_BANK1_INFO0_PAGE_CFG_7_SCRAMBLE_EN_7_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK1_INFO0_PAGE_CFG_7_SCRAMBLE_EN_7_MASK, .index = FLASH_CTRL_BANK1_INFO0_PAGE_CFG_7_SCRAMBLE_EN_7_OFFSET })
#define	FLASH_CTRL_BANK1_INFO0_PAGE_CFG_7_ECC_EN_7_MASK   0xfu
#define	FLASH_CTRL_BANK1_INFO0_PAGE_CFG_7_ECC_EN_7_OFFSET   20
#define	FLASH_CTRL_BANK1_INFO0_PAGE_CFG_7_ECC_EN_7_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK1_INFO0_PAGE_CFG_7_ECC_EN_7_MASK, .index = FLASH_CTRL_BANK1_INFO0_PAGE_CFG_7_ECC_EN_7_OFFSET })
#define	FLASH_CTRL_BANK1_INFO0_PAGE_CFG_7_HE_EN_7_MASK   0xfu
#define	FLASH_CTRL_BANK1_INFO0_PAGE_CFG_7_HE_EN_7_OFFSET   24
#define	FLASH_CTRL_BANK1_INFO0_PAGE_CFG_7_HE_EN_7_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK1_INFO0_PAGE_CFG_7_HE_EN_7_MASK, .index = FLASH_CTRL_BANK1_INFO0_PAGE_CFG_7_HE_EN_7_OFFSET })
#define	FLASH_CTRL_BANK1_INFO0_PAGE_CFG_8_REG_OFFSET   0x144
#define	FLASH_CTRL_BANK1_INFO0_PAGE_CFG_8_REG_RESVAL   0x9999999u
#define	FLASH_CTRL_BANK1_INFO0_PAGE_CFG_8_EN_8_MASK   0xfu
#define	FLASH_CTRL_BANK1_INFO0_PAGE_CFG_8_EN_8_OFFSET   0
#define	FLASH_CTRL_BANK1_INFO0_PAGE_CFG_8_EN_8_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK1_INFO0_PAGE_CFG_8_EN_8_MASK, .index = FLASH_CTRL_BANK1_INFO0_PAGE_CFG_8_EN_8_OFFSET })
#define	FLASH_CTRL_BANK1_INFO0_PAGE_CFG_8_RD_EN_8_MASK   0xfu
#define	FLASH_CTRL_BANK1_INFO0_PAGE_CFG_8_RD_EN_8_OFFSET   4
#define	FLASH_CTRL_BANK1_INFO0_PAGE_CFG_8_RD_EN_8_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK1_INFO0_PAGE_CFG_8_RD_EN_8_MASK, .index = FLASH_CTRL_BANK1_INFO0_PAGE_CFG_8_RD_EN_8_OFFSET })
#define	FLASH_CTRL_BANK1_INFO0_PAGE_CFG_8_PROG_EN_8_MASK   0xfu
#define	FLASH_CTRL_BANK1_INFO0_PAGE_CFG_8_PROG_EN_8_OFFSET   8
#define	FLASH_CTRL_BANK1_INFO0_PAGE_CFG_8_PROG_EN_8_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK1_INFO0_PAGE_CFG_8_PROG_EN_8_MASK, .index = FLASH_CTRL_BANK1_INFO0_PAGE_CFG_8_PROG_EN_8_OFFSET })
#define	FLASH_CTRL_BANK1_INFO0_PAGE_CFG_8_ERASE_EN_8_MASK   0xfu
#define	FLASH_CTRL_BANK1_INFO0_PAGE_CFG_8_ERASE_EN_8_OFFSET   12
#define	FLASH_CTRL_BANK1_INFO0_PAGE_CFG_8_ERASE_EN_8_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK1_INFO0_PAGE_CFG_8_ERASE_EN_8_MASK, .index = FLASH_CTRL_BANK1_INFO0_PAGE_CFG_8_ERASE_EN_8_OFFSET })
#define	FLASH_CTRL_BANK1_INFO0_PAGE_CFG_8_SCRAMBLE_EN_8_MASK   0xfu
#define	FLASH_CTRL_BANK1_INFO0_PAGE_CFG_8_SCRAMBLE_EN_8_OFFSET   16
#define	FLASH_CTRL_BANK1_INFO0_PAGE_CFG_8_SCRAMBLE_EN_8_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK1_INFO0_PAGE_CFG_8_SCRAMBLE_EN_8_MASK, .index = FLASH_CTRL_BANK1_INFO0_PAGE_CFG_8_SCRAMBLE_EN_8_OFFSET })
#define	FLASH_CTRL_BANK1_INFO0_PAGE_CFG_8_ECC_EN_8_MASK   0xfu
#define	FLASH_CTRL_BANK1_INFO0_PAGE_CFG_8_ECC_EN_8_OFFSET   20
#define	FLASH_CTRL_BANK1_INFO0_PAGE_CFG_8_ECC_EN_8_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK1_INFO0_PAGE_CFG_8_ECC_EN_8_MASK, .index = FLASH_CTRL_BANK1_INFO0_PAGE_CFG_8_ECC_EN_8_OFFSET })
#define	FLASH_CTRL_BANK1_INFO0_PAGE_CFG_8_HE_EN_8_MASK   0xfu
#define	FLASH_CTRL_BANK1_INFO0_PAGE_CFG_8_HE_EN_8_OFFSET   24
#define	FLASH_CTRL_BANK1_INFO0_PAGE_CFG_8_HE_EN_8_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK1_INFO0_PAGE_CFG_8_HE_EN_8_MASK, .index = FLASH_CTRL_BANK1_INFO0_PAGE_CFG_8_HE_EN_8_OFFSET })
#define	FLASH_CTRL_BANK1_INFO0_PAGE_CFG_9_REG_OFFSET   0x148
#define	FLASH_CTRL_BANK1_INFO0_PAGE_CFG_9_REG_RESVAL   0x9999999u
#define	FLASH_CTRL_BANK1_INFO0_PAGE_CFG_9_EN_9_MASK   0xfu
#define	FLASH_CTRL_BANK1_INFO0_PAGE_CFG_9_EN_9_OFFSET   0
#define	FLASH_CTRL_BANK1_INFO0_PAGE_CFG_9_EN_9_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK1_INFO0_PAGE_CFG_9_EN_9_MASK, .index = FLASH_CTRL_BANK1_INFO0_PAGE_CFG_9_EN_9_OFFSET })
#define	FLASH_CTRL_BANK1_INFO0_PAGE_CFG_9_RD_EN_9_MASK   0xfu
#define	FLASH_CTRL_BANK1_INFO0_PAGE_CFG_9_RD_EN_9_OFFSET   4
#define	FLASH_CTRL_BANK1_INFO0_PAGE_CFG_9_RD_EN_9_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK1_INFO0_PAGE_CFG_9_RD_EN_9_MASK, .index = FLASH_CTRL_BANK1_INFO0_PAGE_CFG_9_RD_EN_9_OFFSET })
#define	FLASH_CTRL_BANK1_INFO0_PAGE_CFG_9_PROG_EN_9_MASK   0xfu
#define	FLASH_CTRL_BANK1_INFO0_PAGE_CFG_9_PROG_EN_9_OFFSET   8
#define	FLASH_CTRL_BANK1_INFO0_PAGE_CFG_9_PROG_EN_9_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK1_INFO0_PAGE_CFG_9_PROG_EN_9_MASK, .index = FLASH_CTRL_BANK1_INFO0_PAGE_CFG_9_PROG_EN_9_OFFSET })
#define	FLASH_CTRL_BANK1_INFO0_PAGE_CFG_9_ERASE_EN_9_MASK   0xfu
#define	FLASH_CTRL_BANK1_INFO0_PAGE_CFG_9_ERASE_EN_9_OFFSET   12
#define	FLASH_CTRL_BANK1_INFO0_PAGE_CFG_9_ERASE_EN_9_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK1_INFO0_PAGE_CFG_9_ERASE_EN_9_MASK, .index = FLASH_CTRL_BANK1_INFO0_PAGE_CFG_9_ERASE_EN_9_OFFSET })
#define	FLASH_CTRL_BANK1_INFO0_PAGE_CFG_9_SCRAMBLE_EN_9_MASK   0xfu
#define	FLASH_CTRL_BANK1_INFO0_PAGE_CFG_9_SCRAMBLE_EN_9_OFFSET   16
#define	FLASH_CTRL_BANK1_INFO0_PAGE_CFG_9_SCRAMBLE_EN_9_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK1_INFO0_PAGE_CFG_9_SCRAMBLE_EN_9_MASK, .index = FLASH_CTRL_BANK1_INFO0_PAGE_CFG_9_SCRAMBLE_EN_9_OFFSET })
#define	FLASH_CTRL_BANK1_INFO0_PAGE_CFG_9_ECC_EN_9_MASK   0xfu
#define	FLASH_CTRL_BANK1_INFO0_PAGE_CFG_9_ECC_EN_9_OFFSET   20
#define	FLASH_CTRL_BANK1_INFO0_PAGE_CFG_9_ECC_EN_9_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK1_INFO0_PAGE_CFG_9_ECC_EN_9_MASK, .index = FLASH_CTRL_BANK1_INFO0_PAGE_CFG_9_ECC_EN_9_OFFSET })
#define	FLASH_CTRL_BANK1_INFO0_PAGE_CFG_9_HE_EN_9_MASK   0xfu
#define	FLASH_CTRL_BANK1_INFO0_PAGE_CFG_9_HE_EN_9_OFFSET   24
#define	FLASH_CTRL_BANK1_INFO0_PAGE_CFG_9_HE_EN_9_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK1_INFO0_PAGE_CFG_9_HE_EN_9_MASK, .index = FLASH_CTRL_BANK1_INFO0_PAGE_CFG_9_HE_EN_9_OFFSET })
#define	FLASH_CTRL_BANK1_INFO1_REGWEN_REGION_FIELD_WIDTH   1
#define	FLASH_CTRL_BANK1_INFO1_REGWEN_MULTIREG_COUNT   1
#define	FLASH_CTRL_BANK1_INFO1_REGWEN_REG_OFFSET   0x14c
#define	FLASH_CTRL_BANK1_INFO1_REGWEN_REG_RESVAL   0x1u
#define	FLASH_CTRL_BANK1_INFO1_REGWEN_REGION_0_BIT   0
#define	FLASH_CTRL_BANK1_INFO1_REGWEN_REGION_0_VALUE_PAGE_LOCKED   0x0
#define	FLASH_CTRL_BANK1_INFO1_REGWEN_REGION_0_VALUE_PAGE_ENABLED   0x1
#define	FLASH_CTRL_BANK1_INFO1_PAGE_CFG_EN_FIELD_WIDTH   4
#define	FLASH_CTRL_BANK1_INFO1_PAGE_CFG_RD_EN_FIELD_WIDTH   4
#define	FLASH_CTRL_BANK1_INFO1_PAGE_CFG_PROG_EN_FIELD_WIDTH   4
#define	FLASH_CTRL_BANK1_INFO1_PAGE_CFG_ERASE_EN_FIELD_WIDTH   4
#define	FLASH_CTRL_BANK1_INFO1_PAGE_CFG_SCRAMBLE_EN_FIELD_WIDTH   4
#define	FLASH_CTRL_BANK1_INFO1_PAGE_CFG_ECC_EN_FIELD_WIDTH   4
#define	FLASH_CTRL_BANK1_INFO1_PAGE_CFG_HE_EN_FIELD_WIDTH   4
#define	FLASH_CTRL_BANK1_INFO1_PAGE_CFG_MULTIREG_COUNT   1
#define	FLASH_CTRL_BANK1_INFO1_PAGE_CFG_REG_OFFSET   0x150
#define	FLASH_CTRL_BANK1_INFO1_PAGE_CFG_REG_RESVAL   0x9999999u
#define	FLASH_CTRL_BANK1_INFO1_PAGE_CFG_EN_0_MASK   0xfu
#define	FLASH_CTRL_BANK1_INFO1_PAGE_CFG_EN_0_OFFSET   0
#define	FLASH_CTRL_BANK1_INFO1_PAGE_CFG_EN_0_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK1_INFO1_PAGE_CFG_EN_0_MASK, .index = FLASH_CTRL_BANK1_INFO1_PAGE_CFG_EN_0_OFFSET })
#define	FLASH_CTRL_BANK1_INFO1_PAGE_CFG_RD_EN_0_MASK   0xfu
#define	FLASH_CTRL_BANK1_INFO1_PAGE_CFG_RD_EN_0_OFFSET   4
#define	FLASH_CTRL_BANK1_INFO1_PAGE_CFG_RD_EN_0_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK1_INFO1_PAGE_CFG_RD_EN_0_MASK, .index = FLASH_CTRL_BANK1_INFO1_PAGE_CFG_RD_EN_0_OFFSET })
#define	FLASH_CTRL_BANK1_INFO1_PAGE_CFG_PROG_EN_0_MASK   0xfu
#define	FLASH_CTRL_BANK1_INFO1_PAGE_CFG_PROG_EN_0_OFFSET   8
#define	FLASH_CTRL_BANK1_INFO1_PAGE_CFG_PROG_EN_0_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK1_INFO1_PAGE_CFG_PROG_EN_0_MASK, .index = FLASH_CTRL_BANK1_INFO1_PAGE_CFG_PROG_EN_0_OFFSET })
#define	FLASH_CTRL_BANK1_INFO1_PAGE_CFG_ERASE_EN_0_MASK   0xfu
#define	FLASH_CTRL_BANK1_INFO1_PAGE_CFG_ERASE_EN_0_OFFSET   12
#define	FLASH_CTRL_BANK1_INFO1_PAGE_CFG_ERASE_EN_0_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK1_INFO1_PAGE_CFG_ERASE_EN_0_MASK, .index = FLASH_CTRL_BANK1_INFO1_PAGE_CFG_ERASE_EN_0_OFFSET })
#define	FLASH_CTRL_BANK1_INFO1_PAGE_CFG_SCRAMBLE_EN_0_MASK   0xfu
#define	FLASH_CTRL_BANK1_INFO1_PAGE_CFG_SCRAMBLE_EN_0_OFFSET   16
#define	FLASH_CTRL_BANK1_INFO1_PAGE_CFG_SCRAMBLE_EN_0_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK1_INFO1_PAGE_CFG_SCRAMBLE_EN_0_MASK, .index = FLASH_CTRL_BANK1_INFO1_PAGE_CFG_SCRAMBLE_EN_0_OFFSET })
#define	FLASH_CTRL_BANK1_INFO1_PAGE_CFG_ECC_EN_0_MASK   0xfu
#define	FLASH_CTRL_BANK1_INFO1_PAGE_CFG_ECC_EN_0_OFFSET   20
#define	FLASH_CTRL_BANK1_INFO1_PAGE_CFG_ECC_EN_0_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK1_INFO1_PAGE_CFG_ECC_EN_0_MASK, .index = FLASH_CTRL_BANK1_INFO1_PAGE_CFG_ECC_EN_0_OFFSET })
#define	FLASH_CTRL_BANK1_INFO1_PAGE_CFG_HE_EN_0_MASK   0xfu
#define	FLASH_CTRL_BANK1_INFO1_PAGE_CFG_HE_EN_0_OFFSET   24
#define	FLASH_CTRL_BANK1_INFO1_PAGE_CFG_HE_EN_0_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK1_INFO1_PAGE_CFG_HE_EN_0_MASK, .index = FLASH_CTRL_BANK1_INFO1_PAGE_CFG_HE_EN_0_OFFSET })
#define	FLASH_CTRL_BANK1_INFO2_REGWEN_REGION_FIELD_WIDTH   1
#define	FLASH_CTRL_BANK1_INFO2_REGWEN_MULTIREG_COUNT   2
#define	FLASH_CTRL_BANK1_INFO2_REGWEN_0_REG_OFFSET   0x154
#define	FLASH_CTRL_BANK1_INFO2_REGWEN_0_REG_RESVAL   0x1u
#define	FLASH_CTRL_BANK1_INFO2_REGWEN_0_REGION_0_BIT   0
#define	FLASH_CTRL_BANK1_INFO2_REGWEN_0_REGION_0_VALUE_PAGE_LOCKED   0x0
#define	FLASH_CTRL_BANK1_INFO2_REGWEN_0_REGION_0_VALUE_PAGE_ENABLED   0x1
#define	FLASH_CTRL_BANK1_INFO2_REGWEN_1_REG_OFFSET   0x158
#define	FLASH_CTRL_BANK1_INFO2_REGWEN_1_REG_RESVAL   0x1u
#define	FLASH_CTRL_BANK1_INFO2_REGWEN_1_REGION_1_BIT   0
#define	FLASH_CTRL_BANK1_INFO2_PAGE_CFG_EN_FIELD_WIDTH   4
#define	FLASH_CTRL_BANK1_INFO2_PAGE_CFG_RD_EN_FIELD_WIDTH   4
#define	FLASH_CTRL_BANK1_INFO2_PAGE_CFG_PROG_EN_FIELD_WIDTH   4
#define	FLASH_CTRL_BANK1_INFO2_PAGE_CFG_ERASE_EN_FIELD_WIDTH   4
#define	FLASH_CTRL_BANK1_INFO2_PAGE_CFG_SCRAMBLE_EN_FIELD_WIDTH   4
#define	FLASH_CTRL_BANK1_INFO2_PAGE_CFG_ECC_EN_FIELD_WIDTH   4
#define	FLASH_CTRL_BANK1_INFO2_PAGE_CFG_HE_EN_FIELD_WIDTH   4
#define	FLASH_CTRL_BANK1_INFO2_PAGE_CFG_MULTIREG_COUNT   2
#define	FLASH_CTRL_BANK1_INFO2_PAGE_CFG_0_REG_OFFSET   0x15c
#define	FLASH_CTRL_BANK1_INFO2_PAGE_CFG_0_REG_RESVAL   0x9999999u
#define	FLASH_CTRL_BANK1_INFO2_PAGE_CFG_0_EN_0_MASK   0xfu
#define	FLASH_CTRL_BANK1_INFO2_PAGE_CFG_0_EN_0_OFFSET   0
#define	FLASH_CTRL_BANK1_INFO2_PAGE_CFG_0_EN_0_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK1_INFO2_PAGE_CFG_0_EN_0_MASK, .index = FLASH_CTRL_BANK1_INFO2_PAGE_CFG_0_EN_0_OFFSET })
#define	FLASH_CTRL_BANK1_INFO2_PAGE_CFG_0_RD_EN_0_MASK   0xfu
#define	FLASH_CTRL_BANK1_INFO2_PAGE_CFG_0_RD_EN_0_OFFSET   4
#define	FLASH_CTRL_BANK1_INFO2_PAGE_CFG_0_RD_EN_0_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK1_INFO2_PAGE_CFG_0_RD_EN_0_MASK, .index = FLASH_CTRL_BANK1_INFO2_PAGE_CFG_0_RD_EN_0_OFFSET })
#define	FLASH_CTRL_BANK1_INFO2_PAGE_CFG_0_PROG_EN_0_MASK   0xfu
#define	FLASH_CTRL_BANK1_INFO2_PAGE_CFG_0_PROG_EN_0_OFFSET   8
#define	FLASH_CTRL_BANK1_INFO2_PAGE_CFG_0_PROG_EN_0_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK1_INFO2_PAGE_CFG_0_PROG_EN_0_MASK, .index = FLASH_CTRL_BANK1_INFO2_PAGE_CFG_0_PROG_EN_0_OFFSET })
#define	FLASH_CTRL_BANK1_INFO2_PAGE_CFG_0_ERASE_EN_0_MASK   0xfu
#define	FLASH_CTRL_BANK1_INFO2_PAGE_CFG_0_ERASE_EN_0_OFFSET   12
#define	FLASH_CTRL_BANK1_INFO2_PAGE_CFG_0_ERASE_EN_0_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK1_INFO2_PAGE_CFG_0_ERASE_EN_0_MASK, .index = FLASH_CTRL_BANK1_INFO2_PAGE_CFG_0_ERASE_EN_0_OFFSET })
#define	FLASH_CTRL_BANK1_INFO2_PAGE_CFG_0_SCRAMBLE_EN_0_MASK   0xfu
#define	FLASH_CTRL_BANK1_INFO2_PAGE_CFG_0_SCRAMBLE_EN_0_OFFSET   16
#define	FLASH_CTRL_BANK1_INFO2_PAGE_CFG_0_SCRAMBLE_EN_0_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK1_INFO2_PAGE_CFG_0_SCRAMBLE_EN_0_MASK, .index = FLASH_CTRL_BANK1_INFO2_PAGE_CFG_0_SCRAMBLE_EN_0_OFFSET })
#define	FLASH_CTRL_BANK1_INFO2_PAGE_CFG_0_ECC_EN_0_MASK   0xfu
#define	FLASH_CTRL_BANK1_INFO2_PAGE_CFG_0_ECC_EN_0_OFFSET   20
#define	FLASH_CTRL_BANK1_INFO2_PAGE_CFG_0_ECC_EN_0_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK1_INFO2_PAGE_CFG_0_ECC_EN_0_MASK, .index = FLASH_CTRL_BANK1_INFO2_PAGE_CFG_0_ECC_EN_0_OFFSET })
#define	FLASH_CTRL_BANK1_INFO2_PAGE_CFG_0_HE_EN_0_MASK   0xfu
#define	FLASH_CTRL_BANK1_INFO2_PAGE_CFG_0_HE_EN_0_OFFSET   24
#define	FLASH_CTRL_BANK1_INFO2_PAGE_CFG_0_HE_EN_0_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK1_INFO2_PAGE_CFG_0_HE_EN_0_MASK, .index = FLASH_CTRL_BANK1_INFO2_PAGE_CFG_0_HE_EN_0_OFFSET })
#define	FLASH_CTRL_BANK1_INFO2_PAGE_CFG_1_REG_OFFSET   0x160
#define	FLASH_CTRL_BANK1_INFO2_PAGE_CFG_1_REG_RESVAL   0x9999999u
#define	FLASH_CTRL_BANK1_INFO2_PAGE_CFG_1_EN_1_MASK   0xfu
#define	FLASH_CTRL_BANK1_INFO2_PAGE_CFG_1_EN_1_OFFSET   0
#define	FLASH_CTRL_BANK1_INFO2_PAGE_CFG_1_EN_1_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK1_INFO2_PAGE_CFG_1_EN_1_MASK, .index = FLASH_CTRL_BANK1_INFO2_PAGE_CFG_1_EN_1_OFFSET })
#define	FLASH_CTRL_BANK1_INFO2_PAGE_CFG_1_RD_EN_1_MASK   0xfu
#define	FLASH_CTRL_BANK1_INFO2_PAGE_CFG_1_RD_EN_1_OFFSET   4
#define	FLASH_CTRL_BANK1_INFO2_PAGE_CFG_1_RD_EN_1_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK1_INFO2_PAGE_CFG_1_RD_EN_1_MASK, .index = FLASH_CTRL_BANK1_INFO2_PAGE_CFG_1_RD_EN_1_OFFSET })
#define	FLASH_CTRL_BANK1_INFO2_PAGE_CFG_1_PROG_EN_1_MASK   0xfu
#define	FLASH_CTRL_BANK1_INFO2_PAGE_CFG_1_PROG_EN_1_OFFSET   8
#define	FLASH_CTRL_BANK1_INFO2_PAGE_CFG_1_PROG_EN_1_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK1_INFO2_PAGE_CFG_1_PROG_EN_1_MASK, .index = FLASH_CTRL_BANK1_INFO2_PAGE_CFG_1_PROG_EN_1_OFFSET })
#define	FLASH_CTRL_BANK1_INFO2_PAGE_CFG_1_ERASE_EN_1_MASK   0xfu
#define	FLASH_CTRL_BANK1_INFO2_PAGE_CFG_1_ERASE_EN_1_OFFSET   12
#define	FLASH_CTRL_BANK1_INFO2_PAGE_CFG_1_ERASE_EN_1_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK1_INFO2_PAGE_CFG_1_ERASE_EN_1_MASK, .index = FLASH_CTRL_BANK1_INFO2_PAGE_CFG_1_ERASE_EN_1_OFFSET })
#define	FLASH_CTRL_BANK1_INFO2_PAGE_CFG_1_SCRAMBLE_EN_1_MASK   0xfu
#define	FLASH_CTRL_BANK1_INFO2_PAGE_CFG_1_SCRAMBLE_EN_1_OFFSET   16
#define	FLASH_CTRL_BANK1_INFO2_PAGE_CFG_1_SCRAMBLE_EN_1_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK1_INFO2_PAGE_CFG_1_SCRAMBLE_EN_1_MASK, .index = FLASH_CTRL_BANK1_INFO2_PAGE_CFG_1_SCRAMBLE_EN_1_OFFSET })
#define	FLASH_CTRL_BANK1_INFO2_PAGE_CFG_1_ECC_EN_1_MASK   0xfu
#define	FLASH_CTRL_BANK1_INFO2_PAGE_CFG_1_ECC_EN_1_OFFSET   20
#define	FLASH_CTRL_BANK1_INFO2_PAGE_CFG_1_ECC_EN_1_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK1_INFO2_PAGE_CFG_1_ECC_EN_1_MASK, .index = FLASH_CTRL_BANK1_INFO2_PAGE_CFG_1_ECC_EN_1_OFFSET })
#define	FLASH_CTRL_BANK1_INFO2_PAGE_CFG_1_HE_EN_1_MASK   0xfu
#define	FLASH_CTRL_BANK1_INFO2_PAGE_CFG_1_HE_EN_1_OFFSET   24
#define	FLASH_CTRL_BANK1_INFO2_PAGE_CFG_1_HE_EN_1_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK1_INFO2_PAGE_CFG_1_HE_EN_1_MASK, .index = FLASH_CTRL_BANK1_INFO2_PAGE_CFG_1_HE_EN_1_OFFSET })
#define	FLASH_CTRL_HW_INFO_CFG_OVERRIDE_REG_OFFSET   0x164
#define	FLASH_CTRL_HW_INFO_CFG_OVERRIDE_REG_RESVAL   0x99u
#define	FLASH_CTRL_HW_INFO_CFG_OVERRIDE_SCRAMBLE_DIS_MASK   0xfu
#define	FLASH_CTRL_HW_INFO_CFG_OVERRIDE_SCRAMBLE_DIS_OFFSET   0
#define	FLASH_CTRL_HW_INFO_CFG_OVERRIDE_SCRAMBLE_DIS_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_HW_INFO_CFG_OVERRIDE_SCRAMBLE_DIS_MASK, .index = FLASH_CTRL_HW_INFO_CFG_OVERRIDE_SCRAMBLE_DIS_OFFSET })
#define	FLASH_CTRL_HW_INFO_CFG_OVERRIDE_ECC_DIS_MASK   0xfu
#define	FLASH_CTRL_HW_INFO_CFG_OVERRIDE_ECC_DIS_OFFSET   4
#define	FLASH_CTRL_HW_INFO_CFG_OVERRIDE_ECC_DIS_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_HW_INFO_CFG_OVERRIDE_ECC_DIS_MASK, .index = FLASH_CTRL_HW_INFO_CFG_OVERRIDE_ECC_DIS_OFFSET })
#define	FLASH_CTRL_BANK_CFG_REGWEN_REG_OFFSET   0x168
#define	FLASH_CTRL_BANK_CFG_REGWEN_REG_RESVAL   0x1u
#define	FLASH_CTRL_BANK_CFG_REGWEN_BANK_BIT   0
#define	FLASH_CTRL_BANK_CFG_REGWEN_BANK_VALUE_BANK_LOCKED   0x0
#define	FLASH_CTRL_BANK_CFG_REGWEN_BANK_VALUE_BANK_ENABLED   0x1
#define	FLASH_CTRL_MP_BANK_CFG_SHADOWED_ERASE_EN_FIELD_WIDTH   1
#define	FLASH_CTRL_MP_BANK_CFG_SHADOWED_MULTIREG_COUNT   1
#define	FLASH_CTRL_MP_BANK_CFG_SHADOWED_REG_OFFSET   0x16c
#define	FLASH_CTRL_MP_BANK_CFG_SHADOWED_REG_RESVAL   0x0u
#define	FLASH_CTRL_MP_BANK_CFG_SHADOWED_ERASE_EN_0_BIT   0
#define	FLASH_CTRL_MP_BANK_CFG_SHADOWED_ERASE_EN_1_BIT   1
#define	FLASH_CTRL_OP_STATUS_REG_OFFSET   0x170
#define	FLASH_CTRL_OP_STATUS_REG_RESVAL   0x0u
#define	FLASH_CTRL_OP_STATUS_DONE_BIT   0
#define	FLASH_CTRL_OP_STATUS_ERR_BIT   1
#define	FLASH_CTRL_STATUS_REG_OFFSET   0x174
#define	FLASH_CTRL_STATUS_REG_RESVAL   0xau
#define	FLASH_CTRL_STATUS_RD_FULL_BIT   0
#define	FLASH_CTRL_STATUS_RD_EMPTY_BIT   1
#define	FLASH_CTRL_STATUS_PROG_FULL_BIT   2
#define	FLASH_CTRL_STATUS_PROG_EMPTY_BIT   3
#define	FLASH_CTRL_STATUS_INIT_WIP_BIT   4
#define	FLASH_CTRL_STATUS_INITIALIZED_BIT   5
#define	FLASH_CTRL_DEBUG_STATE_REG_OFFSET   0x178
#define	FLASH_CTRL_DEBUG_STATE_REG_RESVAL   0x0u
#define	FLASH_CTRL_DEBUG_STATE_LCMGR_STATE_MASK   0x7ffu
#define	FLASH_CTRL_DEBUG_STATE_LCMGR_STATE_OFFSET   0
#define	FLASH_CTRL_DEBUG_STATE_LCMGR_STATE_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_DEBUG_STATE_LCMGR_STATE_MASK, .index = FLASH_CTRL_DEBUG_STATE_LCMGR_STATE_OFFSET })
#define	FLASH_CTRL_ERR_CODE_REG_OFFSET   0x17c
#define	FLASH_CTRL_ERR_CODE_REG_RESVAL   0x0u
#define	FLASH_CTRL_ERR_CODE_OP_ERR_BIT   0
#define	FLASH_CTRL_ERR_CODE_MP_ERR_BIT   1
#define	FLASH_CTRL_ERR_CODE_RD_ERR_BIT   2
#define	FLASH_CTRL_ERR_CODE_PROG_ERR_BIT   3
#define	FLASH_CTRL_ERR_CODE_PROG_WIN_ERR_BIT   4
#define	FLASH_CTRL_ERR_CODE_PROG_TYPE_ERR_BIT   5
#define	FLASH_CTRL_ERR_CODE_UPDATE_ERR_BIT   6
#define	FLASH_CTRL_ERR_CODE_MACRO_ERR_BIT   7
#define	FLASH_CTRL_STD_FAULT_STATUS_REG_OFFSET   0x180
#define	FLASH_CTRL_STD_FAULT_STATUS_REG_RESVAL   0x0u
#define	FLASH_CTRL_STD_FAULT_STATUS_REG_INTG_ERR_BIT   0
#define	FLASH_CTRL_STD_FAULT_STATUS_PROG_INTG_ERR_BIT   1
#define	FLASH_CTRL_STD_FAULT_STATUS_LCMGR_ERR_BIT   2
#define	FLASH_CTRL_STD_FAULT_STATUS_LCMGR_INTG_ERR_BIT   3
#define	FLASH_CTRL_STD_FAULT_STATUS_ARB_FSM_ERR_BIT   4
#define	FLASH_CTRL_STD_FAULT_STATUS_STORAGE_ERR_BIT   5
#define	FLASH_CTRL_STD_FAULT_STATUS_PHY_FSM_ERR_BIT   6
#define	FLASH_CTRL_STD_FAULT_STATUS_CTRL_CNT_ERR_BIT   7
#define	FLASH_CTRL_STD_FAULT_STATUS_FIFO_ERR_BIT   8
#define	FLASH_CTRL_FAULT_STATUS_REG_OFFSET   0x184
#define	FLASH_CTRL_FAULT_STATUS_REG_RESVAL   0x0u
#define	FLASH_CTRL_FAULT_STATUS_OP_ERR_BIT   0
#define	FLASH_CTRL_FAULT_STATUS_MP_ERR_BIT   1
#define	FLASH_CTRL_FAULT_STATUS_RD_ERR_BIT   2
#define	FLASH_CTRL_FAULT_STATUS_PROG_ERR_BIT   3
#define	FLASH_CTRL_FAULT_STATUS_PROG_WIN_ERR_BIT   4
#define	FLASH_CTRL_FAULT_STATUS_PROG_TYPE_ERR_BIT   5
#define	FLASH_CTRL_FAULT_STATUS_SEED_ERR_BIT   6
#define	FLASH_CTRL_FAULT_STATUS_PHY_RELBL_ERR_BIT   7
#define	FLASH_CTRL_FAULT_STATUS_PHY_STORAGE_ERR_BIT   8
#define	FLASH_CTRL_FAULT_STATUS_SPURIOUS_ACK_BIT   9
#define	FLASH_CTRL_FAULT_STATUS_ARB_ERR_BIT   10
#define	FLASH_CTRL_FAULT_STATUS_HOST_GNT_ERR_BIT   11
#define	FLASH_CTRL_ERR_ADDR_REG_OFFSET   0x188
#define	FLASH_CTRL_ERR_ADDR_REG_RESVAL   0x0u
#define	FLASH_CTRL_ERR_ADDR_ERR_ADDR_MASK   0xfffffu
#define	FLASH_CTRL_ERR_ADDR_ERR_ADDR_OFFSET   0
#define	FLASH_CTRL_ERR_ADDR_ERR_ADDR_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_ERR_ADDR_ERR_ADDR_MASK, .index = FLASH_CTRL_ERR_ADDR_ERR_ADDR_OFFSET })
#define	FLASH_CTRL_ECC_SINGLE_ERR_CNT_ECC_SINGLE_ERR_CNT_FIELD_WIDTH   8
#define	FLASH_CTRL_ECC_SINGLE_ERR_CNT_MULTIREG_COUNT   1
#define	FLASH_CTRL_ECC_SINGLE_ERR_CNT_REG_OFFSET   0x18c
#define	FLASH_CTRL_ECC_SINGLE_ERR_CNT_REG_RESVAL   0x0u
#define	FLASH_CTRL_ECC_SINGLE_ERR_CNT_ECC_SINGLE_ERR_CNT_0_MASK   0xffu
#define	FLASH_CTRL_ECC_SINGLE_ERR_CNT_ECC_SINGLE_ERR_CNT_0_OFFSET   0
#define	FLASH_CTRL_ECC_SINGLE_ERR_CNT_ECC_SINGLE_ERR_CNT_0_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_ECC_SINGLE_ERR_CNT_ECC_SINGLE_ERR_CNT_0_MASK, .index = FLASH_CTRL_ECC_SINGLE_ERR_CNT_ECC_SINGLE_ERR_CNT_0_OFFSET })
#define	FLASH_CTRL_ECC_SINGLE_ERR_CNT_ECC_SINGLE_ERR_CNT_1_MASK   0xffu
#define	FLASH_CTRL_ECC_SINGLE_ERR_CNT_ECC_SINGLE_ERR_CNT_1_OFFSET   8
#define	FLASH_CTRL_ECC_SINGLE_ERR_CNT_ECC_SINGLE_ERR_CNT_1_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_ECC_SINGLE_ERR_CNT_ECC_SINGLE_ERR_CNT_1_MASK, .index = FLASH_CTRL_ECC_SINGLE_ERR_CNT_ECC_SINGLE_ERR_CNT_1_OFFSET })
#define	FLASH_CTRL_ECC_SINGLE_ERR_ADDR_ECC_SINGLE_ERR_ADDR_FIELD_WIDTH   20
#define	FLASH_CTRL_ECC_SINGLE_ERR_ADDR_MULTIREG_COUNT   2
#define	FLASH_CTRL_ECC_SINGLE_ERR_ADDR_0_REG_OFFSET   0x190
#define	FLASH_CTRL_ECC_SINGLE_ERR_ADDR_0_REG_RESVAL   0x0u
#define	FLASH_CTRL_ECC_SINGLE_ERR_ADDR_0_ECC_SINGLE_ERR_ADDR_0_MASK   0xfffffu
#define	FLASH_CTRL_ECC_SINGLE_ERR_ADDR_0_ECC_SINGLE_ERR_ADDR_0_OFFSET   0
#define	FLASH_CTRL_ECC_SINGLE_ERR_ADDR_0_ECC_SINGLE_ERR_ADDR_0_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_ECC_SINGLE_ERR_ADDR_0_ECC_SINGLE_ERR_ADDR_0_MASK, .index = FLASH_CTRL_ECC_SINGLE_ERR_ADDR_0_ECC_SINGLE_ERR_ADDR_0_OFFSET })
#define	FLASH_CTRL_ECC_SINGLE_ERR_ADDR_1_REG_OFFSET   0x194
#define	FLASH_CTRL_ECC_SINGLE_ERR_ADDR_1_REG_RESVAL   0x0u
#define	FLASH_CTRL_ECC_SINGLE_ERR_ADDR_1_ECC_SINGLE_ERR_ADDR_1_MASK   0xfffffu
#define	FLASH_CTRL_ECC_SINGLE_ERR_ADDR_1_ECC_SINGLE_ERR_ADDR_1_OFFSET   0
#define	FLASH_CTRL_ECC_SINGLE_ERR_ADDR_1_ECC_SINGLE_ERR_ADDR_1_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_ECC_SINGLE_ERR_ADDR_1_ECC_SINGLE_ERR_ADDR_1_MASK, .index = FLASH_CTRL_ECC_SINGLE_ERR_ADDR_1_ECC_SINGLE_ERR_ADDR_1_OFFSET })
#define	FLASH_CTRL_PHY_ALERT_CFG_REG_OFFSET   0x198
#define	FLASH_CTRL_PHY_ALERT_CFG_REG_RESVAL   0x0u
#define	FLASH_CTRL_PHY_ALERT_CFG_ALERT_ACK_BIT   0
#define	FLASH_CTRL_PHY_ALERT_CFG_ALERT_TRIG_BIT   1
#define	FLASH_CTRL_PHY_STATUS_REG_OFFSET   0x19c
#define	FLASH_CTRL_PHY_STATUS_REG_RESVAL   0x6u
#define	FLASH_CTRL_PHY_STATUS_INIT_WIP_BIT   0
#define	FLASH_CTRL_PHY_STATUS_PROG_NORMAL_AVAIL_BIT   1
#define	FLASH_CTRL_PHY_STATUS_PROG_REPAIR_AVAIL_BIT   2
#define	FLASH_CTRL_SCRATCH_REG_OFFSET   0x1a0
#define	FLASH_CTRL_SCRATCH_REG_RESVAL   0x0u
#define	FLASH_CTRL_FIFO_LVL_REG_OFFSET   0x1a4
#define	FLASH_CTRL_FIFO_LVL_REG_RESVAL   0xf0fu
#define	FLASH_CTRL_FIFO_LVL_PROG_MASK   0x1fu
#define	FLASH_CTRL_FIFO_LVL_PROG_OFFSET   0
#define	FLASH_CTRL_FIFO_LVL_PROG_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_FIFO_LVL_PROG_MASK, .index = FLASH_CTRL_FIFO_LVL_PROG_OFFSET })
#define	FLASH_CTRL_FIFO_LVL_RD_MASK   0x1fu
#define	FLASH_CTRL_FIFO_LVL_RD_OFFSET   8
#define	FLASH_CTRL_FIFO_LVL_RD_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_FIFO_LVL_RD_MASK, .index = FLASH_CTRL_FIFO_LVL_RD_OFFSET })
#define	FLASH_CTRL_FIFO_RST_REG_OFFSET   0x1a8
#define	FLASH_CTRL_FIFO_RST_REG_RESVAL   0x0u
#define	FLASH_CTRL_FIFO_RST_EN_BIT   0
#define	FLASH_CTRL_CURR_FIFO_LVL_REG_OFFSET   0x1ac
#define	FLASH_CTRL_CURR_FIFO_LVL_REG_RESVAL   0x0u
#define	FLASH_CTRL_CURR_FIFO_LVL_PROG_MASK   0x1fu
#define	FLASH_CTRL_CURR_FIFO_LVL_PROG_OFFSET   0
#define	FLASH_CTRL_CURR_FIFO_LVL_PROG_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_CURR_FIFO_LVL_PROG_MASK, .index = FLASH_CTRL_CURR_FIFO_LVL_PROG_OFFSET })
#define	FLASH_CTRL_CURR_FIFO_LVL_RD_MASK   0x1fu
#define	FLASH_CTRL_CURR_FIFO_LVL_RD_OFFSET   8
#define	FLASH_CTRL_CURR_FIFO_LVL_RD_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_CURR_FIFO_LVL_RD_MASK, .index = FLASH_CTRL_CURR_FIFO_LVL_RD_OFFSET })
#define	FLASH_CTRL_PROG_FIFO_REG_OFFSET   0x1b0
#define	FLASH_CTRL_PROG_FIFO_SIZE_WORDS   1
#define	FLASH_CTRL_PROG_FIFO_SIZE_BYTES   4
#define	FLASH_CTRL_RD_FIFO_REG_OFFSET   0x1b4
#define	FLASH_CTRL_RD_FIFO_SIZE_WORDS   1
#define	FLASH_CTRL_RD_FIFO_SIZE_BYTES   4
#define	FLASH_CTRL_CSR0_REGWEN_REG_OFFSET   0x0
#define	FLASH_CTRL_CSR0_REGWEN_REG_RESVAL   0x1u
#define	FLASH_CTRL_CSR0_REGWEN_FIELD0_BIT   0
#define	FLASH_CTRL_CSR1_REG_OFFSET   0x4
#define	FLASH_CTRL_CSR1_REG_RESVAL   0x0u
#define	FLASH_CTRL_CSR1_FIELD0_MASK   0xffu
#define	FLASH_CTRL_CSR1_FIELD0_OFFSET   0
#define	FLASH_CTRL_CSR1_FIELD0_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_CSR1_FIELD0_MASK, .index = FLASH_CTRL_CSR1_FIELD0_OFFSET })
#define	FLASH_CTRL_CSR1_FIELD1_MASK   0x1fu
#define	FLASH_CTRL_CSR1_FIELD1_OFFSET   8
#define	FLASH_CTRL_CSR1_FIELD1_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_CSR1_FIELD1_MASK, .index = FLASH_CTRL_CSR1_FIELD1_OFFSET })
#define	FLASH_CTRL_CSR2_REG_OFFSET   0x8
#define	FLASH_CTRL_CSR2_REG_RESVAL   0x0u
#define	FLASH_CTRL_CSR2_FIELD0_BIT   0
#define	FLASH_CTRL_CSR2_FIELD1_BIT   1
#define	FLASH_CTRL_CSR2_FIELD2_BIT   2
#define	FLASH_CTRL_CSR2_FIELD3_BIT   3
#define	FLASH_CTRL_CSR2_FIELD4_BIT   4
#define	FLASH_CTRL_CSR2_FIELD5_BIT   5
#define	FLASH_CTRL_CSR2_FIELD6_BIT   6
#define	FLASH_CTRL_CSR2_FIELD7_BIT   7
#define	FLASH_CTRL_CSR3_REG_OFFSET   0xc
#define	FLASH_CTRL_CSR3_REG_RESVAL   0x0u
#define	FLASH_CTRL_CSR3_FIELD0_MASK   0xfu
#define	FLASH_CTRL_CSR3_FIELD0_OFFSET   0
#define	FLASH_CTRL_CSR3_FIELD0_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_CSR3_FIELD0_MASK, .index = FLASH_CTRL_CSR3_FIELD0_OFFSET })
#define	FLASH_CTRL_CSR3_FIELD1_MASK   0xfu
#define	FLASH_CTRL_CSR3_FIELD1_OFFSET   4
#define	FLASH_CTRL_CSR3_FIELD1_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_CSR3_FIELD1_MASK, .index = FLASH_CTRL_CSR3_FIELD1_OFFSET })
#define	FLASH_CTRL_CSR3_FIELD2_MASK   0x7u
#define	FLASH_CTRL_CSR3_FIELD2_OFFSET   8
#define	FLASH_CTRL_CSR3_FIELD2_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_CSR3_FIELD2_MASK, .index = FLASH_CTRL_CSR3_FIELD2_OFFSET })
#define	FLASH_CTRL_CSR3_FIELD3_MASK   0x7u
#define	FLASH_CTRL_CSR3_FIELD3_OFFSET   11
#define	FLASH_CTRL_CSR3_FIELD3_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_CSR3_FIELD3_MASK, .index = FLASH_CTRL_CSR3_FIELD3_OFFSET })
#define	FLASH_CTRL_CSR3_FIELD4_MASK   0x7u
#define	FLASH_CTRL_CSR3_FIELD4_OFFSET   14
#define	FLASH_CTRL_CSR3_FIELD4_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_CSR3_FIELD4_MASK, .index = FLASH_CTRL_CSR3_FIELD4_OFFSET })
#define	FLASH_CTRL_CSR3_FIELD5_MASK   0x7u
#define	FLASH_CTRL_CSR3_FIELD5_OFFSET   17
#define	FLASH_CTRL_CSR3_FIELD5_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_CSR3_FIELD5_MASK, .index = FLASH_CTRL_CSR3_FIELD5_OFFSET })
#define	FLASH_CTRL_CSR3_FIELD6_BIT   20
#define	FLASH_CTRL_CSR3_FIELD7_MASK   0x7u
#define	FLASH_CTRL_CSR3_FIELD7_OFFSET   21
#define	FLASH_CTRL_CSR3_FIELD7_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_CSR3_FIELD7_MASK, .index = FLASH_CTRL_CSR3_FIELD7_OFFSET })
#define	FLASH_CTRL_CSR3_FIELD8_MASK   0x3u
#define	FLASH_CTRL_CSR3_FIELD8_OFFSET   24
#define	FLASH_CTRL_CSR3_FIELD8_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_CSR3_FIELD8_MASK, .index = FLASH_CTRL_CSR3_FIELD8_OFFSET })
#define	FLASH_CTRL_CSR3_FIELD9_MASK   0x3u
#define	FLASH_CTRL_CSR3_FIELD9_OFFSET   26
#define	FLASH_CTRL_CSR3_FIELD9_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_CSR3_FIELD9_MASK, .index = FLASH_CTRL_CSR3_FIELD9_OFFSET })
#define	FLASH_CTRL_CSR4_REG_OFFSET   0x10
#define	FLASH_CTRL_CSR4_REG_RESVAL   0x0u
#define	FLASH_CTRL_CSR4_FIELD0_MASK   0x7u
#define	FLASH_CTRL_CSR4_FIELD0_OFFSET   0
#define	FLASH_CTRL_CSR4_FIELD0_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_CSR4_FIELD0_MASK, .index = FLASH_CTRL_CSR4_FIELD0_OFFSET })
#define	FLASH_CTRL_CSR4_FIELD1_MASK   0x7u
#define	FLASH_CTRL_CSR4_FIELD1_OFFSET   3
#define	FLASH_CTRL_CSR4_FIELD1_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_CSR4_FIELD1_MASK, .index = FLASH_CTRL_CSR4_FIELD1_OFFSET })
#define	FLASH_CTRL_CSR4_FIELD2_MASK   0x7u
#define	FLASH_CTRL_CSR4_FIELD2_OFFSET   6
#define	FLASH_CTRL_CSR4_FIELD2_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_CSR4_FIELD2_MASK, .index = FLASH_CTRL_CSR4_FIELD2_OFFSET })
#define	FLASH_CTRL_CSR4_FIELD3_MASK   0x7u
#define	FLASH_CTRL_CSR4_FIELD3_OFFSET   9
#define	FLASH_CTRL_CSR4_FIELD3_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_CSR4_FIELD3_MASK, .index = FLASH_CTRL_CSR4_FIELD3_OFFSET })
#define	FLASH_CTRL_CSR5_REG_OFFSET   0x14
#define	FLASH_CTRL_CSR5_REG_RESVAL   0x0u
#define	FLASH_CTRL_CSR5_FIELD0_MASK   0x7u
#define	FLASH_CTRL_CSR5_FIELD0_OFFSET   0
#define	FLASH_CTRL_CSR5_FIELD0_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_CSR5_FIELD0_MASK, .index = FLASH_CTRL_CSR5_FIELD0_OFFSET })
#define	FLASH_CTRL_CSR5_FIELD1_MASK   0x3u
#define	FLASH_CTRL_CSR5_FIELD1_OFFSET   3
#define	FLASH_CTRL_CSR5_FIELD1_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_CSR5_FIELD1_MASK, .index = FLASH_CTRL_CSR5_FIELD1_OFFSET })
#define	FLASH_CTRL_CSR5_FIELD2_MASK   0x1ffu
#define	FLASH_CTRL_CSR5_FIELD2_OFFSET   5
#define	FLASH_CTRL_CSR5_FIELD2_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_CSR5_FIELD2_MASK, .index = FLASH_CTRL_CSR5_FIELD2_OFFSET })
#define	FLASH_CTRL_CSR5_FIELD3_MASK   0x1fu
#define	FLASH_CTRL_CSR5_FIELD3_OFFSET   14
#define	FLASH_CTRL_CSR5_FIELD3_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_CSR5_FIELD3_MASK, .index = FLASH_CTRL_CSR5_FIELD3_OFFSET })
#define	FLASH_CTRL_CSR5_FIELD4_MASK   0xfu
#define	FLASH_CTRL_CSR5_FIELD4_OFFSET   19
#define	FLASH_CTRL_CSR5_FIELD4_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_CSR5_FIELD4_MASK, .index = FLASH_CTRL_CSR5_FIELD4_OFFSET })
#define	FLASH_CTRL_CSR6_REG_OFFSET   0x18
#define	FLASH_CTRL_CSR6_REG_RESVAL   0x0u
#define	FLASH_CTRL_CSR6_FIELD0_MASK   0x7u
#define	FLASH_CTRL_CSR6_FIELD0_OFFSET   0
#define	FLASH_CTRL_CSR6_FIELD0_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_CSR6_FIELD0_MASK, .index = FLASH_CTRL_CSR6_FIELD0_OFFSET })
#define	FLASH_CTRL_CSR6_FIELD1_MASK   0x7u
#define	FLASH_CTRL_CSR6_FIELD1_OFFSET   3
#define	FLASH_CTRL_CSR6_FIELD1_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_CSR6_FIELD1_MASK, .index = FLASH_CTRL_CSR6_FIELD1_OFFSET })
#define	FLASH_CTRL_CSR6_FIELD2_MASK   0xffu
#define	FLASH_CTRL_CSR6_FIELD2_OFFSET   6
#define	FLASH_CTRL_CSR6_FIELD2_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_CSR6_FIELD2_MASK, .index = FLASH_CTRL_CSR6_FIELD2_OFFSET })
#define	FLASH_CTRL_CSR6_FIELD3_MASK   0x7u
#define	FLASH_CTRL_CSR6_FIELD3_OFFSET   14
#define	FLASH_CTRL_CSR6_FIELD3_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_CSR6_FIELD3_MASK, .index = FLASH_CTRL_CSR6_FIELD3_OFFSET })
#define	FLASH_CTRL_CSR6_FIELD4_MASK   0x3u
#define	FLASH_CTRL_CSR6_FIELD4_OFFSET   17
#define	FLASH_CTRL_CSR6_FIELD4_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_CSR6_FIELD4_MASK, .index = FLASH_CTRL_CSR6_FIELD4_OFFSET })
#define	FLASH_CTRL_CSR6_FIELD5_MASK   0x3u
#define	FLASH_CTRL_CSR6_FIELD5_OFFSET   19
#define	FLASH_CTRL_CSR6_FIELD5_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_CSR6_FIELD5_MASK, .index = FLASH_CTRL_CSR6_FIELD5_OFFSET })
#define	FLASH_CTRL_CSR6_FIELD6_MASK   0x3u
#define	FLASH_CTRL_CSR6_FIELD6_OFFSET   21
#define	FLASH_CTRL_CSR6_FIELD6_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_CSR6_FIELD6_MASK, .index = FLASH_CTRL_CSR6_FIELD6_OFFSET })
#define	FLASH_CTRL_CSR6_FIELD7_BIT   23
#define	FLASH_CTRL_CSR6_FIELD8_BIT   24
#define	FLASH_CTRL_CSR7_REG_OFFSET   0x1c
#define	FLASH_CTRL_CSR7_REG_RESVAL   0x0u
#define	FLASH_CTRL_CSR7_FIELD0_MASK   0xffu
#define	FLASH_CTRL_CSR7_FIELD0_OFFSET   0
#define	FLASH_CTRL_CSR7_FIELD0_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_CSR7_FIELD0_MASK, .index = FLASH_CTRL_CSR7_FIELD0_OFFSET })
#define	FLASH_CTRL_CSR7_FIELD1_MASK   0x1ffu
#define	FLASH_CTRL_CSR7_FIELD1_OFFSET   8
#define	FLASH_CTRL_CSR7_FIELD1_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_CSR7_FIELD1_MASK, .index = FLASH_CTRL_CSR7_FIELD1_OFFSET })
#define	FLASH_CTRL_CSR8_REG_OFFSET   0x20
#define	FLASH_CTRL_CSR8_REG_RESVAL   0x0u
#define	FLASH_CTRL_CSR9_REG_OFFSET   0x24
#define	FLASH_CTRL_CSR9_REG_RESVAL   0x0u
#define	FLASH_CTRL_CSR10_REG_OFFSET   0x28
#define	FLASH_CTRL_CSR10_REG_RESVAL   0x0u
#define	FLASH_CTRL_CSR11_REG_OFFSET   0x2c
#define	FLASH_CTRL_CSR11_REG_RESVAL   0x0u
#define	FLASH_CTRL_CSR12_REG_OFFSET   0x30
#define	FLASH_CTRL_CSR12_REG_RESVAL   0x0u
#define	FLASH_CTRL_CSR12_FIELD0_MASK   0x3ffu
#define	FLASH_CTRL_CSR12_FIELD0_OFFSET   0
#define	FLASH_CTRL_CSR12_FIELD0_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_CSR12_FIELD0_MASK, .index = FLASH_CTRL_CSR12_FIELD0_OFFSET })
#define	FLASH_CTRL_CSR13_REG_OFFSET   0x34
#define	FLASH_CTRL_CSR13_REG_RESVAL   0x0u
#define	FLASH_CTRL_CSR13_FIELD0_MASK   0xfffffu
#define	FLASH_CTRL_CSR13_FIELD0_OFFSET   0
#define	FLASH_CTRL_CSR13_FIELD0_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_CSR13_FIELD0_MASK, .index = FLASH_CTRL_CSR13_FIELD0_OFFSET })
#define	FLASH_CTRL_CSR13_FIELD1_BIT   20
#define	FLASH_CTRL_CSR14_REG_OFFSET   0x38
#define	FLASH_CTRL_CSR14_REG_RESVAL   0x0u
#define	FLASH_CTRL_CSR14_FIELD0_MASK   0xffu
#define	FLASH_CTRL_CSR14_FIELD0_OFFSET   0
#define	FLASH_CTRL_CSR14_FIELD0_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_CSR14_FIELD0_MASK, .index = FLASH_CTRL_CSR14_FIELD0_OFFSET })
#define	FLASH_CTRL_CSR14_FIELD1_BIT   8
#define	FLASH_CTRL_CSR15_REG_OFFSET   0x3c
#define	FLASH_CTRL_CSR15_REG_RESVAL   0x0u
#define	FLASH_CTRL_CSR15_FIELD0_MASK   0xffu
#define	FLASH_CTRL_CSR15_FIELD0_OFFSET   0
#define	FLASH_CTRL_CSR15_FIELD0_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_CSR15_FIELD0_MASK, .index = FLASH_CTRL_CSR15_FIELD0_OFFSET })
#define	FLASH_CTRL_CSR15_FIELD1_BIT   8
#define	FLASH_CTRL_CSR16_REG_OFFSET   0x40
#define	FLASH_CTRL_CSR16_REG_RESVAL   0x0u
#define	FLASH_CTRL_CSR16_FIELD0_MASK   0xffu
#define	FLASH_CTRL_CSR16_FIELD0_OFFSET   0
#define	FLASH_CTRL_CSR16_FIELD0_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_CSR16_FIELD0_MASK, .index = FLASH_CTRL_CSR16_FIELD0_OFFSET })
#define	FLASH_CTRL_CSR16_FIELD1_BIT   8
#define	FLASH_CTRL_CSR17_REG_OFFSET   0x44
#define	FLASH_CTRL_CSR17_REG_RESVAL   0x0u
#define	FLASH_CTRL_CSR17_FIELD0_MASK   0xffu
#define	FLASH_CTRL_CSR17_FIELD0_OFFSET   0
#define	FLASH_CTRL_CSR17_FIELD0_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_CSR17_FIELD0_MASK, .index = FLASH_CTRL_CSR17_FIELD0_OFFSET })
#define	FLASH_CTRL_CSR17_FIELD1_BIT   8
#define	FLASH_CTRL_CSR18_REG_OFFSET   0x48
#define	FLASH_CTRL_CSR18_REG_RESVAL   0x0u
#define	FLASH_CTRL_CSR18_FIELD0_BIT   0
#define	FLASH_CTRL_CSR19_REG_OFFSET   0x4c
#define	FLASH_CTRL_CSR19_REG_RESVAL   0x0u
#define	FLASH_CTRL_CSR19_FIELD0_BIT   0
#define	FLASH_CTRL_CSR20_REG_OFFSET   0x50
#define	FLASH_CTRL_CSR20_REG_RESVAL   0x0u
#define	FLASH_CTRL_CSR20_FIELD0_BIT   0
#define	FLASH_CTRL_CSR20_FIELD1_BIT   1
#define	FLASH_CTRL_CSR20_FIELD2_BIT   2

Detailed Description

Generated register defines for flash_ctrl.

Definition in file flash_ctrl_regs.h.

Macro Definition Documentation

FLASH_CTRL_ADDR_REG_OFFSET

#define FLASH_CTRL_ADDR_REG_OFFSET   0x24

Definition at line 173 of file flash_ctrl_regs.h.

FLASH_CTRL_ADDR_REG_RESVAL

#define FLASH_CTRL_ADDR_REG_RESVAL   0x0u

Definition at line 174 of file flash_ctrl_regs.h.

FLASH_CTRL_ADDR_START_FIELD

#define FLASH_CTRL_ADDR_START_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_ADDR_START_MASK, .index = FLASH_CTRL_ADDR_START_OFFSET })

Definition at line 177 of file flash_ctrl_regs.h.

FLASH_CTRL_ADDR_START_MASK

#define FLASH_CTRL_ADDR_START_MASK   0xfffffu

Definition at line 175 of file flash_ctrl_regs.h.

FLASH_CTRL_ADDR_START_OFFSET

#define FLASH_CTRL_ADDR_START_OFFSET   0

Definition at line 176 of file flash_ctrl_regs.h.

FLASH_CTRL_ALERT_TEST_FATAL_ERR_BIT

#define FLASH_CTRL_ALERT_TEST_FATAL_ERR_BIT   2

Definition at line 119 of file flash_ctrl_regs.h.

FLASH_CTRL_ALERT_TEST_FATAL_PRIM_FLASH_ALERT_BIT

#define FLASH_CTRL_ALERT_TEST_FATAL_PRIM_FLASH_ALERT_BIT   3

Definition at line 120 of file flash_ctrl_regs.h.

FLASH_CTRL_ALERT_TEST_FATAL_STD_ERR_BIT

#define FLASH_CTRL_ALERT_TEST_FATAL_STD_ERR_BIT   1

Definition at line 118 of file flash_ctrl_regs.h.

FLASH_CTRL_ALERT_TEST_RECOV_ERR_BIT

#define FLASH_CTRL_ALERT_TEST_RECOV_ERR_BIT   0

Definition at line 117 of file flash_ctrl_regs.h.

FLASH_CTRL_ALERT_TEST_RECOV_PRIM_FLASH_ALERT_BIT

#define FLASH_CTRL_ALERT_TEST_RECOV_PRIM_FLASH_ALERT_BIT   4

Definition at line 121 of file flash_ctrl_regs.h.

FLASH_CTRL_ALERT_TEST_REG_OFFSET

#define FLASH_CTRL_ALERT_TEST_REG_OFFSET   0xc

Definition at line 115 of file flash_ctrl_regs.h.

FLASH_CTRL_ALERT_TEST_REG_RESVAL

#define FLASH_CTRL_ALERT_TEST_REG_RESVAL   0x0u

Definition at line 116 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO0_PAGE_CFG_0_ECC_EN_0_FIELD

#define FLASH_CTRL_BANK0_INFO0_PAGE_CFG_0_ECC_EN_0_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK0_INFO0_PAGE_CFG_0_ECC_EN_0_MASK, .index = FLASH_CTRL_BANK0_INFO0_PAGE_CFG_0_ECC_EN_0_OFFSET })

Definition at line 723 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO0_PAGE_CFG_0_ECC_EN_0_MASK

#define FLASH_CTRL_BANK0_INFO0_PAGE_CFG_0_ECC_EN_0_MASK   0xfu

Definition at line 721 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO0_PAGE_CFG_0_ECC_EN_0_OFFSET

#define FLASH_CTRL_BANK0_INFO0_PAGE_CFG_0_ECC_EN_0_OFFSET   20

Definition at line 722 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO0_PAGE_CFG_0_EN_0_FIELD

#define FLASH_CTRL_BANK0_INFO0_PAGE_CFG_0_EN_0_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK0_INFO0_PAGE_CFG_0_EN_0_MASK, .index = FLASH_CTRL_BANK0_INFO0_PAGE_CFG_0_EN_0_OFFSET })

Definition at line 703 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO0_PAGE_CFG_0_EN_0_MASK

#define FLASH_CTRL_BANK0_INFO0_PAGE_CFG_0_EN_0_MASK   0xfu

Definition at line 701 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO0_PAGE_CFG_0_EN_0_OFFSET

#define FLASH_CTRL_BANK0_INFO0_PAGE_CFG_0_EN_0_OFFSET   0

Definition at line 702 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO0_PAGE_CFG_0_ERASE_EN_0_FIELD

#define FLASH_CTRL_BANK0_INFO0_PAGE_CFG_0_ERASE_EN_0_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK0_INFO0_PAGE_CFG_0_ERASE_EN_0_MASK, .index = FLASH_CTRL_BANK0_INFO0_PAGE_CFG_0_ERASE_EN_0_OFFSET })

Definition at line 715 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO0_PAGE_CFG_0_ERASE_EN_0_MASK

#define FLASH_CTRL_BANK0_INFO0_PAGE_CFG_0_ERASE_EN_0_MASK   0xfu

Definition at line 713 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO0_PAGE_CFG_0_ERASE_EN_0_OFFSET

#define FLASH_CTRL_BANK0_INFO0_PAGE_CFG_0_ERASE_EN_0_OFFSET   12

Definition at line 714 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO0_PAGE_CFG_0_HE_EN_0_FIELD

#define FLASH_CTRL_BANK0_INFO0_PAGE_CFG_0_HE_EN_0_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK0_INFO0_PAGE_CFG_0_HE_EN_0_MASK, .index = FLASH_CTRL_BANK0_INFO0_PAGE_CFG_0_HE_EN_0_OFFSET })

Definition at line 727 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO0_PAGE_CFG_0_HE_EN_0_MASK

#define FLASH_CTRL_BANK0_INFO0_PAGE_CFG_0_HE_EN_0_MASK   0xfu

Definition at line 725 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO0_PAGE_CFG_0_HE_EN_0_OFFSET

#define FLASH_CTRL_BANK0_INFO0_PAGE_CFG_0_HE_EN_0_OFFSET   24

Definition at line 726 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO0_PAGE_CFG_0_PROG_EN_0_FIELD

#define FLASH_CTRL_BANK0_INFO0_PAGE_CFG_0_PROG_EN_0_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK0_INFO0_PAGE_CFG_0_PROG_EN_0_MASK, .index = FLASH_CTRL_BANK0_INFO0_PAGE_CFG_0_PROG_EN_0_OFFSET })

Definition at line 711 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO0_PAGE_CFG_0_PROG_EN_0_MASK

#define FLASH_CTRL_BANK0_INFO0_PAGE_CFG_0_PROG_EN_0_MASK   0xfu

Definition at line 709 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO0_PAGE_CFG_0_PROG_EN_0_OFFSET

#define FLASH_CTRL_BANK0_INFO0_PAGE_CFG_0_PROG_EN_0_OFFSET   8

Definition at line 710 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO0_PAGE_CFG_0_RD_EN_0_FIELD

#define FLASH_CTRL_BANK0_INFO0_PAGE_CFG_0_RD_EN_0_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK0_INFO0_PAGE_CFG_0_RD_EN_0_MASK, .index = FLASH_CTRL_BANK0_INFO0_PAGE_CFG_0_RD_EN_0_OFFSET })

Definition at line 707 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO0_PAGE_CFG_0_RD_EN_0_MASK

#define FLASH_CTRL_BANK0_INFO0_PAGE_CFG_0_RD_EN_0_MASK   0xfu

Definition at line 705 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO0_PAGE_CFG_0_RD_EN_0_OFFSET

#define FLASH_CTRL_BANK0_INFO0_PAGE_CFG_0_RD_EN_0_OFFSET   4

Definition at line 706 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO0_PAGE_CFG_0_REG_OFFSET

#define FLASH_CTRL_BANK0_INFO0_PAGE_CFG_0_REG_OFFSET   0xbc

Definition at line 699 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO0_PAGE_CFG_0_REG_RESVAL

#define FLASH_CTRL_BANK0_INFO0_PAGE_CFG_0_REG_RESVAL   0x9999999u

Definition at line 700 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO0_PAGE_CFG_0_SCRAMBLE_EN_0_FIELD

#define FLASH_CTRL_BANK0_INFO0_PAGE_CFG_0_SCRAMBLE_EN_0_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK0_INFO0_PAGE_CFG_0_SCRAMBLE_EN_0_MASK, .index = FLASH_CTRL_BANK0_INFO0_PAGE_CFG_0_SCRAMBLE_EN_0_OFFSET })

Definition at line 719 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO0_PAGE_CFG_0_SCRAMBLE_EN_0_MASK

#define FLASH_CTRL_BANK0_INFO0_PAGE_CFG_0_SCRAMBLE_EN_0_MASK   0xfu

Definition at line 717 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO0_PAGE_CFG_0_SCRAMBLE_EN_0_OFFSET

#define FLASH_CTRL_BANK0_INFO0_PAGE_CFG_0_SCRAMBLE_EN_0_OFFSET   16

Definition at line 718 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO0_PAGE_CFG_1_ECC_EN_1_FIELD

#define FLASH_CTRL_BANK0_INFO0_PAGE_CFG_1_ECC_EN_1_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK0_INFO0_PAGE_CFG_1_ECC_EN_1_MASK, .index = FLASH_CTRL_BANK0_INFO0_PAGE_CFG_1_ECC_EN_1_OFFSET })

Definition at line 755 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO0_PAGE_CFG_1_ECC_EN_1_MASK

#define FLASH_CTRL_BANK0_INFO0_PAGE_CFG_1_ECC_EN_1_MASK   0xfu

Definition at line 753 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO0_PAGE_CFG_1_ECC_EN_1_OFFSET

#define FLASH_CTRL_BANK0_INFO0_PAGE_CFG_1_ECC_EN_1_OFFSET   20

Definition at line 754 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO0_PAGE_CFG_1_EN_1_FIELD

#define FLASH_CTRL_BANK0_INFO0_PAGE_CFG_1_EN_1_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK0_INFO0_PAGE_CFG_1_EN_1_MASK, .index = FLASH_CTRL_BANK0_INFO0_PAGE_CFG_1_EN_1_OFFSET })

Definition at line 735 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO0_PAGE_CFG_1_EN_1_MASK

#define FLASH_CTRL_BANK0_INFO0_PAGE_CFG_1_EN_1_MASK   0xfu

Definition at line 733 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO0_PAGE_CFG_1_EN_1_OFFSET

#define FLASH_CTRL_BANK0_INFO0_PAGE_CFG_1_EN_1_OFFSET   0

Definition at line 734 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO0_PAGE_CFG_1_ERASE_EN_1_FIELD

#define FLASH_CTRL_BANK0_INFO0_PAGE_CFG_1_ERASE_EN_1_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK0_INFO0_PAGE_CFG_1_ERASE_EN_1_MASK, .index = FLASH_CTRL_BANK0_INFO0_PAGE_CFG_1_ERASE_EN_1_OFFSET })

Definition at line 747 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO0_PAGE_CFG_1_ERASE_EN_1_MASK

#define FLASH_CTRL_BANK0_INFO0_PAGE_CFG_1_ERASE_EN_1_MASK   0xfu

Definition at line 745 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO0_PAGE_CFG_1_ERASE_EN_1_OFFSET

#define FLASH_CTRL_BANK0_INFO0_PAGE_CFG_1_ERASE_EN_1_OFFSET   12

Definition at line 746 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO0_PAGE_CFG_1_HE_EN_1_FIELD

#define FLASH_CTRL_BANK0_INFO0_PAGE_CFG_1_HE_EN_1_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK0_INFO0_PAGE_CFG_1_HE_EN_1_MASK, .index = FLASH_CTRL_BANK0_INFO0_PAGE_CFG_1_HE_EN_1_OFFSET })

Definition at line 759 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO0_PAGE_CFG_1_HE_EN_1_MASK

#define FLASH_CTRL_BANK0_INFO0_PAGE_CFG_1_HE_EN_1_MASK   0xfu

Definition at line 757 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO0_PAGE_CFG_1_HE_EN_1_OFFSET

#define FLASH_CTRL_BANK0_INFO0_PAGE_CFG_1_HE_EN_1_OFFSET   24

Definition at line 758 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO0_PAGE_CFG_1_PROG_EN_1_FIELD

#define FLASH_CTRL_BANK0_INFO0_PAGE_CFG_1_PROG_EN_1_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK0_INFO0_PAGE_CFG_1_PROG_EN_1_MASK, .index = FLASH_CTRL_BANK0_INFO0_PAGE_CFG_1_PROG_EN_1_OFFSET })

Definition at line 743 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO0_PAGE_CFG_1_PROG_EN_1_MASK

#define FLASH_CTRL_BANK0_INFO0_PAGE_CFG_1_PROG_EN_1_MASK   0xfu

Definition at line 741 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO0_PAGE_CFG_1_PROG_EN_1_OFFSET

#define FLASH_CTRL_BANK0_INFO0_PAGE_CFG_1_PROG_EN_1_OFFSET   8

Definition at line 742 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO0_PAGE_CFG_1_RD_EN_1_FIELD

#define FLASH_CTRL_BANK0_INFO0_PAGE_CFG_1_RD_EN_1_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK0_INFO0_PAGE_CFG_1_RD_EN_1_MASK, .index = FLASH_CTRL_BANK0_INFO0_PAGE_CFG_1_RD_EN_1_OFFSET })

Definition at line 739 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO0_PAGE_CFG_1_RD_EN_1_MASK

#define FLASH_CTRL_BANK0_INFO0_PAGE_CFG_1_RD_EN_1_MASK   0xfu

Definition at line 737 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO0_PAGE_CFG_1_RD_EN_1_OFFSET

#define FLASH_CTRL_BANK0_INFO0_PAGE_CFG_1_RD_EN_1_OFFSET   4

Definition at line 738 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO0_PAGE_CFG_1_REG_OFFSET

#define FLASH_CTRL_BANK0_INFO0_PAGE_CFG_1_REG_OFFSET   0xc0

Definition at line 731 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO0_PAGE_CFG_1_REG_RESVAL

#define FLASH_CTRL_BANK0_INFO0_PAGE_CFG_1_REG_RESVAL   0x9999999u

Definition at line 732 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO0_PAGE_CFG_1_SCRAMBLE_EN_1_FIELD

#define FLASH_CTRL_BANK0_INFO0_PAGE_CFG_1_SCRAMBLE_EN_1_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK0_INFO0_PAGE_CFG_1_SCRAMBLE_EN_1_MASK, .index = FLASH_CTRL_BANK0_INFO0_PAGE_CFG_1_SCRAMBLE_EN_1_OFFSET })

Definition at line 751 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO0_PAGE_CFG_1_SCRAMBLE_EN_1_MASK

#define FLASH_CTRL_BANK0_INFO0_PAGE_CFG_1_SCRAMBLE_EN_1_MASK   0xfu

Definition at line 749 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO0_PAGE_CFG_1_SCRAMBLE_EN_1_OFFSET

#define FLASH_CTRL_BANK0_INFO0_PAGE_CFG_1_SCRAMBLE_EN_1_OFFSET   16

Definition at line 750 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO0_PAGE_CFG_2_ECC_EN_2_FIELD

#define FLASH_CTRL_BANK0_INFO0_PAGE_CFG_2_ECC_EN_2_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK0_INFO0_PAGE_CFG_2_ECC_EN_2_MASK, .index = FLASH_CTRL_BANK0_INFO0_PAGE_CFG_2_ECC_EN_2_OFFSET })

Definition at line 787 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO0_PAGE_CFG_2_ECC_EN_2_MASK

#define FLASH_CTRL_BANK0_INFO0_PAGE_CFG_2_ECC_EN_2_MASK   0xfu

Definition at line 785 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO0_PAGE_CFG_2_ECC_EN_2_OFFSET

#define FLASH_CTRL_BANK0_INFO0_PAGE_CFG_2_ECC_EN_2_OFFSET   20

Definition at line 786 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO0_PAGE_CFG_2_EN_2_FIELD

#define FLASH_CTRL_BANK0_INFO0_PAGE_CFG_2_EN_2_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK0_INFO0_PAGE_CFG_2_EN_2_MASK, .index = FLASH_CTRL_BANK0_INFO0_PAGE_CFG_2_EN_2_OFFSET })

Definition at line 767 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO0_PAGE_CFG_2_EN_2_MASK

#define FLASH_CTRL_BANK0_INFO0_PAGE_CFG_2_EN_2_MASK   0xfu

Definition at line 765 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO0_PAGE_CFG_2_EN_2_OFFSET

#define FLASH_CTRL_BANK0_INFO0_PAGE_CFG_2_EN_2_OFFSET   0

Definition at line 766 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO0_PAGE_CFG_2_ERASE_EN_2_FIELD

#define FLASH_CTRL_BANK0_INFO0_PAGE_CFG_2_ERASE_EN_2_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK0_INFO0_PAGE_CFG_2_ERASE_EN_2_MASK, .index = FLASH_CTRL_BANK0_INFO0_PAGE_CFG_2_ERASE_EN_2_OFFSET })

Definition at line 779 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO0_PAGE_CFG_2_ERASE_EN_2_MASK

#define FLASH_CTRL_BANK0_INFO0_PAGE_CFG_2_ERASE_EN_2_MASK   0xfu

Definition at line 777 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO0_PAGE_CFG_2_ERASE_EN_2_OFFSET

#define FLASH_CTRL_BANK0_INFO0_PAGE_CFG_2_ERASE_EN_2_OFFSET   12

Definition at line 778 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO0_PAGE_CFG_2_HE_EN_2_FIELD

#define FLASH_CTRL_BANK0_INFO0_PAGE_CFG_2_HE_EN_2_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK0_INFO0_PAGE_CFG_2_HE_EN_2_MASK, .index = FLASH_CTRL_BANK0_INFO0_PAGE_CFG_2_HE_EN_2_OFFSET })

Definition at line 791 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO0_PAGE_CFG_2_HE_EN_2_MASK

#define FLASH_CTRL_BANK0_INFO0_PAGE_CFG_2_HE_EN_2_MASK   0xfu

Definition at line 789 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO0_PAGE_CFG_2_HE_EN_2_OFFSET

#define FLASH_CTRL_BANK0_INFO0_PAGE_CFG_2_HE_EN_2_OFFSET   24

Definition at line 790 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO0_PAGE_CFG_2_PROG_EN_2_FIELD

#define FLASH_CTRL_BANK0_INFO0_PAGE_CFG_2_PROG_EN_2_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK0_INFO0_PAGE_CFG_2_PROG_EN_2_MASK, .index = FLASH_CTRL_BANK0_INFO0_PAGE_CFG_2_PROG_EN_2_OFFSET })

Definition at line 775 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO0_PAGE_CFG_2_PROG_EN_2_MASK

#define FLASH_CTRL_BANK0_INFO0_PAGE_CFG_2_PROG_EN_2_MASK   0xfu

Definition at line 773 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO0_PAGE_CFG_2_PROG_EN_2_OFFSET

#define FLASH_CTRL_BANK0_INFO0_PAGE_CFG_2_PROG_EN_2_OFFSET   8

Definition at line 774 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO0_PAGE_CFG_2_RD_EN_2_FIELD

#define FLASH_CTRL_BANK0_INFO0_PAGE_CFG_2_RD_EN_2_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK0_INFO0_PAGE_CFG_2_RD_EN_2_MASK, .index = FLASH_CTRL_BANK0_INFO0_PAGE_CFG_2_RD_EN_2_OFFSET })

Definition at line 771 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO0_PAGE_CFG_2_RD_EN_2_MASK

#define FLASH_CTRL_BANK0_INFO0_PAGE_CFG_2_RD_EN_2_MASK   0xfu

Definition at line 769 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO0_PAGE_CFG_2_RD_EN_2_OFFSET

#define FLASH_CTRL_BANK0_INFO0_PAGE_CFG_2_RD_EN_2_OFFSET   4

Definition at line 770 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO0_PAGE_CFG_2_REG_OFFSET

#define FLASH_CTRL_BANK0_INFO0_PAGE_CFG_2_REG_OFFSET   0xc4

Definition at line 763 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO0_PAGE_CFG_2_REG_RESVAL

#define FLASH_CTRL_BANK0_INFO0_PAGE_CFG_2_REG_RESVAL   0x9999999u

Definition at line 764 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO0_PAGE_CFG_2_SCRAMBLE_EN_2_FIELD

#define FLASH_CTRL_BANK0_INFO0_PAGE_CFG_2_SCRAMBLE_EN_2_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK0_INFO0_PAGE_CFG_2_SCRAMBLE_EN_2_MASK, .index = FLASH_CTRL_BANK0_INFO0_PAGE_CFG_2_SCRAMBLE_EN_2_OFFSET })

Definition at line 783 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO0_PAGE_CFG_2_SCRAMBLE_EN_2_MASK

#define FLASH_CTRL_BANK0_INFO0_PAGE_CFG_2_SCRAMBLE_EN_2_MASK   0xfu

Definition at line 781 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO0_PAGE_CFG_2_SCRAMBLE_EN_2_OFFSET

#define FLASH_CTRL_BANK0_INFO0_PAGE_CFG_2_SCRAMBLE_EN_2_OFFSET   16

Definition at line 782 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO0_PAGE_CFG_3_ECC_EN_3_FIELD

#define FLASH_CTRL_BANK0_INFO0_PAGE_CFG_3_ECC_EN_3_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK0_INFO0_PAGE_CFG_3_ECC_EN_3_MASK, .index = FLASH_CTRL_BANK0_INFO0_PAGE_CFG_3_ECC_EN_3_OFFSET })

Definition at line 819 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO0_PAGE_CFG_3_ECC_EN_3_MASK

#define FLASH_CTRL_BANK0_INFO0_PAGE_CFG_3_ECC_EN_3_MASK   0xfu

Definition at line 817 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO0_PAGE_CFG_3_ECC_EN_3_OFFSET

#define FLASH_CTRL_BANK0_INFO0_PAGE_CFG_3_ECC_EN_3_OFFSET   20

Definition at line 818 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO0_PAGE_CFG_3_EN_3_FIELD

#define FLASH_CTRL_BANK0_INFO0_PAGE_CFG_3_EN_3_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK0_INFO0_PAGE_CFG_3_EN_3_MASK, .index = FLASH_CTRL_BANK0_INFO0_PAGE_CFG_3_EN_3_OFFSET })

Definition at line 799 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO0_PAGE_CFG_3_EN_3_MASK

#define FLASH_CTRL_BANK0_INFO0_PAGE_CFG_3_EN_3_MASK   0xfu

Definition at line 797 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO0_PAGE_CFG_3_EN_3_OFFSET

#define FLASH_CTRL_BANK0_INFO0_PAGE_CFG_3_EN_3_OFFSET   0

Definition at line 798 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO0_PAGE_CFG_3_ERASE_EN_3_FIELD

#define FLASH_CTRL_BANK0_INFO0_PAGE_CFG_3_ERASE_EN_3_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK0_INFO0_PAGE_CFG_3_ERASE_EN_3_MASK, .index = FLASH_CTRL_BANK0_INFO0_PAGE_CFG_3_ERASE_EN_3_OFFSET })

Definition at line 811 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO0_PAGE_CFG_3_ERASE_EN_3_MASK

#define FLASH_CTRL_BANK0_INFO0_PAGE_CFG_3_ERASE_EN_3_MASK   0xfu

Definition at line 809 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO0_PAGE_CFG_3_ERASE_EN_3_OFFSET

#define FLASH_CTRL_BANK0_INFO0_PAGE_CFG_3_ERASE_EN_3_OFFSET   12

Definition at line 810 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO0_PAGE_CFG_3_HE_EN_3_FIELD

#define FLASH_CTRL_BANK0_INFO0_PAGE_CFG_3_HE_EN_3_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK0_INFO0_PAGE_CFG_3_HE_EN_3_MASK, .index = FLASH_CTRL_BANK0_INFO0_PAGE_CFG_3_HE_EN_3_OFFSET })

Definition at line 823 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO0_PAGE_CFG_3_HE_EN_3_MASK

#define FLASH_CTRL_BANK0_INFO0_PAGE_CFG_3_HE_EN_3_MASK   0xfu

Definition at line 821 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO0_PAGE_CFG_3_HE_EN_3_OFFSET

#define FLASH_CTRL_BANK0_INFO0_PAGE_CFG_3_HE_EN_3_OFFSET   24

Definition at line 822 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO0_PAGE_CFG_3_PROG_EN_3_FIELD

#define FLASH_CTRL_BANK0_INFO0_PAGE_CFG_3_PROG_EN_3_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK0_INFO0_PAGE_CFG_3_PROG_EN_3_MASK, .index = FLASH_CTRL_BANK0_INFO0_PAGE_CFG_3_PROG_EN_3_OFFSET })

Definition at line 807 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO0_PAGE_CFG_3_PROG_EN_3_MASK

#define FLASH_CTRL_BANK0_INFO0_PAGE_CFG_3_PROG_EN_3_MASK   0xfu

Definition at line 805 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO0_PAGE_CFG_3_PROG_EN_3_OFFSET

#define FLASH_CTRL_BANK0_INFO0_PAGE_CFG_3_PROG_EN_3_OFFSET   8

Definition at line 806 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO0_PAGE_CFG_3_RD_EN_3_FIELD

#define FLASH_CTRL_BANK0_INFO0_PAGE_CFG_3_RD_EN_3_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK0_INFO0_PAGE_CFG_3_RD_EN_3_MASK, .index = FLASH_CTRL_BANK0_INFO0_PAGE_CFG_3_RD_EN_3_OFFSET })

Definition at line 803 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO0_PAGE_CFG_3_RD_EN_3_MASK

#define FLASH_CTRL_BANK0_INFO0_PAGE_CFG_3_RD_EN_3_MASK   0xfu

Definition at line 801 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO0_PAGE_CFG_3_RD_EN_3_OFFSET

#define FLASH_CTRL_BANK0_INFO0_PAGE_CFG_3_RD_EN_3_OFFSET   4

Definition at line 802 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO0_PAGE_CFG_3_REG_OFFSET

#define FLASH_CTRL_BANK0_INFO0_PAGE_CFG_3_REG_OFFSET   0xc8

Definition at line 795 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO0_PAGE_CFG_3_REG_RESVAL

#define FLASH_CTRL_BANK0_INFO0_PAGE_CFG_3_REG_RESVAL   0x9999999u

Definition at line 796 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO0_PAGE_CFG_3_SCRAMBLE_EN_3_FIELD

#define FLASH_CTRL_BANK0_INFO0_PAGE_CFG_3_SCRAMBLE_EN_3_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK0_INFO0_PAGE_CFG_3_SCRAMBLE_EN_3_MASK, .index = FLASH_CTRL_BANK0_INFO0_PAGE_CFG_3_SCRAMBLE_EN_3_OFFSET })

Definition at line 815 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO0_PAGE_CFG_3_SCRAMBLE_EN_3_MASK

#define FLASH_CTRL_BANK0_INFO0_PAGE_CFG_3_SCRAMBLE_EN_3_MASK   0xfu

Definition at line 813 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO0_PAGE_CFG_3_SCRAMBLE_EN_3_OFFSET

#define FLASH_CTRL_BANK0_INFO0_PAGE_CFG_3_SCRAMBLE_EN_3_OFFSET   16

Definition at line 814 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO0_PAGE_CFG_4_ECC_EN_4_FIELD

#define FLASH_CTRL_BANK0_INFO0_PAGE_CFG_4_ECC_EN_4_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK0_INFO0_PAGE_CFG_4_ECC_EN_4_MASK, .index = FLASH_CTRL_BANK0_INFO0_PAGE_CFG_4_ECC_EN_4_OFFSET })

Definition at line 851 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO0_PAGE_CFG_4_ECC_EN_4_MASK

#define FLASH_CTRL_BANK0_INFO0_PAGE_CFG_4_ECC_EN_4_MASK   0xfu

Definition at line 849 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO0_PAGE_CFG_4_ECC_EN_4_OFFSET

#define FLASH_CTRL_BANK0_INFO0_PAGE_CFG_4_ECC_EN_4_OFFSET   20

Definition at line 850 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO0_PAGE_CFG_4_EN_4_FIELD

#define FLASH_CTRL_BANK0_INFO0_PAGE_CFG_4_EN_4_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK0_INFO0_PAGE_CFG_4_EN_4_MASK, .index = FLASH_CTRL_BANK0_INFO0_PAGE_CFG_4_EN_4_OFFSET })

Definition at line 831 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO0_PAGE_CFG_4_EN_4_MASK

#define FLASH_CTRL_BANK0_INFO0_PAGE_CFG_4_EN_4_MASK   0xfu

Definition at line 829 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO0_PAGE_CFG_4_EN_4_OFFSET

#define FLASH_CTRL_BANK0_INFO0_PAGE_CFG_4_EN_4_OFFSET   0

Definition at line 830 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO0_PAGE_CFG_4_ERASE_EN_4_FIELD

#define FLASH_CTRL_BANK0_INFO0_PAGE_CFG_4_ERASE_EN_4_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK0_INFO0_PAGE_CFG_4_ERASE_EN_4_MASK, .index = FLASH_CTRL_BANK0_INFO0_PAGE_CFG_4_ERASE_EN_4_OFFSET })

Definition at line 843 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO0_PAGE_CFG_4_ERASE_EN_4_MASK

#define FLASH_CTRL_BANK0_INFO0_PAGE_CFG_4_ERASE_EN_4_MASK   0xfu

Definition at line 841 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO0_PAGE_CFG_4_ERASE_EN_4_OFFSET

#define FLASH_CTRL_BANK0_INFO0_PAGE_CFG_4_ERASE_EN_4_OFFSET   12

Definition at line 842 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO0_PAGE_CFG_4_HE_EN_4_FIELD

#define FLASH_CTRL_BANK0_INFO0_PAGE_CFG_4_HE_EN_4_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK0_INFO0_PAGE_CFG_4_HE_EN_4_MASK, .index = FLASH_CTRL_BANK0_INFO0_PAGE_CFG_4_HE_EN_4_OFFSET })

Definition at line 855 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO0_PAGE_CFG_4_HE_EN_4_MASK

#define FLASH_CTRL_BANK0_INFO0_PAGE_CFG_4_HE_EN_4_MASK   0xfu

Definition at line 853 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO0_PAGE_CFG_4_HE_EN_4_OFFSET

#define FLASH_CTRL_BANK0_INFO0_PAGE_CFG_4_HE_EN_4_OFFSET   24

Definition at line 854 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO0_PAGE_CFG_4_PROG_EN_4_FIELD

#define FLASH_CTRL_BANK0_INFO0_PAGE_CFG_4_PROG_EN_4_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK0_INFO0_PAGE_CFG_4_PROG_EN_4_MASK, .index = FLASH_CTRL_BANK0_INFO0_PAGE_CFG_4_PROG_EN_4_OFFSET })

Definition at line 839 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO0_PAGE_CFG_4_PROG_EN_4_MASK

#define FLASH_CTRL_BANK0_INFO0_PAGE_CFG_4_PROG_EN_4_MASK   0xfu

Definition at line 837 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO0_PAGE_CFG_4_PROG_EN_4_OFFSET

#define FLASH_CTRL_BANK0_INFO0_PAGE_CFG_4_PROG_EN_4_OFFSET   8

Definition at line 838 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO0_PAGE_CFG_4_RD_EN_4_FIELD

#define FLASH_CTRL_BANK0_INFO0_PAGE_CFG_4_RD_EN_4_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK0_INFO0_PAGE_CFG_4_RD_EN_4_MASK, .index = FLASH_CTRL_BANK0_INFO0_PAGE_CFG_4_RD_EN_4_OFFSET })

Definition at line 835 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO0_PAGE_CFG_4_RD_EN_4_MASK

#define FLASH_CTRL_BANK0_INFO0_PAGE_CFG_4_RD_EN_4_MASK   0xfu

Definition at line 833 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO0_PAGE_CFG_4_RD_EN_4_OFFSET

#define FLASH_CTRL_BANK0_INFO0_PAGE_CFG_4_RD_EN_4_OFFSET   4

Definition at line 834 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO0_PAGE_CFG_4_REG_OFFSET

#define FLASH_CTRL_BANK0_INFO0_PAGE_CFG_4_REG_OFFSET   0xcc

Definition at line 827 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO0_PAGE_CFG_4_REG_RESVAL

#define FLASH_CTRL_BANK0_INFO0_PAGE_CFG_4_REG_RESVAL   0x9999999u

Definition at line 828 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO0_PAGE_CFG_4_SCRAMBLE_EN_4_FIELD

#define FLASH_CTRL_BANK0_INFO0_PAGE_CFG_4_SCRAMBLE_EN_4_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK0_INFO0_PAGE_CFG_4_SCRAMBLE_EN_4_MASK, .index = FLASH_CTRL_BANK0_INFO0_PAGE_CFG_4_SCRAMBLE_EN_4_OFFSET })

Definition at line 847 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO0_PAGE_CFG_4_SCRAMBLE_EN_4_MASK

#define FLASH_CTRL_BANK0_INFO0_PAGE_CFG_4_SCRAMBLE_EN_4_MASK   0xfu

Definition at line 845 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO0_PAGE_CFG_4_SCRAMBLE_EN_4_OFFSET

#define FLASH_CTRL_BANK0_INFO0_PAGE_CFG_4_SCRAMBLE_EN_4_OFFSET   16

Definition at line 846 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO0_PAGE_CFG_5_ECC_EN_5_FIELD

#define FLASH_CTRL_BANK0_INFO0_PAGE_CFG_5_ECC_EN_5_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK0_INFO0_PAGE_CFG_5_ECC_EN_5_MASK, .index = FLASH_CTRL_BANK0_INFO0_PAGE_CFG_5_ECC_EN_5_OFFSET })

Definition at line 883 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO0_PAGE_CFG_5_ECC_EN_5_MASK

#define FLASH_CTRL_BANK0_INFO0_PAGE_CFG_5_ECC_EN_5_MASK   0xfu

Definition at line 881 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO0_PAGE_CFG_5_ECC_EN_5_OFFSET

#define FLASH_CTRL_BANK0_INFO0_PAGE_CFG_5_ECC_EN_5_OFFSET   20

Definition at line 882 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO0_PAGE_CFG_5_EN_5_FIELD

#define FLASH_CTRL_BANK0_INFO0_PAGE_CFG_5_EN_5_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK0_INFO0_PAGE_CFG_5_EN_5_MASK, .index = FLASH_CTRL_BANK0_INFO0_PAGE_CFG_5_EN_5_OFFSET })

Definition at line 863 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO0_PAGE_CFG_5_EN_5_MASK

#define FLASH_CTRL_BANK0_INFO0_PAGE_CFG_5_EN_5_MASK   0xfu

Definition at line 861 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO0_PAGE_CFG_5_EN_5_OFFSET

#define FLASH_CTRL_BANK0_INFO0_PAGE_CFG_5_EN_5_OFFSET   0

Definition at line 862 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO0_PAGE_CFG_5_ERASE_EN_5_FIELD

#define FLASH_CTRL_BANK0_INFO0_PAGE_CFG_5_ERASE_EN_5_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK0_INFO0_PAGE_CFG_5_ERASE_EN_5_MASK, .index = FLASH_CTRL_BANK0_INFO0_PAGE_CFG_5_ERASE_EN_5_OFFSET })

Definition at line 875 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO0_PAGE_CFG_5_ERASE_EN_5_MASK

#define FLASH_CTRL_BANK0_INFO0_PAGE_CFG_5_ERASE_EN_5_MASK   0xfu

Definition at line 873 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO0_PAGE_CFG_5_ERASE_EN_5_OFFSET

#define FLASH_CTRL_BANK0_INFO0_PAGE_CFG_5_ERASE_EN_5_OFFSET   12

Definition at line 874 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO0_PAGE_CFG_5_HE_EN_5_FIELD

#define FLASH_CTRL_BANK0_INFO0_PAGE_CFG_5_HE_EN_5_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK0_INFO0_PAGE_CFG_5_HE_EN_5_MASK, .index = FLASH_CTRL_BANK0_INFO0_PAGE_CFG_5_HE_EN_5_OFFSET })

Definition at line 887 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO0_PAGE_CFG_5_HE_EN_5_MASK

#define FLASH_CTRL_BANK0_INFO0_PAGE_CFG_5_HE_EN_5_MASK   0xfu

Definition at line 885 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO0_PAGE_CFG_5_HE_EN_5_OFFSET

#define FLASH_CTRL_BANK0_INFO0_PAGE_CFG_5_HE_EN_5_OFFSET   24

Definition at line 886 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO0_PAGE_CFG_5_PROG_EN_5_FIELD

#define FLASH_CTRL_BANK0_INFO0_PAGE_CFG_5_PROG_EN_5_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK0_INFO0_PAGE_CFG_5_PROG_EN_5_MASK, .index = FLASH_CTRL_BANK0_INFO0_PAGE_CFG_5_PROG_EN_5_OFFSET })

Definition at line 871 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO0_PAGE_CFG_5_PROG_EN_5_MASK

#define FLASH_CTRL_BANK0_INFO0_PAGE_CFG_5_PROG_EN_5_MASK   0xfu

Definition at line 869 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO0_PAGE_CFG_5_PROG_EN_5_OFFSET

#define FLASH_CTRL_BANK0_INFO0_PAGE_CFG_5_PROG_EN_5_OFFSET   8

Definition at line 870 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO0_PAGE_CFG_5_RD_EN_5_FIELD

#define FLASH_CTRL_BANK0_INFO0_PAGE_CFG_5_RD_EN_5_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK0_INFO0_PAGE_CFG_5_RD_EN_5_MASK, .index = FLASH_CTRL_BANK0_INFO0_PAGE_CFG_5_RD_EN_5_OFFSET })

Definition at line 867 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO0_PAGE_CFG_5_RD_EN_5_MASK

#define FLASH_CTRL_BANK0_INFO0_PAGE_CFG_5_RD_EN_5_MASK   0xfu

Definition at line 865 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO0_PAGE_CFG_5_RD_EN_5_OFFSET

#define FLASH_CTRL_BANK0_INFO0_PAGE_CFG_5_RD_EN_5_OFFSET   4

Definition at line 866 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO0_PAGE_CFG_5_REG_OFFSET

#define FLASH_CTRL_BANK0_INFO0_PAGE_CFG_5_REG_OFFSET   0xd0

Definition at line 859 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO0_PAGE_CFG_5_REG_RESVAL

#define FLASH_CTRL_BANK0_INFO0_PAGE_CFG_5_REG_RESVAL   0x9999999u

Definition at line 860 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO0_PAGE_CFG_5_SCRAMBLE_EN_5_FIELD

#define FLASH_CTRL_BANK0_INFO0_PAGE_CFG_5_SCRAMBLE_EN_5_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK0_INFO0_PAGE_CFG_5_SCRAMBLE_EN_5_MASK, .index = FLASH_CTRL_BANK0_INFO0_PAGE_CFG_5_SCRAMBLE_EN_5_OFFSET })

Definition at line 879 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO0_PAGE_CFG_5_SCRAMBLE_EN_5_MASK

#define FLASH_CTRL_BANK0_INFO0_PAGE_CFG_5_SCRAMBLE_EN_5_MASK   0xfu

Definition at line 877 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO0_PAGE_CFG_5_SCRAMBLE_EN_5_OFFSET

#define FLASH_CTRL_BANK0_INFO0_PAGE_CFG_5_SCRAMBLE_EN_5_OFFSET   16

Definition at line 878 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO0_PAGE_CFG_6_ECC_EN_6_FIELD

#define FLASH_CTRL_BANK0_INFO0_PAGE_CFG_6_ECC_EN_6_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK0_INFO0_PAGE_CFG_6_ECC_EN_6_MASK, .index = FLASH_CTRL_BANK0_INFO0_PAGE_CFG_6_ECC_EN_6_OFFSET })

Definition at line 915 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO0_PAGE_CFG_6_ECC_EN_6_MASK

#define FLASH_CTRL_BANK0_INFO0_PAGE_CFG_6_ECC_EN_6_MASK   0xfu

Definition at line 913 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO0_PAGE_CFG_6_ECC_EN_6_OFFSET

#define FLASH_CTRL_BANK0_INFO0_PAGE_CFG_6_ECC_EN_6_OFFSET   20

Definition at line 914 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO0_PAGE_CFG_6_EN_6_FIELD

#define FLASH_CTRL_BANK0_INFO0_PAGE_CFG_6_EN_6_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK0_INFO0_PAGE_CFG_6_EN_6_MASK, .index = FLASH_CTRL_BANK0_INFO0_PAGE_CFG_6_EN_6_OFFSET })

Definition at line 895 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO0_PAGE_CFG_6_EN_6_MASK

#define FLASH_CTRL_BANK0_INFO0_PAGE_CFG_6_EN_6_MASK   0xfu

Definition at line 893 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO0_PAGE_CFG_6_EN_6_OFFSET

#define FLASH_CTRL_BANK0_INFO0_PAGE_CFG_6_EN_6_OFFSET   0

Definition at line 894 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO0_PAGE_CFG_6_ERASE_EN_6_FIELD

#define FLASH_CTRL_BANK0_INFO0_PAGE_CFG_6_ERASE_EN_6_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK0_INFO0_PAGE_CFG_6_ERASE_EN_6_MASK, .index = FLASH_CTRL_BANK0_INFO0_PAGE_CFG_6_ERASE_EN_6_OFFSET })

Definition at line 907 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO0_PAGE_CFG_6_ERASE_EN_6_MASK

#define FLASH_CTRL_BANK0_INFO0_PAGE_CFG_6_ERASE_EN_6_MASK   0xfu

Definition at line 905 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO0_PAGE_CFG_6_ERASE_EN_6_OFFSET

#define FLASH_CTRL_BANK0_INFO0_PAGE_CFG_6_ERASE_EN_6_OFFSET   12

Definition at line 906 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO0_PAGE_CFG_6_HE_EN_6_FIELD

#define FLASH_CTRL_BANK0_INFO0_PAGE_CFG_6_HE_EN_6_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK0_INFO0_PAGE_CFG_6_HE_EN_6_MASK, .index = FLASH_CTRL_BANK0_INFO0_PAGE_CFG_6_HE_EN_6_OFFSET })

Definition at line 919 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO0_PAGE_CFG_6_HE_EN_6_MASK

#define FLASH_CTRL_BANK0_INFO0_PAGE_CFG_6_HE_EN_6_MASK   0xfu

Definition at line 917 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO0_PAGE_CFG_6_HE_EN_6_OFFSET

#define FLASH_CTRL_BANK0_INFO0_PAGE_CFG_6_HE_EN_6_OFFSET   24

Definition at line 918 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO0_PAGE_CFG_6_PROG_EN_6_FIELD

#define FLASH_CTRL_BANK0_INFO0_PAGE_CFG_6_PROG_EN_6_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK0_INFO0_PAGE_CFG_6_PROG_EN_6_MASK, .index = FLASH_CTRL_BANK0_INFO0_PAGE_CFG_6_PROG_EN_6_OFFSET })

Definition at line 903 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO0_PAGE_CFG_6_PROG_EN_6_MASK

#define FLASH_CTRL_BANK0_INFO0_PAGE_CFG_6_PROG_EN_6_MASK   0xfu

Definition at line 901 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO0_PAGE_CFG_6_PROG_EN_6_OFFSET

#define FLASH_CTRL_BANK0_INFO0_PAGE_CFG_6_PROG_EN_6_OFFSET   8

Definition at line 902 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO0_PAGE_CFG_6_RD_EN_6_FIELD

#define FLASH_CTRL_BANK0_INFO0_PAGE_CFG_6_RD_EN_6_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK0_INFO0_PAGE_CFG_6_RD_EN_6_MASK, .index = FLASH_CTRL_BANK0_INFO0_PAGE_CFG_6_RD_EN_6_OFFSET })

Definition at line 899 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO0_PAGE_CFG_6_RD_EN_6_MASK

#define FLASH_CTRL_BANK0_INFO0_PAGE_CFG_6_RD_EN_6_MASK   0xfu

Definition at line 897 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO0_PAGE_CFG_6_RD_EN_6_OFFSET

#define FLASH_CTRL_BANK0_INFO0_PAGE_CFG_6_RD_EN_6_OFFSET   4

Definition at line 898 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO0_PAGE_CFG_6_REG_OFFSET

#define FLASH_CTRL_BANK0_INFO0_PAGE_CFG_6_REG_OFFSET   0xd4

Definition at line 891 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO0_PAGE_CFG_6_REG_RESVAL

#define FLASH_CTRL_BANK0_INFO0_PAGE_CFG_6_REG_RESVAL   0x9999999u

Definition at line 892 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO0_PAGE_CFG_6_SCRAMBLE_EN_6_FIELD

#define FLASH_CTRL_BANK0_INFO0_PAGE_CFG_6_SCRAMBLE_EN_6_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK0_INFO0_PAGE_CFG_6_SCRAMBLE_EN_6_MASK, .index = FLASH_CTRL_BANK0_INFO0_PAGE_CFG_6_SCRAMBLE_EN_6_OFFSET })

Definition at line 911 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO0_PAGE_CFG_6_SCRAMBLE_EN_6_MASK

#define FLASH_CTRL_BANK0_INFO0_PAGE_CFG_6_SCRAMBLE_EN_6_MASK   0xfu

Definition at line 909 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO0_PAGE_CFG_6_SCRAMBLE_EN_6_OFFSET

#define FLASH_CTRL_BANK0_INFO0_PAGE_CFG_6_SCRAMBLE_EN_6_OFFSET   16

Definition at line 910 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO0_PAGE_CFG_7_ECC_EN_7_FIELD

#define FLASH_CTRL_BANK0_INFO0_PAGE_CFG_7_ECC_EN_7_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK0_INFO0_PAGE_CFG_7_ECC_EN_7_MASK, .index = FLASH_CTRL_BANK0_INFO0_PAGE_CFG_7_ECC_EN_7_OFFSET })

Definition at line 947 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO0_PAGE_CFG_7_ECC_EN_7_MASK

#define FLASH_CTRL_BANK0_INFO0_PAGE_CFG_7_ECC_EN_7_MASK   0xfu

Definition at line 945 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO0_PAGE_CFG_7_ECC_EN_7_OFFSET

#define FLASH_CTRL_BANK0_INFO0_PAGE_CFG_7_ECC_EN_7_OFFSET   20

Definition at line 946 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO0_PAGE_CFG_7_EN_7_FIELD

#define FLASH_CTRL_BANK0_INFO0_PAGE_CFG_7_EN_7_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK0_INFO0_PAGE_CFG_7_EN_7_MASK, .index = FLASH_CTRL_BANK0_INFO0_PAGE_CFG_7_EN_7_OFFSET })

Definition at line 927 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO0_PAGE_CFG_7_EN_7_MASK

#define FLASH_CTRL_BANK0_INFO0_PAGE_CFG_7_EN_7_MASK   0xfu

Definition at line 925 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO0_PAGE_CFG_7_EN_7_OFFSET

#define FLASH_CTRL_BANK0_INFO0_PAGE_CFG_7_EN_7_OFFSET   0

Definition at line 926 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO0_PAGE_CFG_7_ERASE_EN_7_FIELD

#define FLASH_CTRL_BANK0_INFO0_PAGE_CFG_7_ERASE_EN_7_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK0_INFO0_PAGE_CFG_7_ERASE_EN_7_MASK, .index = FLASH_CTRL_BANK0_INFO0_PAGE_CFG_7_ERASE_EN_7_OFFSET })

Definition at line 939 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO0_PAGE_CFG_7_ERASE_EN_7_MASK

#define FLASH_CTRL_BANK0_INFO0_PAGE_CFG_7_ERASE_EN_7_MASK   0xfu

Definition at line 937 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO0_PAGE_CFG_7_ERASE_EN_7_OFFSET

#define FLASH_CTRL_BANK0_INFO0_PAGE_CFG_7_ERASE_EN_7_OFFSET   12

Definition at line 938 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO0_PAGE_CFG_7_HE_EN_7_FIELD

#define FLASH_CTRL_BANK0_INFO0_PAGE_CFG_7_HE_EN_7_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK0_INFO0_PAGE_CFG_7_HE_EN_7_MASK, .index = FLASH_CTRL_BANK0_INFO0_PAGE_CFG_7_HE_EN_7_OFFSET })

Definition at line 951 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO0_PAGE_CFG_7_HE_EN_7_MASK

#define FLASH_CTRL_BANK0_INFO0_PAGE_CFG_7_HE_EN_7_MASK   0xfu

Definition at line 949 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO0_PAGE_CFG_7_HE_EN_7_OFFSET

#define FLASH_CTRL_BANK0_INFO0_PAGE_CFG_7_HE_EN_7_OFFSET   24

Definition at line 950 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO0_PAGE_CFG_7_PROG_EN_7_FIELD

#define FLASH_CTRL_BANK0_INFO0_PAGE_CFG_7_PROG_EN_7_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK0_INFO0_PAGE_CFG_7_PROG_EN_7_MASK, .index = FLASH_CTRL_BANK0_INFO0_PAGE_CFG_7_PROG_EN_7_OFFSET })

Definition at line 935 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO0_PAGE_CFG_7_PROG_EN_7_MASK

#define FLASH_CTRL_BANK0_INFO0_PAGE_CFG_7_PROG_EN_7_MASK   0xfu

Definition at line 933 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO0_PAGE_CFG_7_PROG_EN_7_OFFSET

#define FLASH_CTRL_BANK0_INFO0_PAGE_CFG_7_PROG_EN_7_OFFSET   8

Definition at line 934 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO0_PAGE_CFG_7_RD_EN_7_FIELD

#define FLASH_CTRL_BANK0_INFO0_PAGE_CFG_7_RD_EN_7_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK0_INFO0_PAGE_CFG_7_RD_EN_7_MASK, .index = FLASH_CTRL_BANK0_INFO0_PAGE_CFG_7_RD_EN_7_OFFSET })

Definition at line 931 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO0_PAGE_CFG_7_RD_EN_7_MASK

#define FLASH_CTRL_BANK0_INFO0_PAGE_CFG_7_RD_EN_7_MASK   0xfu

Definition at line 929 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO0_PAGE_CFG_7_RD_EN_7_OFFSET

#define FLASH_CTRL_BANK0_INFO0_PAGE_CFG_7_RD_EN_7_OFFSET   4

Definition at line 930 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO0_PAGE_CFG_7_REG_OFFSET

#define FLASH_CTRL_BANK0_INFO0_PAGE_CFG_7_REG_OFFSET   0xd8

Definition at line 923 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO0_PAGE_CFG_7_REG_RESVAL

#define FLASH_CTRL_BANK0_INFO0_PAGE_CFG_7_REG_RESVAL   0x9999999u

Definition at line 924 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO0_PAGE_CFG_7_SCRAMBLE_EN_7_FIELD

#define FLASH_CTRL_BANK0_INFO0_PAGE_CFG_7_SCRAMBLE_EN_7_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK0_INFO0_PAGE_CFG_7_SCRAMBLE_EN_7_MASK, .index = FLASH_CTRL_BANK0_INFO0_PAGE_CFG_7_SCRAMBLE_EN_7_OFFSET })

Definition at line 943 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO0_PAGE_CFG_7_SCRAMBLE_EN_7_MASK

#define FLASH_CTRL_BANK0_INFO0_PAGE_CFG_7_SCRAMBLE_EN_7_MASK   0xfu

Definition at line 941 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO0_PAGE_CFG_7_SCRAMBLE_EN_7_OFFSET

#define FLASH_CTRL_BANK0_INFO0_PAGE_CFG_7_SCRAMBLE_EN_7_OFFSET   16

Definition at line 942 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO0_PAGE_CFG_8_ECC_EN_8_FIELD

#define FLASH_CTRL_BANK0_INFO0_PAGE_CFG_8_ECC_EN_8_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK0_INFO0_PAGE_CFG_8_ECC_EN_8_MASK, .index = FLASH_CTRL_BANK0_INFO0_PAGE_CFG_8_ECC_EN_8_OFFSET })

Definition at line 979 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO0_PAGE_CFG_8_ECC_EN_8_MASK

#define FLASH_CTRL_BANK0_INFO0_PAGE_CFG_8_ECC_EN_8_MASK   0xfu

Definition at line 977 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO0_PAGE_CFG_8_ECC_EN_8_OFFSET

#define FLASH_CTRL_BANK0_INFO0_PAGE_CFG_8_ECC_EN_8_OFFSET   20

Definition at line 978 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO0_PAGE_CFG_8_EN_8_FIELD

#define FLASH_CTRL_BANK0_INFO0_PAGE_CFG_8_EN_8_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK0_INFO0_PAGE_CFG_8_EN_8_MASK, .index = FLASH_CTRL_BANK0_INFO0_PAGE_CFG_8_EN_8_OFFSET })

Definition at line 959 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO0_PAGE_CFG_8_EN_8_MASK

#define FLASH_CTRL_BANK0_INFO0_PAGE_CFG_8_EN_8_MASK   0xfu

Definition at line 957 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO0_PAGE_CFG_8_EN_8_OFFSET

#define FLASH_CTRL_BANK0_INFO0_PAGE_CFG_8_EN_8_OFFSET   0

Definition at line 958 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO0_PAGE_CFG_8_ERASE_EN_8_FIELD

#define FLASH_CTRL_BANK0_INFO0_PAGE_CFG_8_ERASE_EN_8_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK0_INFO0_PAGE_CFG_8_ERASE_EN_8_MASK, .index = FLASH_CTRL_BANK0_INFO0_PAGE_CFG_8_ERASE_EN_8_OFFSET })

Definition at line 971 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO0_PAGE_CFG_8_ERASE_EN_8_MASK

#define FLASH_CTRL_BANK0_INFO0_PAGE_CFG_8_ERASE_EN_8_MASK   0xfu

Definition at line 969 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO0_PAGE_CFG_8_ERASE_EN_8_OFFSET

#define FLASH_CTRL_BANK0_INFO0_PAGE_CFG_8_ERASE_EN_8_OFFSET   12

Definition at line 970 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO0_PAGE_CFG_8_HE_EN_8_FIELD

#define FLASH_CTRL_BANK0_INFO0_PAGE_CFG_8_HE_EN_8_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK0_INFO0_PAGE_CFG_8_HE_EN_8_MASK, .index = FLASH_CTRL_BANK0_INFO0_PAGE_CFG_8_HE_EN_8_OFFSET })

Definition at line 983 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO0_PAGE_CFG_8_HE_EN_8_MASK

#define FLASH_CTRL_BANK0_INFO0_PAGE_CFG_8_HE_EN_8_MASK   0xfu

Definition at line 981 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO0_PAGE_CFG_8_HE_EN_8_OFFSET

#define FLASH_CTRL_BANK0_INFO0_PAGE_CFG_8_HE_EN_8_OFFSET   24

Definition at line 982 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO0_PAGE_CFG_8_PROG_EN_8_FIELD

#define FLASH_CTRL_BANK0_INFO0_PAGE_CFG_8_PROG_EN_8_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK0_INFO0_PAGE_CFG_8_PROG_EN_8_MASK, .index = FLASH_CTRL_BANK0_INFO0_PAGE_CFG_8_PROG_EN_8_OFFSET })

Definition at line 967 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO0_PAGE_CFG_8_PROG_EN_8_MASK

#define FLASH_CTRL_BANK0_INFO0_PAGE_CFG_8_PROG_EN_8_MASK   0xfu

Definition at line 965 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO0_PAGE_CFG_8_PROG_EN_8_OFFSET

#define FLASH_CTRL_BANK0_INFO0_PAGE_CFG_8_PROG_EN_8_OFFSET   8

Definition at line 966 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO0_PAGE_CFG_8_RD_EN_8_FIELD

#define FLASH_CTRL_BANK0_INFO0_PAGE_CFG_8_RD_EN_8_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK0_INFO0_PAGE_CFG_8_RD_EN_8_MASK, .index = FLASH_CTRL_BANK0_INFO0_PAGE_CFG_8_RD_EN_8_OFFSET })

Definition at line 963 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO0_PAGE_CFG_8_RD_EN_8_MASK

#define FLASH_CTRL_BANK0_INFO0_PAGE_CFG_8_RD_EN_8_MASK   0xfu

Definition at line 961 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO0_PAGE_CFG_8_RD_EN_8_OFFSET

#define FLASH_CTRL_BANK0_INFO0_PAGE_CFG_8_RD_EN_8_OFFSET   4

Definition at line 962 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO0_PAGE_CFG_8_REG_OFFSET

#define FLASH_CTRL_BANK0_INFO0_PAGE_CFG_8_REG_OFFSET   0xdc

Definition at line 955 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO0_PAGE_CFG_8_REG_RESVAL

#define FLASH_CTRL_BANK0_INFO0_PAGE_CFG_8_REG_RESVAL   0x9999999u

Definition at line 956 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO0_PAGE_CFG_8_SCRAMBLE_EN_8_FIELD

#define FLASH_CTRL_BANK0_INFO0_PAGE_CFG_8_SCRAMBLE_EN_8_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK0_INFO0_PAGE_CFG_8_SCRAMBLE_EN_8_MASK, .index = FLASH_CTRL_BANK0_INFO0_PAGE_CFG_8_SCRAMBLE_EN_8_OFFSET })

Definition at line 975 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO0_PAGE_CFG_8_SCRAMBLE_EN_8_MASK

#define FLASH_CTRL_BANK0_INFO0_PAGE_CFG_8_SCRAMBLE_EN_8_MASK   0xfu

Definition at line 973 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO0_PAGE_CFG_8_SCRAMBLE_EN_8_OFFSET

#define FLASH_CTRL_BANK0_INFO0_PAGE_CFG_8_SCRAMBLE_EN_8_OFFSET   16

Definition at line 974 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO0_PAGE_CFG_9_ECC_EN_9_FIELD

#define FLASH_CTRL_BANK0_INFO0_PAGE_CFG_9_ECC_EN_9_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK0_INFO0_PAGE_CFG_9_ECC_EN_9_MASK, .index = FLASH_CTRL_BANK0_INFO0_PAGE_CFG_9_ECC_EN_9_OFFSET })

Definition at line 1011 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO0_PAGE_CFG_9_ECC_EN_9_MASK

#define FLASH_CTRL_BANK0_INFO0_PAGE_CFG_9_ECC_EN_9_MASK   0xfu

Definition at line 1009 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO0_PAGE_CFG_9_ECC_EN_9_OFFSET

#define FLASH_CTRL_BANK0_INFO0_PAGE_CFG_9_ECC_EN_9_OFFSET   20

Definition at line 1010 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO0_PAGE_CFG_9_EN_9_FIELD

#define FLASH_CTRL_BANK0_INFO0_PAGE_CFG_9_EN_9_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK0_INFO0_PAGE_CFG_9_EN_9_MASK, .index = FLASH_CTRL_BANK0_INFO0_PAGE_CFG_9_EN_9_OFFSET })

Definition at line 991 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO0_PAGE_CFG_9_EN_9_MASK

#define FLASH_CTRL_BANK0_INFO0_PAGE_CFG_9_EN_9_MASK   0xfu

Definition at line 989 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO0_PAGE_CFG_9_EN_9_OFFSET

#define FLASH_CTRL_BANK0_INFO0_PAGE_CFG_9_EN_9_OFFSET   0

Definition at line 990 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO0_PAGE_CFG_9_ERASE_EN_9_FIELD

#define FLASH_CTRL_BANK0_INFO0_PAGE_CFG_9_ERASE_EN_9_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK0_INFO0_PAGE_CFG_9_ERASE_EN_9_MASK, .index = FLASH_CTRL_BANK0_INFO0_PAGE_CFG_9_ERASE_EN_9_OFFSET })

Definition at line 1003 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO0_PAGE_CFG_9_ERASE_EN_9_MASK

#define FLASH_CTRL_BANK0_INFO0_PAGE_CFG_9_ERASE_EN_9_MASK   0xfu

Definition at line 1001 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO0_PAGE_CFG_9_ERASE_EN_9_OFFSET

#define FLASH_CTRL_BANK0_INFO0_PAGE_CFG_9_ERASE_EN_9_OFFSET   12

Definition at line 1002 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO0_PAGE_CFG_9_HE_EN_9_FIELD

#define FLASH_CTRL_BANK0_INFO0_PAGE_CFG_9_HE_EN_9_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK0_INFO0_PAGE_CFG_9_HE_EN_9_MASK, .index = FLASH_CTRL_BANK0_INFO0_PAGE_CFG_9_HE_EN_9_OFFSET })

Definition at line 1015 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO0_PAGE_CFG_9_HE_EN_9_MASK

#define FLASH_CTRL_BANK0_INFO0_PAGE_CFG_9_HE_EN_9_MASK   0xfu

Definition at line 1013 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO0_PAGE_CFG_9_HE_EN_9_OFFSET

#define FLASH_CTRL_BANK0_INFO0_PAGE_CFG_9_HE_EN_9_OFFSET   24

Definition at line 1014 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO0_PAGE_CFG_9_PROG_EN_9_FIELD

#define FLASH_CTRL_BANK0_INFO0_PAGE_CFG_9_PROG_EN_9_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK0_INFO0_PAGE_CFG_9_PROG_EN_9_MASK, .index = FLASH_CTRL_BANK0_INFO0_PAGE_CFG_9_PROG_EN_9_OFFSET })

Definition at line 999 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO0_PAGE_CFG_9_PROG_EN_9_MASK

#define FLASH_CTRL_BANK0_INFO0_PAGE_CFG_9_PROG_EN_9_MASK   0xfu

Definition at line 997 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO0_PAGE_CFG_9_PROG_EN_9_OFFSET

#define FLASH_CTRL_BANK0_INFO0_PAGE_CFG_9_PROG_EN_9_OFFSET   8

Definition at line 998 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO0_PAGE_CFG_9_RD_EN_9_FIELD

#define FLASH_CTRL_BANK0_INFO0_PAGE_CFG_9_RD_EN_9_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK0_INFO0_PAGE_CFG_9_RD_EN_9_MASK, .index = FLASH_CTRL_BANK0_INFO0_PAGE_CFG_9_RD_EN_9_OFFSET })

Definition at line 995 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO0_PAGE_CFG_9_RD_EN_9_MASK

#define FLASH_CTRL_BANK0_INFO0_PAGE_CFG_9_RD_EN_9_MASK   0xfu

Definition at line 993 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO0_PAGE_CFG_9_RD_EN_9_OFFSET

#define FLASH_CTRL_BANK0_INFO0_PAGE_CFG_9_RD_EN_9_OFFSET   4

Definition at line 994 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO0_PAGE_CFG_9_REG_OFFSET

#define FLASH_CTRL_BANK0_INFO0_PAGE_CFG_9_REG_OFFSET   0xe0

Definition at line 987 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO0_PAGE_CFG_9_REG_RESVAL

#define FLASH_CTRL_BANK0_INFO0_PAGE_CFG_9_REG_RESVAL   0x9999999u

Definition at line 988 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO0_PAGE_CFG_9_SCRAMBLE_EN_9_FIELD

#define FLASH_CTRL_BANK0_INFO0_PAGE_CFG_9_SCRAMBLE_EN_9_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK0_INFO0_PAGE_CFG_9_SCRAMBLE_EN_9_MASK, .index = FLASH_CTRL_BANK0_INFO0_PAGE_CFG_9_SCRAMBLE_EN_9_OFFSET })

Definition at line 1007 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO0_PAGE_CFG_9_SCRAMBLE_EN_9_MASK

#define FLASH_CTRL_BANK0_INFO0_PAGE_CFG_9_SCRAMBLE_EN_9_MASK   0xfu

Definition at line 1005 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO0_PAGE_CFG_9_SCRAMBLE_EN_9_OFFSET

#define FLASH_CTRL_BANK0_INFO0_PAGE_CFG_9_SCRAMBLE_EN_9_OFFSET   16

Definition at line 1006 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO0_PAGE_CFG_ECC_EN_FIELD_WIDTH

#define FLASH_CTRL_BANK0_INFO0_PAGE_CFG_ECC_EN_FIELD_WIDTH   4

Definition at line 694 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO0_PAGE_CFG_EN_FIELD_WIDTH

#define FLASH_CTRL_BANK0_INFO0_PAGE_CFG_EN_FIELD_WIDTH   4

Definition at line 689 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO0_PAGE_CFG_ERASE_EN_FIELD_WIDTH

#define FLASH_CTRL_BANK0_INFO0_PAGE_CFG_ERASE_EN_FIELD_WIDTH   4

Definition at line 692 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO0_PAGE_CFG_HE_EN_FIELD_WIDTH

#define FLASH_CTRL_BANK0_INFO0_PAGE_CFG_HE_EN_FIELD_WIDTH   4

Definition at line 695 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO0_PAGE_CFG_MULTIREG_COUNT

#define FLASH_CTRL_BANK0_INFO0_PAGE_CFG_MULTIREG_COUNT   10

Definition at line 696 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO0_PAGE_CFG_PROG_EN_FIELD_WIDTH

#define FLASH_CTRL_BANK0_INFO0_PAGE_CFG_PROG_EN_FIELD_WIDTH   4

Definition at line 691 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO0_PAGE_CFG_RD_EN_FIELD_WIDTH

#define FLASH_CTRL_BANK0_INFO0_PAGE_CFG_RD_EN_FIELD_WIDTH   4

Definition at line 690 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO0_PAGE_CFG_SCRAMBLE_EN_FIELD_WIDTH

#define FLASH_CTRL_BANK0_INFO0_PAGE_CFG_SCRAMBLE_EN_FIELD_WIDTH   4

Definition at line 693 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO0_REGWEN_0_REG_OFFSET

#define FLASH_CTRL_BANK0_INFO0_REGWEN_0_REG_OFFSET   0x94

Definition at line 637 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO0_REGWEN_0_REG_RESVAL

#define FLASH_CTRL_BANK0_INFO0_REGWEN_0_REG_RESVAL   0x1u

Definition at line 638 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO0_REGWEN_0_REGION_0_BIT

#define FLASH_CTRL_BANK0_INFO0_REGWEN_0_REGION_0_BIT   0

Definition at line 639 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO0_REGWEN_0_REGION_0_VALUE_PAGE_ENABLED

#define FLASH_CTRL_BANK0_INFO0_REGWEN_0_REGION_0_VALUE_PAGE_ENABLED   0x1

Definition at line 641 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO0_REGWEN_0_REGION_0_VALUE_PAGE_LOCKED

#define FLASH_CTRL_BANK0_INFO0_REGWEN_0_REGION_0_VALUE_PAGE_LOCKED   0x0

Definition at line 640 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO0_REGWEN_1_REG_OFFSET

#define FLASH_CTRL_BANK0_INFO0_REGWEN_1_REG_OFFSET   0x98

Definition at line 644 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO0_REGWEN_1_REG_RESVAL

#define FLASH_CTRL_BANK0_INFO0_REGWEN_1_REG_RESVAL   0x1u

Definition at line 645 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO0_REGWEN_1_REGION_1_BIT

#define FLASH_CTRL_BANK0_INFO0_REGWEN_1_REGION_1_BIT   0

Definition at line 646 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO0_REGWEN_2_REG_OFFSET

#define FLASH_CTRL_BANK0_INFO0_REGWEN_2_REG_OFFSET   0x9c

Definition at line 649 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO0_REGWEN_2_REG_RESVAL

#define FLASH_CTRL_BANK0_INFO0_REGWEN_2_REG_RESVAL   0x1u

Definition at line 650 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO0_REGWEN_2_REGION_2_BIT

#define FLASH_CTRL_BANK0_INFO0_REGWEN_2_REGION_2_BIT   0

Definition at line 651 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO0_REGWEN_3_REG_OFFSET

#define FLASH_CTRL_BANK0_INFO0_REGWEN_3_REG_OFFSET   0xa0

Definition at line 654 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO0_REGWEN_3_REG_RESVAL

#define FLASH_CTRL_BANK0_INFO0_REGWEN_3_REG_RESVAL   0x1u

Definition at line 655 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO0_REGWEN_3_REGION_3_BIT

#define FLASH_CTRL_BANK0_INFO0_REGWEN_3_REGION_3_BIT   0

Definition at line 656 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO0_REGWEN_4_REG_OFFSET

#define FLASH_CTRL_BANK0_INFO0_REGWEN_4_REG_OFFSET   0xa4

Definition at line 659 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO0_REGWEN_4_REG_RESVAL

#define FLASH_CTRL_BANK0_INFO0_REGWEN_4_REG_RESVAL   0x1u

Definition at line 660 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO0_REGWEN_4_REGION_4_BIT

#define FLASH_CTRL_BANK0_INFO0_REGWEN_4_REGION_4_BIT   0

Definition at line 661 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO0_REGWEN_5_REG_OFFSET

#define FLASH_CTRL_BANK0_INFO0_REGWEN_5_REG_OFFSET   0xa8

Definition at line 664 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO0_REGWEN_5_REG_RESVAL

#define FLASH_CTRL_BANK0_INFO0_REGWEN_5_REG_RESVAL   0x1u

Definition at line 665 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO0_REGWEN_5_REGION_5_BIT

#define FLASH_CTRL_BANK0_INFO0_REGWEN_5_REGION_5_BIT   0

Definition at line 666 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO0_REGWEN_6_REG_OFFSET

#define FLASH_CTRL_BANK0_INFO0_REGWEN_6_REG_OFFSET   0xac

Definition at line 669 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO0_REGWEN_6_REG_RESVAL

#define FLASH_CTRL_BANK0_INFO0_REGWEN_6_REG_RESVAL   0x1u

Definition at line 670 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO0_REGWEN_6_REGION_6_BIT

#define FLASH_CTRL_BANK0_INFO0_REGWEN_6_REGION_6_BIT   0

Definition at line 671 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO0_REGWEN_7_REG_OFFSET

#define FLASH_CTRL_BANK0_INFO0_REGWEN_7_REG_OFFSET   0xb0

Definition at line 674 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO0_REGWEN_7_REG_RESVAL

#define FLASH_CTRL_BANK0_INFO0_REGWEN_7_REG_RESVAL   0x1u

Definition at line 675 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO0_REGWEN_7_REGION_7_BIT

#define FLASH_CTRL_BANK0_INFO0_REGWEN_7_REGION_7_BIT   0

Definition at line 676 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO0_REGWEN_8_REG_OFFSET

#define FLASH_CTRL_BANK0_INFO0_REGWEN_8_REG_OFFSET   0xb4

Definition at line 679 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO0_REGWEN_8_REG_RESVAL

#define FLASH_CTRL_BANK0_INFO0_REGWEN_8_REG_RESVAL   0x1u

Definition at line 680 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO0_REGWEN_8_REGION_8_BIT

#define FLASH_CTRL_BANK0_INFO0_REGWEN_8_REGION_8_BIT   0

Definition at line 681 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO0_REGWEN_9_REG_OFFSET

#define FLASH_CTRL_BANK0_INFO0_REGWEN_9_REG_OFFSET   0xb8

Definition at line 684 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO0_REGWEN_9_REG_RESVAL

#define FLASH_CTRL_BANK0_INFO0_REGWEN_9_REG_RESVAL   0x1u

Definition at line 685 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO0_REGWEN_9_REGION_9_BIT

#define FLASH_CTRL_BANK0_INFO0_REGWEN_9_REGION_9_BIT   0

Definition at line 686 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO0_REGWEN_MULTIREG_COUNT

#define FLASH_CTRL_BANK0_INFO0_REGWEN_MULTIREG_COUNT   10

Definition at line 634 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO0_REGWEN_REGION_FIELD_WIDTH

#define FLASH_CTRL_BANK0_INFO0_REGWEN_REGION_FIELD_WIDTH   1

Definition at line 633 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO1_PAGE_CFG_ECC_EN_0_FIELD

#define FLASH_CTRL_BANK0_INFO1_PAGE_CFG_ECC_EN_0_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK0_INFO1_PAGE_CFG_ECC_EN_0_MASK, .index = FLASH_CTRL_BANK0_INFO1_PAGE_CFG_ECC_EN_0_OFFSET })

Definition at line 1064 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO1_PAGE_CFG_ECC_EN_0_MASK

#define FLASH_CTRL_BANK0_INFO1_PAGE_CFG_ECC_EN_0_MASK   0xfu

Definition at line 1062 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO1_PAGE_CFG_ECC_EN_0_OFFSET

#define FLASH_CTRL_BANK0_INFO1_PAGE_CFG_ECC_EN_0_OFFSET   20

Definition at line 1063 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO1_PAGE_CFG_ECC_EN_FIELD_WIDTH

#define FLASH_CTRL_BANK0_INFO1_PAGE_CFG_ECC_EN_FIELD_WIDTH   4

Definition at line 1035 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO1_PAGE_CFG_EN_0_FIELD

#define FLASH_CTRL_BANK0_INFO1_PAGE_CFG_EN_0_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK0_INFO1_PAGE_CFG_EN_0_MASK, .index = FLASH_CTRL_BANK0_INFO1_PAGE_CFG_EN_0_OFFSET })

Definition at line 1044 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO1_PAGE_CFG_EN_0_MASK

#define FLASH_CTRL_BANK0_INFO1_PAGE_CFG_EN_0_MASK   0xfu

Definition at line 1042 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO1_PAGE_CFG_EN_0_OFFSET

#define FLASH_CTRL_BANK0_INFO1_PAGE_CFG_EN_0_OFFSET   0

Definition at line 1043 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO1_PAGE_CFG_EN_FIELD_WIDTH

#define FLASH_CTRL_BANK0_INFO1_PAGE_CFG_EN_FIELD_WIDTH   4

Definition at line 1030 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO1_PAGE_CFG_ERASE_EN_0_FIELD

#define FLASH_CTRL_BANK0_INFO1_PAGE_CFG_ERASE_EN_0_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK0_INFO1_PAGE_CFG_ERASE_EN_0_MASK, .index = FLASH_CTRL_BANK0_INFO1_PAGE_CFG_ERASE_EN_0_OFFSET })

Definition at line 1056 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO1_PAGE_CFG_ERASE_EN_0_MASK

#define FLASH_CTRL_BANK0_INFO1_PAGE_CFG_ERASE_EN_0_MASK   0xfu

Definition at line 1054 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO1_PAGE_CFG_ERASE_EN_0_OFFSET

#define FLASH_CTRL_BANK0_INFO1_PAGE_CFG_ERASE_EN_0_OFFSET   12

Definition at line 1055 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO1_PAGE_CFG_ERASE_EN_FIELD_WIDTH

#define FLASH_CTRL_BANK0_INFO1_PAGE_CFG_ERASE_EN_FIELD_WIDTH   4

Definition at line 1033 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO1_PAGE_CFG_HE_EN_0_FIELD

#define FLASH_CTRL_BANK0_INFO1_PAGE_CFG_HE_EN_0_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK0_INFO1_PAGE_CFG_HE_EN_0_MASK, .index = FLASH_CTRL_BANK0_INFO1_PAGE_CFG_HE_EN_0_OFFSET })

Definition at line 1068 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO1_PAGE_CFG_HE_EN_0_MASK

#define FLASH_CTRL_BANK0_INFO1_PAGE_CFG_HE_EN_0_MASK   0xfu

Definition at line 1066 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO1_PAGE_CFG_HE_EN_0_OFFSET

#define FLASH_CTRL_BANK0_INFO1_PAGE_CFG_HE_EN_0_OFFSET   24

Definition at line 1067 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO1_PAGE_CFG_HE_EN_FIELD_WIDTH

#define FLASH_CTRL_BANK0_INFO1_PAGE_CFG_HE_EN_FIELD_WIDTH   4

Definition at line 1036 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO1_PAGE_CFG_MULTIREG_COUNT

#define FLASH_CTRL_BANK0_INFO1_PAGE_CFG_MULTIREG_COUNT   1

Definition at line 1037 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO1_PAGE_CFG_PROG_EN_0_FIELD

#define FLASH_CTRL_BANK0_INFO1_PAGE_CFG_PROG_EN_0_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK0_INFO1_PAGE_CFG_PROG_EN_0_MASK, .index = FLASH_CTRL_BANK0_INFO1_PAGE_CFG_PROG_EN_0_OFFSET })

Definition at line 1052 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO1_PAGE_CFG_PROG_EN_0_MASK

#define FLASH_CTRL_BANK0_INFO1_PAGE_CFG_PROG_EN_0_MASK   0xfu

Definition at line 1050 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO1_PAGE_CFG_PROG_EN_0_OFFSET

#define FLASH_CTRL_BANK0_INFO1_PAGE_CFG_PROG_EN_0_OFFSET   8

Definition at line 1051 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO1_PAGE_CFG_PROG_EN_FIELD_WIDTH

#define FLASH_CTRL_BANK0_INFO1_PAGE_CFG_PROG_EN_FIELD_WIDTH   4

Definition at line 1032 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO1_PAGE_CFG_RD_EN_0_FIELD

#define FLASH_CTRL_BANK0_INFO1_PAGE_CFG_RD_EN_0_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK0_INFO1_PAGE_CFG_RD_EN_0_MASK, .index = FLASH_CTRL_BANK0_INFO1_PAGE_CFG_RD_EN_0_OFFSET })

Definition at line 1048 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO1_PAGE_CFG_RD_EN_0_MASK

#define FLASH_CTRL_BANK0_INFO1_PAGE_CFG_RD_EN_0_MASK   0xfu

Definition at line 1046 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO1_PAGE_CFG_RD_EN_0_OFFSET

#define FLASH_CTRL_BANK0_INFO1_PAGE_CFG_RD_EN_0_OFFSET   4

Definition at line 1047 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO1_PAGE_CFG_RD_EN_FIELD_WIDTH

#define FLASH_CTRL_BANK0_INFO1_PAGE_CFG_RD_EN_FIELD_WIDTH   4

Definition at line 1031 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO1_PAGE_CFG_REG_OFFSET

#define FLASH_CTRL_BANK0_INFO1_PAGE_CFG_REG_OFFSET   0xe8

Definition at line 1040 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO1_PAGE_CFG_REG_RESVAL

#define FLASH_CTRL_BANK0_INFO1_PAGE_CFG_REG_RESVAL   0x9999999u

Definition at line 1041 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO1_PAGE_CFG_SCRAMBLE_EN_0_FIELD

#define FLASH_CTRL_BANK0_INFO1_PAGE_CFG_SCRAMBLE_EN_0_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK0_INFO1_PAGE_CFG_SCRAMBLE_EN_0_MASK, .index = FLASH_CTRL_BANK0_INFO1_PAGE_CFG_SCRAMBLE_EN_0_OFFSET })

Definition at line 1060 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO1_PAGE_CFG_SCRAMBLE_EN_0_MASK

#define FLASH_CTRL_BANK0_INFO1_PAGE_CFG_SCRAMBLE_EN_0_MASK   0xfu

Definition at line 1058 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO1_PAGE_CFG_SCRAMBLE_EN_0_OFFSET

#define FLASH_CTRL_BANK0_INFO1_PAGE_CFG_SCRAMBLE_EN_0_OFFSET   16

Definition at line 1059 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO1_PAGE_CFG_SCRAMBLE_EN_FIELD_WIDTH

#define FLASH_CTRL_BANK0_INFO1_PAGE_CFG_SCRAMBLE_EN_FIELD_WIDTH   4

Definition at line 1034 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO1_REGWEN_MULTIREG_COUNT

#define FLASH_CTRL_BANK0_INFO1_REGWEN_MULTIREG_COUNT   1

Definition at line 1020 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO1_REGWEN_REG_OFFSET

#define FLASH_CTRL_BANK0_INFO1_REGWEN_REG_OFFSET   0xe4

Definition at line 1023 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO1_REGWEN_REG_RESVAL

#define FLASH_CTRL_BANK0_INFO1_REGWEN_REG_RESVAL   0x1u

Definition at line 1024 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO1_REGWEN_REGION_0_BIT

#define FLASH_CTRL_BANK0_INFO1_REGWEN_REGION_0_BIT   0

Definition at line 1025 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO1_REGWEN_REGION_0_VALUE_PAGE_ENABLED

#define FLASH_CTRL_BANK0_INFO1_REGWEN_REGION_0_VALUE_PAGE_ENABLED   0x1

Definition at line 1027 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO1_REGWEN_REGION_0_VALUE_PAGE_LOCKED

#define FLASH_CTRL_BANK0_INFO1_REGWEN_REGION_0_VALUE_PAGE_LOCKED   0x0

Definition at line 1026 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO1_REGWEN_REGION_FIELD_WIDTH

#define FLASH_CTRL_BANK0_INFO1_REGWEN_REGION_FIELD_WIDTH   1

Definition at line 1019 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO2_PAGE_CFG_0_ECC_EN_0_FIELD

#define FLASH_CTRL_BANK0_INFO2_PAGE_CFG_0_ECC_EN_0_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK0_INFO2_PAGE_CFG_0_ECC_EN_0_MASK, .index = FLASH_CTRL_BANK0_INFO2_PAGE_CFG_0_ECC_EN_0_OFFSET })

Definition at line 1122 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO2_PAGE_CFG_0_ECC_EN_0_MASK

#define FLASH_CTRL_BANK0_INFO2_PAGE_CFG_0_ECC_EN_0_MASK   0xfu

Definition at line 1120 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO2_PAGE_CFG_0_ECC_EN_0_OFFSET

#define FLASH_CTRL_BANK0_INFO2_PAGE_CFG_0_ECC_EN_0_OFFSET   20

Definition at line 1121 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO2_PAGE_CFG_0_EN_0_FIELD

#define FLASH_CTRL_BANK0_INFO2_PAGE_CFG_0_EN_0_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK0_INFO2_PAGE_CFG_0_EN_0_MASK, .index = FLASH_CTRL_BANK0_INFO2_PAGE_CFG_0_EN_0_OFFSET })

Definition at line 1102 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO2_PAGE_CFG_0_EN_0_MASK

#define FLASH_CTRL_BANK0_INFO2_PAGE_CFG_0_EN_0_MASK   0xfu

Definition at line 1100 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO2_PAGE_CFG_0_EN_0_OFFSET

#define FLASH_CTRL_BANK0_INFO2_PAGE_CFG_0_EN_0_OFFSET   0

Definition at line 1101 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO2_PAGE_CFG_0_ERASE_EN_0_FIELD

#define FLASH_CTRL_BANK0_INFO2_PAGE_CFG_0_ERASE_EN_0_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK0_INFO2_PAGE_CFG_0_ERASE_EN_0_MASK, .index = FLASH_CTRL_BANK0_INFO2_PAGE_CFG_0_ERASE_EN_0_OFFSET })

Definition at line 1114 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO2_PAGE_CFG_0_ERASE_EN_0_MASK

#define FLASH_CTRL_BANK0_INFO2_PAGE_CFG_0_ERASE_EN_0_MASK   0xfu

Definition at line 1112 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO2_PAGE_CFG_0_ERASE_EN_0_OFFSET

#define FLASH_CTRL_BANK0_INFO2_PAGE_CFG_0_ERASE_EN_0_OFFSET   12

Definition at line 1113 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO2_PAGE_CFG_0_HE_EN_0_FIELD

#define FLASH_CTRL_BANK0_INFO2_PAGE_CFG_0_HE_EN_0_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK0_INFO2_PAGE_CFG_0_HE_EN_0_MASK, .index = FLASH_CTRL_BANK0_INFO2_PAGE_CFG_0_HE_EN_0_OFFSET })

Definition at line 1126 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO2_PAGE_CFG_0_HE_EN_0_MASK

#define FLASH_CTRL_BANK0_INFO2_PAGE_CFG_0_HE_EN_0_MASK   0xfu

Definition at line 1124 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO2_PAGE_CFG_0_HE_EN_0_OFFSET

#define FLASH_CTRL_BANK0_INFO2_PAGE_CFG_0_HE_EN_0_OFFSET   24

Definition at line 1125 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO2_PAGE_CFG_0_PROG_EN_0_FIELD

#define FLASH_CTRL_BANK0_INFO2_PAGE_CFG_0_PROG_EN_0_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK0_INFO2_PAGE_CFG_0_PROG_EN_0_MASK, .index = FLASH_CTRL_BANK0_INFO2_PAGE_CFG_0_PROG_EN_0_OFFSET })

Definition at line 1110 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO2_PAGE_CFG_0_PROG_EN_0_MASK

#define FLASH_CTRL_BANK0_INFO2_PAGE_CFG_0_PROG_EN_0_MASK   0xfu

Definition at line 1108 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO2_PAGE_CFG_0_PROG_EN_0_OFFSET

#define FLASH_CTRL_BANK0_INFO2_PAGE_CFG_0_PROG_EN_0_OFFSET   8

Definition at line 1109 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO2_PAGE_CFG_0_RD_EN_0_FIELD

#define FLASH_CTRL_BANK0_INFO2_PAGE_CFG_0_RD_EN_0_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK0_INFO2_PAGE_CFG_0_RD_EN_0_MASK, .index = FLASH_CTRL_BANK0_INFO2_PAGE_CFG_0_RD_EN_0_OFFSET })

Definition at line 1106 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO2_PAGE_CFG_0_RD_EN_0_MASK

#define FLASH_CTRL_BANK0_INFO2_PAGE_CFG_0_RD_EN_0_MASK   0xfu

Definition at line 1104 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO2_PAGE_CFG_0_RD_EN_0_OFFSET

#define FLASH_CTRL_BANK0_INFO2_PAGE_CFG_0_RD_EN_0_OFFSET   4

Definition at line 1105 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO2_PAGE_CFG_0_REG_OFFSET

#define FLASH_CTRL_BANK0_INFO2_PAGE_CFG_0_REG_OFFSET   0xf4

Definition at line 1098 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO2_PAGE_CFG_0_REG_RESVAL

#define FLASH_CTRL_BANK0_INFO2_PAGE_CFG_0_REG_RESVAL   0x9999999u

Definition at line 1099 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO2_PAGE_CFG_0_SCRAMBLE_EN_0_FIELD

#define FLASH_CTRL_BANK0_INFO2_PAGE_CFG_0_SCRAMBLE_EN_0_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK0_INFO2_PAGE_CFG_0_SCRAMBLE_EN_0_MASK, .index = FLASH_CTRL_BANK0_INFO2_PAGE_CFG_0_SCRAMBLE_EN_0_OFFSET })

Definition at line 1118 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO2_PAGE_CFG_0_SCRAMBLE_EN_0_MASK

#define FLASH_CTRL_BANK0_INFO2_PAGE_CFG_0_SCRAMBLE_EN_0_MASK   0xfu

Definition at line 1116 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO2_PAGE_CFG_0_SCRAMBLE_EN_0_OFFSET

#define FLASH_CTRL_BANK0_INFO2_PAGE_CFG_0_SCRAMBLE_EN_0_OFFSET   16

Definition at line 1117 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO2_PAGE_CFG_1_ECC_EN_1_FIELD

#define FLASH_CTRL_BANK0_INFO2_PAGE_CFG_1_ECC_EN_1_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK0_INFO2_PAGE_CFG_1_ECC_EN_1_MASK, .index = FLASH_CTRL_BANK0_INFO2_PAGE_CFG_1_ECC_EN_1_OFFSET })

Definition at line 1154 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO2_PAGE_CFG_1_ECC_EN_1_MASK

#define FLASH_CTRL_BANK0_INFO2_PAGE_CFG_1_ECC_EN_1_MASK   0xfu

Definition at line 1152 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO2_PAGE_CFG_1_ECC_EN_1_OFFSET

#define FLASH_CTRL_BANK0_INFO2_PAGE_CFG_1_ECC_EN_1_OFFSET   20

Definition at line 1153 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO2_PAGE_CFG_1_EN_1_FIELD

#define FLASH_CTRL_BANK0_INFO2_PAGE_CFG_1_EN_1_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK0_INFO2_PAGE_CFG_1_EN_1_MASK, .index = FLASH_CTRL_BANK0_INFO2_PAGE_CFG_1_EN_1_OFFSET })

Definition at line 1134 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO2_PAGE_CFG_1_EN_1_MASK

#define FLASH_CTRL_BANK0_INFO2_PAGE_CFG_1_EN_1_MASK   0xfu

Definition at line 1132 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO2_PAGE_CFG_1_EN_1_OFFSET

#define FLASH_CTRL_BANK0_INFO2_PAGE_CFG_1_EN_1_OFFSET   0

Definition at line 1133 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO2_PAGE_CFG_1_ERASE_EN_1_FIELD

#define FLASH_CTRL_BANK0_INFO2_PAGE_CFG_1_ERASE_EN_1_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK0_INFO2_PAGE_CFG_1_ERASE_EN_1_MASK, .index = FLASH_CTRL_BANK0_INFO2_PAGE_CFG_1_ERASE_EN_1_OFFSET })

Definition at line 1146 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO2_PAGE_CFG_1_ERASE_EN_1_MASK

#define FLASH_CTRL_BANK0_INFO2_PAGE_CFG_1_ERASE_EN_1_MASK   0xfu

Definition at line 1144 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO2_PAGE_CFG_1_ERASE_EN_1_OFFSET

#define FLASH_CTRL_BANK0_INFO2_PAGE_CFG_1_ERASE_EN_1_OFFSET   12

Definition at line 1145 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO2_PAGE_CFG_1_HE_EN_1_FIELD

#define FLASH_CTRL_BANK0_INFO2_PAGE_CFG_1_HE_EN_1_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK0_INFO2_PAGE_CFG_1_HE_EN_1_MASK, .index = FLASH_CTRL_BANK0_INFO2_PAGE_CFG_1_HE_EN_1_OFFSET })

Definition at line 1158 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO2_PAGE_CFG_1_HE_EN_1_MASK

#define FLASH_CTRL_BANK0_INFO2_PAGE_CFG_1_HE_EN_1_MASK   0xfu

Definition at line 1156 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO2_PAGE_CFG_1_HE_EN_1_OFFSET

#define FLASH_CTRL_BANK0_INFO2_PAGE_CFG_1_HE_EN_1_OFFSET   24

Definition at line 1157 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO2_PAGE_CFG_1_PROG_EN_1_FIELD

#define FLASH_CTRL_BANK0_INFO2_PAGE_CFG_1_PROG_EN_1_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK0_INFO2_PAGE_CFG_1_PROG_EN_1_MASK, .index = FLASH_CTRL_BANK0_INFO2_PAGE_CFG_1_PROG_EN_1_OFFSET })

Definition at line 1142 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO2_PAGE_CFG_1_PROG_EN_1_MASK

#define FLASH_CTRL_BANK0_INFO2_PAGE_CFG_1_PROG_EN_1_MASK   0xfu

Definition at line 1140 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO2_PAGE_CFG_1_PROG_EN_1_OFFSET

#define FLASH_CTRL_BANK0_INFO2_PAGE_CFG_1_PROG_EN_1_OFFSET   8

Definition at line 1141 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO2_PAGE_CFG_1_RD_EN_1_FIELD

#define FLASH_CTRL_BANK0_INFO2_PAGE_CFG_1_RD_EN_1_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK0_INFO2_PAGE_CFG_1_RD_EN_1_MASK, .index = FLASH_CTRL_BANK0_INFO2_PAGE_CFG_1_RD_EN_1_OFFSET })

Definition at line 1138 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO2_PAGE_CFG_1_RD_EN_1_MASK

#define FLASH_CTRL_BANK0_INFO2_PAGE_CFG_1_RD_EN_1_MASK   0xfu

Definition at line 1136 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO2_PAGE_CFG_1_RD_EN_1_OFFSET

#define FLASH_CTRL_BANK0_INFO2_PAGE_CFG_1_RD_EN_1_OFFSET   4

Definition at line 1137 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO2_PAGE_CFG_1_REG_OFFSET

#define FLASH_CTRL_BANK0_INFO2_PAGE_CFG_1_REG_OFFSET   0xf8

Definition at line 1130 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO2_PAGE_CFG_1_REG_RESVAL

#define FLASH_CTRL_BANK0_INFO2_PAGE_CFG_1_REG_RESVAL   0x9999999u

Definition at line 1131 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO2_PAGE_CFG_1_SCRAMBLE_EN_1_FIELD

#define FLASH_CTRL_BANK0_INFO2_PAGE_CFG_1_SCRAMBLE_EN_1_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK0_INFO2_PAGE_CFG_1_SCRAMBLE_EN_1_MASK, .index = FLASH_CTRL_BANK0_INFO2_PAGE_CFG_1_SCRAMBLE_EN_1_OFFSET })

Definition at line 1150 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO2_PAGE_CFG_1_SCRAMBLE_EN_1_MASK

#define FLASH_CTRL_BANK0_INFO2_PAGE_CFG_1_SCRAMBLE_EN_1_MASK   0xfu

Definition at line 1148 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO2_PAGE_CFG_1_SCRAMBLE_EN_1_OFFSET

#define FLASH_CTRL_BANK0_INFO2_PAGE_CFG_1_SCRAMBLE_EN_1_OFFSET   16

Definition at line 1149 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO2_PAGE_CFG_ECC_EN_FIELD_WIDTH

#define FLASH_CTRL_BANK0_INFO2_PAGE_CFG_ECC_EN_FIELD_WIDTH   4

Definition at line 1093 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO2_PAGE_CFG_EN_FIELD_WIDTH

#define FLASH_CTRL_BANK0_INFO2_PAGE_CFG_EN_FIELD_WIDTH   4

Definition at line 1088 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO2_PAGE_CFG_ERASE_EN_FIELD_WIDTH

#define FLASH_CTRL_BANK0_INFO2_PAGE_CFG_ERASE_EN_FIELD_WIDTH   4

Definition at line 1091 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO2_PAGE_CFG_HE_EN_FIELD_WIDTH

#define FLASH_CTRL_BANK0_INFO2_PAGE_CFG_HE_EN_FIELD_WIDTH   4

Definition at line 1094 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO2_PAGE_CFG_MULTIREG_COUNT

#define FLASH_CTRL_BANK0_INFO2_PAGE_CFG_MULTIREG_COUNT   2

Definition at line 1095 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO2_PAGE_CFG_PROG_EN_FIELD_WIDTH

#define FLASH_CTRL_BANK0_INFO2_PAGE_CFG_PROG_EN_FIELD_WIDTH   4

Definition at line 1090 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO2_PAGE_CFG_RD_EN_FIELD_WIDTH

#define FLASH_CTRL_BANK0_INFO2_PAGE_CFG_RD_EN_FIELD_WIDTH   4

Definition at line 1089 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO2_PAGE_CFG_SCRAMBLE_EN_FIELD_WIDTH

#define FLASH_CTRL_BANK0_INFO2_PAGE_CFG_SCRAMBLE_EN_FIELD_WIDTH   4

Definition at line 1092 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO2_REGWEN_0_REG_OFFSET

#define FLASH_CTRL_BANK0_INFO2_REGWEN_0_REG_OFFSET   0xec

Definition at line 1076 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO2_REGWEN_0_REG_RESVAL

#define FLASH_CTRL_BANK0_INFO2_REGWEN_0_REG_RESVAL   0x1u

Definition at line 1077 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO2_REGWEN_0_REGION_0_BIT

#define FLASH_CTRL_BANK0_INFO2_REGWEN_0_REGION_0_BIT   0

Definition at line 1078 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO2_REGWEN_0_REGION_0_VALUE_PAGE_ENABLED

#define FLASH_CTRL_BANK0_INFO2_REGWEN_0_REGION_0_VALUE_PAGE_ENABLED   0x1

Definition at line 1080 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO2_REGWEN_0_REGION_0_VALUE_PAGE_LOCKED

#define FLASH_CTRL_BANK0_INFO2_REGWEN_0_REGION_0_VALUE_PAGE_LOCKED   0x0

Definition at line 1079 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO2_REGWEN_1_REG_OFFSET

#define FLASH_CTRL_BANK0_INFO2_REGWEN_1_REG_OFFSET   0xf0

Definition at line 1083 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO2_REGWEN_1_REG_RESVAL

#define FLASH_CTRL_BANK0_INFO2_REGWEN_1_REG_RESVAL   0x1u

Definition at line 1084 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO2_REGWEN_1_REGION_1_BIT

#define FLASH_CTRL_BANK0_INFO2_REGWEN_1_REGION_1_BIT   0

Definition at line 1085 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO2_REGWEN_MULTIREG_COUNT

#define FLASH_CTRL_BANK0_INFO2_REGWEN_MULTIREG_COUNT   2

Definition at line 1073 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK0_INFO2_REGWEN_REGION_FIELD_WIDTH

#define FLASH_CTRL_BANK0_INFO2_REGWEN_REGION_FIELD_WIDTH   1

Definition at line 1072 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO0_PAGE_CFG_0_ECC_EN_0_FIELD

#define FLASH_CTRL_BANK1_INFO0_PAGE_CFG_0_ECC_EN_0_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK1_INFO0_PAGE_CFG_0_ECC_EN_0_MASK, .index = FLASH_CTRL_BANK1_INFO0_PAGE_CFG_0_ECC_EN_0_OFFSET })

Definition at line 1252 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO0_PAGE_CFG_0_ECC_EN_0_MASK

#define FLASH_CTRL_BANK1_INFO0_PAGE_CFG_0_ECC_EN_0_MASK   0xfu

Definition at line 1250 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO0_PAGE_CFG_0_ECC_EN_0_OFFSET

#define FLASH_CTRL_BANK1_INFO0_PAGE_CFG_0_ECC_EN_0_OFFSET   20

Definition at line 1251 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO0_PAGE_CFG_0_EN_0_FIELD

#define FLASH_CTRL_BANK1_INFO0_PAGE_CFG_0_EN_0_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK1_INFO0_PAGE_CFG_0_EN_0_MASK, .index = FLASH_CTRL_BANK1_INFO0_PAGE_CFG_0_EN_0_OFFSET })

Definition at line 1232 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO0_PAGE_CFG_0_EN_0_MASK

#define FLASH_CTRL_BANK1_INFO0_PAGE_CFG_0_EN_0_MASK   0xfu

Definition at line 1230 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO0_PAGE_CFG_0_EN_0_OFFSET

#define FLASH_CTRL_BANK1_INFO0_PAGE_CFG_0_EN_0_OFFSET   0

Definition at line 1231 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO0_PAGE_CFG_0_ERASE_EN_0_FIELD

#define FLASH_CTRL_BANK1_INFO0_PAGE_CFG_0_ERASE_EN_0_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK1_INFO0_PAGE_CFG_0_ERASE_EN_0_MASK, .index = FLASH_CTRL_BANK1_INFO0_PAGE_CFG_0_ERASE_EN_0_OFFSET })

Definition at line 1244 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO0_PAGE_CFG_0_ERASE_EN_0_MASK

#define FLASH_CTRL_BANK1_INFO0_PAGE_CFG_0_ERASE_EN_0_MASK   0xfu

Definition at line 1242 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO0_PAGE_CFG_0_ERASE_EN_0_OFFSET

#define FLASH_CTRL_BANK1_INFO0_PAGE_CFG_0_ERASE_EN_0_OFFSET   12

Definition at line 1243 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO0_PAGE_CFG_0_HE_EN_0_FIELD

#define FLASH_CTRL_BANK1_INFO0_PAGE_CFG_0_HE_EN_0_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK1_INFO0_PAGE_CFG_0_HE_EN_0_MASK, .index = FLASH_CTRL_BANK1_INFO0_PAGE_CFG_0_HE_EN_0_OFFSET })

Definition at line 1256 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO0_PAGE_CFG_0_HE_EN_0_MASK

#define FLASH_CTRL_BANK1_INFO0_PAGE_CFG_0_HE_EN_0_MASK   0xfu

Definition at line 1254 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO0_PAGE_CFG_0_HE_EN_0_OFFSET

#define FLASH_CTRL_BANK1_INFO0_PAGE_CFG_0_HE_EN_0_OFFSET   24

Definition at line 1255 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO0_PAGE_CFG_0_PROG_EN_0_FIELD

#define FLASH_CTRL_BANK1_INFO0_PAGE_CFG_0_PROG_EN_0_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK1_INFO0_PAGE_CFG_0_PROG_EN_0_MASK, .index = FLASH_CTRL_BANK1_INFO0_PAGE_CFG_0_PROG_EN_0_OFFSET })

Definition at line 1240 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO0_PAGE_CFG_0_PROG_EN_0_MASK

#define FLASH_CTRL_BANK1_INFO0_PAGE_CFG_0_PROG_EN_0_MASK   0xfu

Definition at line 1238 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO0_PAGE_CFG_0_PROG_EN_0_OFFSET

#define FLASH_CTRL_BANK1_INFO0_PAGE_CFG_0_PROG_EN_0_OFFSET   8

Definition at line 1239 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO0_PAGE_CFG_0_RD_EN_0_FIELD

#define FLASH_CTRL_BANK1_INFO0_PAGE_CFG_0_RD_EN_0_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK1_INFO0_PAGE_CFG_0_RD_EN_0_MASK, .index = FLASH_CTRL_BANK1_INFO0_PAGE_CFG_0_RD_EN_0_OFFSET })

Definition at line 1236 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO0_PAGE_CFG_0_RD_EN_0_MASK

#define FLASH_CTRL_BANK1_INFO0_PAGE_CFG_0_RD_EN_0_MASK   0xfu

Definition at line 1234 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO0_PAGE_CFG_0_RD_EN_0_OFFSET

#define FLASH_CTRL_BANK1_INFO0_PAGE_CFG_0_RD_EN_0_OFFSET   4

Definition at line 1235 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO0_PAGE_CFG_0_REG_OFFSET

#define FLASH_CTRL_BANK1_INFO0_PAGE_CFG_0_REG_OFFSET   0x124

Definition at line 1228 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO0_PAGE_CFG_0_REG_RESVAL

#define FLASH_CTRL_BANK1_INFO0_PAGE_CFG_0_REG_RESVAL   0x9999999u

Definition at line 1229 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO0_PAGE_CFG_0_SCRAMBLE_EN_0_FIELD

#define FLASH_CTRL_BANK1_INFO0_PAGE_CFG_0_SCRAMBLE_EN_0_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK1_INFO0_PAGE_CFG_0_SCRAMBLE_EN_0_MASK, .index = FLASH_CTRL_BANK1_INFO0_PAGE_CFG_0_SCRAMBLE_EN_0_OFFSET })

Definition at line 1248 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO0_PAGE_CFG_0_SCRAMBLE_EN_0_MASK

#define FLASH_CTRL_BANK1_INFO0_PAGE_CFG_0_SCRAMBLE_EN_0_MASK   0xfu

Definition at line 1246 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO0_PAGE_CFG_0_SCRAMBLE_EN_0_OFFSET

#define FLASH_CTRL_BANK1_INFO0_PAGE_CFG_0_SCRAMBLE_EN_0_OFFSET   16

Definition at line 1247 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO0_PAGE_CFG_1_ECC_EN_1_FIELD

#define FLASH_CTRL_BANK1_INFO0_PAGE_CFG_1_ECC_EN_1_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK1_INFO0_PAGE_CFG_1_ECC_EN_1_MASK, .index = FLASH_CTRL_BANK1_INFO0_PAGE_CFG_1_ECC_EN_1_OFFSET })

Definition at line 1284 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO0_PAGE_CFG_1_ECC_EN_1_MASK

#define FLASH_CTRL_BANK1_INFO0_PAGE_CFG_1_ECC_EN_1_MASK   0xfu

Definition at line 1282 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO0_PAGE_CFG_1_ECC_EN_1_OFFSET

#define FLASH_CTRL_BANK1_INFO0_PAGE_CFG_1_ECC_EN_1_OFFSET   20

Definition at line 1283 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO0_PAGE_CFG_1_EN_1_FIELD

#define FLASH_CTRL_BANK1_INFO0_PAGE_CFG_1_EN_1_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK1_INFO0_PAGE_CFG_1_EN_1_MASK, .index = FLASH_CTRL_BANK1_INFO0_PAGE_CFG_1_EN_1_OFFSET })

Definition at line 1264 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO0_PAGE_CFG_1_EN_1_MASK

#define FLASH_CTRL_BANK1_INFO0_PAGE_CFG_1_EN_1_MASK   0xfu

Definition at line 1262 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO0_PAGE_CFG_1_EN_1_OFFSET

#define FLASH_CTRL_BANK1_INFO0_PAGE_CFG_1_EN_1_OFFSET   0

Definition at line 1263 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO0_PAGE_CFG_1_ERASE_EN_1_FIELD

#define FLASH_CTRL_BANK1_INFO0_PAGE_CFG_1_ERASE_EN_1_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK1_INFO0_PAGE_CFG_1_ERASE_EN_1_MASK, .index = FLASH_CTRL_BANK1_INFO0_PAGE_CFG_1_ERASE_EN_1_OFFSET })

Definition at line 1276 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO0_PAGE_CFG_1_ERASE_EN_1_MASK

#define FLASH_CTRL_BANK1_INFO0_PAGE_CFG_1_ERASE_EN_1_MASK   0xfu

Definition at line 1274 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO0_PAGE_CFG_1_ERASE_EN_1_OFFSET

#define FLASH_CTRL_BANK1_INFO0_PAGE_CFG_1_ERASE_EN_1_OFFSET   12

Definition at line 1275 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO0_PAGE_CFG_1_HE_EN_1_FIELD

#define FLASH_CTRL_BANK1_INFO0_PAGE_CFG_1_HE_EN_1_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK1_INFO0_PAGE_CFG_1_HE_EN_1_MASK, .index = FLASH_CTRL_BANK1_INFO0_PAGE_CFG_1_HE_EN_1_OFFSET })

Definition at line 1288 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO0_PAGE_CFG_1_HE_EN_1_MASK

#define FLASH_CTRL_BANK1_INFO0_PAGE_CFG_1_HE_EN_1_MASK   0xfu

Definition at line 1286 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO0_PAGE_CFG_1_HE_EN_1_OFFSET

#define FLASH_CTRL_BANK1_INFO0_PAGE_CFG_1_HE_EN_1_OFFSET   24

Definition at line 1287 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO0_PAGE_CFG_1_PROG_EN_1_FIELD

#define FLASH_CTRL_BANK1_INFO0_PAGE_CFG_1_PROG_EN_1_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK1_INFO0_PAGE_CFG_1_PROG_EN_1_MASK, .index = FLASH_CTRL_BANK1_INFO0_PAGE_CFG_1_PROG_EN_1_OFFSET })

Definition at line 1272 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO0_PAGE_CFG_1_PROG_EN_1_MASK

#define FLASH_CTRL_BANK1_INFO0_PAGE_CFG_1_PROG_EN_1_MASK   0xfu

Definition at line 1270 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO0_PAGE_CFG_1_PROG_EN_1_OFFSET

#define FLASH_CTRL_BANK1_INFO0_PAGE_CFG_1_PROG_EN_1_OFFSET   8

Definition at line 1271 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO0_PAGE_CFG_1_RD_EN_1_FIELD

#define FLASH_CTRL_BANK1_INFO0_PAGE_CFG_1_RD_EN_1_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK1_INFO0_PAGE_CFG_1_RD_EN_1_MASK, .index = FLASH_CTRL_BANK1_INFO0_PAGE_CFG_1_RD_EN_1_OFFSET })

Definition at line 1268 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO0_PAGE_CFG_1_RD_EN_1_MASK

#define FLASH_CTRL_BANK1_INFO0_PAGE_CFG_1_RD_EN_1_MASK   0xfu

Definition at line 1266 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO0_PAGE_CFG_1_RD_EN_1_OFFSET

#define FLASH_CTRL_BANK1_INFO0_PAGE_CFG_1_RD_EN_1_OFFSET   4

Definition at line 1267 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO0_PAGE_CFG_1_REG_OFFSET

#define FLASH_CTRL_BANK1_INFO0_PAGE_CFG_1_REG_OFFSET   0x128

Definition at line 1260 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO0_PAGE_CFG_1_REG_RESVAL

#define FLASH_CTRL_BANK1_INFO0_PAGE_CFG_1_REG_RESVAL   0x9999999u

Definition at line 1261 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO0_PAGE_CFG_1_SCRAMBLE_EN_1_FIELD

#define FLASH_CTRL_BANK1_INFO0_PAGE_CFG_1_SCRAMBLE_EN_1_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK1_INFO0_PAGE_CFG_1_SCRAMBLE_EN_1_MASK, .index = FLASH_CTRL_BANK1_INFO0_PAGE_CFG_1_SCRAMBLE_EN_1_OFFSET })

Definition at line 1280 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO0_PAGE_CFG_1_SCRAMBLE_EN_1_MASK

#define FLASH_CTRL_BANK1_INFO0_PAGE_CFG_1_SCRAMBLE_EN_1_MASK   0xfu

Definition at line 1278 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO0_PAGE_CFG_1_SCRAMBLE_EN_1_OFFSET

#define FLASH_CTRL_BANK1_INFO0_PAGE_CFG_1_SCRAMBLE_EN_1_OFFSET   16

Definition at line 1279 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO0_PAGE_CFG_2_ECC_EN_2_FIELD

#define FLASH_CTRL_BANK1_INFO0_PAGE_CFG_2_ECC_EN_2_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK1_INFO0_PAGE_CFG_2_ECC_EN_2_MASK, .index = FLASH_CTRL_BANK1_INFO0_PAGE_CFG_2_ECC_EN_2_OFFSET })

Definition at line 1316 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO0_PAGE_CFG_2_ECC_EN_2_MASK

#define FLASH_CTRL_BANK1_INFO0_PAGE_CFG_2_ECC_EN_2_MASK   0xfu

Definition at line 1314 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO0_PAGE_CFG_2_ECC_EN_2_OFFSET

#define FLASH_CTRL_BANK1_INFO0_PAGE_CFG_2_ECC_EN_2_OFFSET   20

Definition at line 1315 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO0_PAGE_CFG_2_EN_2_FIELD

#define FLASH_CTRL_BANK1_INFO0_PAGE_CFG_2_EN_2_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK1_INFO0_PAGE_CFG_2_EN_2_MASK, .index = FLASH_CTRL_BANK1_INFO0_PAGE_CFG_2_EN_2_OFFSET })

Definition at line 1296 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO0_PAGE_CFG_2_EN_2_MASK

#define FLASH_CTRL_BANK1_INFO0_PAGE_CFG_2_EN_2_MASK   0xfu

Definition at line 1294 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO0_PAGE_CFG_2_EN_2_OFFSET

#define FLASH_CTRL_BANK1_INFO0_PAGE_CFG_2_EN_2_OFFSET   0

Definition at line 1295 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO0_PAGE_CFG_2_ERASE_EN_2_FIELD

#define FLASH_CTRL_BANK1_INFO0_PAGE_CFG_2_ERASE_EN_2_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK1_INFO0_PAGE_CFG_2_ERASE_EN_2_MASK, .index = FLASH_CTRL_BANK1_INFO0_PAGE_CFG_2_ERASE_EN_2_OFFSET })

Definition at line 1308 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO0_PAGE_CFG_2_ERASE_EN_2_MASK

#define FLASH_CTRL_BANK1_INFO0_PAGE_CFG_2_ERASE_EN_2_MASK   0xfu

Definition at line 1306 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO0_PAGE_CFG_2_ERASE_EN_2_OFFSET

#define FLASH_CTRL_BANK1_INFO0_PAGE_CFG_2_ERASE_EN_2_OFFSET   12

Definition at line 1307 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO0_PAGE_CFG_2_HE_EN_2_FIELD

#define FLASH_CTRL_BANK1_INFO0_PAGE_CFG_2_HE_EN_2_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK1_INFO0_PAGE_CFG_2_HE_EN_2_MASK, .index = FLASH_CTRL_BANK1_INFO0_PAGE_CFG_2_HE_EN_2_OFFSET })

Definition at line 1320 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO0_PAGE_CFG_2_HE_EN_2_MASK

#define FLASH_CTRL_BANK1_INFO0_PAGE_CFG_2_HE_EN_2_MASK   0xfu

Definition at line 1318 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO0_PAGE_CFG_2_HE_EN_2_OFFSET

#define FLASH_CTRL_BANK1_INFO0_PAGE_CFG_2_HE_EN_2_OFFSET   24

Definition at line 1319 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO0_PAGE_CFG_2_PROG_EN_2_FIELD

#define FLASH_CTRL_BANK1_INFO0_PAGE_CFG_2_PROG_EN_2_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK1_INFO0_PAGE_CFG_2_PROG_EN_2_MASK, .index = FLASH_CTRL_BANK1_INFO0_PAGE_CFG_2_PROG_EN_2_OFFSET })

Definition at line 1304 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO0_PAGE_CFG_2_PROG_EN_2_MASK

#define FLASH_CTRL_BANK1_INFO0_PAGE_CFG_2_PROG_EN_2_MASK   0xfu

Definition at line 1302 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO0_PAGE_CFG_2_PROG_EN_2_OFFSET

#define FLASH_CTRL_BANK1_INFO0_PAGE_CFG_2_PROG_EN_2_OFFSET   8

Definition at line 1303 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO0_PAGE_CFG_2_RD_EN_2_FIELD

#define FLASH_CTRL_BANK1_INFO0_PAGE_CFG_2_RD_EN_2_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK1_INFO0_PAGE_CFG_2_RD_EN_2_MASK, .index = FLASH_CTRL_BANK1_INFO0_PAGE_CFG_2_RD_EN_2_OFFSET })

Definition at line 1300 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO0_PAGE_CFG_2_RD_EN_2_MASK

#define FLASH_CTRL_BANK1_INFO0_PAGE_CFG_2_RD_EN_2_MASK   0xfu

Definition at line 1298 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO0_PAGE_CFG_2_RD_EN_2_OFFSET

#define FLASH_CTRL_BANK1_INFO0_PAGE_CFG_2_RD_EN_2_OFFSET   4

Definition at line 1299 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO0_PAGE_CFG_2_REG_OFFSET

#define FLASH_CTRL_BANK1_INFO0_PAGE_CFG_2_REG_OFFSET   0x12c

Definition at line 1292 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO0_PAGE_CFG_2_REG_RESVAL

#define FLASH_CTRL_BANK1_INFO0_PAGE_CFG_2_REG_RESVAL   0x9999999u

Definition at line 1293 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO0_PAGE_CFG_2_SCRAMBLE_EN_2_FIELD

#define FLASH_CTRL_BANK1_INFO0_PAGE_CFG_2_SCRAMBLE_EN_2_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK1_INFO0_PAGE_CFG_2_SCRAMBLE_EN_2_MASK, .index = FLASH_CTRL_BANK1_INFO0_PAGE_CFG_2_SCRAMBLE_EN_2_OFFSET })

Definition at line 1312 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO0_PAGE_CFG_2_SCRAMBLE_EN_2_MASK

#define FLASH_CTRL_BANK1_INFO0_PAGE_CFG_2_SCRAMBLE_EN_2_MASK   0xfu

Definition at line 1310 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO0_PAGE_CFG_2_SCRAMBLE_EN_2_OFFSET

#define FLASH_CTRL_BANK1_INFO0_PAGE_CFG_2_SCRAMBLE_EN_2_OFFSET   16

Definition at line 1311 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO0_PAGE_CFG_3_ECC_EN_3_FIELD

#define FLASH_CTRL_BANK1_INFO0_PAGE_CFG_3_ECC_EN_3_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK1_INFO0_PAGE_CFG_3_ECC_EN_3_MASK, .index = FLASH_CTRL_BANK1_INFO0_PAGE_CFG_3_ECC_EN_3_OFFSET })

Definition at line 1348 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO0_PAGE_CFG_3_ECC_EN_3_MASK

#define FLASH_CTRL_BANK1_INFO0_PAGE_CFG_3_ECC_EN_3_MASK   0xfu

Definition at line 1346 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO0_PAGE_CFG_3_ECC_EN_3_OFFSET

#define FLASH_CTRL_BANK1_INFO0_PAGE_CFG_3_ECC_EN_3_OFFSET   20

Definition at line 1347 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO0_PAGE_CFG_3_EN_3_FIELD

#define FLASH_CTRL_BANK1_INFO0_PAGE_CFG_3_EN_3_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK1_INFO0_PAGE_CFG_3_EN_3_MASK, .index = FLASH_CTRL_BANK1_INFO0_PAGE_CFG_3_EN_3_OFFSET })

Definition at line 1328 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO0_PAGE_CFG_3_EN_3_MASK

#define FLASH_CTRL_BANK1_INFO0_PAGE_CFG_3_EN_3_MASK   0xfu

Definition at line 1326 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO0_PAGE_CFG_3_EN_3_OFFSET

#define FLASH_CTRL_BANK1_INFO0_PAGE_CFG_3_EN_3_OFFSET   0

Definition at line 1327 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO0_PAGE_CFG_3_ERASE_EN_3_FIELD

#define FLASH_CTRL_BANK1_INFO0_PAGE_CFG_3_ERASE_EN_3_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK1_INFO0_PAGE_CFG_3_ERASE_EN_3_MASK, .index = FLASH_CTRL_BANK1_INFO0_PAGE_CFG_3_ERASE_EN_3_OFFSET })

Definition at line 1340 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO0_PAGE_CFG_3_ERASE_EN_3_MASK

#define FLASH_CTRL_BANK1_INFO0_PAGE_CFG_3_ERASE_EN_3_MASK   0xfu

Definition at line 1338 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO0_PAGE_CFG_3_ERASE_EN_3_OFFSET

#define FLASH_CTRL_BANK1_INFO0_PAGE_CFG_3_ERASE_EN_3_OFFSET   12

Definition at line 1339 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO0_PAGE_CFG_3_HE_EN_3_FIELD

#define FLASH_CTRL_BANK1_INFO0_PAGE_CFG_3_HE_EN_3_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK1_INFO0_PAGE_CFG_3_HE_EN_3_MASK, .index = FLASH_CTRL_BANK1_INFO0_PAGE_CFG_3_HE_EN_3_OFFSET })

Definition at line 1352 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO0_PAGE_CFG_3_HE_EN_3_MASK

#define FLASH_CTRL_BANK1_INFO0_PAGE_CFG_3_HE_EN_3_MASK   0xfu

Definition at line 1350 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO0_PAGE_CFG_3_HE_EN_3_OFFSET

#define FLASH_CTRL_BANK1_INFO0_PAGE_CFG_3_HE_EN_3_OFFSET   24

Definition at line 1351 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO0_PAGE_CFG_3_PROG_EN_3_FIELD

#define FLASH_CTRL_BANK1_INFO0_PAGE_CFG_3_PROG_EN_3_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK1_INFO0_PAGE_CFG_3_PROG_EN_3_MASK, .index = FLASH_CTRL_BANK1_INFO0_PAGE_CFG_3_PROG_EN_3_OFFSET })

Definition at line 1336 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO0_PAGE_CFG_3_PROG_EN_3_MASK

#define FLASH_CTRL_BANK1_INFO0_PAGE_CFG_3_PROG_EN_3_MASK   0xfu

Definition at line 1334 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO0_PAGE_CFG_3_PROG_EN_3_OFFSET

#define FLASH_CTRL_BANK1_INFO0_PAGE_CFG_3_PROG_EN_3_OFFSET   8

Definition at line 1335 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO0_PAGE_CFG_3_RD_EN_3_FIELD

#define FLASH_CTRL_BANK1_INFO0_PAGE_CFG_3_RD_EN_3_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK1_INFO0_PAGE_CFG_3_RD_EN_3_MASK, .index = FLASH_CTRL_BANK1_INFO0_PAGE_CFG_3_RD_EN_3_OFFSET })

Definition at line 1332 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO0_PAGE_CFG_3_RD_EN_3_MASK

#define FLASH_CTRL_BANK1_INFO0_PAGE_CFG_3_RD_EN_3_MASK   0xfu

Definition at line 1330 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO0_PAGE_CFG_3_RD_EN_3_OFFSET

#define FLASH_CTRL_BANK1_INFO0_PAGE_CFG_3_RD_EN_3_OFFSET   4

Definition at line 1331 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO0_PAGE_CFG_3_REG_OFFSET

#define FLASH_CTRL_BANK1_INFO0_PAGE_CFG_3_REG_OFFSET   0x130

Definition at line 1324 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO0_PAGE_CFG_3_REG_RESVAL

#define FLASH_CTRL_BANK1_INFO0_PAGE_CFG_3_REG_RESVAL   0x9999999u

Definition at line 1325 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO0_PAGE_CFG_3_SCRAMBLE_EN_3_FIELD

#define FLASH_CTRL_BANK1_INFO0_PAGE_CFG_3_SCRAMBLE_EN_3_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK1_INFO0_PAGE_CFG_3_SCRAMBLE_EN_3_MASK, .index = FLASH_CTRL_BANK1_INFO0_PAGE_CFG_3_SCRAMBLE_EN_3_OFFSET })

Definition at line 1344 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO0_PAGE_CFG_3_SCRAMBLE_EN_3_MASK

#define FLASH_CTRL_BANK1_INFO0_PAGE_CFG_3_SCRAMBLE_EN_3_MASK   0xfu

Definition at line 1342 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO0_PAGE_CFG_3_SCRAMBLE_EN_3_OFFSET

#define FLASH_CTRL_BANK1_INFO0_PAGE_CFG_3_SCRAMBLE_EN_3_OFFSET   16

Definition at line 1343 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO0_PAGE_CFG_4_ECC_EN_4_FIELD

#define FLASH_CTRL_BANK1_INFO0_PAGE_CFG_4_ECC_EN_4_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK1_INFO0_PAGE_CFG_4_ECC_EN_4_MASK, .index = FLASH_CTRL_BANK1_INFO0_PAGE_CFG_4_ECC_EN_4_OFFSET })

Definition at line 1380 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO0_PAGE_CFG_4_ECC_EN_4_MASK

#define FLASH_CTRL_BANK1_INFO0_PAGE_CFG_4_ECC_EN_4_MASK   0xfu

Definition at line 1378 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO0_PAGE_CFG_4_ECC_EN_4_OFFSET

#define FLASH_CTRL_BANK1_INFO0_PAGE_CFG_4_ECC_EN_4_OFFSET   20

Definition at line 1379 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO0_PAGE_CFG_4_EN_4_FIELD

#define FLASH_CTRL_BANK1_INFO0_PAGE_CFG_4_EN_4_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK1_INFO0_PAGE_CFG_4_EN_4_MASK, .index = FLASH_CTRL_BANK1_INFO0_PAGE_CFG_4_EN_4_OFFSET })

Definition at line 1360 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO0_PAGE_CFG_4_EN_4_MASK

#define FLASH_CTRL_BANK1_INFO0_PAGE_CFG_4_EN_4_MASK   0xfu

Definition at line 1358 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO0_PAGE_CFG_4_EN_4_OFFSET

#define FLASH_CTRL_BANK1_INFO0_PAGE_CFG_4_EN_4_OFFSET   0

Definition at line 1359 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO0_PAGE_CFG_4_ERASE_EN_4_FIELD

#define FLASH_CTRL_BANK1_INFO0_PAGE_CFG_4_ERASE_EN_4_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK1_INFO0_PAGE_CFG_4_ERASE_EN_4_MASK, .index = FLASH_CTRL_BANK1_INFO0_PAGE_CFG_4_ERASE_EN_4_OFFSET })

Definition at line 1372 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO0_PAGE_CFG_4_ERASE_EN_4_MASK

#define FLASH_CTRL_BANK1_INFO0_PAGE_CFG_4_ERASE_EN_4_MASK   0xfu

Definition at line 1370 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO0_PAGE_CFG_4_ERASE_EN_4_OFFSET

#define FLASH_CTRL_BANK1_INFO0_PAGE_CFG_4_ERASE_EN_4_OFFSET   12

Definition at line 1371 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO0_PAGE_CFG_4_HE_EN_4_FIELD

#define FLASH_CTRL_BANK1_INFO0_PAGE_CFG_4_HE_EN_4_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK1_INFO0_PAGE_CFG_4_HE_EN_4_MASK, .index = FLASH_CTRL_BANK1_INFO0_PAGE_CFG_4_HE_EN_4_OFFSET })

Definition at line 1384 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO0_PAGE_CFG_4_HE_EN_4_MASK

#define FLASH_CTRL_BANK1_INFO0_PAGE_CFG_4_HE_EN_4_MASK   0xfu

Definition at line 1382 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO0_PAGE_CFG_4_HE_EN_4_OFFSET

#define FLASH_CTRL_BANK1_INFO0_PAGE_CFG_4_HE_EN_4_OFFSET   24

Definition at line 1383 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO0_PAGE_CFG_4_PROG_EN_4_FIELD

#define FLASH_CTRL_BANK1_INFO0_PAGE_CFG_4_PROG_EN_4_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK1_INFO0_PAGE_CFG_4_PROG_EN_4_MASK, .index = FLASH_CTRL_BANK1_INFO0_PAGE_CFG_4_PROG_EN_4_OFFSET })

Definition at line 1368 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO0_PAGE_CFG_4_PROG_EN_4_MASK

#define FLASH_CTRL_BANK1_INFO0_PAGE_CFG_4_PROG_EN_4_MASK   0xfu

Definition at line 1366 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO0_PAGE_CFG_4_PROG_EN_4_OFFSET

#define FLASH_CTRL_BANK1_INFO0_PAGE_CFG_4_PROG_EN_4_OFFSET   8

Definition at line 1367 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO0_PAGE_CFG_4_RD_EN_4_FIELD

#define FLASH_CTRL_BANK1_INFO0_PAGE_CFG_4_RD_EN_4_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK1_INFO0_PAGE_CFG_4_RD_EN_4_MASK, .index = FLASH_CTRL_BANK1_INFO0_PAGE_CFG_4_RD_EN_4_OFFSET })

Definition at line 1364 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO0_PAGE_CFG_4_RD_EN_4_MASK

#define FLASH_CTRL_BANK1_INFO0_PAGE_CFG_4_RD_EN_4_MASK   0xfu

Definition at line 1362 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO0_PAGE_CFG_4_RD_EN_4_OFFSET

#define FLASH_CTRL_BANK1_INFO0_PAGE_CFG_4_RD_EN_4_OFFSET   4

Definition at line 1363 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO0_PAGE_CFG_4_REG_OFFSET

#define FLASH_CTRL_BANK1_INFO0_PAGE_CFG_4_REG_OFFSET   0x134

Definition at line 1356 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO0_PAGE_CFG_4_REG_RESVAL

#define FLASH_CTRL_BANK1_INFO0_PAGE_CFG_4_REG_RESVAL   0x9999999u

Definition at line 1357 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO0_PAGE_CFG_4_SCRAMBLE_EN_4_FIELD

#define FLASH_CTRL_BANK1_INFO0_PAGE_CFG_4_SCRAMBLE_EN_4_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK1_INFO0_PAGE_CFG_4_SCRAMBLE_EN_4_MASK, .index = FLASH_CTRL_BANK1_INFO0_PAGE_CFG_4_SCRAMBLE_EN_4_OFFSET })

Definition at line 1376 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO0_PAGE_CFG_4_SCRAMBLE_EN_4_MASK

#define FLASH_CTRL_BANK1_INFO0_PAGE_CFG_4_SCRAMBLE_EN_4_MASK   0xfu

Definition at line 1374 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO0_PAGE_CFG_4_SCRAMBLE_EN_4_OFFSET

#define FLASH_CTRL_BANK1_INFO0_PAGE_CFG_4_SCRAMBLE_EN_4_OFFSET   16

Definition at line 1375 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO0_PAGE_CFG_5_ECC_EN_5_FIELD

#define FLASH_CTRL_BANK1_INFO0_PAGE_CFG_5_ECC_EN_5_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK1_INFO0_PAGE_CFG_5_ECC_EN_5_MASK, .index = FLASH_CTRL_BANK1_INFO0_PAGE_CFG_5_ECC_EN_5_OFFSET })

Definition at line 1412 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO0_PAGE_CFG_5_ECC_EN_5_MASK

#define FLASH_CTRL_BANK1_INFO0_PAGE_CFG_5_ECC_EN_5_MASK   0xfu

Definition at line 1410 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO0_PAGE_CFG_5_ECC_EN_5_OFFSET

#define FLASH_CTRL_BANK1_INFO0_PAGE_CFG_5_ECC_EN_5_OFFSET   20

Definition at line 1411 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO0_PAGE_CFG_5_EN_5_FIELD

#define FLASH_CTRL_BANK1_INFO0_PAGE_CFG_5_EN_5_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK1_INFO0_PAGE_CFG_5_EN_5_MASK, .index = FLASH_CTRL_BANK1_INFO0_PAGE_CFG_5_EN_5_OFFSET })

Definition at line 1392 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO0_PAGE_CFG_5_EN_5_MASK

#define FLASH_CTRL_BANK1_INFO0_PAGE_CFG_5_EN_5_MASK   0xfu

Definition at line 1390 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO0_PAGE_CFG_5_EN_5_OFFSET

#define FLASH_CTRL_BANK1_INFO0_PAGE_CFG_5_EN_5_OFFSET   0

Definition at line 1391 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO0_PAGE_CFG_5_ERASE_EN_5_FIELD

#define FLASH_CTRL_BANK1_INFO0_PAGE_CFG_5_ERASE_EN_5_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK1_INFO0_PAGE_CFG_5_ERASE_EN_5_MASK, .index = FLASH_CTRL_BANK1_INFO0_PAGE_CFG_5_ERASE_EN_5_OFFSET })

Definition at line 1404 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO0_PAGE_CFG_5_ERASE_EN_5_MASK

#define FLASH_CTRL_BANK1_INFO0_PAGE_CFG_5_ERASE_EN_5_MASK   0xfu

Definition at line 1402 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO0_PAGE_CFG_5_ERASE_EN_5_OFFSET

#define FLASH_CTRL_BANK1_INFO0_PAGE_CFG_5_ERASE_EN_5_OFFSET   12

Definition at line 1403 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO0_PAGE_CFG_5_HE_EN_5_FIELD

#define FLASH_CTRL_BANK1_INFO0_PAGE_CFG_5_HE_EN_5_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK1_INFO0_PAGE_CFG_5_HE_EN_5_MASK, .index = FLASH_CTRL_BANK1_INFO0_PAGE_CFG_5_HE_EN_5_OFFSET })

Definition at line 1416 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO0_PAGE_CFG_5_HE_EN_5_MASK

#define FLASH_CTRL_BANK1_INFO0_PAGE_CFG_5_HE_EN_5_MASK   0xfu

Definition at line 1414 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO0_PAGE_CFG_5_HE_EN_5_OFFSET

#define FLASH_CTRL_BANK1_INFO0_PAGE_CFG_5_HE_EN_5_OFFSET   24

Definition at line 1415 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO0_PAGE_CFG_5_PROG_EN_5_FIELD

#define FLASH_CTRL_BANK1_INFO0_PAGE_CFG_5_PROG_EN_5_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK1_INFO0_PAGE_CFG_5_PROG_EN_5_MASK, .index = FLASH_CTRL_BANK1_INFO0_PAGE_CFG_5_PROG_EN_5_OFFSET })

Definition at line 1400 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO0_PAGE_CFG_5_PROG_EN_5_MASK

#define FLASH_CTRL_BANK1_INFO0_PAGE_CFG_5_PROG_EN_5_MASK   0xfu

Definition at line 1398 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO0_PAGE_CFG_5_PROG_EN_5_OFFSET

#define FLASH_CTRL_BANK1_INFO0_PAGE_CFG_5_PROG_EN_5_OFFSET   8

Definition at line 1399 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO0_PAGE_CFG_5_RD_EN_5_FIELD

#define FLASH_CTRL_BANK1_INFO0_PAGE_CFG_5_RD_EN_5_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK1_INFO0_PAGE_CFG_5_RD_EN_5_MASK, .index = FLASH_CTRL_BANK1_INFO0_PAGE_CFG_5_RD_EN_5_OFFSET })

Definition at line 1396 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO0_PAGE_CFG_5_RD_EN_5_MASK

#define FLASH_CTRL_BANK1_INFO0_PAGE_CFG_5_RD_EN_5_MASK   0xfu

Definition at line 1394 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO0_PAGE_CFG_5_RD_EN_5_OFFSET

#define FLASH_CTRL_BANK1_INFO0_PAGE_CFG_5_RD_EN_5_OFFSET   4

Definition at line 1395 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO0_PAGE_CFG_5_REG_OFFSET

#define FLASH_CTRL_BANK1_INFO0_PAGE_CFG_5_REG_OFFSET   0x138

Definition at line 1388 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO0_PAGE_CFG_5_REG_RESVAL

#define FLASH_CTRL_BANK1_INFO0_PAGE_CFG_5_REG_RESVAL   0x9999999u

Definition at line 1389 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO0_PAGE_CFG_5_SCRAMBLE_EN_5_FIELD

#define FLASH_CTRL_BANK1_INFO0_PAGE_CFG_5_SCRAMBLE_EN_5_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK1_INFO0_PAGE_CFG_5_SCRAMBLE_EN_5_MASK, .index = FLASH_CTRL_BANK1_INFO0_PAGE_CFG_5_SCRAMBLE_EN_5_OFFSET })

Definition at line 1408 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO0_PAGE_CFG_5_SCRAMBLE_EN_5_MASK

#define FLASH_CTRL_BANK1_INFO0_PAGE_CFG_5_SCRAMBLE_EN_5_MASK   0xfu

Definition at line 1406 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO0_PAGE_CFG_5_SCRAMBLE_EN_5_OFFSET

#define FLASH_CTRL_BANK1_INFO0_PAGE_CFG_5_SCRAMBLE_EN_5_OFFSET   16

Definition at line 1407 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO0_PAGE_CFG_6_ECC_EN_6_FIELD

#define FLASH_CTRL_BANK1_INFO0_PAGE_CFG_6_ECC_EN_6_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK1_INFO0_PAGE_CFG_6_ECC_EN_6_MASK, .index = FLASH_CTRL_BANK1_INFO0_PAGE_CFG_6_ECC_EN_6_OFFSET })

Definition at line 1444 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO0_PAGE_CFG_6_ECC_EN_6_MASK

#define FLASH_CTRL_BANK1_INFO0_PAGE_CFG_6_ECC_EN_6_MASK   0xfu

Definition at line 1442 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO0_PAGE_CFG_6_ECC_EN_6_OFFSET

#define FLASH_CTRL_BANK1_INFO0_PAGE_CFG_6_ECC_EN_6_OFFSET   20

Definition at line 1443 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO0_PAGE_CFG_6_EN_6_FIELD

#define FLASH_CTRL_BANK1_INFO0_PAGE_CFG_6_EN_6_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK1_INFO0_PAGE_CFG_6_EN_6_MASK, .index = FLASH_CTRL_BANK1_INFO0_PAGE_CFG_6_EN_6_OFFSET })

Definition at line 1424 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO0_PAGE_CFG_6_EN_6_MASK

#define FLASH_CTRL_BANK1_INFO0_PAGE_CFG_6_EN_6_MASK   0xfu

Definition at line 1422 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO0_PAGE_CFG_6_EN_6_OFFSET

#define FLASH_CTRL_BANK1_INFO0_PAGE_CFG_6_EN_6_OFFSET   0

Definition at line 1423 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO0_PAGE_CFG_6_ERASE_EN_6_FIELD

#define FLASH_CTRL_BANK1_INFO0_PAGE_CFG_6_ERASE_EN_6_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK1_INFO0_PAGE_CFG_6_ERASE_EN_6_MASK, .index = FLASH_CTRL_BANK1_INFO0_PAGE_CFG_6_ERASE_EN_6_OFFSET })

Definition at line 1436 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO0_PAGE_CFG_6_ERASE_EN_6_MASK

#define FLASH_CTRL_BANK1_INFO0_PAGE_CFG_6_ERASE_EN_6_MASK   0xfu

Definition at line 1434 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO0_PAGE_CFG_6_ERASE_EN_6_OFFSET

#define FLASH_CTRL_BANK1_INFO0_PAGE_CFG_6_ERASE_EN_6_OFFSET   12

Definition at line 1435 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO0_PAGE_CFG_6_HE_EN_6_FIELD

#define FLASH_CTRL_BANK1_INFO0_PAGE_CFG_6_HE_EN_6_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK1_INFO0_PAGE_CFG_6_HE_EN_6_MASK, .index = FLASH_CTRL_BANK1_INFO0_PAGE_CFG_6_HE_EN_6_OFFSET })

Definition at line 1448 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO0_PAGE_CFG_6_HE_EN_6_MASK

#define FLASH_CTRL_BANK1_INFO0_PAGE_CFG_6_HE_EN_6_MASK   0xfu

Definition at line 1446 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO0_PAGE_CFG_6_HE_EN_6_OFFSET

#define FLASH_CTRL_BANK1_INFO0_PAGE_CFG_6_HE_EN_6_OFFSET   24

Definition at line 1447 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO0_PAGE_CFG_6_PROG_EN_6_FIELD

#define FLASH_CTRL_BANK1_INFO0_PAGE_CFG_6_PROG_EN_6_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK1_INFO0_PAGE_CFG_6_PROG_EN_6_MASK, .index = FLASH_CTRL_BANK1_INFO0_PAGE_CFG_6_PROG_EN_6_OFFSET })

Definition at line 1432 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO0_PAGE_CFG_6_PROG_EN_6_MASK

#define FLASH_CTRL_BANK1_INFO0_PAGE_CFG_6_PROG_EN_6_MASK   0xfu

Definition at line 1430 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO0_PAGE_CFG_6_PROG_EN_6_OFFSET

#define FLASH_CTRL_BANK1_INFO0_PAGE_CFG_6_PROG_EN_6_OFFSET   8

Definition at line 1431 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO0_PAGE_CFG_6_RD_EN_6_FIELD

#define FLASH_CTRL_BANK1_INFO0_PAGE_CFG_6_RD_EN_6_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK1_INFO0_PAGE_CFG_6_RD_EN_6_MASK, .index = FLASH_CTRL_BANK1_INFO0_PAGE_CFG_6_RD_EN_6_OFFSET })

Definition at line 1428 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO0_PAGE_CFG_6_RD_EN_6_MASK

#define FLASH_CTRL_BANK1_INFO0_PAGE_CFG_6_RD_EN_6_MASK   0xfu

Definition at line 1426 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO0_PAGE_CFG_6_RD_EN_6_OFFSET

#define FLASH_CTRL_BANK1_INFO0_PAGE_CFG_6_RD_EN_6_OFFSET   4

Definition at line 1427 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO0_PAGE_CFG_6_REG_OFFSET

#define FLASH_CTRL_BANK1_INFO0_PAGE_CFG_6_REG_OFFSET   0x13c

Definition at line 1420 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO0_PAGE_CFG_6_REG_RESVAL

#define FLASH_CTRL_BANK1_INFO0_PAGE_CFG_6_REG_RESVAL   0x9999999u

Definition at line 1421 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO0_PAGE_CFG_6_SCRAMBLE_EN_6_FIELD

#define FLASH_CTRL_BANK1_INFO0_PAGE_CFG_6_SCRAMBLE_EN_6_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK1_INFO0_PAGE_CFG_6_SCRAMBLE_EN_6_MASK, .index = FLASH_CTRL_BANK1_INFO0_PAGE_CFG_6_SCRAMBLE_EN_6_OFFSET })

Definition at line 1440 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO0_PAGE_CFG_6_SCRAMBLE_EN_6_MASK

#define FLASH_CTRL_BANK1_INFO0_PAGE_CFG_6_SCRAMBLE_EN_6_MASK   0xfu

Definition at line 1438 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO0_PAGE_CFG_6_SCRAMBLE_EN_6_OFFSET

#define FLASH_CTRL_BANK1_INFO0_PAGE_CFG_6_SCRAMBLE_EN_6_OFFSET   16

Definition at line 1439 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO0_PAGE_CFG_7_ECC_EN_7_FIELD

#define FLASH_CTRL_BANK1_INFO0_PAGE_CFG_7_ECC_EN_7_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK1_INFO0_PAGE_CFG_7_ECC_EN_7_MASK, .index = FLASH_CTRL_BANK1_INFO0_PAGE_CFG_7_ECC_EN_7_OFFSET })

Definition at line 1476 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO0_PAGE_CFG_7_ECC_EN_7_MASK

#define FLASH_CTRL_BANK1_INFO0_PAGE_CFG_7_ECC_EN_7_MASK   0xfu

Definition at line 1474 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO0_PAGE_CFG_7_ECC_EN_7_OFFSET

#define FLASH_CTRL_BANK1_INFO0_PAGE_CFG_7_ECC_EN_7_OFFSET   20

Definition at line 1475 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO0_PAGE_CFG_7_EN_7_FIELD

#define FLASH_CTRL_BANK1_INFO0_PAGE_CFG_7_EN_7_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK1_INFO0_PAGE_CFG_7_EN_7_MASK, .index = FLASH_CTRL_BANK1_INFO0_PAGE_CFG_7_EN_7_OFFSET })

Definition at line 1456 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO0_PAGE_CFG_7_EN_7_MASK

#define FLASH_CTRL_BANK1_INFO0_PAGE_CFG_7_EN_7_MASK   0xfu

Definition at line 1454 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO0_PAGE_CFG_7_EN_7_OFFSET

#define FLASH_CTRL_BANK1_INFO0_PAGE_CFG_7_EN_7_OFFSET   0

Definition at line 1455 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO0_PAGE_CFG_7_ERASE_EN_7_FIELD

#define FLASH_CTRL_BANK1_INFO0_PAGE_CFG_7_ERASE_EN_7_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK1_INFO0_PAGE_CFG_7_ERASE_EN_7_MASK, .index = FLASH_CTRL_BANK1_INFO0_PAGE_CFG_7_ERASE_EN_7_OFFSET })

Definition at line 1468 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO0_PAGE_CFG_7_ERASE_EN_7_MASK

#define FLASH_CTRL_BANK1_INFO0_PAGE_CFG_7_ERASE_EN_7_MASK   0xfu

Definition at line 1466 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO0_PAGE_CFG_7_ERASE_EN_7_OFFSET

#define FLASH_CTRL_BANK1_INFO0_PAGE_CFG_7_ERASE_EN_7_OFFSET   12

Definition at line 1467 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO0_PAGE_CFG_7_HE_EN_7_FIELD

#define FLASH_CTRL_BANK1_INFO0_PAGE_CFG_7_HE_EN_7_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK1_INFO0_PAGE_CFG_7_HE_EN_7_MASK, .index = FLASH_CTRL_BANK1_INFO0_PAGE_CFG_7_HE_EN_7_OFFSET })

Definition at line 1480 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO0_PAGE_CFG_7_HE_EN_7_MASK

#define FLASH_CTRL_BANK1_INFO0_PAGE_CFG_7_HE_EN_7_MASK   0xfu

Definition at line 1478 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO0_PAGE_CFG_7_HE_EN_7_OFFSET

#define FLASH_CTRL_BANK1_INFO0_PAGE_CFG_7_HE_EN_7_OFFSET   24

Definition at line 1479 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO0_PAGE_CFG_7_PROG_EN_7_FIELD

#define FLASH_CTRL_BANK1_INFO0_PAGE_CFG_7_PROG_EN_7_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK1_INFO0_PAGE_CFG_7_PROG_EN_7_MASK, .index = FLASH_CTRL_BANK1_INFO0_PAGE_CFG_7_PROG_EN_7_OFFSET })

Definition at line 1464 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO0_PAGE_CFG_7_PROG_EN_7_MASK

#define FLASH_CTRL_BANK1_INFO0_PAGE_CFG_7_PROG_EN_7_MASK   0xfu

Definition at line 1462 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO0_PAGE_CFG_7_PROG_EN_7_OFFSET

#define FLASH_CTRL_BANK1_INFO0_PAGE_CFG_7_PROG_EN_7_OFFSET   8

Definition at line 1463 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO0_PAGE_CFG_7_RD_EN_7_FIELD

#define FLASH_CTRL_BANK1_INFO0_PAGE_CFG_7_RD_EN_7_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK1_INFO0_PAGE_CFG_7_RD_EN_7_MASK, .index = FLASH_CTRL_BANK1_INFO0_PAGE_CFG_7_RD_EN_7_OFFSET })

Definition at line 1460 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO0_PAGE_CFG_7_RD_EN_7_MASK

#define FLASH_CTRL_BANK1_INFO0_PAGE_CFG_7_RD_EN_7_MASK   0xfu

Definition at line 1458 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO0_PAGE_CFG_7_RD_EN_7_OFFSET

#define FLASH_CTRL_BANK1_INFO0_PAGE_CFG_7_RD_EN_7_OFFSET   4

Definition at line 1459 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO0_PAGE_CFG_7_REG_OFFSET

#define FLASH_CTRL_BANK1_INFO0_PAGE_CFG_7_REG_OFFSET   0x140

Definition at line 1452 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO0_PAGE_CFG_7_REG_RESVAL

#define FLASH_CTRL_BANK1_INFO0_PAGE_CFG_7_REG_RESVAL   0x9999999u

Definition at line 1453 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO0_PAGE_CFG_7_SCRAMBLE_EN_7_FIELD

#define FLASH_CTRL_BANK1_INFO0_PAGE_CFG_7_SCRAMBLE_EN_7_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK1_INFO0_PAGE_CFG_7_SCRAMBLE_EN_7_MASK, .index = FLASH_CTRL_BANK1_INFO0_PAGE_CFG_7_SCRAMBLE_EN_7_OFFSET })

Definition at line 1472 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO0_PAGE_CFG_7_SCRAMBLE_EN_7_MASK

#define FLASH_CTRL_BANK1_INFO0_PAGE_CFG_7_SCRAMBLE_EN_7_MASK   0xfu

Definition at line 1470 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO0_PAGE_CFG_7_SCRAMBLE_EN_7_OFFSET

#define FLASH_CTRL_BANK1_INFO0_PAGE_CFG_7_SCRAMBLE_EN_7_OFFSET   16

Definition at line 1471 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO0_PAGE_CFG_8_ECC_EN_8_FIELD

#define FLASH_CTRL_BANK1_INFO0_PAGE_CFG_8_ECC_EN_8_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK1_INFO0_PAGE_CFG_8_ECC_EN_8_MASK, .index = FLASH_CTRL_BANK1_INFO0_PAGE_CFG_8_ECC_EN_8_OFFSET })

Definition at line 1508 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO0_PAGE_CFG_8_ECC_EN_8_MASK

#define FLASH_CTRL_BANK1_INFO0_PAGE_CFG_8_ECC_EN_8_MASK   0xfu

Definition at line 1506 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO0_PAGE_CFG_8_ECC_EN_8_OFFSET

#define FLASH_CTRL_BANK1_INFO0_PAGE_CFG_8_ECC_EN_8_OFFSET   20

Definition at line 1507 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO0_PAGE_CFG_8_EN_8_FIELD

#define FLASH_CTRL_BANK1_INFO0_PAGE_CFG_8_EN_8_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK1_INFO0_PAGE_CFG_8_EN_8_MASK, .index = FLASH_CTRL_BANK1_INFO0_PAGE_CFG_8_EN_8_OFFSET })

Definition at line 1488 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO0_PAGE_CFG_8_EN_8_MASK

#define FLASH_CTRL_BANK1_INFO0_PAGE_CFG_8_EN_8_MASK   0xfu

Definition at line 1486 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO0_PAGE_CFG_8_EN_8_OFFSET

#define FLASH_CTRL_BANK1_INFO0_PAGE_CFG_8_EN_8_OFFSET   0

Definition at line 1487 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO0_PAGE_CFG_8_ERASE_EN_8_FIELD

#define FLASH_CTRL_BANK1_INFO0_PAGE_CFG_8_ERASE_EN_8_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK1_INFO0_PAGE_CFG_8_ERASE_EN_8_MASK, .index = FLASH_CTRL_BANK1_INFO0_PAGE_CFG_8_ERASE_EN_8_OFFSET })

Definition at line 1500 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO0_PAGE_CFG_8_ERASE_EN_8_MASK

#define FLASH_CTRL_BANK1_INFO0_PAGE_CFG_8_ERASE_EN_8_MASK   0xfu

Definition at line 1498 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO0_PAGE_CFG_8_ERASE_EN_8_OFFSET

#define FLASH_CTRL_BANK1_INFO0_PAGE_CFG_8_ERASE_EN_8_OFFSET   12

Definition at line 1499 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO0_PAGE_CFG_8_HE_EN_8_FIELD

#define FLASH_CTRL_BANK1_INFO0_PAGE_CFG_8_HE_EN_8_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK1_INFO0_PAGE_CFG_8_HE_EN_8_MASK, .index = FLASH_CTRL_BANK1_INFO0_PAGE_CFG_8_HE_EN_8_OFFSET })

Definition at line 1512 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO0_PAGE_CFG_8_HE_EN_8_MASK

#define FLASH_CTRL_BANK1_INFO0_PAGE_CFG_8_HE_EN_8_MASK   0xfu

Definition at line 1510 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO0_PAGE_CFG_8_HE_EN_8_OFFSET

#define FLASH_CTRL_BANK1_INFO0_PAGE_CFG_8_HE_EN_8_OFFSET   24

Definition at line 1511 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO0_PAGE_CFG_8_PROG_EN_8_FIELD

#define FLASH_CTRL_BANK1_INFO0_PAGE_CFG_8_PROG_EN_8_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK1_INFO0_PAGE_CFG_8_PROG_EN_8_MASK, .index = FLASH_CTRL_BANK1_INFO0_PAGE_CFG_8_PROG_EN_8_OFFSET })

Definition at line 1496 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO0_PAGE_CFG_8_PROG_EN_8_MASK

#define FLASH_CTRL_BANK1_INFO0_PAGE_CFG_8_PROG_EN_8_MASK   0xfu

Definition at line 1494 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO0_PAGE_CFG_8_PROG_EN_8_OFFSET

#define FLASH_CTRL_BANK1_INFO0_PAGE_CFG_8_PROG_EN_8_OFFSET   8

Definition at line 1495 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO0_PAGE_CFG_8_RD_EN_8_FIELD

#define FLASH_CTRL_BANK1_INFO0_PAGE_CFG_8_RD_EN_8_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK1_INFO0_PAGE_CFG_8_RD_EN_8_MASK, .index = FLASH_CTRL_BANK1_INFO0_PAGE_CFG_8_RD_EN_8_OFFSET })

Definition at line 1492 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO0_PAGE_CFG_8_RD_EN_8_MASK

#define FLASH_CTRL_BANK1_INFO0_PAGE_CFG_8_RD_EN_8_MASK   0xfu

Definition at line 1490 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO0_PAGE_CFG_8_RD_EN_8_OFFSET

#define FLASH_CTRL_BANK1_INFO0_PAGE_CFG_8_RD_EN_8_OFFSET   4

Definition at line 1491 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO0_PAGE_CFG_8_REG_OFFSET

#define FLASH_CTRL_BANK1_INFO0_PAGE_CFG_8_REG_OFFSET   0x144

Definition at line 1484 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO0_PAGE_CFG_8_REG_RESVAL

#define FLASH_CTRL_BANK1_INFO0_PAGE_CFG_8_REG_RESVAL   0x9999999u

Definition at line 1485 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO0_PAGE_CFG_8_SCRAMBLE_EN_8_FIELD

#define FLASH_CTRL_BANK1_INFO0_PAGE_CFG_8_SCRAMBLE_EN_8_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK1_INFO0_PAGE_CFG_8_SCRAMBLE_EN_8_MASK, .index = FLASH_CTRL_BANK1_INFO0_PAGE_CFG_8_SCRAMBLE_EN_8_OFFSET })

Definition at line 1504 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO0_PAGE_CFG_8_SCRAMBLE_EN_8_MASK

#define FLASH_CTRL_BANK1_INFO0_PAGE_CFG_8_SCRAMBLE_EN_8_MASK   0xfu

Definition at line 1502 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO0_PAGE_CFG_8_SCRAMBLE_EN_8_OFFSET

#define FLASH_CTRL_BANK1_INFO0_PAGE_CFG_8_SCRAMBLE_EN_8_OFFSET   16

Definition at line 1503 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO0_PAGE_CFG_9_ECC_EN_9_FIELD

#define FLASH_CTRL_BANK1_INFO0_PAGE_CFG_9_ECC_EN_9_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK1_INFO0_PAGE_CFG_9_ECC_EN_9_MASK, .index = FLASH_CTRL_BANK1_INFO0_PAGE_CFG_9_ECC_EN_9_OFFSET })

Definition at line 1540 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO0_PAGE_CFG_9_ECC_EN_9_MASK

#define FLASH_CTRL_BANK1_INFO0_PAGE_CFG_9_ECC_EN_9_MASK   0xfu

Definition at line 1538 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO0_PAGE_CFG_9_ECC_EN_9_OFFSET

#define FLASH_CTRL_BANK1_INFO0_PAGE_CFG_9_ECC_EN_9_OFFSET   20

Definition at line 1539 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO0_PAGE_CFG_9_EN_9_FIELD

#define FLASH_CTRL_BANK1_INFO0_PAGE_CFG_9_EN_9_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK1_INFO0_PAGE_CFG_9_EN_9_MASK, .index = FLASH_CTRL_BANK1_INFO0_PAGE_CFG_9_EN_9_OFFSET })

Definition at line 1520 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO0_PAGE_CFG_9_EN_9_MASK

#define FLASH_CTRL_BANK1_INFO0_PAGE_CFG_9_EN_9_MASK   0xfu

Definition at line 1518 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO0_PAGE_CFG_9_EN_9_OFFSET

#define FLASH_CTRL_BANK1_INFO0_PAGE_CFG_9_EN_9_OFFSET   0

Definition at line 1519 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO0_PAGE_CFG_9_ERASE_EN_9_FIELD

#define FLASH_CTRL_BANK1_INFO0_PAGE_CFG_9_ERASE_EN_9_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK1_INFO0_PAGE_CFG_9_ERASE_EN_9_MASK, .index = FLASH_CTRL_BANK1_INFO0_PAGE_CFG_9_ERASE_EN_9_OFFSET })

Definition at line 1532 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO0_PAGE_CFG_9_ERASE_EN_9_MASK

#define FLASH_CTRL_BANK1_INFO0_PAGE_CFG_9_ERASE_EN_9_MASK   0xfu

Definition at line 1530 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO0_PAGE_CFG_9_ERASE_EN_9_OFFSET

#define FLASH_CTRL_BANK1_INFO0_PAGE_CFG_9_ERASE_EN_9_OFFSET   12

Definition at line 1531 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO0_PAGE_CFG_9_HE_EN_9_FIELD

#define FLASH_CTRL_BANK1_INFO0_PAGE_CFG_9_HE_EN_9_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK1_INFO0_PAGE_CFG_9_HE_EN_9_MASK, .index = FLASH_CTRL_BANK1_INFO0_PAGE_CFG_9_HE_EN_9_OFFSET })

Definition at line 1544 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO0_PAGE_CFG_9_HE_EN_9_MASK

#define FLASH_CTRL_BANK1_INFO0_PAGE_CFG_9_HE_EN_9_MASK   0xfu

Definition at line 1542 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO0_PAGE_CFG_9_HE_EN_9_OFFSET

#define FLASH_CTRL_BANK1_INFO0_PAGE_CFG_9_HE_EN_9_OFFSET   24

Definition at line 1543 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO0_PAGE_CFG_9_PROG_EN_9_FIELD

#define FLASH_CTRL_BANK1_INFO0_PAGE_CFG_9_PROG_EN_9_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK1_INFO0_PAGE_CFG_9_PROG_EN_9_MASK, .index = FLASH_CTRL_BANK1_INFO0_PAGE_CFG_9_PROG_EN_9_OFFSET })

Definition at line 1528 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO0_PAGE_CFG_9_PROG_EN_9_MASK

#define FLASH_CTRL_BANK1_INFO0_PAGE_CFG_9_PROG_EN_9_MASK   0xfu

Definition at line 1526 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO0_PAGE_CFG_9_PROG_EN_9_OFFSET

#define FLASH_CTRL_BANK1_INFO0_PAGE_CFG_9_PROG_EN_9_OFFSET   8

Definition at line 1527 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO0_PAGE_CFG_9_RD_EN_9_FIELD

#define FLASH_CTRL_BANK1_INFO0_PAGE_CFG_9_RD_EN_9_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK1_INFO0_PAGE_CFG_9_RD_EN_9_MASK, .index = FLASH_CTRL_BANK1_INFO0_PAGE_CFG_9_RD_EN_9_OFFSET })

Definition at line 1524 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO0_PAGE_CFG_9_RD_EN_9_MASK

#define FLASH_CTRL_BANK1_INFO0_PAGE_CFG_9_RD_EN_9_MASK   0xfu

Definition at line 1522 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO0_PAGE_CFG_9_RD_EN_9_OFFSET

#define FLASH_CTRL_BANK1_INFO0_PAGE_CFG_9_RD_EN_9_OFFSET   4

Definition at line 1523 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO0_PAGE_CFG_9_REG_OFFSET

#define FLASH_CTRL_BANK1_INFO0_PAGE_CFG_9_REG_OFFSET   0x148

Definition at line 1516 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO0_PAGE_CFG_9_REG_RESVAL

#define FLASH_CTRL_BANK1_INFO0_PAGE_CFG_9_REG_RESVAL   0x9999999u

Definition at line 1517 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO0_PAGE_CFG_9_SCRAMBLE_EN_9_FIELD

#define FLASH_CTRL_BANK1_INFO0_PAGE_CFG_9_SCRAMBLE_EN_9_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK1_INFO0_PAGE_CFG_9_SCRAMBLE_EN_9_MASK, .index = FLASH_CTRL_BANK1_INFO0_PAGE_CFG_9_SCRAMBLE_EN_9_OFFSET })

Definition at line 1536 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO0_PAGE_CFG_9_SCRAMBLE_EN_9_MASK

#define FLASH_CTRL_BANK1_INFO0_PAGE_CFG_9_SCRAMBLE_EN_9_MASK   0xfu

Definition at line 1534 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO0_PAGE_CFG_9_SCRAMBLE_EN_9_OFFSET

#define FLASH_CTRL_BANK1_INFO0_PAGE_CFG_9_SCRAMBLE_EN_9_OFFSET   16

Definition at line 1535 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO0_PAGE_CFG_ECC_EN_FIELD_WIDTH

#define FLASH_CTRL_BANK1_INFO0_PAGE_CFG_ECC_EN_FIELD_WIDTH   4

Definition at line 1223 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO0_PAGE_CFG_EN_FIELD_WIDTH

#define FLASH_CTRL_BANK1_INFO0_PAGE_CFG_EN_FIELD_WIDTH   4

Definition at line 1218 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO0_PAGE_CFG_ERASE_EN_FIELD_WIDTH

#define FLASH_CTRL_BANK1_INFO0_PAGE_CFG_ERASE_EN_FIELD_WIDTH   4

Definition at line 1221 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO0_PAGE_CFG_HE_EN_FIELD_WIDTH

#define FLASH_CTRL_BANK1_INFO0_PAGE_CFG_HE_EN_FIELD_WIDTH   4

Definition at line 1224 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO0_PAGE_CFG_MULTIREG_COUNT

#define FLASH_CTRL_BANK1_INFO0_PAGE_CFG_MULTIREG_COUNT   10

Definition at line 1225 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO0_PAGE_CFG_PROG_EN_FIELD_WIDTH

#define FLASH_CTRL_BANK1_INFO0_PAGE_CFG_PROG_EN_FIELD_WIDTH   4

Definition at line 1220 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO0_PAGE_CFG_RD_EN_FIELD_WIDTH

#define FLASH_CTRL_BANK1_INFO0_PAGE_CFG_RD_EN_FIELD_WIDTH   4

Definition at line 1219 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO0_PAGE_CFG_SCRAMBLE_EN_FIELD_WIDTH

#define FLASH_CTRL_BANK1_INFO0_PAGE_CFG_SCRAMBLE_EN_FIELD_WIDTH   4

Definition at line 1222 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO0_REGWEN_0_REG_OFFSET

#define FLASH_CTRL_BANK1_INFO0_REGWEN_0_REG_OFFSET   0xfc

Definition at line 1166 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO0_REGWEN_0_REG_RESVAL

#define FLASH_CTRL_BANK1_INFO0_REGWEN_0_REG_RESVAL   0x1u

Definition at line 1167 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO0_REGWEN_0_REGION_0_BIT

#define FLASH_CTRL_BANK1_INFO0_REGWEN_0_REGION_0_BIT   0

Definition at line 1168 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO0_REGWEN_0_REGION_0_VALUE_PAGE_ENABLED

#define FLASH_CTRL_BANK1_INFO0_REGWEN_0_REGION_0_VALUE_PAGE_ENABLED   0x1

Definition at line 1170 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO0_REGWEN_0_REGION_0_VALUE_PAGE_LOCKED

#define FLASH_CTRL_BANK1_INFO0_REGWEN_0_REGION_0_VALUE_PAGE_LOCKED   0x0

Definition at line 1169 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO0_REGWEN_1_REG_OFFSET

#define FLASH_CTRL_BANK1_INFO0_REGWEN_1_REG_OFFSET   0x100

Definition at line 1173 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO0_REGWEN_1_REG_RESVAL

#define FLASH_CTRL_BANK1_INFO0_REGWEN_1_REG_RESVAL   0x1u

Definition at line 1174 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO0_REGWEN_1_REGION_1_BIT

#define FLASH_CTRL_BANK1_INFO0_REGWEN_1_REGION_1_BIT   0

Definition at line 1175 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO0_REGWEN_2_REG_OFFSET

#define FLASH_CTRL_BANK1_INFO0_REGWEN_2_REG_OFFSET   0x104

Definition at line 1178 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO0_REGWEN_2_REG_RESVAL

#define FLASH_CTRL_BANK1_INFO0_REGWEN_2_REG_RESVAL   0x1u

Definition at line 1179 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO0_REGWEN_2_REGION_2_BIT

#define FLASH_CTRL_BANK1_INFO0_REGWEN_2_REGION_2_BIT   0

Definition at line 1180 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO0_REGWEN_3_REG_OFFSET

#define FLASH_CTRL_BANK1_INFO0_REGWEN_3_REG_OFFSET   0x108

Definition at line 1183 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO0_REGWEN_3_REG_RESVAL

#define FLASH_CTRL_BANK1_INFO0_REGWEN_3_REG_RESVAL   0x1u

Definition at line 1184 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO0_REGWEN_3_REGION_3_BIT

#define FLASH_CTRL_BANK1_INFO0_REGWEN_3_REGION_3_BIT   0

Definition at line 1185 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO0_REGWEN_4_REG_OFFSET

#define FLASH_CTRL_BANK1_INFO0_REGWEN_4_REG_OFFSET   0x10c

Definition at line 1188 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO0_REGWEN_4_REG_RESVAL

#define FLASH_CTRL_BANK1_INFO0_REGWEN_4_REG_RESVAL   0x1u

Definition at line 1189 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO0_REGWEN_4_REGION_4_BIT

#define FLASH_CTRL_BANK1_INFO0_REGWEN_4_REGION_4_BIT   0

Definition at line 1190 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO0_REGWEN_5_REG_OFFSET

#define FLASH_CTRL_BANK1_INFO0_REGWEN_5_REG_OFFSET   0x110

Definition at line 1193 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO0_REGWEN_5_REG_RESVAL

#define FLASH_CTRL_BANK1_INFO0_REGWEN_5_REG_RESVAL   0x1u

Definition at line 1194 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO0_REGWEN_5_REGION_5_BIT

#define FLASH_CTRL_BANK1_INFO0_REGWEN_5_REGION_5_BIT   0

Definition at line 1195 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO0_REGWEN_6_REG_OFFSET

#define FLASH_CTRL_BANK1_INFO0_REGWEN_6_REG_OFFSET   0x114

Definition at line 1198 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO0_REGWEN_6_REG_RESVAL

#define FLASH_CTRL_BANK1_INFO0_REGWEN_6_REG_RESVAL   0x1u

Definition at line 1199 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO0_REGWEN_6_REGION_6_BIT

#define FLASH_CTRL_BANK1_INFO0_REGWEN_6_REGION_6_BIT   0

Definition at line 1200 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO0_REGWEN_7_REG_OFFSET

#define FLASH_CTRL_BANK1_INFO0_REGWEN_7_REG_OFFSET   0x118

Definition at line 1203 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO0_REGWEN_7_REG_RESVAL

#define FLASH_CTRL_BANK1_INFO0_REGWEN_7_REG_RESVAL   0x1u

Definition at line 1204 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO0_REGWEN_7_REGION_7_BIT

#define FLASH_CTRL_BANK1_INFO0_REGWEN_7_REGION_7_BIT   0

Definition at line 1205 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO0_REGWEN_8_REG_OFFSET

#define FLASH_CTRL_BANK1_INFO0_REGWEN_8_REG_OFFSET   0x11c

Definition at line 1208 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO0_REGWEN_8_REG_RESVAL

#define FLASH_CTRL_BANK1_INFO0_REGWEN_8_REG_RESVAL   0x1u

Definition at line 1209 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO0_REGWEN_8_REGION_8_BIT

#define FLASH_CTRL_BANK1_INFO0_REGWEN_8_REGION_8_BIT   0

Definition at line 1210 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO0_REGWEN_9_REG_OFFSET

#define FLASH_CTRL_BANK1_INFO0_REGWEN_9_REG_OFFSET   0x120

Definition at line 1213 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO0_REGWEN_9_REG_RESVAL

#define FLASH_CTRL_BANK1_INFO0_REGWEN_9_REG_RESVAL   0x1u

Definition at line 1214 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO0_REGWEN_9_REGION_9_BIT

#define FLASH_CTRL_BANK1_INFO0_REGWEN_9_REGION_9_BIT   0

Definition at line 1215 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO0_REGWEN_MULTIREG_COUNT

#define FLASH_CTRL_BANK1_INFO0_REGWEN_MULTIREG_COUNT   10

Definition at line 1163 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO0_REGWEN_REGION_FIELD_WIDTH

#define FLASH_CTRL_BANK1_INFO0_REGWEN_REGION_FIELD_WIDTH   1

Definition at line 1162 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO1_PAGE_CFG_ECC_EN_0_FIELD

#define FLASH_CTRL_BANK1_INFO1_PAGE_CFG_ECC_EN_0_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK1_INFO1_PAGE_CFG_ECC_EN_0_MASK, .index = FLASH_CTRL_BANK1_INFO1_PAGE_CFG_ECC_EN_0_OFFSET })

Definition at line 1593 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO1_PAGE_CFG_ECC_EN_0_MASK

#define FLASH_CTRL_BANK1_INFO1_PAGE_CFG_ECC_EN_0_MASK   0xfu

Definition at line 1591 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO1_PAGE_CFG_ECC_EN_0_OFFSET

#define FLASH_CTRL_BANK1_INFO1_PAGE_CFG_ECC_EN_0_OFFSET   20

Definition at line 1592 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO1_PAGE_CFG_ECC_EN_FIELD_WIDTH

#define FLASH_CTRL_BANK1_INFO1_PAGE_CFG_ECC_EN_FIELD_WIDTH   4

Definition at line 1564 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO1_PAGE_CFG_EN_0_FIELD

#define FLASH_CTRL_BANK1_INFO1_PAGE_CFG_EN_0_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK1_INFO1_PAGE_CFG_EN_0_MASK, .index = FLASH_CTRL_BANK1_INFO1_PAGE_CFG_EN_0_OFFSET })

Definition at line 1573 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO1_PAGE_CFG_EN_0_MASK

#define FLASH_CTRL_BANK1_INFO1_PAGE_CFG_EN_0_MASK   0xfu

Definition at line 1571 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO1_PAGE_CFG_EN_0_OFFSET

#define FLASH_CTRL_BANK1_INFO1_PAGE_CFG_EN_0_OFFSET   0

Definition at line 1572 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO1_PAGE_CFG_EN_FIELD_WIDTH

#define FLASH_CTRL_BANK1_INFO1_PAGE_CFG_EN_FIELD_WIDTH   4

Definition at line 1559 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO1_PAGE_CFG_ERASE_EN_0_FIELD

#define FLASH_CTRL_BANK1_INFO1_PAGE_CFG_ERASE_EN_0_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK1_INFO1_PAGE_CFG_ERASE_EN_0_MASK, .index = FLASH_CTRL_BANK1_INFO1_PAGE_CFG_ERASE_EN_0_OFFSET })

Definition at line 1585 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO1_PAGE_CFG_ERASE_EN_0_MASK

#define FLASH_CTRL_BANK1_INFO1_PAGE_CFG_ERASE_EN_0_MASK   0xfu

Definition at line 1583 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO1_PAGE_CFG_ERASE_EN_0_OFFSET

#define FLASH_CTRL_BANK1_INFO1_PAGE_CFG_ERASE_EN_0_OFFSET   12

Definition at line 1584 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO1_PAGE_CFG_ERASE_EN_FIELD_WIDTH

#define FLASH_CTRL_BANK1_INFO1_PAGE_CFG_ERASE_EN_FIELD_WIDTH   4

Definition at line 1562 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO1_PAGE_CFG_HE_EN_0_FIELD

#define FLASH_CTRL_BANK1_INFO1_PAGE_CFG_HE_EN_0_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK1_INFO1_PAGE_CFG_HE_EN_0_MASK, .index = FLASH_CTRL_BANK1_INFO1_PAGE_CFG_HE_EN_0_OFFSET })

Definition at line 1597 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO1_PAGE_CFG_HE_EN_0_MASK

#define FLASH_CTRL_BANK1_INFO1_PAGE_CFG_HE_EN_0_MASK   0xfu

Definition at line 1595 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO1_PAGE_CFG_HE_EN_0_OFFSET

#define FLASH_CTRL_BANK1_INFO1_PAGE_CFG_HE_EN_0_OFFSET   24

Definition at line 1596 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO1_PAGE_CFG_HE_EN_FIELD_WIDTH

#define FLASH_CTRL_BANK1_INFO1_PAGE_CFG_HE_EN_FIELD_WIDTH   4

Definition at line 1565 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO1_PAGE_CFG_MULTIREG_COUNT

#define FLASH_CTRL_BANK1_INFO1_PAGE_CFG_MULTIREG_COUNT   1

Definition at line 1566 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO1_PAGE_CFG_PROG_EN_0_FIELD

#define FLASH_CTRL_BANK1_INFO1_PAGE_CFG_PROG_EN_0_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK1_INFO1_PAGE_CFG_PROG_EN_0_MASK, .index = FLASH_CTRL_BANK1_INFO1_PAGE_CFG_PROG_EN_0_OFFSET })

Definition at line 1581 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO1_PAGE_CFG_PROG_EN_0_MASK

#define FLASH_CTRL_BANK1_INFO1_PAGE_CFG_PROG_EN_0_MASK   0xfu

Definition at line 1579 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO1_PAGE_CFG_PROG_EN_0_OFFSET

#define FLASH_CTRL_BANK1_INFO1_PAGE_CFG_PROG_EN_0_OFFSET   8

Definition at line 1580 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO1_PAGE_CFG_PROG_EN_FIELD_WIDTH

#define FLASH_CTRL_BANK1_INFO1_PAGE_CFG_PROG_EN_FIELD_WIDTH   4

Definition at line 1561 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO1_PAGE_CFG_RD_EN_0_FIELD

#define FLASH_CTRL_BANK1_INFO1_PAGE_CFG_RD_EN_0_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK1_INFO1_PAGE_CFG_RD_EN_0_MASK, .index = FLASH_CTRL_BANK1_INFO1_PAGE_CFG_RD_EN_0_OFFSET })

Definition at line 1577 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO1_PAGE_CFG_RD_EN_0_MASK

#define FLASH_CTRL_BANK1_INFO1_PAGE_CFG_RD_EN_0_MASK   0xfu

Definition at line 1575 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO1_PAGE_CFG_RD_EN_0_OFFSET

#define FLASH_CTRL_BANK1_INFO1_PAGE_CFG_RD_EN_0_OFFSET   4

Definition at line 1576 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO1_PAGE_CFG_RD_EN_FIELD_WIDTH

#define FLASH_CTRL_BANK1_INFO1_PAGE_CFG_RD_EN_FIELD_WIDTH   4

Definition at line 1560 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO1_PAGE_CFG_REG_OFFSET

#define FLASH_CTRL_BANK1_INFO1_PAGE_CFG_REG_OFFSET   0x150

Definition at line 1569 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO1_PAGE_CFG_REG_RESVAL

#define FLASH_CTRL_BANK1_INFO1_PAGE_CFG_REG_RESVAL   0x9999999u

Definition at line 1570 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO1_PAGE_CFG_SCRAMBLE_EN_0_FIELD

#define FLASH_CTRL_BANK1_INFO1_PAGE_CFG_SCRAMBLE_EN_0_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK1_INFO1_PAGE_CFG_SCRAMBLE_EN_0_MASK, .index = FLASH_CTRL_BANK1_INFO1_PAGE_CFG_SCRAMBLE_EN_0_OFFSET })

Definition at line 1589 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO1_PAGE_CFG_SCRAMBLE_EN_0_MASK

#define FLASH_CTRL_BANK1_INFO1_PAGE_CFG_SCRAMBLE_EN_0_MASK   0xfu

Definition at line 1587 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO1_PAGE_CFG_SCRAMBLE_EN_0_OFFSET

#define FLASH_CTRL_BANK1_INFO1_PAGE_CFG_SCRAMBLE_EN_0_OFFSET   16

Definition at line 1588 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO1_PAGE_CFG_SCRAMBLE_EN_FIELD_WIDTH

#define FLASH_CTRL_BANK1_INFO1_PAGE_CFG_SCRAMBLE_EN_FIELD_WIDTH   4

Definition at line 1563 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO1_REGWEN_MULTIREG_COUNT

#define FLASH_CTRL_BANK1_INFO1_REGWEN_MULTIREG_COUNT   1

Definition at line 1549 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO1_REGWEN_REG_OFFSET

#define FLASH_CTRL_BANK1_INFO1_REGWEN_REG_OFFSET   0x14c

Definition at line 1552 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO1_REGWEN_REG_RESVAL

#define FLASH_CTRL_BANK1_INFO1_REGWEN_REG_RESVAL   0x1u

Definition at line 1553 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO1_REGWEN_REGION_0_BIT

#define FLASH_CTRL_BANK1_INFO1_REGWEN_REGION_0_BIT   0

Definition at line 1554 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO1_REGWEN_REGION_0_VALUE_PAGE_ENABLED

#define FLASH_CTRL_BANK1_INFO1_REGWEN_REGION_0_VALUE_PAGE_ENABLED   0x1

Definition at line 1556 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO1_REGWEN_REGION_0_VALUE_PAGE_LOCKED

#define FLASH_CTRL_BANK1_INFO1_REGWEN_REGION_0_VALUE_PAGE_LOCKED   0x0

Definition at line 1555 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO1_REGWEN_REGION_FIELD_WIDTH

#define FLASH_CTRL_BANK1_INFO1_REGWEN_REGION_FIELD_WIDTH   1

Definition at line 1548 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO2_PAGE_CFG_0_ECC_EN_0_FIELD

#define FLASH_CTRL_BANK1_INFO2_PAGE_CFG_0_ECC_EN_0_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK1_INFO2_PAGE_CFG_0_ECC_EN_0_MASK, .index = FLASH_CTRL_BANK1_INFO2_PAGE_CFG_0_ECC_EN_0_OFFSET })

Definition at line 1651 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO2_PAGE_CFG_0_ECC_EN_0_MASK

#define FLASH_CTRL_BANK1_INFO2_PAGE_CFG_0_ECC_EN_0_MASK   0xfu

Definition at line 1649 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO2_PAGE_CFG_0_ECC_EN_0_OFFSET

#define FLASH_CTRL_BANK1_INFO2_PAGE_CFG_0_ECC_EN_0_OFFSET   20

Definition at line 1650 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO2_PAGE_CFG_0_EN_0_FIELD

#define FLASH_CTRL_BANK1_INFO2_PAGE_CFG_0_EN_0_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK1_INFO2_PAGE_CFG_0_EN_0_MASK, .index = FLASH_CTRL_BANK1_INFO2_PAGE_CFG_0_EN_0_OFFSET })

Definition at line 1631 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO2_PAGE_CFG_0_EN_0_MASK

#define FLASH_CTRL_BANK1_INFO2_PAGE_CFG_0_EN_0_MASK   0xfu

Definition at line 1629 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO2_PAGE_CFG_0_EN_0_OFFSET

#define FLASH_CTRL_BANK1_INFO2_PAGE_CFG_0_EN_0_OFFSET   0

Definition at line 1630 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO2_PAGE_CFG_0_ERASE_EN_0_FIELD

#define FLASH_CTRL_BANK1_INFO2_PAGE_CFG_0_ERASE_EN_0_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK1_INFO2_PAGE_CFG_0_ERASE_EN_0_MASK, .index = FLASH_CTRL_BANK1_INFO2_PAGE_CFG_0_ERASE_EN_0_OFFSET })

Definition at line 1643 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO2_PAGE_CFG_0_ERASE_EN_0_MASK

#define FLASH_CTRL_BANK1_INFO2_PAGE_CFG_0_ERASE_EN_0_MASK   0xfu

Definition at line 1641 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO2_PAGE_CFG_0_ERASE_EN_0_OFFSET

#define FLASH_CTRL_BANK1_INFO2_PAGE_CFG_0_ERASE_EN_0_OFFSET   12

Definition at line 1642 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO2_PAGE_CFG_0_HE_EN_0_FIELD

#define FLASH_CTRL_BANK1_INFO2_PAGE_CFG_0_HE_EN_0_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK1_INFO2_PAGE_CFG_0_HE_EN_0_MASK, .index = FLASH_CTRL_BANK1_INFO2_PAGE_CFG_0_HE_EN_0_OFFSET })

Definition at line 1655 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO2_PAGE_CFG_0_HE_EN_0_MASK

#define FLASH_CTRL_BANK1_INFO2_PAGE_CFG_0_HE_EN_0_MASK   0xfu

Definition at line 1653 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO2_PAGE_CFG_0_HE_EN_0_OFFSET

#define FLASH_CTRL_BANK1_INFO2_PAGE_CFG_0_HE_EN_0_OFFSET   24

Definition at line 1654 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO2_PAGE_CFG_0_PROG_EN_0_FIELD

#define FLASH_CTRL_BANK1_INFO2_PAGE_CFG_0_PROG_EN_0_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK1_INFO2_PAGE_CFG_0_PROG_EN_0_MASK, .index = FLASH_CTRL_BANK1_INFO2_PAGE_CFG_0_PROG_EN_0_OFFSET })

Definition at line 1639 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO2_PAGE_CFG_0_PROG_EN_0_MASK

#define FLASH_CTRL_BANK1_INFO2_PAGE_CFG_0_PROG_EN_0_MASK   0xfu

Definition at line 1637 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO2_PAGE_CFG_0_PROG_EN_0_OFFSET

#define FLASH_CTRL_BANK1_INFO2_PAGE_CFG_0_PROG_EN_0_OFFSET   8

Definition at line 1638 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO2_PAGE_CFG_0_RD_EN_0_FIELD

#define FLASH_CTRL_BANK1_INFO2_PAGE_CFG_0_RD_EN_0_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK1_INFO2_PAGE_CFG_0_RD_EN_0_MASK, .index = FLASH_CTRL_BANK1_INFO2_PAGE_CFG_0_RD_EN_0_OFFSET })

Definition at line 1635 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO2_PAGE_CFG_0_RD_EN_0_MASK

#define FLASH_CTRL_BANK1_INFO2_PAGE_CFG_0_RD_EN_0_MASK   0xfu

Definition at line 1633 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO2_PAGE_CFG_0_RD_EN_0_OFFSET

#define FLASH_CTRL_BANK1_INFO2_PAGE_CFG_0_RD_EN_0_OFFSET   4

Definition at line 1634 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO2_PAGE_CFG_0_REG_OFFSET

#define FLASH_CTRL_BANK1_INFO2_PAGE_CFG_0_REG_OFFSET   0x15c

Definition at line 1627 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO2_PAGE_CFG_0_REG_RESVAL

#define FLASH_CTRL_BANK1_INFO2_PAGE_CFG_0_REG_RESVAL   0x9999999u

Definition at line 1628 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO2_PAGE_CFG_0_SCRAMBLE_EN_0_FIELD

#define FLASH_CTRL_BANK1_INFO2_PAGE_CFG_0_SCRAMBLE_EN_0_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK1_INFO2_PAGE_CFG_0_SCRAMBLE_EN_0_MASK, .index = FLASH_CTRL_BANK1_INFO2_PAGE_CFG_0_SCRAMBLE_EN_0_OFFSET })

Definition at line 1647 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO2_PAGE_CFG_0_SCRAMBLE_EN_0_MASK

#define FLASH_CTRL_BANK1_INFO2_PAGE_CFG_0_SCRAMBLE_EN_0_MASK   0xfu

Definition at line 1645 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO2_PAGE_CFG_0_SCRAMBLE_EN_0_OFFSET

#define FLASH_CTRL_BANK1_INFO2_PAGE_CFG_0_SCRAMBLE_EN_0_OFFSET   16

Definition at line 1646 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO2_PAGE_CFG_1_ECC_EN_1_FIELD

#define FLASH_CTRL_BANK1_INFO2_PAGE_CFG_1_ECC_EN_1_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK1_INFO2_PAGE_CFG_1_ECC_EN_1_MASK, .index = FLASH_CTRL_BANK1_INFO2_PAGE_CFG_1_ECC_EN_1_OFFSET })

Definition at line 1683 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO2_PAGE_CFG_1_ECC_EN_1_MASK

#define FLASH_CTRL_BANK1_INFO2_PAGE_CFG_1_ECC_EN_1_MASK   0xfu

Definition at line 1681 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO2_PAGE_CFG_1_ECC_EN_1_OFFSET

#define FLASH_CTRL_BANK1_INFO2_PAGE_CFG_1_ECC_EN_1_OFFSET   20

Definition at line 1682 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO2_PAGE_CFG_1_EN_1_FIELD

#define FLASH_CTRL_BANK1_INFO2_PAGE_CFG_1_EN_1_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK1_INFO2_PAGE_CFG_1_EN_1_MASK, .index = FLASH_CTRL_BANK1_INFO2_PAGE_CFG_1_EN_1_OFFSET })

Definition at line 1663 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO2_PAGE_CFG_1_EN_1_MASK

#define FLASH_CTRL_BANK1_INFO2_PAGE_CFG_1_EN_1_MASK   0xfu

Definition at line 1661 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO2_PAGE_CFG_1_EN_1_OFFSET

#define FLASH_CTRL_BANK1_INFO2_PAGE_CFG_1_EN_1_OFFSET   0

Definition at line 1662 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO2_PAGE_CFG_1_ERASE_EN_1_FIELD

#define FLASH_CTRL_BANK1_INFO2_PAGE_CFG_1_ERASE_EN_1_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK1_INFO2_PAGE_CFG_1_ERASE_EN_1_MASK, .index = FLASH_CTRL_BANK1_INFO2_PAGE_CFG_1_ERASE_EN_1_OFFSET })

Definition at line 1675 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO2_PAGE_CFG_1_ERASE_EN_1_MASK

#define FLASH_CTRL_BANK1_INFO2_PAGE_CFG_1_ERASE_EN_1_MASK   0xfu

Definition at line 1673 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO2_PAGE_CFG_1_ERASE_EN_1_OFFSET

#define FLASH_CTRL_BANK1_INFO2_PAGE_CFG_1_ERASE_EN_1_OFFSET   12

Definition at line 1674 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO2_PAGE_CFG_1_HE_EN_1_FIELD

#define FLASH_CTRL_BANK1_INFO2_PAGE_CFG_1_HE_EN_1_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK1_INFO2_PAGE_CFG_1_HE_EN_1_MASK, .index = FLASH_CTRL_BANK1_INFO2_PAGE_CFG_1_HE_EN_1_OFFSET })

Definition at line 1687 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO2_PAGE_CFG_1_HE_EN_1_MASK

#define FLASH_CTRL_BANK1_INFO2_PAGE_CFG_1_HE_EN_1_MASK   0xfu

Definition at line 1685 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO2_PAGE_CFG_1_HE_EN_1_OFFSET

#define FLASH_CTRL_BANK1_INFO2_PAGE_CFG_1_HE_EN_1_OFFSET   24

Definition at line 1686 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO2_PAGE_CFG_1_PROG_EN_1_FIELD

#define FLASH_CTRL_BANK1_INFO2_PAGE_CFG_1_PROG_EN_1_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK1_INFO2_PAGE_CFG_1_PROG_EN_1_MASK, .index = FLASH_CTRL_BANK1_INFO2_PAGE_CFG_1_PROG_EN_1_OFFSET })

Definition at line 1671 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO2_PAGE_CFG_1_PROG_EN_1_MASK

#define FLASH_CTRL_BANK1_INFO2_PAGE_CFG_1_PROG_EN_1_MASK   0xfu

Definition at line 1669 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO2_PAGE_CFG_1_PROG_EN_1_OFFSET

#define FLASH_CTRL_BANK1_INFO2_PAGE_CFG_1_PROG_EN_1_OFFSET   8

Definition at line 1670 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO2_PAGE_CFG_1_RD_EN_1_FIELD

#define FLASH_CTRL_BANK1_INFO2_PAGE_CFG_1_RD_EN_1_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK1_INFO2_PAGE_CFG_1_RD_EN_1_MASK, .index = FLASH_CTRL_BANK1_INFO2_PAGE_CFG_1_RD_EN_1_OFFSET })

Definition at line 1667 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO2_PAGE_CFG_1_RD_EN_1_MASK

#define FLASH_CTRL_BANK1_INFO2_PAGE_CFG_1_RD_EN_1_MASK   0xfu

Definition at line 1665 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO2_PAGE_CFG_1_RD_EN_1_OFFSET

#define FLASH_CTRL_BANK1_INFO2_PAGE_CFG_1_RD_EN_1_OFFSET   4

Definition at line 1666 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO2_PAGE_CFG_1_REG_OFFSET

#define FLASH_CTRL_BANK1_INFO2_PAGE_CFG_1_REG_OFFSET   0x160

Definition at line 1659 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO2_PAGE_CFG_1_REG_RESVAL

#define FLASH_CTRL_BANK1_INFO2_PAGE_CFG_1_REG_RESVAL   0x9999999u

Definition at line 1660 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO2_PAGE_CFG_1_SCRAMBLE_EN_1_FIELD

#define FLASH_CTRL_BANK1_INFO2_PAGE_CFG_1_SCRAMBLE_EN_1_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_BANK1_INFO2_PAGE_CFG_1_SCRAMBLE_EN_1_MASK, .index = FLASH_CTRL_BANK1_INFO2_PAGE_CFG_1_SCRAMBLE_EN_1_OFFSET })

Definition at line 1679 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO2_PAGE_CFG_1_SCRAMBLE_EN_1_MASK

#define FLASH_CTRL_BANK1_INFO2_PAGE_CFG_1_SCRAMBLE_EN_1_MASK   0xfu

Definition at line 1677 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO2_PAGE_CFG_1_SCRAMBLE_EN_1_OFFSET

#define FLASH_CTRL_BANK1_INFO2_PAGE_CFG_1_SCRAMBLE_EN_1_OFFSET   16

Definition at line 1678 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO2_PAGE_CFG_ECC_EN_FIELD_WIDTH

#define FLASH_CTRL_BANK1_INFO2_PAGE_CFG_ECC_EN_FIELD_WIDTH   4

Definition at line 1622 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO2_PAGE_CFG_EN_FIELD_WIDTH

#define FLASH_CTRL_BANK1_INFO2_PAGE_CFG_EN_FIELD_WIDTH   4

Definition at line 1617 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO2_PAGE_CFG_ERASE_EN_FIELD_WIDTH

#define FLASH_CTRL_BANK1_INFO2_PAGE_CFG_ERASE_EN_FIELD_WIDTH   4

Definition at line 1620 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO2_PAGE_CFG_HE_EN_FIELD_WIDTH

#define FLASH_CTRL_BANK1_INFO2_PAGE_CFG_HE_EN_FIELD_WIDTH   4

Definition at line 1623 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO2_PAGE_CFG_MULTIREG_COUNT

#define FLASH_CTRL_BANK1_INFO2_PAGE_CFG_MULTIREG_COUNT   2

Definition at line 1624 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO2_PAGE_CFG_PROG_EN_FIELD_WIDTH

#define FLASH_CTRL_BANK1_INFO2_PAGE_CFG_PROG_EN_FIELD_WIDTH   4

Definition at line 1619 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO2_PAGE_CFG_RD_EN_FIELD_WIDTH

#define FLASH_CTRL_BANK1_INFO2_PAGE_CFG_RD_EN_FIELD_WIDTH   4

Definition at line 1618 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO2_PAGE_CFG_SCRAMBLE_EN_FIELD_WIDTH

#define FLASH_CTRL_BANK1_INFO2_PAGE_CFG_SCRAMBLE_EN_FIELD_WIDTH   4

Definition at line 1621 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO2_REGWEN_0_REG_OFFSET

#define FLASH_CTRL_BANK1_INFO2_REGWEN_0_REG_OFFSET   0x154

Definition at line 1605 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO2_REGWEN_0_REG_RESVAL

#define FLASH_CTRL_BANK1_INFO2_REGWEN_0_REG_RESVAL   0x1u

Definition at line 1606 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO2_REGWEN_0_REGION_0_BIT

#define FLASH_CTRL_BANK1_INFO2_REGWEN_0_REGION_0_BIT   0

Definition at line 1607 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO2_REGWEN_0_REGION_0_VALUE_PAGE_ENABLED

#define FLASH_CTRL_BANK1_INFO2_REGWEN_0_REGION_0_VALUE_PAGE_ENABLED   0x1

Definition at line 1609 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO2_REGWEN_0_REGION_0_VALUE_PAGE_LOCKED

#define FLASH_CTRL_BANK1_INFO2_REGWEN_0_REGION_0_VALUE_PAGE_LOCKED   0x0

Definition at line 1608 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO2_REGWEN_1_REG_OFFSET

#define FLASH_CTRL_BANK1_INFO2_REGWEN_1_REG_OFFSET   0x158

Definition at line 1612 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO2_REGWEN_1_REG_RESVAL

#define FLASH_CTRL_BANK1_INFO2_REGWEN_1_REG_RESVAL   0x1u

Definition at line 1613 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO2_REGWEN_1_REGION_1_BIT

#define FLASH_CTRL_BANK1_INFO2_REGWEN_1_REGION_1_BIT   0

Definition at line 1614 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO2_REGWEN_MULTIREG_COUNT

#define FLASH_CTRL_BANK1_INFO2_REGWEN_MULTIREG_COUNT   2

Definition at line 1602 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK1_INFO2_REGWEN_REGION_FIELD_WIDTH

#define FLASH_CTRL_BANK1_INFO2_REGWEN_REGION_FIELD_WIDTH   1

Definition at line 1601 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK_CFG_REGWEN_BANK_BIT

#define FLASH_CTRL_BANK_CFG_REGWEN_BANK_BIT   0

Definition at line 1705 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK_CFG_REGWEN_BANK_VALUE_BANK_ENABLED

#define FLASH_CTRL_BANK_CFG_REGWEN_BANK_VALUE_BANK_ENABLED   0x1

Definition at line 1707 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK_CFG_REGWEN_BANK_VALUE_BANK_LOCKED

#define FLASH_CTRL_BANK_CFG_REGWEN_BANK_VALUE_BANK_LOCKED   0x0

Definition at line 1706 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK_CFG_REGWEN_REG_OFFSET

#define FLASH_CTRL_BANK_CFG_REGWEN_REG_OFFSET   0x168

Definition at line 1703 of file flash_ctrl_regs.h.

FLASH_CTRL_BANK_CFG_REGWEN_REG_RESVAL

#define FLASH_CTRL_BANK_CFG_REGWEN_REG_RESVAL   0x1u

Definition at line 1704 of file flash_ctrl_regs.h.

FLASH_CTRL_CONTROL_ERASE_SEL_BIT

#define FLASH_CTRL_CONTROL_ERASE_SEL_BIT   7

Definition at line 159 of file flash_ctrl_regs.h.

FLASH_CTRL_CONTROL_ERASE_SEL_VALUE_BANK_ERASE

#define FLASH_CTRL_CONTROL_ERASE_SEL_VALUE_BANK_ERASE   0x1

Definition at line 161 of file flash_ctrl_regs.h.

FLASH_CTRL_CONTROL_ERASE_SEL_VALUE_PAGE_ERASE

#define FLASH_CTRL_CONTROL_ERASE_SEL_VALUE_PAGE_ERASE   0x0

Definition at line 160 of file flash_ctrl_regs.h.

FLASH_CTRL_CONTROL_INFO_SEL_FIELD

#define FLASH_CTRL_CONTROL_INFO_SEL_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_CONTROL_INFO_SEL_MASK, .index = FLASH_CTRL_CONTROL_INFO_SEL_OFFSET })

Definition at line 165 of file flash_ctrl_regs.h.

FLASH_CTRL_CONTROL_INFO_SEL_MASK

#define FLASH_CTRL_CONTROL_INFO_SEL_MASK   0x3u

Definition at line 163 of file flash_ctrl_regs.h.

FLASH_CTRL_CONTROL_INFO_SEL_OFFSET

#define FLASH_CTRL_CONTROL_INFO_SEL_OFFSET   9

Definition at line 164 of file flash_ctrl_regs.h.

FLASH_CTRL_CONTROL_NUM_FIELD

#define FLASH_CTRL_CONTROL_NUM_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_CONTROL_NUM_MASK, .index = FLASH_CTRL_CONTROL_NUM_OFFSET })

Definition at line 169 of file flash_ctrl_regs.h.

FLASH_CTRL_CONTROL_NUM_MASK

#define FLASH_CTRL_CONTROL_NUM_MASK   0xfffu

Definition at line 167 of file flash_ctrl_regs.h.

FLASH_CTRL_CONTROL_NUM_OFFSET

#define FLASH_CTRL_CONTROL_NUM_OFFSET   16

Definition at line 168 of file flash_ctrl_regs.h.

FLASH_CTRL_CONTROL_OP_FIELD

#define FLASH_CTRL_CONTROL_OP_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_CONTROL_OP_MASK, .index = FLASH_CTRL_CONTROL_OP_OFFSET })

Definition at line 151 of file flash_ctrl_regs.h.

FLASH_CTRL_CONTROL_OP_MASK

#define FLASH_CTRL_CONTROL_OP_MASK   0x3u

Definition at line 149 of file flash_ctrl_regs.h.

FLASH_CTRL_CONTROL_OP_OFFSET

#define FLASH_CTRL_CONTROL_OP_OFFSET   4

Definition at line 150 of file flash_ctrl_regs.h.

FLASH_CTRL_CONTROL_OP_VALUE_ERASE

#define FLASH_CTRL_CONTROL_OP_VALUE_ERASE   0x2

Definition at line 155 of file flash_ctrl_regs.h.

FLASH_CTRL_CONTROL_OP_VALUE_PROG

#define FLASH_CTRL_CONTROL_OP_VALUE_PROG   0x1

Definition at line 154 of file flash_ctrl_regs.h.

FLASH_CTRL_CONTROL_OP_VALUE_READ

#define FLASH_CTRL_CONTROL_OP_VALUE_READ   0x0

Definition at line 153 of file flash_ctrl_regs.h.

FLASH_CTRL_CONTROL_PARTITION_SEL_BIT

#define FLASH_CTRL_CONTROL_PARTITION_SEL_BIT   8

Definition at line 162 of file flash_ctrl_regs.h.

FLASH_CTRL_CONTROL_PROG_SEL_BIT

#define FLASH_CTRL_CONTROL_PROG_SEL_BIT   6

Definition at line 156 of file flash_ctrl_regs.h.

FLASH_CTRL_CONTROL_PROG_SEL_VALUE_NORMAL_PROGRAM

#define FLASH_CTRL_CONTROL_PROG_SEL_VALUE_NORMAL_PROGRAM   0x0

Definition at line 157 of file flash_ctrl_regs.h.

FLASH_CTRL_CONTROL_PROG_SEL_VALUE_PROGRAM_REPAIR

#define FLASH_CTRL_CONTROL_PROG_SEL_VALUE_PROGRAM_REPAIR   0x1

Definition at line 158 of file flash_ctrl_regs.h.

FLASH_CTRL_CONTROL_REG_OFFSET

#define FLASH_CTRL_CONTROL_REG_OFFSET   0x20

Definition at line 146 of file flash_ctrl_regs.h.

FLASH_CTRL_CONTROL_REG_RESVAL

#define FLASH_CTRL_CONTROL_REG_RESVAL   0x0u

Definition at line 147 of file flash_ctrl_regs.h.

FLASH_CTRL_CONTROL_START_BIT

#define FLASH_CTRL_CONTROL_START_BIT   0

Definition at line 148 of file flash_ctrl_regs.h.

FLASH_CTRL_CSR0_REGWEN_FIELD0_BIT

#define FLASH_CTRL_CSR0_REGWEN_FIELD0_BIT   0

Definition at line 1885 of file flash_ctrl_regs.h.

FLASH_CTRL_CSR0_REGWEN_REG_OFFSET

#define FLASH_CTRL_CSR0_REGWEN_REG_OFFSET   0x0

Definition at line 1883 of file flash_ctrl_regs.h.

FLASH_CTRL_CSR0_REGWEN_REG_RESVAL

#define FLASH_CTRL_CSR0_REGWEN_REG_RESVAL   0x1u

Definition at line 1884 of file flash_ctrl_regs.h.

FLASH_CTRL_CSR10_REG_OFFSET

#define FLASH_CTRL_CSR10_REG_OFFSET   0x28

Definition at line 2051 of file flash_ctrl_regs.h.

FLASH_CTRL_CSR10_REG_RESVAL

#define FLASH_CTRL_CSR10_REG_RESVAL   0x0u

Definition at line 2052 of file flash_ctrl_regs.h.

FLASH_CTRL_CSR11_REG_OFFSET

#define FLASH_CTRL_CSR11_REG_OFFSET   0x2c

Definition at line 2055 of file flash_ctrl_regs.h.

FLASH_CTRL_CSR11_REG_RESVAL

#define FLASH_CTRL_CSR11_REG_RESVAL   0x0u

Definition at line 2056 of file flash_ctrl_regs.h.

FLASH_CTRL_CSR12_FIELD0_FIELD

#define FLASH_CTRL_CSR12_FIELD0_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_CSR12_FIELD0_MASK, .index = FLASH_CTRL_CSR12_FIELD0_OFFSET })

Definition at line 2063 of file flash_ctrl_regs.h.

FLASH_CTRL_CSR12_FIELD0_MASK

#define FLASH_CTRL_CSR12_FIELD0_MASK   0x3ffu

Definition at line 2061 of file flash_ctrl_regs.h.

FLASH_CTRL_CSR12_FIELD0_OFFSET

#define FLASH_CTRL_CSR12_FIELD0_OFFSET   0

Definition at line 2062 of file flash_ctrl_regs.h.

FLASH_CTRL_CSR12_REG_OFFSET

#define FLASH_CTRL_CSR12_REG_OFFSET   0x30

Definition at line 2059 of file flash_ctrl_regs.h.

FLASH_CTRL_CSR12_REG_RESVAL

#define FLASH_CTRL_CSR12_REG_RESVAL   0x0u

Definition at line 2060 of file flash_ctrl_regs.h.

FLASH_CTRL_CSR13_FIELD0_FIELD

#define FLASH_CTRL_CSR13_FIELD0_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_CSR13_FIELD0_MASK, .index = FLASH_CTRL_CSR13_FIELD0_OFFSET })

Definition at line 2071 of file flash_ctrl_regs.h.

FLASH_CTRL_CSR13_FIELD0_MASK

#define FLASH_CTRL_CSR13_FIELD0_MASK   0xfffffu

Definition at line 2069 of file flash_ctrl_regs.h.

FLASH_CTRL_CSR13_FIELD0_OFFSET

#define FLASH_CTRL_CSR13_FIELD0_OFFSET   0

Definition at line 2070 of file flash_ctrl_regs.h.

FLASH_CTRL_CSR13_FIELD1_BIT

#define FLASH_CTRL_CSR13_FIELD1_BIT   20

Definition at line 2073 of file flash_ctrl_regs.h.

FLASH_CTRL_CSR13_REG_OFFSET

#define FLASH_CTRL_CSR13_REG_OFFSET   0x34

Definition at line 2067 of file flash_ctrl_regs.h.

FLASH_CTRL_CSR13_REG_RESVAL

#define FLASH_CTRL_CSR13_REG_RESVAL   0x0u

Definition at line 2068 of file flash_ctrl_regs.h.

FLASH_CTRL_CSR14_FIELD0_FIELD

#define FLASH_CTRL_CSR14_FIELD0_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_CSR14_FIELD0_MASK, .index = FLASH_CTRL_CSR14_FIELD0_OFFSET })

Definition at line 2080 of file flash_ctrl_regs.h.

FLASH_CTRL_CSR14_FIELD0_MASK

#define FLASH_CTRL_CSR14_FIELD0_MASK   0xffu

Definition at line 2078 of file flash_ctrl_regs.h.

FLASH_CTRL_CSR14_FIELD0_OFFSET

#define FLASH_CTRL_CSR14_FIELD0_OFFSET   0

Definition at line 2079 of file flash_ctrl_regs.h.

FLASH_CTRL_CSR14_FIELD1_BIT

#define FLASH_CTRL_CSR14_FIELD1_BIT   8

Definition at line 2082 of file flash_ctrl_regs.h.

FLASH_CTRL_CSR14_REG_OFFSET

#define FLASH_CTRL_CSR14_REG_OFFSET   0x38

Definition at line 2076 of file flash_ctrl_regs.h.

FLASH_CTRL_CSR14_REG_RESVAL

#define FLASH_CTRL_CSR14_REG_RESVAL   0x0u

Definition at line 2077 of file flash_ctrl_regs.h.

FLASH_CTRL_CSR15_FIELD0_FIELD

#define FLASH_CTRL_CSR15_FIELD0_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_CSR15_FIELD0_MASK, .index = FLASH_CTRL_CSR15_FIELD0_OFFSET })

Definition at line 2089 of file flash_ctrl_regs.h.

FLASH_CTRL_CSR15_FIELD0_MASK

#define FLASH_CTRL_CSR15_FIELD0_MASK   0xffu

Definition at line 2087 of file flash_ctrl_regs.h.

FLASH_CTRL_CSR15_FIELD0_OFFSET

#define FLASH_CTRL_CSR15_FIELD0_OFFSET   0

Definition at line 2088 of file flash_ctrl_regs.h.

FLASH_CTRL_CSR15_FIELD1_BIT

#define FLASH_CTRL_CSR15_FIELD1_BIT   8

Definition at line 2091 of file flash_ctrl_regs.h.

FLASH_CTRL_CSR15_REG_OFFSET

#define FLASH_CTRL_CSR15_REG_OFFSET   0x3c

Definition at line 2085 of file flash_ctrl_regs.h.

FLASH_CTRL_CSR15_REG_RESVAL

#define FLASH_CTRL_CSR15_REG_RESVAL   0x0u

Definition at line 2086 of file flash_ctrl_regs.h.

FLASH_CTRL_CSR16_FIELD0_FIELD

#define FLASH_CTRL_CSR16_FIELD0_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_CSR16_FIELD0_MASK, .index = FLASH_CTRL_CSR16_FIELD0_OFFSET })

Definition at line 2098 of file flash_ctrl_regs.h.

FLASH_CTRL_CSR16_FIELD0_MASK

#define FLASH_CTRL_CSR16_FIELD0_MASK   0xffu

Definition at line 2096 of file flash_ctrl_regs.h.

FLASH_CTRL_CSR16_FIELD0_OFFSET

#define FLASH_CTRL_CSR16_FIELD0_OFFSET   0

Definition at line 2097 of file flash_ctrl_regs.h.

FLASH_CTRL_CSR16_FIELD1_BIT

#define FLASH_CTRL_CSR16_FIELD1_BIT   8

Definition at line 2100 of file flash_ctrl_regs.h.

FLASH_CTRL_CSR16_REG_OFFSET

#define FLASH_CTRL_CSR16_REG_OFFSET   0x40

Definition at line 2094 of file flash_ctrl_regs.h.

FLASH_CTRL_CSR16_REG_RESVAL

#define FLASH_CTRL_CSR16_REG_RESVAL   0x0u

Definition at line 2095 of file flash_ctrl_regs.h.

FLASH_CTRL_CSR17_FIELD0_FIELD

#define FLASH_CTRL_CSR17_FIELD0_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_CSR17_FIELD0_MASK, .index = FLASH_CTRL_CSR17_FIELD0_OFFSET })

Definition at line 2107 of file flash_ctrl_regs.h.

FLASH_CTRL_CSR17_FIELD0_MASK

#define FLASH_CTRL_CSR17_FIELD0_MASK   0xffu

Definition at line 2105 of file flash_ctrl_regs.h.

FLASH_CTRL_CSR17_FIELD0_OFFSET

#define FLASH_CTRL_CSR17_FIELD0_OFFSET   0

Definition at line 2106 of file flash_ctrl_regs.h.

FLASH_CTRL_CSR17_FIELD1_BIT

#define FLASH_CTRL_CSR17_FIELD1_BIT   8

Definition at line 2109 of file flash_ctrl_regs.h.

FLASH_CTRL_CSR17_REG_OFFSET

#define FLASH_CTRL_CSR17_REG_OFFSET   0x44

Definition at line 2103 of file flash_ctrl_regs.h.

FLASH_CTRL_CSR17_REG_RESVAL

#define FLASH_CTRL_CSR17_REG_RESVAL   0x0u

Definition at line 2104 of file flash_ctrl_regs.h.

FLASH_CTRL_CSR18_FIELD0_BIT

#define FLASH_CTRL_CSR18_FIELD0_BIT   0

Definition at line 2114 of file flash_ctrl_regs.h.

FLASH_CTRL_CSR18_REG_OFFSET

#define FLASH_CTRL_CSR18_REG_OFFSET   0x48

Definition at line 2112 of file flash_ctrl_regs.h.

FLASH_CTRL_CSR18_REG_RESVAL

#define FLASH_CTRL_CSR18_REG_RESVAL   0x0u

Definition at line 2113 of file flash_ctrl_regs.h.

FLASH_CTRL_CSR19_FIELD0_BIT

#define FLASH_CTRL_CSR19_FIELD0_BIT   0

Definition at line 2119 of file flash_ctrl_regs.h.

FLASH_CTRL_CSR19_REG_OFFSET

#define FLASH_CTRL_CSR19_REG_OFFSET   0x4c

Definition at line 2117 of file flash_ctrl_regs.h.

FLASH_CTRL_CSR19_REG_RESVAL

#define FLASH_CTRL_CSR19_REG_RESVAL   0x0u

Definition at line 2118 of file flash_ctrl_regs.h.

FLASH_CTRL_CSR1_FIELD0_FIELD

#define FLASH_CTRL_CSR1_FIELD0_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_CSR1_FIELD0_MASK, .index = FLASH_CTRL_CSR1_FIELD0_OFFSET })

Definition at line 1892 of file flash_ctrl_regs.h.

FLASH_CTRL_CSR1_FIELD0_MASK

#define FLASH_CTRL_CSR1_FIELD0_MASK   0xffu

Definition at line 1890 of file flash_ctrl_regs.h.

FLASH_CTRL_CSR1_FIELD0_OFFSET

#define FLASH_CTRL_CSR1_FIELD0_OFFSET   0

Definition at line 1891 of file flash_ctrl_regs.h.

FLASH_CTRL_CSR1_FIELD1_FIELD

#define FLASH_CTRL_CSR1_FIELD1_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_CSR1_FIELD1_MASK, .index = FLASH_CTRL_CSR1_FIELD1_OFFSET })

Definition at line 1896 of file flash_ctrl_regs.h.

FLASH_CTRL_CSR1_FIELD1_MASK

#define FLASH_CTRL_CSR1_FIELD1_MASK   0x1fu

Definition at line 1894 of file flash_ctrl_regs.h.

FLASH_CTRL_CSR1_FIELD1_OFFSET

#define FLASH_CTRL_CSR1_FIELD1_OFFSET   8

Definition at line 1895 of file flash_ctrl_regs.h.

FLASH_CTRL_CSR1_REG_OFFSET

#define FLASH_CTRL_CSR1_REG_OFFSET   0x4

Definition at line 1888 of file flash_ctrl_regs.h.

FLASH_CTRL_CSR1_REG_RESVAL

#define FLASH_CTRL_CSR1_REG_RESVAL   0x0u

Definition at line 1889 of file flash_ctrl_regs.h.

FLASH_CTRL_CSR20_FIELD0_BIT

#define FLASH_CTRL_CSR20_FIELD0_BIT   0

Definition at line 2124 of file flash_ctrl_regs.h.

FLASH_CTRL_CSR20_FIELD1_BIT

#define FLASH_CTRL_CSR20_FIELD1_BIT   1

Definition at line 2125 of file flash_ctrl_regs.h.

FLASH_CTRL_CSR20_FIELD2_BIT

#define FLASH_CTRL_CSR20_FIELD2_BIT   2

Definition at line 2126 of file flash_ctrl_regs.h.

FLASH_CTRL_CSR20_REG_OFFSET

#define FLASH_CTRL_CSR20_REG_OFFSET   0x50

Definition at line 2122 of file flash_ctrl_regs.h.

FLASH_CTRL_CSR20_REG_RESVAL

#define FLASH_CTRL_CSR20_REG_RESVAL   0x0u

Definition at line 2123 of file flash_ctrl_regs.h.

FLASH_CTRL_CSR2_FIELD0_BIT

#define FLASH_CTRL_CSR2_FIELD0_BIT   0

Definition at line 1902 of file flash_ctrl_regs.h.

FLASH_CTRL_CSR2_FIELD1_BIT

#define FLASH_CTRL_CSR2_FIELD1_BIT   1

Definition at line 1903 of file flash_ctrl_regs.h.

FLASH_CTRL_CSR2_FIELD2_BIT

#define FLASH_CTRL_CSR2_FIELD2_BIT   2

Definition at line 1904 of file flash_ctrl_regs.h.

FLASH_CTRL_CSR2_FIELD3_BIT

#define FLASH_CTRL_CSR2_FIELD3_BIT   3

Definition at line 1905 of file flash_ctrl_regs.h.

FLASH_CTRL_CSR2_FIELD4_BIT

#define FLASH_CTRL_CSR2_FIELD4_BIT   4

Definition at line 1906 of file flash_ctrl_regs.h.

FLASH_CTRL_CSR2_FIELD5_BIT

#define FLASH_CTRL_CSR2_FIELD5_BIT   5

Definition at line 1907 of file flash_ctrl_regs.h.

FLASH_CTRL_CSR2_FIELD6_BIT

#define FLASH_CTRL_CSR2_FIELD6_BIT   6

Definition at line 1908 of file flash_ctrl_regs.h.

FLASH_CTRL_CSR2_FIELD7_BIT

#define FLASH_CTRL_CSR2_FIELD7_BIT   7

Definition at line 1909 of file flash_ctrl_regs.h.

FLASH_CTRL_CSR2_REG_OFFSET

#define FLASH_CTRL_CSR2_REG_OFFSET   0x8

Definition at line 1900 of file flash_ctrl_regs.h.

FLASH_CTRL_CSR2_REG_RESVAL

#define FLASH_CTRL_CSR2_REG_RESVAL   0x0u

Definition at line 1901 of file flash_ctrl_regs.h.

FLASH_CTRL_CSR3_FIELD0_FIELD

#define FLASH_CTRL_CSR3_FIELD0_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_CSR3_FIELD0_MASK, .index = FLASH_CTRL_CSR3_FIELD0_OFFSET })

Definition at line 1916 of file flash_ctrl_regs.h.

FLASH_CTRL_CSR3_FIELD0_MASK

#define FLASH_CTRL_CSR3_FIELD0_MASK   0xfu

Definition at line 1914 of file flash_ctrl_regs.h.

FLASH_CTRL_CSR3_FIELD0_OFFSET

#define FLASH_CTRL_CSR3_FIELD0_OFFSET   0

Definition at line 1915 of file flash_ctrl_regs.h.

FLASH_CTRL_CSR3_FIELD1_FIELD

#define FLASH_CTRL_CSR3_FIELD1_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_CSR3_FIELD1_MASK, .index = FLASH_CTRL_CSR3_FIELD1_OFFSET })

Definition at line 1920 of file flash_ctrl_regs.h.

FLASH_CTRL_CSR3_FIELD1_MASK

#define FLASH_CTRL_CSR3_FIELD1_MASK   0xfu

Definition at line 1918 of file flash_ctrl_regs.h.

FLASH_CTRL_CSR3_FIELD1_OFFSET

#define FLASH_CTRL_CSR3_FIELD1_OFFSET   4

Definition at line 1919 of file flash_ctrl_regs.h.

FLASH_CTRL_CSR3_FIELD2_FIELD

#define FLASH_CTRL_CSR3_FIELD2_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_CSR3_FIELD2_MASK, .index = FLASH_CTRL_CSR3_FIELD2_OFFSET })

Definition at line 1924 of file flash_ctrl_regs.h.

FLASH_CTRL_CSR3_FIELD2_MASK

#define FLASH_CTRL_CSR3_FIELD2_MASK   0x7u

Definition at line 1922 of file flash_ctrl_regs.h.

FLASH_CTRL_CSR3_FIELD2_OFFSET

#define FLASH_CTRL_CSR3_FIELD2_OFFSET   8

Definition at line 1923 of file flash_ctrl_regs.h.

FLASH_CTRL_CSR3_FIELD3_FIELD

#define FLASH_CTRL_CSR3_FIELD3_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_CSR3_FIELD3_MASK, .index = FLASH_CTRL_CSR3_FIELD3_OFFSET })

Definition at line 1928 of file flash_ctrl_regs.h.

FLASH_CTRL_CSR3_FIELD3_MASK

#define FLASH_CTRL_CSR3_FIELD3_MASK   0x7u

Definition at line 1926 of file flash_ctrl_regs.h.

FLASH_CTRL_CSR3_FIELD3_OFFSET

#define FLASH_CTRL_CSR3_FIELD3_OFFSET   11

Definition at line 1927 of file flash_ctrl_regs.h.

FLASH_CTRL_CSR3_FIELD4_FIELD

#define FLASH_CTRL_CSR3_FIELD4_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_CSR3_FIELD4_MASK, .index = FLASH_CTRL_CSR3_FIELD4_OFFSET })

Definition at line 1932 of file flash_ctrl_regs.h.

FLASH_CTRL_CSR3_FIELD4_MASK

#define FLASH_CTRL_CSR3_FIELD4_MASK   0x7u

Definition at line 1930 of file flash_ctrl_regs.h.

FLASH_CTRL_CSR3_FIELD4_OFFSET

#define FLASH_CTRL_CSR3_FIELD4_OFFSET   14

Definition at line 1931 of file flash_ctrl_regs.h.

FLASH_CTRL_CSR3_FIELD5_FIELD

#define FLASH_CTRL_CSR3_FIELD5_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_CSR3_FIELD5_MASK, .index = FLASH_CTRL_CSR3_FIELD5_OFFSET })

Definition at line 1936 of file flash_ctrl_regs.h.

FLASH_CTRL_CSR3_FIELD5_MASK

#define FLASH_CTRL_CSR3_FIELD5_MASK   0x7u

Definition at line 1934 of file flash_ctrl_regs.h.

FLASH_CTRL_CSR3_FIELD5_OFFSET

#define FLASH_CTRL_CSR3_FIELD5_OFFSET   17

Definition at line 1935 of file flash_ctrl_regs.h.

FLASH_CTRL_CSR3_FIELD6_BIT

#define FLASH_CTRL_CSR3_FIELD6_BIT   20

Definition at line 1938 of file flash_ctrl_regs.h.

FLASH_CTRL_CSR3_FIELD7_FIELD

#define FLASH_CTRL_CSR3_FIELD7_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_CSR3_FIELD7_MASK, .index = FLASH_CTRL_CSR3_FIELD7_OFFSET })

Definition at line 1941 of file flash_ctrl_regs.h.

FLASH_CTRL_CSR3_FIELD7_MASK

#define FLASH_CTRL_CSR3_FIELD7_MASK   0x7u

Definition at line 1939 of file flash_ctrl_regs.h.

FLASH_CTRL_CSR3_FIELD7_OFFSET

#define FLASH_CTRL_CSR3_FIELD7_OFFSET   21

Definition at line 1940 of file flash_ctrl_regs.h.

FLASH_CTRL_CSR3_FIELD8_FIELD

#define FLASH_CTRL_CSR3_FIELD8_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_CSR3_FIELD8_MASK, .index = FLASH_CTRL_CSR3_FIELD8_OFFSET })

Definition at line 1945 of file flash_ctrl_regs.h.

FLASH_CTRL_CSR3_FIELD8_MASK

#define FLASH_CTRL_CSR3_FIELD8_MASK   0x3u

Definition at line 1943 of file flash_ctrl_regs.h.

FLASH_CTRL_CSR3_FIELD8_OFFSET

#define FLASH_CTRL_CSR3_FIELD8_OFFSET   24

Definition at line 1944 of file flash_ctrl_regs.h.

FLASH_CTRL_CSR3_FIELD9_FIELD

#define FLASH_CTRL_CSR3_FIELD9_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_CSR3_FIELD9_MASK, .index = FLASH_CTRL_CSR3_FIELD9_OFFSET })

Definition at line 1949 of file flash_ctrl_regs.h.

FLASH_CTRL_CSR3_FIELD9_MASK

#define FLASH_CTRL_CSR3_FIELD9_MASK   0x3u

Definition at line 1947 of file flash_ctrl_regs.h.

FLASH_CTRL_CSR3_FIELD9_OFFSET

#define FLASH_CTRL_CSR3_FIELD9_OFFSET   26

Definition at line 1948 of file flash_ctrl_regs.h.

FLASH_CTRL_CSR3_REG_OFFSET

#define FLASH_CTRL_CSR3_REG_OFFSET   0xc

Definition at line 1912 of file flash_ctrl_regs.h.

FLASH_CTRL_CSR3_REG_RESVAL

#define FLASH_CTRL_CSR3_REG_RESVAL   0x0u

Definition at line 1913 of file flash_ctrl_regs.h.

FLASH_CTRL_CSR4_FIELD0_FIELD

#define FLASH_CTRL_CSR4_FIELD0_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_CSR4_FIELD0_MASK, .index = FLASH_CTRL_CSR4_FIELD0_OFFSET })

Definition at line 1957 of file flash_ctrl_regs.h.

FLASH_CTRL_CSR4_FIELD0_MASK

#define FLASH_CTRL_CSR4_FIELD0_MASK   0x7u

Definition at line 1955 of file flash_ctrl_regs.h.

FLASH_CTRL_CSR4_FIELD0_OFFSET

#define FLASH_CTRL_CSR4_FIELD0_OFFSET   0

Definition at line 1956 of file flash_ctrl_regs.h.

FLASH_CTRL_CSR4_FIELD1_FIELD

#define FLASH_CTRL_CSR4_FIELD1_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_CSR4_FIELD1_MASK, .index = FLASH_CTRL_CSR4_FIELD1_OFFSET })

Definition at line 1961 of file flash_ctrl_regs.h.

FLASH_CTRL_CSR4_FIELD1_MASK

#define FLASH_CTRL_CSR4_FIELD1_MASK   0x7u

Definition at line 1959 of file flash_ctrl_regs.h.

FLASH_CTRL_CSR4_FIELD1_OFFSET

#define FLASH_CTRL_CSR4_FIELD1_OFFSET   3

Definition at line 1960 of file flash_ctrl_regs.h.

FLASH_CTRL_CSR4_FIELD2_FIELD

#define FLASH_CTRL_CSR4_FIELD2_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_CSR4_FIELD2_MASK, .index = FLASH_CTRL_CSR4_FIELD2_OFFSET })

Definition at line 1965 of file flash_ctrl_regs.h.

FLASH_CTRL_CSR4_FIELD2_MASK

#define FLASH_CTRL_CSR4_FIELD2_MASK   0x7u

Definition at line 1963 of file flash_ctrl_regs.h.

FLASH_CTRL_CSR4_FIELD2_OFFSET

#define FLASH_CTRL_CSR4_FIELD2_OFFSET   6

Definition at line 1964 of file flash_ctrl_regs.h.

FLASH_CTRL_CSR4_FIELD3_FIELD

#define FLASH_CTRL_CSR4_FIELD3_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_CSR4_FIELD3_MASK, .index = FLASH_CTRL_CSR4_FIELD3_OFFSET })

Definition at line 1969 of file flash_ctrl_regs.h.

FLASH_CTRL_CSR4_FIELD3_MASK

#define FLASH_CTRL_CSR4_FIELD3_MASK   0x7u

Definition at line 1967 of file flash_ctrl_regs.h.

FLASH_CTRL_CSR4_FIELD3_OFFSET

#define FLASH_CTRL_CSR4_FIELD3_OFFSET   9

Definition at line 1968 of file flash_ctrl_regs.h.

FLASH_CTRL_CSR4_REG_OFFSET

#define FLASH_CTRL_CSR4_REG_OFFSET   0x10

Definition at line 1953 of file flash_ctrl_regs.h.

FLASH_CTRL_CSR4_REG_RESVAL

#define FLASH_CTRL_CSR4_REG_RESVAL   0x0u

Definition at line 1954 of file flash_ctrl_regs.h.

FLASH_CTRL_CSR5_FIELD0_FIELD

#define FLASH_CTRL_CSR5_FIELD0_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_CSR5_FIELD0_MASK, .index = FLASH_CTRL_CSR5_FIELD0_OFFSET })

Definition at line 1977 of file flash_ctrl_regs.h.

FLASH_CTRL_CSR5_FIELD0_MASK

#define FLASH_CTRL_CSR5_FIELD0_MASK   0x7u

Definition at line 1975 of file flash_ctrl_regs.h.

FLASH_CTRL_CSR5_FIELD0_OFFSET

#define FLASH_CTRL_CSR5_FIELD0_OFFSET   0

Definition at line 1976 of file flash_ctrl_regs.h.

FLASH_CTRL_CSR5_FIELD1_FIELD

#define FLASH_CTRL_CSR5_FIELD1_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_CSR5_FIELD1_MASK, .index = FLASH_CTRL_CSR5_FIELD1_OFFSET })

Definition at line 1981 of file flash_ctrl_regs.h.

FLASH_CTRL_CSR5_FIELD1_MASK

#define FLASH_CTRL_CSR5_FIELD1_MASK   0x3u

Definition at line 1979 of file flash_ctrl_regs.h.

FLASH_CTRL_CSR5_FIELD1_OFFSET

#define FLASH_CTRL_CSR5_FIELD1_OFFSET   3

Definition at line 1980 of file flash_ctrl_regs.h.

FLASH_CTRL_CSR5_FIELD2_FIELD

#define FLASH_CTRL_CSR5_FIELD2_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_CSR5_FIELD2_MASK, .index = FLASH_CTRL_CSR5_FIELD2_OFFSET })

Definition at line 1985 of file flash_ctrl_regs.h.

FLASH_CTRL_CSR5_FIELD2_MASK

#define FLASH_CTRL_CSR5_FIELD2_MASK   0x1ffu

Definition at line 1983 of file flash_ctrl_regs.h.

FLASH_CTRL_CSR5_FIELD2_OFFSET

#define FLASH_CTRL_CSR5_FIELD2_OFFSET   5

Definition at line 1984 of file flash_ctrl_regs.h.

FLASH_CTRL_CSR5_FIELD3_FIELD

#define FLASH_CTRL_CSR5_FIELD3_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_CSR5_FIELD3_MASK, .index = FLASH_CTRL_CSR5_FIELD3_OFFSET })

Definition at line 1989 of file flash_ctrl_regs.h.

FLASH_CTRL_CSR5_FIELD3_MASK

#define FLASH_CTRL_CSR5_FIELD3_MASK   0x1fu

Definition at line 1987 of file flash_ctrl_regs.h.

FLASH_CTRL_CSR5_FIELD3_OFFSET

#define FLASH_CTRL_CSR5_FIELD3_OFFSET   14

Definition at line 1988 of file flash_ctrl_regs.h.

FLASH_CTRL_CSR5_FIELD4_FIELD

#define FLASH_CTRL_CSR5_FIELD4_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_CSR5_FIELD4_MASK, .index = FLASH_CTRL_CSR5_FIELD4_OFFSET })

Definition at line 1993 of file flash_ctrl_regs.h.

FLASH_CTRL_CSR5_FIELD4_MASK

#define FLASH_CTRL_CSR5_FIELD4_MASK   0xfu

Definition at line 1991 of file flash_ctrl_regs.h.

FLASH_CTRL_CSR5_FIELD4_OFFSET

#define FLASH_CTRL_CSR5_FIELD4_OFFSET   19

Definition at line 1992 of file flash_ctrl_regs.h.

FLASH_CTRL_CSR5_REG_OFFSET

#define FLASH_CTRL_CSR5_REG_OFFSET   0x14

Definition at line 1973 of file flash_ctrl_regs.h.

FLASH_CTRL_CSR5_REG_RESVAL

#define FLASH_CTRL_CSR5_REG_RESVAL   0x0u

Definition at line 1974 of file flash_ctrl_regs.h.

FLASH_CTRL_CSR6_FIELD0_FIELD

#define FLASH_CTRL_CSR6_FIELD0_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_CSR6_FIELD0_MASK, .index = FLASH_CTRL_CSR6_FIELD0_OFFSET })

Definition at line 2001 of file flash_ctrl_regs.h.

FLASH_CTRL_CSR6_FIELD0_MASK

#define FLASH_CTRL_CSR6_FIELD0_MASK   0x7u

Definition at line 1999 of file flash_ctrl_regs.h.

FLASH_CTRL_CSR6_FIELD0_OFFSET

#define FLASH_CTRL_CSR6_FIELD0_OFFSET   0

Definition at line 2000 of file flash_ctrl_regs.h.

FLASH_CTRL_CSR6_FIELD1_FIELD

#define FLASH_CTRL_CSR6_FIELD1_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_CSR6_FIELD1_MASK, .index = FLASH_CTRL_CSR6_FIELD1_OFFSET })

Definition at line 2005 of file flash_ctrl_regs.h.

FLASH_CTRL_CSR6_FIELD1_MASK

#define FLASH_CTRL_CSR6_FIELD1_MASK   0x7u

Definition at line 2003 of file flash_ctrl_regs.h.

FLASH_CTRL_CSR6_FIELD1_OFFSET

#define FLASH_CTRL_CSR6_FIELD1_OFFSET   3

Definition at line 2004 of file flash_ctrl_regs.h.

FLASH_CTRL_CSR6_FIELD2_FIELD

#define FLASH_CTRL_CSR6_FIELD2_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_CSR6_FIELD2_MASK, .index = FLASH_CTRL_CSR6_FIELD2_OFFSET })

Definition at line 2009 of file flash_ctrl_regs.h.

FLASH_CTRL_CSR6_FIELD2_MASK

#define FLASH_CTRL_CSR6_FIELD2_MASK   0xffu

Definition at line 2007 of file flash_ctrl_regs.h.

FLASH_CTRL_CSR6_FIELD2_OFFSET

#define FLASH_CTRL_CSR6_FIELD2_OFFSET   6

Definition at line 2008 of file flash_ctrl_regs.h.

FLASH_CTRL_CSR6_FIELD3_FIELD

#define FLASH_CTRL_CSR6_FIELD3_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_CSR6_FIELD3_MASK, .index = FLASH_CTRL_CSR6_FIELD3_OFFSET })

Definition at line 2013 of file flash_ctrl_regs.h.

FLASH_CTRL_CSR6_FIELD3_MASK

#define FLASH_CTRL_CSR6_FIELD3_MASK   0x7u

Definition at line 2011 of file flash_ctrl_regs.h.

FLASH_CTRL_CSR6_FIELD3_OFFSET

#define FLASH_CTRL_CSR6_FIELD3_OFFSET   14

Definition at line 2012 of file flash_ctrl_regs.h.

FLASH_CTRL_CSR6_FIELD4_FIELD

#define FLASH_CTRL_CSR6_FIELD4_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_CSR6_FIELD4_MASK, .index = FLASH_CTRL_CSR6_FIELD4_OFFSET })

Definition at line 2017 of file flash_ctrl_regs.h.

FLASH_CTRL_CSR6_FIELD4_MASK

#define FLASH_CTRL_CSR6_FIELD4_MASK   0x3u

Definition at line 2015 of file flash_ctrl_regs.h.

FLASH_CTRL_CSR6_FIELD4_OFFSET

#define FLASH_CTRL_CSR6_FIELD4_OFFSET   17

Definition at line 2016 of file flash_ctrl_regs.h.

FLASH_CTRL_CSR6_FIELD5_FIELD

#define FLASH_CTRL_CSR6_FIELD5_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_CSR6_FIELD5_MASK, .index = FLASH_CTRL_CSR6_FIELD5_OFFSET })

Definition at line 2021 of file flash_ctrl_regs.h.

FLASH_CTRL_CSR6_FIELD5_MASK

#define FLASH_CTRL_CSR6_FIELD5_MASK   0x3u

Definition at line 2019 of file flash_ctrl_regs.h.

FLASH_CTRL_CSR6_FIELD5_OFFSET

#define FLASH_CTRL_CSR6_FIELD5_OFFSET   19

Definition at line 2020 of file flash_ctrl_regs.h.

FLASH_CTRL_CSR6_FIELD6_FIELD

#define FLASH_CTRL_CSR6_FIELD6_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_CSR6_FIELD6_MASK, .index = FLASH_CTRL_CSR6_FIELD6_OFFSET })

Definition at line 2025 of file flash_ctrl_regs.h.

FLASH_CTRL_CSR6_FIELD6_MASK

#define FLASH_CTRL_CSR6_FIELD6_MASK   0x3u

Definition at line 2023 of file flash_ctrl_regs.h.

FLASH_CTRL_CSR6_FIELD6_OFFSET

#define FLASH_CTRL_CSR6_FIELD6_OFFSET   21

Definition at line 2024 of file flash_ctrl_regs.h.

FLASH_CTRL_CSR6_FIELD7_BIT

#define FLASH_CTRL_CSR6_FIELD7_BIT   23

Definition at line 2027 of file flash_ctrl_regs.h.

FLASH_CTRL_CSR6_FIELD8_BIT

#define FLASH_CTRL_CSR6_FIELD8_BIT   24

Definition at line 2028 of file flash_ctrl_regs.h.

FLASH_CTRL_CSR6_REG_OFFSET

#define FLASH_CTRL_CSR6_REG_OFFSET   0x18

Definition at line 1997 of file flash_ctrl_regs.h.

FLASH_CTRL_CSR6_REG_RESVAL

#define FLASH_CTRL_CSR6_REG_RESVAL   0x0u

Definition at line 1998 of file flash_ctrl_regs.h.

FLASH_CTRL_CSR7_FIELD0_FIELD

#define FLASH_CTRL_CSR7_FIELD0_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_CSR7_FIELD0_MASK, .index = FLASH_CTRL_CSR7_FIELD0_OFFSET })

Definition at line 2035 of file flash_ctrl_regs.h.

FLASH_CTRL_CSR7_FIELD0_MASK

#define FLASH_CTRL_CSR7_FIELD0_MASK   0xffu

Definition at line 2033 of file flash_ctrl_regs.h.

FLASH_CTRL_CSR7_FIELD0_OFFSET

#define FLASH_CTRL_CSR7_FIELD0_OFFSET   0

Definition at line 2034 of file flash_ctrl_regs.h.

FLASH_CTRL_CSR7_FIELD1_FIELD

#define FLASH_CTRL_CSR7_FIELD1_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_CSR7_FIELD1_MASK, .index = FLASH_CTRL_CSR7_FIELD1_OFFSET })

Definition at line 2039 of file flash_ctrl_regs.h.

FLASH_CTRL_CSR7_FIELD1_MASK

#define FLASH_CTRL_CSR7_FIELD1_MASK   0x1ffu

Definition at line 2037 of file flash_ctrl_regs.h.

FLASH_CTRL_CSR7_FIELD1_OFFSET

#define FLASH_CTRL_CSR7_FIELD1_OFFSET   8

Definition at line 2038 of file flash_ctrl_regs.h.

FLASH_CTRL_CSR7_REG_OFFSET

#define FLASH_CTRL_CSR7_REG_OFFSET   0x1c

Definition at line 2031 of file flash_ctrl_regs.h.

FLASH_CTRL_CSR7_REG_RESVAL

#define FLASH_CTRL_CSR7_REG_RESVAL   0x0u

Definition at line 2032 of file flash_ctrl_regs.h.

FLASH_CTRL_CSR8_REG_OFFSET

#define FLASH_CTRL_CSR8_REG_OFFSET   0x20

Definition at line 2043 of file flash_ctrl_regs.h.

FLASH_CTRL_CSR8_REG_RESVAL

#define FLASH_CTRL_CSR8_REG_RESVAL   0x0u

Definition at line 2044 of file flash_ctrl_regs.h.

FLASH_CTRL_CSR9_REG_OFFSET

#define FLASH_CTRL_CSR9_REG_OFFSET   0x24

Definition at line 2047 of file flash_ctrl_regs.h.

FLASH_CTRL_CSR9_REG_RESVAL

#define FLASH_CTRL_CSR9_REG_RESVAL   0x0u

Definition at line 2048 of file flash_ctrl_regs.h.

FLASH_CTRL_CTRL_REGWEN_EN_BIT

#define FLASH_CTRL_CTRL_REGWEN_EN_BIT   0

Definition at line 143 of file flash_ctrl_regs.h.

FLASH_CTRL_CTRL_REGWEN_REG_OFFSET

#define FLASH_CTRL_CTRL_REGWEN_REG_OFFSET   0x1c

Definition at line 141 of file flash_ctrl_regs.h.

FLASH_CTRL_CTRL_REGWEN_REG_RESVAL

#define FLASH_CTRL_CTRL_REGWEN_REG_RESVAL   0x1u

Definition at line 142 of file flash_ctrl_regs.h.

FLASH_CTRL_CURR_FIFO_LVL_PROG_FIELD

#define FLASH_CTRL_CURR_FIFO_LVL_PROG_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_CURR_FIFO_LVL_PROG_MASK, .index = FLASH_CTRL_CURR_FIFO_LVL_PROG_OFFSET })

Definition at line 1867 of file flash_ctrl_regs.h.

FLASH_CTRL_CURR_FIFO_LVL_PROG_MASK

#define FLASH_CTRL_CURR_FIFO_LVL_PROG_MASK   0x1fu

Definition at line 1865 of file flash_ctrl_regs.h.

FLASH_CTRL_CURR_FIFO_LVL_PROG_OFFSET

#define FLASH_CTRL_CURR_FIFO_LVL_PROG_OFFSET   0

Definition at line 1866 of file flash_ctrl_regs.h.

FLASH_CTRL_CURR_FIFO_LVL_RD_FIELD

#define FLASH_CTRL_CURR_FIFO_LVL_RD_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_CURR_FIFO_LVL_RD_MASK, .index = FLASH_CTRL_CURR_FIFO_LVL_RD_OFFSET })

Definition at line 1871 of file flash_ctrl_regs.h.

FLASH_CTRL_CURR_FIFO_LVL_RD_MASK

#define FLASH_CTRL_CURR_FIFO_LVL_RD_MASK   0x1fu

Definition at line 1869 of file flash_ctrl_regs.h.

FLASH_CTRL_CURR_FIFO_LVL_RD_OFFSET

#define FLASH_CTRL_CURR_FIFO_LVL_RD_OFFSET   8

Definition at line 1870 of file flash_ctrl_regs.h.

FLASH_CTRL_CURR_FIFO_LVL_REG_OFFSET

#define FLASH_CTRL_CURR_FIFO_LVL_REG_OFFSET   0x1ac

Definition at line 1863 of file flash_ctrl_regs.h.

FLASH_CTRL_CURR_FIFO_LVL_REG_RESVAL

#define FLASH_CTRL_CURR_FIFO_LVL_REG_RESVAL   0x0u

Definition at line 1864 of file flash_ctrl_regs.h.

FLASH_CTRL_DEBUG_STATE_LCMGR_STATE_FIELD

#define FLASH_CTRL_DEBUG_STATE_LCMGR_STATE_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_DEBUG_STATE_LCMGR_STATE_MASK, .index = FLASH_CTRL_DEBUG_STATE_LCMGR_STATE_OFFSET })

Definition at line 1740 of file flash_ctrl_regs.h.

FLASH_CTRL_DEBUG_STATE_LCMGR_STATE_MASK

#define FLASH_CTRL_DEBUG_STATE_LCMGR_STATE_MASK   0x7ffu

Definition at line 1738 of file flash_ctrl_regs.h.

FLASH_CTRL_DEBUG_STATE_LCMGR_STATE_OFFSET

#define FLASH_CTRL_DEBUG_STATE_LCMGR_STATE_OFFSET   0

Definition at line 1739 of file flash_ctrl_regs.h.

FLASH_CTRL_DEBUG_STATE_REG_OFFSET

#define FLASH_CTRL_DEBUG_STATE_REG_OFFSET   0x178

Definition at line 1736 of file flash_ctrl_regs.h.

FLASH_CTRL_DEBUG_STATE_REG_RESVAL

#define FLASH_CTRL_DEBUG_STATE_REG_RESVAL   0x0u

Definition at line 1737 of file flash_ctrl_regs.h.

FLASH_CTRL_DEFAULT_REGION_ECC_EN_FIELD

#define FLASH_CTRL_DEFAULT_REGION_ECC_EN_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_DEFAULT_REGION_ECC_EN_MASK, .index = FLASH_CTRL_DEFAULT_REGION_ECC_EN_OFFSET })

Definition at line 625 of file flash_ctrl_regs.h.

FLASH_CTRL_DEFAULT_REGION_ECC_EN_MASK

#define FLASH_CTRL_DEFAULT_REGION_ECC_EN_MASK   0xfu

Definition at line 623 of file flash_ctrl_regs.h.

FLASH_CTRL_DEFAULT_REGION_ECC_EN_OFFSET

#define FLASH_CTRL_DEFAULT_REGION_ECC_EN_OFFSET   16

Definition at line 624 of file flash_ctrl_regs.h.

FLASH_CTRL_DEFAULT_REGION_ERASE_EN_FIELD

#define FLASH_CTRL_DEFAULT_REGION_ERASE_EN_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_DEFAULT_REGION_ERASE_EN_MASK, .index = FLASH_CTRL_DEFAULT_REGION_ERASE_EN_OFFSET })

Definition at line 617 of file flash_ctrl_regs.h.

FLASH_CTRL_DEFAULT_REGION_ERASE_EN_MASK

#define FLASH_CTRL_DEFAULT_REGION_ERASE_EN_MASK   0xfu

Definition at line 615 of file flash_ctrl_regs.h.

FLASH_CTRL_DEFAULT_REGION_ERASE_EN_OFFSET

#define FLASH_CTRL_DEFAULT_REGION_ERASE_EN_OFFSET   8

Definition at line 616 of file flash_ctrl_regs.h.

FLASH_CTRL_DEFAULT_REGION_HE_EN_FIELD

#define FLASH_CTRL_DEFAULT_REGION_HE_EN_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_DEFAULT_REGION_HE_EN_MASK, .index = FLASH_CTRL_DEFAULT_REGION_HE_EN_OFFSET })

Definition at line 629 of file flash_ctrl_regs.h.

FLASH_CTRL_DEFAULT_REGION_HE_EN_MASK

#define FLASH_CTRL_DEFAULT_REGION_HE_EN_MASK   0xfu

Definition at line 627 of file flash_ctrl_regs.h.

FLASH_CTRL_DEFAULT_REGION_HE_EN_OFFSET

#define FLASH_CTRL_DEFAULT_REGION_HE_EN_OFFSET   20

Definition at line 628 of file flash_ctrl_regs.h.

FLASH_CTRL_DEFAULT_REGION_PROG_EN_FIELD

#define FLASH_CTRL_DEFAULT_REGION_PROG_EN_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_DEFAULT_REGION_PROG_EN_MASK, .index = FLASH_CTRL_DEFAULT_REGION_PROG_EN_OFFSET })

Definition at line 613 of file flash_ctrl_regs.h.

FLASH_CTRL_DEFAULT_REGION_PROG_EN_MASK

#define FLASH_CTRL_DEFAULT_REGION_PROG_EN_MASK   0xfu

Definition at line 611 of file flash_ctrl_regs.h.

FLASH_CTRL_DEFAULT_REGION_PROG_EN_OFFSET

#define FLASH_CTRL_DEFAULT_REGION_PROG_EN_OFFSET   4

Definition at line 612 of file flash_ctrl_regs.h.

FLASH_CTRL_DEFAULT_REGION_RD_EN_FIELD

#define FLASH_CTRL_DEFAULT_REGION_RD_EN_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_DEFAULT_REGION_RD_EN_MASK, .index = FLASH_CTRL_DEFAULT_REGION_RD_EN_OFFSET })

Definition at line 609 of file flash_ctrl_regs.h.

FLASH_CTRL_DEFAULT_REGION_RD_EN_MASK

#define FLASH_CTRL_DEFAULT_REGION_RD_EN_MASK   0xfu

Definition at line 607 of file flash_ctrl_regs.h.

FLASH_CTRL_DEFAULT_REGION_RD_EN_OFFSET

#define FLASH_CTRL_DEFAULT_REGION_RD_EN_OFFSET   0

Definition at line 608 of file flash_ctrl_regs.h.

FLASH_CTRL_DEFAULT_REGION_REG_OFFSET

#define FLASH_CTRL_DEFAULT_REGION_REG_OFFSET   0x90

Definition at line 605 of file flash_ctrl_regs.h.

FLASH_CTRL_DEFAULT_REGION_REG_RESVAL

#define FLASH_CTRL_DEFAULT_REGION_REG_RESVAL   0x999999u

Definition at line 606 of file flash_ctrl_regs.h.

FLASH_CTRL_DEFAULT_REGION_SCRAMBLE_EN_FIELD

#define FLASH_CTRL_DEFAULT_REGION_SCRAMBLE_EN_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_DEFAULT_REGION_SCRAMBLE_EN_MASK, .index = FLASH_CTRL_DEFAULT_REGION_SCRAMBLE_EN_OFFSET })

Definition at line 621 of file flash_ctrl_regs.h.

FLASH_CTRL_DEFAULT_REGION_SCRAMBLE_EN_MASK

#define FLASH_CTRL_DEFAULT_REGION_SCRAMBLE_EN_MASK   0xfu

Definition at line 619 of file flash_ctrl_regs.h.

FLASH_CTRL_DEFAULT_REGION_SCRAMBLE_EN_OFFSET

#define FLASH_CTRL_DEFAULT_REGION_SCRAMBLE_EN_OFFSET   12

Definition at line 620 of file flash_ctrl_regs.h.

FLASH_CTRL_DIS_REG_OFFSET

#define FLASH_CTRL_DIS_REG_OFFSET   0x10

Definition at line 124 of file flash_ctrl_regs.h.

FLASH_CTRL_DIS_REG_RESVAL

#define FLASH_CTRL_DIS_REG_RESVAL   0x9u

Definition at line 125 of file flash_ctrl_regs.h.

FLASH_CTRL_DIS_VAL_FIELD

#define FLASH_CTRL_DIS_VAL_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_DIS_VAL_MASK, .index = FLASH_CTRL_DIS_VAL_OFFSET })

Definition at line 128 of file flash_ctrl_regs.h.

FLASH_CTRL_DIS_VAL_MASK

#define FLASH_CTRL_DIS_VAL_MASK   0xfu

Definition at line 126 of file flash_ctrl_regs.h.

FLASH_CTRL_DIS_VAL_OFFSET

#define FLASH_CTRL_DIS_VAL_OFFSET   0

Definition at line 127 of file flash_ctrl_regs.h.

FLASH_CTRL_ECC_SINGLE_ERR_ADDR_0_ECC_SINGLE_ERR_ADDR_0_FIELD

#define FLASH_CTRL_ECC_SINGLE_ERR_ADDR_0_ECC_SINGLE_ERR_ADDR_0_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_ECC_SINGLE_ERR_ADDR_0_ECC_SINGLE_ERR_ADDR_0_MASK, .index = FLASH_CTRL_ECC_SINGLE_ERR_ADDR_0_ECC_SINGLE_ERR_ADDR_0_OFFSET })

Definition at line 1817 of file flash_ctrl_regs.h.

FLASH_CTRL_ECC_SINGLE_ERR_ADDR_0_ECC_SINGLE_ERR_ADDR_0_MASK

#define FLASH_CTRL_ECC_SINGLE_ERR_ADDR_0_ECC_SINGLE_ERR_ADDR_0_MASK   0xfffffu

Definition at line 1815 of file flash_ctrl_regs.h.

FLASH_CTRL_ECC_SINGLE_ERR_ADDR_0_ECC_SINGLE_ERR_ADDR_0_OFFSET

#define FLASH_CTRL_ECC_SINGLE_ERR_ADDR_0_ECC_SINGLE_ERR_ADDR_0_OFFSET   0

Definition at line 1816 of file flash_ctrl_regs.h.

FLASH_CTRL_ECC_SINGLE_ERR_ADDR_0_REG_OFFSET

#define FLASH_CTRL_ECC_SINGLE_ERR_ADDR_0_REG_OFFSET   0x190

Definition at line 1813 of file flash_ctrl_regs.h.

FLASH_CTRL_ECC_SINGLE_ERR_ADDR_0_REG_RESVAL

#define FLASH_CTRL_ECC_SINGLE_ERR_ADDR_0_REG_RESVAL   0x0u

Definition at line 1814 of file flash_ctrl_regs.h.

FLASH_CTRL_ECC_SINGLE_ERR_ADDR_1_ECC_SINGLE_ERR_ADDR_1_FIELD

#define FLASH_CTRL_ECC_SINGLE_ERR_ADDR_1_ECC_SINGLE_ERR_ADDR_1_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_ECC_SINGLE_ERR_ADDR_1_ECC_SINGLE_ERR_ADDR_1_MASK, .index = FLASH_CTRL_ECC_SINGLE_ERR_ADDR_1_ECC_SINGLE_ERR_ADDR_1_OFFSET })

Definition at line 1825 of file flash_ctrl_regs.h.

FLASH_CTRL_ECC_SINGLE_ERR_ADDR_1_ECC_SINGLE_ERR_ADDR_1_MASK

#define FLASH_CTRL_ECC_SINGLE_ERR_ADDR_1_ECC_SINGLE_ERR_ADDR_1_MASK   0xfffffu

Definition at line 1823 of file flash_ctrl_regs.h.

FLASH_CTRL_ECC_SINGLE_ERR_ADDR_1_ECC_SINGLE_ERR_ADDR_1_OFFSET

#define FLASH_CTRL_ECC_SINGLE_ERR_ADDR_1_ECC_SINGLE_ERR_ADDR_1_OFFSET   0

Definition at line 1824 of file flash_ctrl_regs.h.

FLASH_CTRL_ECC_SINGLE_ERR_ADDR_1_REG_OFFSET

#define FLASH_CTRL_ECC_SINGLE_ERR_ADDR_1_REG_OFFSET   0x194

Definition at line 1821 of file flash_ctrl_regs.h.

FLASH_CTRL_ECC_SINGLE_ERR_ADDR_1_REG_RESVAL

#define FLASH_CTRL_ECC_SINGLE_ERR_ADDR_1_REG_RESVAL   0x0u

Definition at line 1822 of file flash_ctrl_regs.h.

FLASH_CTRL_ECC_SINGLE_ERR_ADDR_ECC_SINGLE_ERR_ADDR_FIELD_WIDTH

#define FLASH_CTRL_ECC_SINGLE_ERR_ADDR_ECC_SINGLE_ERR_ADDR_FIELD_WIDTH   20

Definition at line 1809 of file flash_ctrl_regs.h.

FLASH_CTRL_ECC_SINGLE_ERR_ADDR_MULTIREG_COUNT

#define FLASH_CTRL_ECC_SINGLE_ERR_ADDR_MULTIREG_COUNT   2

Definition at line 1810 of file flash_ctrl_regs.h.

FLASH_CTRL_ECC_SINGLE_ERR_CNT_ECC_SINGLE_ERR_CNT_0_FIELD

#define FLASH_CTRL_ECC_SINGLE_ERR_CNT_ECC_SINGLE_ERR_CNT_0_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_ECC_SINGLE_ERR_CNT_ECC_SINGLE_ERR_CNT_0_MASK, .index = FLASH_CTRL_ECC_SINGLE_ERR_CNT_ECC_SINGLE_ERR_CNT_0_OFFSET })

Definition at line 1801 of file flash_ctrl_regs.h.

FLASH_CTRL_ECC_SINGLE_ERR_CNT_ECC_SINGLE_ERR_CNT_0_MASK

#define FLASH_CTRL_ECC_SINGLE_ERR_CNT_ECC_SINGLE_ERR_CNT_0_MASK   0xffu

Definition at line 1799 of file flash_ctrl_regs.h.

FLASH_CTRL_ECC_SINGLE_ERR_CNT_ECC_SINGLE_ERR_CNT_0_OFFSET

#define FLASH_CTRL_ECC_SINGLE_ERR_CNT_ECC_SINGLE_ERR_CNT_0_OFFSET   0

Definition at line 1800 of file flash_ctrl_regs.h.

FLASH_CTRL_ECC_SINGLE_ERR_CNT_ECC_SINGLE_ERR_CNT_1_FIELD

#define FLASH_CTRL_ECC_SINGLE_ERR_CNT_ECC_SINGLE_ERR_CNT_1_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_ECC_SINGLE_ERR_CNT_ECC_SINGLE_ERR_CNT_1_MASK, .index = FLASH_CTRL_ECC_SINGLE_ERR_CNT_ECC_SINGLE_ERR_CNT_1_OFFSET })

Definition at line 1805 of file flash_ctrl_regs.h.

FLASH_CTRL_ECC_SINGLE_ERR_CNT_ECC_SINGLE_ERR_CNT_1_MASK

#define FLASH_CTRL_ECC_SINGLE_ERR_CNT_ECC_SINGLE_ERR_CNT_1_MASK   0xffu

Definition at line 1803 of file flash_ctrl_regs.h.

FLASH_CTRL_ECC_SINGLE_ERR_CNT_ECC_SINGLE_ERR_CNT_1_OFFSET

#define FLASH_CTRL_ECC_SINGLE_ERR_CNT_ECC_SINGLE_ERR_CNT_1_OFFSET   8

Definition at line 1804 of file flash_ctrl_regs.h.

FLASH_CTRL_ECC_SINGLE_ERR_CNT_ECC_SINGLE_ERR_CNT_FIELD_WIDTH

#define FLASH_CTRL_ECC_SINGLE_ERR_CNT_ECC_SINGLE_ERR_CNT_FIELD_WIDTH   8

Definition at line 1793 of file flash_ctrl_regs.h.

FLASH_CTRL_ECC_SINGLE_ERR_CNT_MULTIREG_COUNT

#define FLASH_CTRL_ECC_SINGLE_ERR_CNT_MULTIREG_COUNT   1

Definition at line 1794 of file flash_ctrl_regs.h.

FLASH_CTRL_ECC_SINGLE_ERR_CNT_REG_OFFSET

#define FLASH_CTRL_ECC_SINGLE_ERR_CNT_REG_OFFSET   0x18c

Definition at line 1797 of file flash_ctrl_regs.h.

FLASH_CTRL_ECC_SINGLE_ERR_CNT_REG_RESVAL

#define FLASH_CTRL_ECC_SINGLE_ERR_CNT_REG_RESVAL   0x0u

Definition at line 1798 of file flash_ctrl_regs.h.

FLASH_CTRL_ERASE_SUSPEND_REG_OFFSET

#define FLASH_CTRL_ERASE_SUSPEND_REG_OFFSET   0x2c

Definition at line 187 of file flash_ctrl_regs.h.

FLASH_CTRL_ERASE_SUSPEND_REG_RESVAL

#define FLASH_CTRL_ERASE_SUSPEND_REG_RESVAL   0x0u

Definition at line 188 of file flash_ctrl_regs.h.

FLASH_CTRL_ERASE_SUSPEND_REQ_BIT

#define FLASH_CTRL_ERASE_SUSPEND_REQ_BIT   0

Definition at line 189 of file flash_ctrl_regs.h.

FLASH_CTRL_ERR_ADDR_ERR_ADDR_FIELD

#define FLASH_CTRL_ERR_ADDR_ERR_ADDR_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_ERR_ADDR_ERR_ADDR_MASK, .index = FLASH_CTRL_ERR_ADDR_ERR_ADDR_OFFSET })

Definition at line 1789 of file flash_ctrl_regs.h.

FLASH_CTRL_ERR_ADDR_ERR_ADDR_MASK

#define FLASH_CTRL_ERR_ADDR_ERR_ADDR_MASK   0xfffffu

Definition at line 1787 of file flash_ctrl_regs.h.

FLASH_CTRL_ERR_ADDR_ERR_ADDR_OFFSET

#define FLASH_CTRL_ERR_ADDR_ERR_ADDR_OFFSET   0

Definition at line 1788 of file flash_ctrl_regs.h.

FLASH_CTRL_ERR_ADDR_REG_OFFSET

#define FLASH_CTRL_ERR_ADDR_REG_OFFSET   0x188

Definition at line 1785 of file flash_ctrl_regs.h.

FLASH_CTRL_ERR_ADDR_REG_RESVAL

#define FLASH_CTRL_ERR_ADDR_REG_RESVAL   0x0u

Definition at line 1786 of file flash_ctrl_regs.h.

FLASH_CTRL_ERR_CODE_MACRO_ERR_BIT

#define FLASH_CTRL_ERR_CODE_MACRO_ERR_BIT   7

Definition at line 1753 of file flash_ctrl_regs.h.

FLASH_CTRL_ERR_CODE_MP_ERR_BIT

#define FLASH_CTRL_ERR_CODE_MP_ERR_BIT   1

Definition at line 1747 of file flash_ctrl_regs.h.

FLASH_CTRL_ERR_CODE_OP_ERR_BIT

#define FLASH_CTRL_ERR_CODE_OP_ERR_BIT   0

Definition at line 1746 of file flash_ctrl_regs.h.

FLASH_CTRL_ERR_CODE_PROG_ERR_BIT

#define FLASH_CTRL_ERR_CODE_PROG_ERR_BIT   3

Definition at line 1749 of file flash_ctrl_regs.h.

FLASH_CTRL_ERR_CODE_PROG_TYPE_ERR_BIT

#define FLASH_CTRL_ERR_CODE_PROG_TYPE_ERR_BIT   5

Definition at line 1751 of file flash_ctrl_regs.h.

FLASH_CTRL_ERR_CODE_PROG_WIN_ERR_BIT

#define FLASH_CTRL_ERR_CODE_PROG_WIN_ERR_BIT   4

Definition at line 1750 of file flash_ctrl_regs.h.

FLASH_CTRL_ERR_CODE_RD_ERR_BIT

#define FLASH_CTRL_ERR_CODE_RD_ERR_BIT   2

Definition at line 1748 of file flash_ctrl_regs.h.

FLASH_CTRL_ERR_CODE_REG_OFFSET

#define FLASH_CTRL_ERR_CODE_REG_OFFSET   0x17c

Definition at line 1744 of file flash_ctrl_regs.h.

FLASH_CTRL_ERR_CODE_REG_RESVAL

#define FLASH_CTRL_ERR_CODE_REG_RESVAL   0x0u

Definition at line 1745 of file flash_ctrl_regs.h.

FLASH_CTRL_ERR_CODE_UPDATE_ERR_BIT

#define FLASH_CTRL_ERR_CODE_UPDATE_ERR_BIT   6

Definition at line 1752 of file flash_ctrl_regs.h.

FLASH_CTRL_EXEC_REG_OFFSET

#define FLASH_CTRL_EXEC_REG_OFFSET   0x14

Definition at line 132 of file flash_ctrl_regs.h.

FLASH_CTRL_EXEC_REG_RESVAL

#define FLASH_CTRL_EXEC_REG_RESVAL   0x0u

Definition at line 133 of file flash_ctrl_regs.h.

FLASH_CTRL_FAULT_STATUS_ARB_ERR_BIT

#define FLASH_CTRL_FAULT_STATUS_ARB_ERR_BIT   10

Definition at line 1781 of file flash_ctrl_regs.h.

FLASH_CTRL_FAULT_STATUS_HOST_GNT_ERR_BIT

#define FLASH_CTRL_FAULT_STATUS_HOST_GNT_ERR_BIT   11

Definition at line 1782 of file flash_ctrl_regs.h.

FLASH_CTRL_FAULT_STATUS_MP_ERR_BIT

#define FLASH_CTRL_FAULT_STATUS_MP_ERR_BIT   1

Definition at line 1772 of file flash_ctrl_regs.h.

FLASH_CTRL_FAULT_STATUS_OP_ERR_BIT

#define FLASH_CTRL_FAULT_STATUS_OP_ERR_BIT   0

Definition at line 1771 of file flash_ctrl_regs.h.

FLASH_CTRL_FAULT_STATUS_PHY_RELBL_ERR_BIT

#define FLASH_CTRL_FAULT_STATUS_PHY_RELBL_ERR_BIT   7

Definition at line 1778 of file flash_ctrl_regs.h.

FLASH_CTRL_FAULT_STATUS_PHY_STORAGE_ERR_BIT

#define FLASH_CTRL_FAULT_STATUS_PHY_STORAGE_ERR_BIT   8

Definition at line 1779 of file flash_ctrl_regs.h.

FLASH_CTRL_FAULT_STATUS_PROG_ERR_BIT

#define FLASH_CTRL_FAULT_STATUS_PROG_ERR_BIT   3

Definition at line 1774 of file flash_ctrl_regs.h.

FLASH_CTRL_FAULT_STATUS_PROG_TYPE_ERR_BIT

#define FLASH_CTRL_FAULT_STATUS_PROG_TYPE_ERR_BIT   5

Definition at line 1776 of file flash_ctrl_regs.h.

FLASH_CTRL_FAULT_STATUS_PROG_WIN_ERR_BIT

#define FLASH_CTRL_FAULT_STATUS_PROG_WIN_ERR_BIT   4

Definition at line 1775 of file flash_ctrl_regs.h.

FLASH_CTRL_FAULT_STATUS_RD_ERR_BIT

#define FLASH_CTRL_FAULT_STATUS_RD_ERR_BIT   2

Definition at line 1773 of file flash_ctrl_regs.h.

FLASH_CTRL_FAULT_STATUS_REG_OFFSET

#define FLASH_CTRL_FAULT_STATUS_REG_OFFSET   0x184

Definition at line 1769 of file flash_ctrl_regs.h.

FLASH_CTRL_FAULT_STATUS_REG_RESVAL

#define FLASH_CTRL_FAULT_STATUS_REG_RESVAL   0x0u

Definition at line 1770 of file flash_ctrl_regs.h.

FLASH_CTRL_FAULT_STATUS_SEED_ERR_BIT

#define FLASH_CTRL_FAULT_STATUS_SEED_ERR_BIT   6

Definition at line 1777 of file flash_ctrl_regs.h.

FLASH_CTRL_FAULT_STATUS_SPURIOUS_ACK_BIT

#define FLASH_CTRL_FAULT_STATUS_SPURIOUS_ACK_BIT   9

Definition at line 1780 of file flash_ctrl_regs.h.

FLASH_CTRL_FIFO_LVL_PROG_FIELD

#define FLASH_CTRL_FIFO_LVL_PROG_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_FIFO_LVL_PROG_MASK, .index = FLASH_CTRL_FIFO_LVL_PROG_OFFSET })

Definition at line 1850 of file flash_ctrl_regs.h.

FLASH_CTRL_FIFO_LVL_PROG_MASK

#define FLASH_CTRL_FIFO_LVL_PROG_MASK   0x1fu

Definition at line 1848 of file flash_ctrl_regs.h.

FLASH_CTRL_FIFO_LVL_PROG_OFFSET

#define FLASH_CTRL_FIFO_LVL_PROG_OFFSET   0

Definition at line 1849 of file flash_ctrl_regs.h.

FLASH_CTRL_FIFO_LVL_RD_FIELD

#define FLASH_CTRL_FIFO_LVL_RD_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_FIFO_LVL_RD_MASK, .index = FLASH_CTRL_FIFO_LVL_RD_OFFSET })

Definition at line 1854 of file flash_ctrl_regs.h.

FLASH_CTRL_FIFO_LVL_RD_MASK

#define FLASH_CTRL_FIFO_LVL_RD_MASK   0x1fu

Definition at line 1852 of file flash_ctrl_regs.h.

FLASH_CTRL_FIFO_LVL_RD_OFFSET

#define FLASH_CTRL_FIFO_LVL_RD_OFFSET   8

Definition at line 1853 of file flash_ctrl_regs.h.

FLASH_CTRL_FIFO_LVL_REG_OFFSET

#define FLASH_CTRL_FIFO_LVL_REG_OFFSET   0x1a4

Definition at line 1846 of file flash_ctrl_regs.h.

FLASH_CTRL_FIFO_LVL_REG_RESVAL

#define FLASH_CTRL_FIFO_LVL_REG_RESVAL   0xf0fu

Definition at line 1847 of file flash_ctrl_regs.h.

FLASH_CTRL_FIFO_RST_EN_BIT

#define FLASH_CTRL_FIFO_RST_EN_BIT   0

Definition at line 1860 of file flash_ctrl_regs.h.

FLASH_CTRL_FIFO_RST_REG_OFFSET

#define FLASH_CTRL_FIFO_RST_REG_OFFSET   0x1a8

Definition at line 1858 of file flash_ctrl_regs.h.

FLASH_CTRL_FIFO_RST_REG_RESVAL

#define FLASH_CTRL_FIFO_RST_REG_RESVAL   0x0u

Definition at line 1859 of file flash_ctrl_regs.h.

FLASH_CTRL_HW_INFO_CFG_OVERRIDE_ECC_DIS_FIELD

#define FLASH_CTRL_HW_INFO_CFG_OVERRIDE_ECC_DIS_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_HW_INFO_CFG_OVERRIDE_ECC_DIS_MASK, .index = FLASH_CTRL_HW_INFO_CFG_OVERRIDE_ECC_DIS_OFFSET })

Definition at line 1699 of file flash_ctrl_regs.h.

FLASH_CTRL_HW_INFO_CFG_OVERRIDE_ECC_DIS_MASK

#define FLASH_CTRL_HW_INFO_CFG_OVERRIDE_ECC_DIS_MASK   0xfu

Definition at line 1697 of file flash_ctrl_regs.h.

FLASH_CTRL_HW_INFO_CFG_OVERRIDE_ECC_DIS_OFFSET

#define FLASH_CTRL_HW_INFO_CFG_OVERRIDE_ECC_DIS_OFFSET   4

Definition at line 1698 of file flash_ctrl_regs.h.

FLASH_CTRL_HW_INFO_CFG_OVERRIDE_REG_OFFSET

#define FLASH_CTRL_HW_INFO_CFG_OVERRIDE_REG_OFFSET   0x164

Definition at line 1691 of file flash_ctrl_regs.h.

FLASH_CTRL_HW_INFO_CFG_OVERRIDE_REG_RESVAL

#define FLASH_CTRL_HW_INFO_CFG_OVERRIDE_REG_RESVAL   0x99u

Definition at line 1692 of file flash_ctrl_regs.h.

FLASH_CTRL_HW_INFO_CFG_OVERRIDE_SCRAMBLE_DIS_FIELD

#define FLASH_CTRL_HW_INFO_CFG_OVERRIDE_SCRAMBLE_DIS_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_HW_INFO_CFG_OVERRIDE_SCRAMBLE_DIS_MASK, .index = FLASH_CTRL_HW_INFO_CFG_OVERRIDE_SCRAMBLE_DIS_OFFSET })

Definition at line 1695 of file flash_ctrl_regs.h.

FLASH_CTRL_HW_INFO_CFG_OVERRIDE_SCRAMBLE_DIS_MASK

#define FLASH_CTRL_HW_INFO_CFG_OVERRIDE_SCRAMBLE_DIS_MASK   0xfu

Definition at line 1693 of file flash_ctrl_regs.h.

FLASH_CTRL_HW_INFO_CFG_OVERRIDE_SCRAMBLE_DIS_OFFSET

#define FLASH_CTRL_HW_INFO_CFG_OVERRIDE_SCRAMBLE_DIS_OFFSET   0

Definition at line 1694 of file flash_ctrl_regs.h.

FLASH_CTRL_INIT_REG_OFFSET

#define FLASH_CTRL_INIT_REG_OFFSET   0x18

Definition at line 136 of file flash_ctrl_regs.h.

FLASH_CTRL_INIT_REG_RESVAL

#define FLASH_CTRL_INIT_REG_RESVAL   0x0u

Definition at line 137 of file flash_ctrl_regs.h.

FLASH_CTRL_INIT_VAL_BIT

#define FLASH_CTRL_INIT_VAL_BIT   0

Definition at line 138 of file flash_ctrl_regs.h.

FLASH_CTRL_INTR_COMMON_CORR_ERR_BIT

#define FLASH_CTRL_INTR_COMMON_CORR_ERR_BIT   5

Definition at line 82 of file flash_ctrl_regs.h.

FLASH_CTRL_INTR_COMMON_OP_DONE_BIT

#define FLASH_CTRL_INTR_COMMON_OP_DONE_BIT   4

Definition at line 81 of file flash_ctrl_regs.h.

FLASH_CTRL_INTR_COMMON_PROG_EMPTY_BIT

#define FLASH_CTRL_INTR_COMMON_PROG_EMPTY_BIT   0

Definition at line 77 of file flash_ctrl_regs.h.

FLASH_CTRL_INTR_COMMON_PROG_LVL_BIT

#define FLASH_CTRL_INTR_COMMON_PROG_LVL_BIT   1

Definition at line 78 of file flash_ctrl_regs.h.

FLASH_CTRL_INTR_COMMON_RD_FULL_BIT

#define FLASH_CTRL_INTR_COMMON_RD_FULL_BIT   2

Definition at line 79 of file flash_ctrl_regs.h.

FLASH_CTRL_INTR_COMMON_RD_LVL_BIT

#define FLASH_CTRL_INTR_COMMON_RD_LVL_BIT   3

Definition at line 80 of file flash_ctrl_regs.h.

FLASH_CTRL_INTR_ENABLE_CORR_ERR_BIT

#define FLASH_CTRL_INTR_ENABLE_CORR_ERR_BIT   5

Definition at line 102 of file flash_ctrl_regs.h.

FLASH_CTRL_INTR_ENABLE_OP_DONE_BIT

#define FLASH_CTRL_INTR_ENABLE_OP_DONE_BIT   4

Definition at line 101 of file flash_ctrl_regs.h.

FLASH_CTRL_INTR_ENABLE_PROG_EMPTY_BIT

#define FLASH_CTRL_INTR_ENABLE_PROG_EMPTY_BIT   0

Definition at line 97 of file flash_ctrl_regs.h.

FLASH_CTRL_INTR_ENABLE_PROG_LVL_BIT

#define FLASH_CTRL_INTR_ENABLE_PROG_LVL_BIT   1

Definition at line 98 of file flash_ctrl_regs.h.

FLASH_CTRL_INTR_ENABLE_RD_FULL_BIT

#define FLASH_CTRL_INTR_ENABLE_RD_FULL_BIT   2

Definition at line 99 of file flash_ctrl_regs.h.

FLASH_CTRL_INTR_ENABLE_RD_LVL_BIT

#define FLASH_CTRL_INTR_ENABLE_RD_LVL_BIT   3

Definition at line 100 of file flash_ctrl_regs.h.

FLASH_CTRL_INTR_ENABLE_REG_OFFSET

#define FLASH_CTRL_INTR_ENABLE_REG_OFFSET   0x4

Definition at line 95 of file flash_ctrl_regs.h.

FLASH_CTRL_INTR_ENABLE_REG_RESVAL

#define FLASH_CTRL_INTR_ENABLE_REG_RESVAL   0x0u

Definition at line 96 of file flash_ctrl_regs.h.

FLASH_CTRL_INTR_STATE_CORR_ERR_BIT

#define FLASH_CTRL_INTR_STATE_CORR_ERR_BIT   5

Definition at line 92 of file flash_ctrl_regs.h.

FLASH_CTRL_INTR_STATE_OP_DONE_BIT

#define FLASH_CTRL_INTR_STATE_OP_DONE_BIT   4

Definition at line 91 of file flash_ctrl_regs.h.

FLASH_CTRL_INTR_STATE_PROG_EMPTY_BIT

#define FLASH_CTRL_INTR_STATE_PROG_EMPTY_BIT   0

Definition at line 87 of file flash_ctrl_regs.h.

FLASH_CTRL_INTR_STATE_PROG_LVL_BIT

#define FLASH_CTRL_INTR_STATE_PROG_LVL_BIT   1

Definition at line 88 of file flash_ctrl_regs.h.

FLASH_CTRL_INTR_STATE_RD_FULL_BIT

#define FLASH_CTRL_INTR_STATE_RD_FULL_BIT   2

Definition at line 89 of file flash_ctrl_regs.h.

FLASH_CTRL_INTR_STATE_RD_LVL_BIT

#define FLASH_CTRL_INTR_STATE_RD_LVL_BIT   3

Definition at line 90 of file flash_ctrl_regs.h.

FLASH_CTRL_INTR_STATE_REG_OFFSET

#define FLASH_CTRL_INTR_STATE_REG_OFFSET   0x0

Definition at line 85 of file flash_ctrl_regs.h.

FLASH_CTRL_INTR_STATE_REG_RESVAL

#define FLASH_CTRL_INTR_STATE_REG_RESVAL   0x3u

Definition at line 86 of file flash_ctrl_regs.h.

FLASH_CTRL_INTR_TEST_CORR_ERR_BIT

#define FLASH_CTRL_INTR_TEST_CORR_ERR_BIT   5

Definition at line 112 of file flash_ctrl_regs.h.

FLASH_CTRL_INTR_TEST_OP_DONE_BIT

#define FLASH_CTRL_INTR_TEST_OP_DONE_BIT   4

Definition at line 111 of file flash_ctrl_regs.h.

FLASH_CTRL_INTR_TEST_PROG_EMPTY_BIT

#define FLASH_CTRL_INTR_TEST_PROG_EMPTY_BIT   0

Definition at line 107 of file flash_ctrl_regs.h.

FLASH_CTRL_INTR_TEST_PROG_LVL_BIT

#define FLASH_CTRL_INTR_TEST_PROG_LVL_BIT   1

Definition at line 108 of file flash_ctrl_regs.h.

FLASH_CTRL_INTR_TEST_RD_FULL_BIT

#define FLASH_CTRL_INTR_TEST_RD_FULL_BIT   2

Definition at line 109 of file flash_ctrl_regs.h.

FLASH_CTRL_INTR_TEST_RD_LVL_BIT

#define FLASH_CTRL_INTR_TEST_RD_LVL_BIT   3

Definition at line 110 of file flash_ctrl_regs.h.

FLASH_CTRL_INTR_TEST_REG_OFFSET

#define FLASH_CTRL_INTR_TEST_REG_OFFSET   0x8

Definition at line 105 of file flash_ctrl_regs.h.

FLASH_CTRL_INTR_TEST_REG_RESVAL

#define FLASH_CTRL_INTR_TEST_REG_RESVAL   0x0u

Definition at line 106 of file flash_ctrl_regs.h.

FLASH_CTRL_MP_BANK_CFG_SHADOWED_ERASE_EN_0_BIT

#define FLASH_CTRL_MP_BANK_CFG_SHADOWED_ERASE_EN_0_BIT   0

Definition at line 1716 of file flash_ctrl_regs.h.

FLASH_CTRL_MP_BANK_CFG_SHADOWED_ERASE_EN_1_BIT

#define FLASH_CTRL_MP_BANK_CFG_SHADOWED_ERASE_EN_1_BIT   1

Definition at line 1717 of file flash_ctrl_regs.h.

FLASH_CTRL_MP_BANK_CFG_SHADOWED_ERASE_EN_FIELD_WIDTH

#define FLASH_CTRL_MP_BANK_CFG_SHADOWED_ERASE_EN_FIELD_WIDTH   1

Definition at line 1710 of file flash_ctrl_regs.h.

FLASH_CTRL_MP_BANK_CFG_SHADOWED_MULTIREG_COUNT

#define FLASH_CTRL_MP_BANK_CFG_SHADOWED_MULTIREG_COUNT   1

Definition at line 1711 of file flash_ctrl_regs.h.

FLASH_CTRL_MP_BANK_CFG_SHADOWED_REG_OFFSET

#define FLASH_CTRL_MP_BANK_CFG_SHADOWED_REG_OFFSET   0x16c

Definition at line 1714 of file flash_ctrl_regs.h.

FLASH_CTRL_MP_BANK_CFG_SHADOWED_REG_RESVAL

#define FLASH_CTRL_MP_BANK_CFG_SHADOWED_REG_RESVAL   0x0u

Definition at line 1715 of file flash_ctrl_regs.h.

FLASH_CTRL_MP_REGION_0_BASE_0_FIELD

#define FLASH_CTRL_MP_REGION_0_BASE_0_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_MP_REGION_0_BASE_0_MASK, .index = FLASH_CTRL_MP_REGION_0_BASE_0_OFFSET })

Definition at line 513 of file flash_ctrl_regs.h.

FLASH_CTRL_MP_REGION_0_BASE_0_MASK

#define FLASH_CTRL_MP_REGION_0_BASE_0_MASK   0x1ffu

Definition at line 511 of file flash_ctrl_regs.h.

FLASH_CTRL_MP_REGION_0_BASE_0_OFFSET

#define FLASH_CTRL_MP_REGION_0_BASE_0_OFFSET   0

Definition at line 512 of file flash_ctrl_regs.h.

FLASH_CTRL_MP_REGION_0_REG_OFFSET

#define FLASH_CTRL_MP_REGION_0_REG_OFFSET   0x70

Definition at line 509 of file flash_ctrl_regs.h.

FLASH_CTRL_MP_REGION_0_REG_RESVAL

#define FLASH_CTRL_MP_REGION_0_REG_RESVAL   0x0u

Definition at line 510 of file flash_ctrl_regs.h.

FLASH_CTRL_MP_REGION_0_SIZE_0_FIELD

#define FLASH_CTRL_MP_REGION_0_SIZE_0_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_MP_REGION_0_SIZE_0_MASK, .index = FLASH_CTRL_MP_REGION_0_SIZE_0_OFFSET })

Definition at line 517 of file flash_ctrl_regs.h.

FLASH_CTRL_MP_REGION_0_SIZE_0_MASK

#define FLASH_CTRL_MP_REGION_0_SIZE_0_MASK   0x3ffu

Definition at line 515 of file flash_ctrl_regs.h.

FLASH_CTRL_MP_REGION_0_SIZE_0_OFFSET

#define FLASH_CTRL_MP_REGION_0_SIZE_0_OFFSET   9

Definition at line 516 of file flash_ctrl_regs.h.

FLASH_CTRL_MP_REGION_1_BASE_1_FIELD

#define FLASH_CTRL_MP_REGION_1_BASE_1_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_MP_REGION_1_BASE_1_MASK, .index = FLASH_CTRL_MP_REGION_1_BASE_1_OFFSET })

Definition at line 525 of file flash_ctrl_regs.h.

FLASH_CTRL_MP_REGION_1_BASE_1_MASK

#define FLASH_CTRL_MP_REGION_1_BASE_1_MASK   0x1ffu

Definition at line 523 of file flash_ctrl_regs.h.

FLASH_CTRL_MP_REGION_1_BASE_1_OFFSET

#define FLASH_CTRL_MP_REGION_1_BASE_1_OFFSET   0

Definition at line 524 of file flash_ctrl_regs.h.

FLASH_CTRL_MP_REGION_1_REG_OFFSET

#define FLASH_CTRL_MP_REGION_1_REG_OFFSET   0x74

Definition at line 521 of file flash_ctrl_regs.h.

FLASH_CTRL_MP_REGION_1_REG_RESVAL

#define FLASH_CTRL_MP_REGION_1_REG_RESVAL   0x0u

Definition at line 522 of file flash_ctrl_regs.h.

FLASH_CTRL_MP_REGION_1_SIZE_1_FIELD

#define FLASH_CTRL_MP_REGION_1_SIZE_1_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_MP_REGION_1_SIZE_1_MASK, .index = FLASH_CTRL_MP_REGION_1_SIZE_1_OFFSET })

Definition at line 529 of file flash_ctrl_regs.h.

FLASH_CTRL_MP_REGION_1_SIZE_1_MASK

#define FLASH_CTRL_MP_REGION_1_SIZE_1_MASK   0x3ffu

Definition at line 527 of file flash_ctrl_regs.h.

FLASH_CTRL_MP_REGION_1_SIZE_1_OFFSET

#define FLASH_CTRL_MP_REGION_1_SIZE_1_OFFSET   9

Definition at line 528 of file flash_ctrl_regs.h.

FLASH_CTRL_MP_REGION_2_BASE_2_FIELD

#define FLASH_CTRL_MP_REGION_2_BASE_2_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_MP_REGION_2_BASE_2_MASK, .index = FLASH_CTRL_MP_REGION_2_BASE_2_OFFSET })

Definition at line 537 of file flash_ctrl_regs.h.

FLASH_CTRL_MP_REGION_2_BASE_2_MASK

#define FLASH_CTRL_MP_REGION_2_BASE_2_MASK   0x1ffu

Definition at line 535 of file flash_ctrl_regs.h.

FLASH_CTRL_MP_REGION_2_BASE_2_OFFSET

#define FLASH_CTRL_MP_REGION_2_BASE_2_OFFSET   0

Definition at line 536 of file flash_ctrl_regs.h.

FLASH_CTRL_MP_REGION_2_REG_OFFSET

#define FLASH_CTRL_MP_REGION_2_REG_OFFSET   0x78

Definition at line 533 of file flash_ctrl_regs.h.

FLASH_CTRL_MP_REGION_2_REG_RESVAL

#define FLASH_CTRL_MP_REGION_2_REG_RESVAL   0x0u

Definition at line 534 of file flash_ctrl_regs.h.

FLASH_CTRL_MP_REGION_2_SIZE_2_FIELD

#define FLASH_CTRL_MP_REGION_2_SIZE_2_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_MP_REGION_2_SIZE_2_MASK, .index = FLASH_CTRL_MP_REGION_2_SIZE_2_OFFSET })

Definition at line 541 of file flash_ctrl_regs.h.

FLASH_CTRL_MP_REGION_2_SIZE_2_MASK

#define FLASH_CTRL_MP_REGION_2_SIZE_2_MASK   0x3ffu

Definition at line 539 of file flash_ctrl_regs.h.

FLASH_CTRL_MP_REGION_2_SIZE_2_OFFSET

#define FLASH_CTRL_MP_REGION_2_SIZE_2_OFFSET   9

Definition at line 540 of file flash_ctrl_regs.h.

FLASH_CTRL_MP_REGION_3_BASE_3_FIELD

#define FLASH_CTRL_MP_REGION_3_BASE_3_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_MP_REGION_3_BASE_3_MASK, .index = FLASH_CTRL_MP_REGION_3_BASE_3_OFFSET })

Definition at line 549 of file flash_ctrl_regs.h.

FLASH_CTRL_MP_REGION_3_BASE_3_MASK

#define FLASH_CTRL_MP_REGION_3_BASE_3_MASK   0x1ffu

Definition at line 547 of file flash_ctrl_regs.h.

FLASH_CTRL_MP_REGION_3_BASE_3_OFFSET

#define FLASH_CTRL_MP_REGION_3_BASE_3_OFFSET   0

Definition at line 548 of file flash_ctrl_regs.h.

FLASH_CTRL_MP_REGION_3_REG_OFFSET

#define FLASH_CTRL_MP_REGION_3_REG_OFFSET   0x7c

Definition at line 545 of file flash_ctrl_regs.h.

FLASH_CTRL_MP_REGION_3_REG_RESVAL

#define FLASH_CTRL_MP_REGION_3_REG_RESVAL   0x0u

Definition at line 546 of file flash_ctrl_regs.h.

FLASH_CTRL_MP_REGION_3_SIZE_3_FIELD

#define FLASH_CTRL_MP_REGION_3_SIZE_3_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_MP_REGION_3_SIZE_3_MASK, .index = FLASH_CTRL_MP_REGION_3_SIZE_3_OFFSET })

Definition at line 553 of file flash_ctrl_regs.h.

FLASH_CTRL_MP_REGION_3_SIZE_3_MASK

#define FLASH_CTRL_MP_REGION_3_SIZE_3_MASK   0x3ffu

Definition at line 551 of file flash_ctrl_regs.h.

FLASH_CTRL_MP_REGION_3_SIZE_3_OFFSET

#define FLASH_CTRL_MP_REGION_3_SIZE_3_OFFSET   9

Definition at line 552 of file flash_ctrl_regs.h.

FLASH_CTRL_MP_REGION_4_BASE_4_FIELD

#define FLASH_CTRL_MP_REGION_4_BASE_4_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_MP_REGION_4_BASE_4_MASK, .index = FLASH_CTRL_MP_REGION_4_BASE_4_OFFSET })

Definition at line 561 of file flash_ctrl_regs.h.

FLASH_CTRL_MP_REGION_4_BASE_4_MASK

#define FLASH_CTRL_MP_REGION_4_BASE_4_MASK   0x1ffu

Definition at line 559 of file flash_ctrl_regs.h.

FLASH_CTRL_MP_REGION_4_BASE_4_OFFSET

#define FLASH_CTRL_MP_REGION_4_BASE_4_OFFSET   0

Definition at line 560 of file flash_ctrl_regs.h.

FLASH_CTRL_MP_REGION_4_REG_OFFSET

#define FLASH_CTRL_MP_REGION_4_REG_OFFSET   0x80

Definition at line 557 of file flash_ctrl_regs.h.

FLASH_CTRL_MP_REGION_4_REG_RESVAL

#define FLASH_CTRL_MP_REGION_4_REG_RESVAL   0x0u

Definition at line 558 of file flash_ctrl_regs.h.

FLASH_CTRL_MP_REGION_4_SIZE_4_FIELD

#define FLASH_CTRL_MP_REGION_4_SIZE_4_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_MP_REGION_4_SIZE_4_MASK, .index = FLASH_CTRL_MP_REGION_4_SIZE_4_OFFSET })

Definition at line 565 of file flash_ctrl_regs.h.

FLASH_CTRL_MP_REGION_4_SIZE_4_MASK

#define FLASH_CTRL_MP_REGION_4_SIZE_4_MASK   0x3ffu

Definition at line 563 of file flash_ctrl_regs.h.

FLASH_CTRL_MP_REGION_4_SIZE_4_OFFSET

#define FLASH_CTRL_MP_REGION_4_SIZE_4_OFFSET   9

Definition at line 564 of file flash_ctrl_regs.h.

FLASH_CTRL_MP_REGION_5_BASE_5_FIELD

#define FLASH_CTRL_MP_REGION_5_BASE_5_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_MP_REGION_5_BASE_5_MASK, .index = FLASH_CTRL_MP_REGION_5_BASE_5_OFFSET })

Definition at line 573 of file flash_ctrl_regs.h.

FLASH_CTRL_MP_REGION_5_BASE_5_MASK

#define FLASH_CTRL_MP_REGION_5_BASE_5_MASK   0x1ffu

Definition at line 571 of file flash_ctrl_regs.h.

FLASH_CTRL_MP_REGION_5_BASE_5_OFFSET

#define FLASH_CTRL_MP_REGION_5_BASE_5_OFFSET   0

Definition at line 572 of file flash_ctrl_regs.h.

FLASH_CTRL_MP_REGION_5_REG_OFFSET

#define FLASH_CTRL_MP_REGION_5_REG_OFFSET   0x84

Definition at line 569 of file flash_ctrl_regs.h.

FLASH_CTRL_MP_REGION_5_REG_RESVAL

#define FLASH_CTRL_MP_REGION_5_REG_RESVAL   0x0u

Definition at line 570 of file flash_ctrl_regs.h.

FLASH_CTRL_MP_REGION_5_SIZE_5_FIELD

#define FLASH_CTRL_MP_REGION_5_SIZE_5_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_MP_REGION_5_SIZE_5_MASK, .index = FLASH_CTRL_MP_REGION_5_SIZE_5_OFFSET })

Definition at line 577 of file flash_ctrl_regs.h.

FLASH_CTRL_MP_REGION_5_SIZE_5_MASK

#define FLASH_CTRL_MP_REGION_5_SIZE_5_MASK   0x3ffu

Definition at line 575 of file flash_ctrl_regs.h.

FLASH_CTRL_MP_REGION_5_SIZE_5_OFFSET

#define FLASH_CTRL_MP_REGION_5_SIZE_5_OFFSET   9

Definition at line 576 of file flash_ctrl_regs.h.

FLASH_CTRL_MP_REGION_6_BASE_6_FIELD

#define FLASH_CTRL_MP_REGION_6_BASE_6_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_MP_REGION_6_BASE_6_MASK, .index = FLASH_CTRL_MP_REGION_6_BASE_6_OFFSET })

Definition at line 585 of file flash_ctrl_regs.h.

FLASH_CTRL_MP_REGION_6_BASE_6_MASK

#define FLASH_CTRL_MP_REGION_6_BASE_6_MASK   0x1ffu

Definition at line 583 of file flash_ctrl_regs.h.

FLASH_CTRL_MP_REGION_6_BASE_6_OFFSET

#define FLASH_CTRL_MP_REGION_6_BASE_6_OFFSET   0

Definition at line 584 of file flash_ctrl_regs.h.

FLASH_CTRL_MP_REGION_6_REG_OFFSET

#define FLASH_CTRL_MP_REGION_6_REG_OFFSET   0x88

Definition at line 581 of file flash_ctrl_regs.h.

FLASH_CTRL_MP_REGION_6_REG_RESVAL

#define FLASH_CTRL_MP_REGION_6_REG_RESVAL   0x0u

Definition at line 582 of file flash_ctrl_regs.h.

FLASH_CTRL_MP_REGION_6_SIZE_6_FIELD

#define FLASH_CTRL_MP_REGION_6_SIZE_6_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_MP_REGION_6_SIZE_6_MASK, .index = FLASH_CTRL_MP_REGION_6_SIZE_6_OFFSET })

Definition at line 589 of file flash_ctrl_regs.h.

FLASH_CTRL_MP_REGION_6_SIZE_6_MASK

#define FLASH_CTRL_MP_REGION_6_SIZE_6_MASK   0x3ffu

Definition at line 587 of file flash_ctrl_regs.h.

FLASH_CTRL_MP_REGION_6_SIZE_6_OFFSET

#define FLASH_CTRL_MP_REGION_6_SIZE_6_OFFSET   9

Definition at line 588 of file flash_ctrl_regs.h.

FLASH_CTRL_MP_REGION_7_BASE_7_FIELD

#define FLASH_CTRL_MP_REGION_7_BASE_7_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_MP_REGION_7_BASE_7_MASK, .index = FLASH_CTRL_MP_REGION_7_BASE_7_OFFSET })

Definition at line 597 of file flash_ctrl_regs.h.

FLASH_CTRL_MP_REGION_7_BASE_7_MASK

#define FLASH_CTRL_MP_REGION_7_BASE_7_MASK   0x1ffu

Definition at line 595 of file flash_ctrl_regs.h.

FLASH_CTRL_MP_REGION_7_BASE_7_OFFSET

#define FLASH_CTRL_MP_REGION_7_BASE_7_OFFSET   0

Definition at line 596 of file flash_ctrl_regs.h.

FLASH_CTRL_MP_REGION_7_REG_OFFSET

#define FLASH_CTRL_MP_REGION_7_REG_OFFSET   0x8c

Definition at line 593 of file flash_ctrl_regs.h.

FLASH_CTRL_MP_REGION_7_REG_RESVAL

#define FLASH_CTRL_MP_REGION_7_REG_RESVAL   0x0u

Definition at line 594 of file flash_ctrl_regs.h.

FLASH_CTRL_MP_REGION_7_SIZE_7_FIELD

#define FLASH_CTRL_MP_REGION_7_SIZE_7_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_MP_REGION_7_SIZE_7_MASK, .index = FLASH_CTRL_MP_REGION_7_SIZE_7_OFFSET })

Definition at line 601 of file flash_ctrl_regs.h.

FLASH_CTRL_MP_REGION_7_SIZE_7_MASK

#define FLASH_CTRL_MP_REGION_7_SIZE_7_MASK   0x3ffu

Definition at line 599 of file flash_ctrl_regs.h.

FLASH_CTRL_MP_REGION_7_SIZE_7_OFFSET

#define FLASH_CTRL_MP_REGION_7_SIZE_7_OFFSET   9

Definition at line 600 of file flash_ctrl_regs.h.

FLASH_CTRL_MP_REGION_BASE_FIELD_WIDTH

#define FLASH_CTRL_MP_REGION_BASE_FIELD_WIDTH   9

Definition at line 504 of file flash_ctrl_regs.h.

FLASH_CTRL_MP_REGION_CFG_0_ECC_EN_0_FIELD

#define FLASH_CTRL_MP_REGION_CFG_0_ECC_EN_0_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_MP_REGION_CFG_0_ECC_EN_0_MASK, .index = FLASH_CTRL_MP_REGION_CFG_0_ECC_EN_0_OFFSET })

Definition at line 272 of file flash_ctrl_regs.h.

FLASH_CTRL_MP_REGION_CFG_0_ECC_EN_0_MASK

#define FLASH_CTRL_MP_REGION_CFG_0_ECC_EN_0_MASK   0xfu

Definition at line 270 of file flash_ctrl_regs.h.

FLASH_CTRL_MP_REGION_CFG_0_ECC_EN_0_OFFSET

#define FLASH_CTRL_MP_REGION_CFG_0_ECC_EN_0_OFFSET   20

Definition at line 271 of file flash_ctrl_regs.h.

FLASH_CTRL_MP_REGION_CFG_0_EN_0_FIELD

#define FLASH_CTRL_MP_REGION_CFG_0_EN_0_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_MP_REGION_CFG_0_EN_0_MASK, .index = FLASH_CTRL_MP_REGION_CFG_0_EN_0_OFFSET })

Definition at line 252 of file flash_ctrl_regs.h.

FLASH_CTRL_MP_REGION_CFG_0_EN_0_MASK

#define FLASH_CTRL_MP_REGION_CFG_0_EN_0_MASK   0xfu

Definition at line 250 of file flash_ctrl_regs.h.

FLASH_CTRL_MP_REGION_CFG_0_EN_0_OFFSET

#define FLASH_CTRL_MP_REGION_CFG_0_EN_0_OFFSET   0

Definition at line 251 of file flash_ctrl_regs.h.

FLASH_CTRL_MP_REGION_CFG_0_ERASE_EN_0_FIELD

#define FLASH_CTRL_MP_REGION_CFG_0_ERASE_EN_0_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_MP_REGION_CFG_0_ERASE_EN_0_MASK, .index = FLASH_CTRL_MP_REGION_CFG_0_ERASE_EN_0_OFFSET })

Definition at line 264 of file flash_ctrl_regs.h.

FLASH_CTRL_MP_REGION_CFG_0_ERASE_EN_0_MASK

#define FLASH_CTRL_MP_REGION_CFG_0_ERASE_EN_0_MASK   0xfu

Definition at line 262 of file flash_ctrl_regs.h.

FLASH_CTRL_MP_REGION_CFG_0_ERASE_EN_0_OFFSET

#define FLASH_CTRL_MP_REGION_CFG_0_ERASE_EN_0_OFFSET   12

Definition at line 263 of file flash_ctrl_regs.h.

FLASH_CTRL_MP_REGION_CFG_0_HE_EN_0_FIELD

#define FLASH_CTRL_MP_REGION_CFG_0_HE_EN_0_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_MP_REGION_CFG_0_HE_EN_0_MASK, .index = FLASH_CTRL_MP_REGION_CFG_0_HE_EN_0_OFFSET })

Definition at line 276 of file flash_ctrl_regs.h.

FLASH_CTRL_MP_REGION_CFG_0_HE_EN_0_MASK

#define FLASH_CTRL_MP_REGION_CFG_0_HE_EN_0_MASK   0xfu

Definition at line 274 of file flash_ctrl_regs.h.

FLASH_CTRL_MP_REGION_CFG_0_HE_EN_0_OFFSET

#define FLASH_CTRL_MP_REGION_CFG_0_HE_EN_0_OFFSET   24

Definition at line 275 of file flash_ctrl_regs.h.

FLASH_CTRL_MP_REGION_CFG_0_PROG_EN_0_FIELD

#define FLASH_CTRL_MP_REGION_CFG_0_PROG_EN_0_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_MP_REGION_CFG_0_PROG_EN_0_MASK, .index = FLASH_CTRL_MP_REGION_CFG_0_PROG_EN_0_OFFSET })

Definition at line 260 of file flash_ctrl_regs.h.

FLASH_CTRL_MP_REGION_CFG_0_PROG_EN_0_MASK

#define FLASH_CTRL_MP_REGION_CFG_0_PROG_EN_0_MASK   0xfu

Definition at line 258 of file flash_ctrl_regs.h.

FLASH_CTRL_MP_REGION_CFG_0_PROG_EN_0_OFFSET

#define FLASH_CTRL_MP_REGION_CFG_0_PROG_EN_0_OFFSET   8

Definition at line 259 of file flash_ctrl_regs.h.

FLASH_CTRL_MP_REGION_CFG_0_RD_EN_0_FIELD

#define FLASH_CTRL_MP_REGION_CFG_0_RD_EN_0_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_MP_REGION_CFG_0_RD_EN_0_MASK, .index = FLASH_CTRL_MP_REGION_CFG_0_RD_EN_0_OFFSET })

Definition at line 256 of file flash_ctrl_regs.h.

FLASH_CTRL_MP_REGION_CFG_0_RD_EN_0_MASK

#define FLASH_CTRL_MP_REGION_CFG_0_RD_EN_0_MASK   0xfu

Definition at line 254 of file flash_ctrl_regs.h.

FLASH_CTRL_MP_REGION_CFG_0_RD_EN_0_OFFSET

#define FLASH_CTRL_MP_REGION_CFG_0_RD_EN_0_OFFSET   4

Definition at line 255 of file flash_ctrl_regs.h.

FLASH_CTRL_MP_REGION_CFG_0_REG_OFFSET

#define FLASH_CTRL_MP_REGION_CFG_0_REG_OFFSET   0x50

Definition at line 248 of file flash_ctrl_regs.h.

FLASH_CTRL_MP_REGION_CFG_0_REG_RESVAL

#define FLASH_CTRL_MP_REGION_CFG_0_REG_RESVAL   0x9999999u

Definition at line 249 of file flash_ctrl_regs.h.

FLASH_CTRL_MP_REGION_CFG_0_SCRAMBLE_EN_0_FIELD

#define FLASH_CTRL_MP_REGION_CFG_0_SCRAMBLE_EN_0_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_MP_REGION_CFG_0_SCRAMBLE_EN_0_MASK, .index = FLASH_CTRL_MP_REGION_CFG_0_SCRAMBLE_EN_0_OFFSET })

Definition at line 268 of file flash_ctrl_regs.h.

FLASH_CTRL_MP_REGION_CFG_0_SCRAMBLE_EN_0_MASK

#define FLASH_CTRL_MP_REGION_CFG_0_SCRAMBLE_EN_0_MASK   0xfu

Definition at line 266 of file flash_ctrl_regs.h.

FLASH_CTRL_MP_REGION_CFG_0_SCRAMBLE_EN_0_OFFSET

#define FLASH_CTRL_MP_REGION_CFG_0_SCRAMBLE_EN_0_OFFSET   16

Definition at line 267 of file flash_ctrl_regs.h.

FLASH_CTRL_MP_REGION_CFG_1_ECC_EN_1_FIELD

#define FLASH_CTRL_MP_REGION_CFG_1_ECC_EN_1_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_MP_REGION_CFG_1_ECC_EN_1_MASK, .index = FLASH_CTRL_MP_REGION_CFG_1_ECC_EN_1_OFFSET })

Definition at line 304 of file flash_ctrl_regs.h.

FLASH_CTRL_MP_REGION_CFG_1_ECC_EN_1_MASK

#define FLASH_CTRL_MP_REGION_CFG_1_ECC_EN_1_MASK   0xfu

Definition at line 302 of file flash_ctrl_regs.h.

FLASH_CTRL_MP_REGION_CFG_1_ECC_EN_1_OFFSET

#define FLASH_CTRL_MP_REGION_CFG_1_ECC_EN_1_OFFSET   20

Definition at line 303 of file flash_ctrl_regs.h.

FLASH_CTRL_MP_REGION_CFG_1_EN_1_FIELD

#define FLASH_CTRL_MP_REGION_CFG_1_EN_1_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_MP_REGION_CFG_1_EN_1_MASK, .index = FLASH_CTRL_MP_REGION_CFG_1_EN_1_OFFSET })

Definition at line 284 of file flash_ctrl_regs.h.

FLASH_CTRL_MP_REGION_CFG_1_EN_1_MASK

#define FLASH_CTRL_MP_REGION_CFG_1_EN_1_MASK   0xfu

Definition at line 282 of file flash_ctrl_regs.h.

FLASH_CTRL_MP_REGION_CFG_1_EN_1_OFFSET

#define FLASH_CTRL_MP_REGION_CFG_1_EN_1_OFFSET   0

Definition at line 283 of file flash_ctrl_regs.h.

FLASH_CTRL_MP_REGION_CFG_1_ERASE_EN_1_FIELD

#define FLASH_CTRL_MP_REGION_CFG_1_ERASE_EN_1_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_MP_REGION_CFG_1_ERASE_EN_1_MASK, .index = FLASH_CTRL_MP_REGION_CFG_1_ERASE_EN_1_OFFSET })

Definition at line 296 of file flash_ctrl_regs.h.

FLASH_CTRL_MP_REGION_CFG_1_ERASE_EN_1_MASK

#define FLASH_CTRL_MP_REGION_CFG_1_ERASE_EN_1_MASK   0xfu

Definition at line 294 of file flash_ctrl_regs.h.

FLASH_CTRL_MP_REGION_CFG_1_ERASE_EN_1_OFFSET

#define FLASH_CTRL_MP_REGION_CFG_1_ERASE_EN_1_OFFSET   12

Definition at line 295 of file flash_ctrl_regs.h.

FLASH_CTRL_MP_REGION_CFG_1_HE_EN_1_FIELD

#define FLASH_CTRL_MP_REGION_CFG_1_HE_EN_1_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_MP_REGION_CFG_1_HE_EN_1_MASK, .index = FLASH_CTRL_MP_REGION_CFG_1_HE_EN_1_OFFSET })

Definition at line 308 of file flash_ctrl_regs.h.

FLASH_CTRL_MP_REGION_CFG_1_HE_EN_1_MASK

#define FLASH_CTRL_MP_REGION_CFG_1_HE_EN_1_MASK   0xfu

Definition at line 306 of file flash_ctrl_regs.h.

FLASH_CTRL_MP_REGION_CFG_1_HE_EN_1_OFFSET

#define FLASH_CTRL_MP_REGION_CFG_1_HE_EN_1_OFFSET   24

Definition at line 307 of file flash_ctrl_regs.h.

FLASH_CTRL_MP_REGION_CFG_1_PROG_EN_1_FIELD

#define FLASH_CTRL_MP_REGION_CFG_1_PROG_EN_1_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_MP_REGION_CFG_1_PROG_EN_1_MASK, .index = FLASH_CTRL_MP_REGION_CFG_1_PROG_EN_1_OFFSET })

Definition at line 292 of file flash_ctrl_regs.h.

FLASH_CTRL_MP_REGION_CFG_1_PROG_EN_1_MASK

#define FLASH_CTRL_MP_REGION_CFG_1_PROG_EN_1_MASK   0xfu

Definition at line 290 of file flash_ctrl_regs.h.

FLASH_CTRL_MP_REGION_CFG_1_PROG_EN_1_OFFSET

#define FLASH_CTRL_MP_REGION_CFG_1_PROG_EN_1_OFFSET   8

Definition at line 291 of file flash_ctrl_regs.h.

FLASH_CTRL_MP_REGION_CFG_1_RD_EN_1_FIELD

#define FLASH_CTRL_MP_REGION_CFG_1_RD_EN_1_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_MP_REGION_CFG_1_RD_EN_1_MASK, .index = FLASH_CTRL_MP_REGION_CFG_1_RD_EN_1_OFFSET })

Definition at line 288 of file flash_ctrl_regs.h.

FLASH_CTRL_MP_REGION_CFG_1_RD_EN_1_MASK

#define FLASH_CTRL_MP_REGION_CFG_1_RD_EN_1_MASK   0xfu

Definition at line 286 of file flash_ctrl_regs.h.

FLASH_CTRL_MP_REGION_CFG_1_RD_EN_1_OFFSET

#define FLASH_CTRL_MP_REGION_CFG_1_RD_EN_1_OFFSET   4

Definition at line 287 of file flash_ctrl_regs.h.

FLASH_CTRL_MP_REGION_CFG_1_REG_OFFSET

#define FLASH_CTRL_MP_REGION_CFG_1_REG_OFFSET   0x54

Definition at line 280 of file flash_ctrl_regs.h.

FLASH_CTRL_MP_REGION_CFG_1_REG_RESVAL

#define FLASH_CTRL_MP_REGION_CFG_1_REG_RESVAL   0x9999999u

Definition at line 281 of file flash_ctrl_regs.h.

FLASH_CTRL_MP_REGION_CFG_1_SCRAMBLE_EN_1_FIELD

#define FLASH_CTRL_MP_REGION_CFG_1_SCRAMBLE_EN_1_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_MP_REGION_CFG_1_SCRAMBLE_EN_1_MASK, .index = FLASH_CTRL_MP_REGION_CFG_1_SCRAMBLE_EN_1_OFFSET })

Definition at line 300 of file flash_ctrl_regs.h.

FLASH_CTRL_MP_REGION_CFG_1_SCRAMBLE_EN_1_MASK

#define FLASH_CTRL_MP_REGION_CFG_1_SCRAMBLE_EN_1_MASK   0xfu

Definition at line 298 of file flash_ctrl_regs.h.

FLASH_CTRL_MP_REGION_CFG_1_SCRAMBLE_EN_1_OFFSET

#define FLASH_CTRL_MP_REGION_CFG_1_SCRAMBLE_EN_1_OFFSET   16

Definition at line 299 of file flash_ctrl_regs.h.

FLASH_CTRL_MP_REGION_CFG_2_ECC_EN_2_FIELD

#define FLASH_CTRL_MP_REGION_CFG_2_ECC_EN_2_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_MP_REGION_CFG_2_ECC_EN_2_MASK, .index = FLASH_CTRL_MP_REGION_CFG_2_ECC_EN_2_OFFSET })

Definition at line 336 of file flash_ctrl_regs.h.

FLASH_CTRL_MP_REGION_CFG_2_ECC_EN_2_MASK

#define FLASH_CTRL_MP_REGION_CFG_2_ECC_EN_2_MASK   0xfu

Definition at line 334 of file flash_ctrl_regs.h.

FLASH_CTRL_MP_REGION_CFG_2_ECC_EN_2_OFFSET

#define FLASH_CTRL_MP_REGION_CFG_2_ECC_EN_2_OFFSET   20

Definition at line 335 of file flash_ctrl_regs.h.

FLASH_CTRL_MP_REGION_CFG_2_EN_2_FIELD

#define FLASH_CTRL_MP_REGION_CFG_2_EN_2_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_MP_REGION_CFG_2_EN_2_MASK, .index = FLASH_CTRL_MP_REGION_CFG_2_EN_2_OFFSET })

Definition at line 316 of file flash_ctrl_regs.h.

FLASH_CTRL_MP_REGION_CFG_2_EN_2_MASK

#define FLASH_CTRL_MP_REGION_CFG_2_EN_2_MASK   0xfu

Definition at line 314 of file flash_ctrl_regs.h.

FLASH_CTRL_MP_REGION_CFG_2_EN_2_OFFSET

#define FLASH_CTRL_MP_REGION_CFG_2_EN_2_OFFSET   0

Definition at line 315 of file flash_ctrl_regs.h.

FLASH_CTRL_MP_REGION_CFG_2_ERASE_EN_2_FIELD

#define FLASH_CTRL_MP_REGION_CFG_2_ERASE_EN_2_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_MP_REGION_CFG_2_ERASE_EN_2_MASK, .index = FLASH_CTRL_MP_REGION_CFG_2_ERASE_EN_2_OFFSET })

Definition at line 328 of file flash_ctrl_regs.h.

FLASH_CTRL_MP_REGION_CFG_2_ERASE_EN_2_MASK

#define FLASH_CTRL_MP_REGION_CFG_2_ERASE_EN_2_MASK   0xfu

Definition at line 326 of file flash_ctrl_regs.h.

FLASH_CTRL_MP_REGION_CFG_2_ERASE_EN_2_OFFSET

#define FLASH_CTRL_MP_REGION_CFG_2_ERASE_EN_2_OFFSET   12

Definition at line 327 of file flash_ctrl_regs.h.

FLASH_CTRL_MP_REGION_CFG_2_HE_EN_2_FIELD

#define FLASH_CTRL_MP_REGION_CFG_2_HE_EN_2_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_MP_REGION_CFG_2_HE_EN_2_MASK, .index = FLASH_CTRL_MP_REGION_CFG_2_HE_EN_2_OFFSET })

Definition at line 340 of file flash_ctrl_regs.h.

FLASH_CTRL_MP_REGION_CFG_2_HE_EN_2_MASK

#define FLASH_CTRL_MP_REGION_CFG_2_HE_EN_2_MASK   0xfu

Definition at line 338 of file flash_ctrl_regs.h.

FLASH_CTRL_MP_REGION_CFG_2_HE_EN_2_OFFSET

#define FLASH_CTRL_MP_REGION_CFG_2_HE_EN_2_OFFSET   24

Definition at line 339 of file flash_ctrl_regs.h.

FLASH_CTRL_MP_REGION_CFG_2_PROG_EN_2_FIELD

#define FLASH_CTRL_MP_REGION_CFG_2_PROG_EN_2_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_MP_REGION_CFG_2_PROG_EN_2_MASK, .index = FLASH_CTRL_MP_REGION_CFG_2_PROG_EN_2_OFFSET })

Definition at line 324 of file flash_ctrl_regs.h.

FLASH_CTRL_MP_REGION_CFG_2_PROG_EN_2_MASK

#define FLASH_CTRL_MP_REGION_CFG_2_PROG_EN_2_MASK   0xfu

Definition at line 322 of file flash_ctrl_regs.h.

FLASH_CTRL_MP_REGION_CFG_2_PROG_EN_2_OFFSET

#define FLASH_CTRL_MP_REGION_CFG_2_PROG_EN_2_OFFSET   8

Definition at line 323 of file flash_ctrl_regs.h.

FLASH_CTRL_MP_REGION_CFG_2_RD_EN_2_FIELD

#define FLASH_CTRL_MP_REGION_CFG_2_RD_EN_2_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_MP_REGION_CFG_2_RD_EN_2_MASK, .index = FLASH_CTRL_MP_REGION_CFG_2_RD_EN_2_OFFSET })

Definition at line 320 of file flash_ctrl_regs.h.

FLASH_CTRL_MP_REGION_CFG_2_RD_EN_2_MASK

#define FLASH_CTRL_MP_REGION_CFG_2_RD_EN_2_MASK   0xfu

Definition at line 318 of file flash_ctrl_regs.h.

FLASH_CTRL_MP_REGION_CFG_2_RD_EN_2_OFFSET

#define FLASH_CTRL_MP_REGION_CFG_2_RD_EN_2_OFFSET   4

Definition at line 319 of file flash_ctrl_regs.h.

FLASH_CTRL_MP_REGION_CFG_2_REG_OFFSET

#define FLASH_CTRL_MP_REGION_CFG_2_REG_OFFSET   0x58

Definition at line 312 of file flash_ctrl_regs.h.

FLASH_CTRL_MP_REGION_CFG_2_REG_RESVAL

#define FLASH_CTRL_MP_REGION_CFG_2_REG_RESVAL   0x9999999u

Definition at line 313 of file flash_ctrl_regs.h.

FLASH_CTRL_MP_REGION_CFG_2_SCRAMBLE_EN_2_FIELD

#define FLASH_CTRL_MP_REGION_CFG_2_SCRAMBLE_EN_2_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_MP_REGION_CFG_2_SCRAMBLE_EN_2_MASK, .index = FLASH_CTRL_MP_REGION_CFG_2_SCRAMBLE_EN_2_OFFSET })

Definition at line 332 of file flash_ctrl_regs.h.

FLASH_CTRL_MP_REGION_CFG_2_SCRAMBLE_EN_2_MASK

#define FLASH_CTRL_MP_REGION_CFG_2_SCRAMBLE_EN_2_MASK   0xfu

Definition at line 330 of file flash_ctrl_regs.h.

FLASH_CTRL_MP_REGION_CFG_2_SCRAMBLE_EN_2_OFFSET

#define FLASH_CTRL_MP_REGION_CFG_2_SCRAMBLE_EN_2_OFFSET   16

Definition at line 331 of file flash_ctrl_regs.h.

FLASH_CTRL_MP_REGION_CFG_3_ECC_EN_3_FIELD

#define FLASH_CTRL_MP_REGION_CFG_3_ECC_EN_3_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_MP_REGION_CFG_3_ECC_EN_3_MASK, .index = FLASH_CTRL_MP_REGION_CFG_3_ECC_EN_3_OFFSET })

Definition at line 368 of file flash_ctrl_regs.h.

FLASH_CTRL_MP_REGION_CFG_3_ECC_EN_3_MASK

#define FLASH_CTRL_MP_REGION_CFG_3_ECC_EN_3_MASK   0xfu

Definition at line 366 of file flash_ctrl_regs.h.

FLASH_CTRL_MP_REGION_CFG_3_ECC_EN_3_OFFSET

#define FLASH_CTRL_MP_REGION_CFG_3_ECC_EN_3_OFFSET   20

Definition at line 367 of file flash_ctrl_regs.h.

FLASH_CTRL_MP_REGION_CFG_3_EN_3_FIELD

#define FLASH_CTRL_MP_REGION_CFG_3_EN_3_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_MP_REGION_CFG_3_EN_3_MASK, .index = FLASH_CTRL_MP_REGION_CFG_3_EN_3_OFFSET })

Definition at line 348 of file flash_ctrl_regs.h.

FLASH_CTRL_MP_REGION_CFG_3_EN_3_MASK

#define FLASH_CTRL_MP_REGION_CFG_3_EN_3_MASK   0xfu

Definition at line 346 of file flash_ctrl_regs.h.

FLASH_CTRL_MP_REGION_CFG_3_EN_3_OFFSET

#define FLASH_CTRL_MP_REGION_CFG_3_EN_3_OFFSET   0

Definition at line 347 of file flash_ctrl_regs.h.

FLASH_CTRL_MP_REGION_CFG_3_ERASE_EN_3_FIELD

#define FLASH_CTRL_MP_REGION_CFG_3_ERASE_EN_3_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_MP_REGION_CFG_3_ERASE_EN_3_MASK, .index = FLASH_CTRL_MP_REGION_CFG_3_ERASE_EN_3_OFFSET })

Definition at line 360 of file flash_ctrl_regs.h.

FLASH_CTRL_MP_REGION_CFG_3_ERASE_EN_3_MASK

#define FLASH_CTRL_MP_REGION_CFG_3_ERASE_EN_3_MASK   0xfu

Definition at line 358 of file flash_ctrl_regs.h.

FLASH_CTRL_MP_REGION_CFG_3_ERASE_EN_3_OFFSET

#define FLASH_CTRL_MP_REGION_CFG_3_ERASE_EN_3_OFFSET   12

Definition at line 359 of file flash_ctrl_regs.h.

FLASH_CTRL_MP_REGION_CFG_3_HE_EN_3_FIELD

#define FLASH_CTRL_MP_REGION_CFG_3_HE_EN_3_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_MP_REGION_CFG_3_HE_EN_3_MASK, .index = FLASH_CTRL_MP_REGION_CFG_3_HE_EN_3_OFFSET })

Definition at line 372 of file flash_ctrl_regs.h.

FLASH_CTRL_MP_REGION_CFG_3_HE_EN_3_MASK

#define FLASH_CTRL_MP_REGION_CFG_3_HE_EN_3_MASK   0xfu

Definition at line 370 of file flash_ctrl_regs.h.

FLASH_CTRL_MP_REGION_CFG_3_HE_EN_3_OFFSET

#define FLASH_CTRL_MP_REGION_CFG_3_HE_EN_3_OFFSET   24

Definition at line 371 of file flash_ctrl_regs.h.

FLASH_CTRL_MP_REGION_CFG_3_PROG_EN_3_FIELD

#define FLASH_CTRL_MP_REGION_CFG_3_PROG_EN_3_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_MP_REGION_CFG_3_PROG_EN_3_MASK, .index = FLASH_CTRL_MP_REGION_CFG_3_PROG_EN_3_OFFSET })

Definition at line 356 of file flash_ctrl_regs.h.

FLASH_CTRL_MP_REGION_CFG_3_PROG_EN_3_MASK

#define FLASH_CTRL_MP_REGION_CFG_3_PROG_EN_3_MASK   0xfu

Definition at line 354 of file flash_ctrl_regs.h.

FLASH_CTRL_MP_REGION_CFG_3_PROG_EN_3_OFFSET

#define FLASH_CTRL_MP_REGION_CFG_3_PROG_EN_3_OFFSET   8

Definition at line 355 of file flash_ctrl_regs.h.

FLASH_CTRL_MP_REGION_CFG_3_RD_EN_3_FIELD

#define FLASH_CTRL_MP_REGION_CFG_3_RD_EN_3_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_MP_REGION_CFG_3_RD_EN_3_MASK, .index = FLASH_CTRL_MP_REGION_CFG_3_RD_EN_3_OFFSET })

Definition at line 352 of file flash_ctrl_regs.h.

FLASH_CTRL_MP_REGION_CFG_3_RD_EN_3_MASK

#define FLASH_CTRL_MP_REGION_CFG_3_RD_EN_3_MASK   0xfu

Definition at line 350 of file flash_ctrl_regs.h.

FLASH_CTRL_MP_REGION_CFG_3_RD_EN_3_OFFSET

#define FLASH_CTRL_MP_REGION_CFG_3_RD_EN_3_OFFSET   4

Definition at line 351 of file flash_ctrl_regs.h.

FLASH_CTRL_MP_REGION_CFG_3_REG_OFFSET

#define FLASH_CTRL_MP_REGION_CFG_3_REG_OFFSET   0x5c

Definition at line 344 of file flash_ctrl_regs.h.

FLASH_CTRL_MP_REGION_CFG_3_REG_RESVAL

#define FLASH_CTRL_MP_REGION_CFG_3_REG_RESVAL   0x9999999u

Definition at line 345 of file flash_ctrl_regs.h.

FLASH_CTRL_MP_REGION_CFG_3_SCRAMBLE_EN_3_FIELD

#define FLASH_CTRL_MP_REGION_CFG_3_SCRAMBLE_EN_3_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_MP_REGION_CFG_3_SCRAMBLE_EN_3_MASK, .index = FLASH_CTRL_MP_REGION_CFG_3_SCRAMBLE_EN_3_OFFSET })

Definition at line 364 of file flash_ctrl_regs.h.

FLASH_CTRL_MP_REGION_CFG_3_SCRAMBLE_EN_3_MASK

#define FLASH_CTRL_MP_REGION_CFG_3_SCRAMBLE_EN_3_MASK   0xfu

Definition at line 362 of file flash_ctrl_regs.h.

FLASH_CTRL_MP_REGION_CFG_3_SCRAMBLE_EN_3_OFFSET

#define FLASH_CTRL_MP_REGION_CFG_3_SCRAMBLE_EN_3_OFFSET   16

Definition at line 363 of file flash_ctrl_regs.h.

FLASH_CTRL_MP_REGION_CFG_4_ECC_EN_4_FIELD

#define FLASH_CTRL_MP_REGION_CFG_4_ECC_EN_4_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_MP_REGION_CFG_4_ECC_EN_4_MASK, .index = FLASH_CTRL_MP_REGION_CFG_4_ECC_EN_4_OFFSET })

Definition at line 400 of file flash_ctrl_regs.h.

FLASH_CTRL_MP_REGION_CFG_4_ECC_EN_4_MASK

#define FLASH_CTRL_MP_REGION_CFG_4_ECC_EN_4_MASK   0xfu

Definition at line 398 of file flash_ctrl_regs.h.

FLASH_CTRL_MP_REGION_CFG_4_ECC_EN_4_OFFSET

#define FLASH_CTRL_MP_REGION_CFG_4_ECC_EN_4_OFFSET   20

Definition at line 399 of file flash_ctrl_regs.h.

FLASH_CTRL_MP_REGION_CFG_4_EN_4_FIELD

#define FLASH_CTRL_MP_REGION_CFG_4_EN_4_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_MP_REGION_CFG_4_EN_4_MASK, .index = FLASH_CTRL_MP_REGION_CFG_4_EN_4_OFFSET })

Definition at line 380 of file flash_ctrl_regs.h.

FLASH_CTRL_MP_REGION_CFG_4_EN_4_MASK

#define FLASH_CTRL_MP_REGION_CFG_4_EN_4_MASK   0xfu

Definition at line 378 of file flash_ctrl_regs.h.

FLASH_CTRL_MP_REGION_CFG_4_EN_4_OFFSET

#define FLASH_CTRL_MP_REGION_CFG_4_EN_4_OFFSET   0

Definition at line 379 of file flash_ctrl_regs.h.

FLASH_CTRL_MP_REGION_CFG_4_ERASE_EN_4_FIELD

#define FLASH_CTRL_MP_REGION_CFG_4_ERASE_EN_4_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_MP_REGION_CFG_4_ERASE_EN_4_MASK, .index = FLASH_CTRL_MP_REGION_CFG_4_ERASE_EN_4_OFFSET })

Definition at line 392 of file flash_ctrl_regs.h.

FLASH_CTRL_MP_REGION_CFG_4_ERASE_EN_4_MASK

#define FLASH_CTRL_MP_REGION_CFG_4_ERASE_EN_4_MASK   0xfu

Definition at line 390 of file flash_ctrl_regs.h.

FLASH_CTRL_MP_REGION_CFG_4_ERASE_EN_4_OFFSET

#define FLASH_CTRL_MP_REGION_CFG_4_ERASE_EN_4_OFFSET   12

Definition at line 391 of file flash_ctrl_regs.h.

FLASH_CTRL_MP_REGION_CFG_4_HE_EN_4_FIELD

#define FLASH_CTRL_MP_REGION_CFG_4_HE_EN_4_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_MP_REGION_CFG_4_HE_EN_4_MASK, .index = FLASH_CTRL_MP_REGION_CFG_4_HE_EN_4_OFFSET })

Definition at line 404 of file flash_ctrl_regs.h.

FLASH_CTRL_MP_REGION_CFG_4_HE_EN_4_MASK

#define FLASH_CTRL_MP_REGION_CFG_4_HE_EN_4_MASK   0xfu

Definition at line 402 of file flash_ctrl_regs.h.

FLASH_CTRL_MP_REGION_CFG_4_HE_EN_4_OFFSET

#define FLASH_CTRL_MP_REGION_CFG_4_HE_EN_4_OFFSET   24

Definition at line 403 of file flash_ctrl_regs.h.

FLASH_CTRL_MP_REGION_CFG_4_PROG_EN_4_FIELD

#define FLASH_CTRL_MP_REGION_CFG_4_PROG_EN_4_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_MP_REGION_CFG_4_PROG_EN_4_MASK, .index = FLASH_CTRL_MP_REGION_CFG_4_PROG_EN_4_OFFSET })

Definition at line 388 of file flash_ctrl_regs.h.

FLASH_CTRL_MP_REGION_CFG_4_PROG_EN_4_MASK

#define FLASH_CTRL_MP_REGION_CFG_4_PROG_EN_4_MASK   0xfu

Definition at line 386 of file flash_ctrl_regs.h.

FLASH_CTRL_MP_REGION_CFG_4_PROG_EN_4_OFFSET

#define FLASH_CTRL_MP_REGION_CFG_4_PROG_EN_4_OFFSET   8

Definition at line 387 of file flash_ctrl_regs.h.

FLASH_CTRL_MP_REGION_CFG_4_RD_EN_4_FIELD

#define FLASH_CTRL_MP_REGION_CFG_4_RD_EN_4_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_MP_REGION_CFG_4_RD_EN_4_MASK, .index = FLASH_CTRL_MP_REGION_CFG_4_RD_EN_4_OFFSET })

Definition at line 384 of file flash_ctrl_regs.h.

FLASH_CTRL_MP_REGION_CFG_4_RD_EN_4_MASK

#define FLASH_CTRL_MP_REGION_CFG_4_RD_EN_4_MASK   0xfu

Definition at line 382 of file flash_ctrl_regs.h.

FLASH_CTRL_MP_REGION_CFG_4_RD_EN_4_OFFSET

#define FLASH_CTRL_MP_REGION_CFG_4_RD_EN_4_OFFSET   4

Definition at line 383 of file flash_ctrl_regs.h.

FLASH_CTRL_MP_REGION_CFG_4_REG_OFFSET

#define FLASH_CTRL_MP_REGION_CFG_4_REG_OFFSET   0x60

Definition at line 376 of file flash_ctrl_regs.h.

FLASH_CTRL_MP_REGION_CFG_4_REG_RESVAL

#define FLASH_CTRL_MP_REGION_CFG_4_REG_RESVAL   0x9999999u

Definition at line 377 of file flash_ctrl_regs.h.

FLASH_CTRL_MP_REGION_CFG_4_SCRAMBLE_EN_4_FIELD

#define FLASH_CTRL_MP_REGION_CFG_4_SCRAMBLE_EN_4_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_MP_REGION_CFG_4_SCRAMBLE_EN_4_MASK, .index = FLASH_CTRL_MP_REGION_CFG_4_SCRAMBLE_EN_4_OFFSET })

Definition at line 396 of file flash_ctrl_regs.h.

FLASH_CTRL_MP_REGION_CFG_4_SCRAMBLE_EN_4_MASK

#define FLASH_CTRL_MP_REGION_CFG_4_SCRAMBLE_EN_4_MASK   0xfu

Definition at line 394 of file flash_ctrl_regs.h.

FLASH_CTRL_MP_REGION_CFG_4_SCRAMBLE_EN_4_OFFSET

#define FLASH_CTRL_MP_REGION_CFG_4_SCRAMBLE_EN_4_OFFSET   16

Definition at line 395 of file flash_ctrl_regs.h.

FLASH_CTRL_MP_REGION_CFG_5_ECC_EN_5_FIELD

#define FLASH_CTRL_MP_REGION_CFG_5_ECC_EN_5_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_MP_REGION_CFG_5_ECC_EN_5_MASK, .index = FLASH_CTRL_MP_REGION_CFG_5_ECC_EN_5_OFFSET })

Definition at line 432 of file flash_ctrl_regs.h.

FLASH_CTRL_MP_REGION_CFG_5_ECC_EN_5_MASK

#define FLASH_CTRL_MP_REGION_CFG_5_ECC_EN_5_MASK   0xfu

Definition at line 430 of file flash_ctrl_regs.h.

FLASH_CTRL_MP_REGION_CFG_5_ECC_EN_5_OFFSET

#define FLASH_CTRL_MP_REGION_CFG_5_ECC_EN_5_OFFSET   20

Definition at line 431 of file flash_ctrl_regs.h.

FLASH_CTRL_MP_REGION_CFG_5_EN_5_FIELD

#define FLASH_CTRL_MP_REGION_CFG_5_EN_5_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_MP_REGION_CFG_5_EN_5_MASK, .index = FLASH_CTRL_MP_REGION_CFG_5_EN_5_OFFSET })

Definition at line 412 of file flash_ctrl_regs.h.

FLASH_CTRL_MP_REGION_CFG_5_EN_5_MASK

#define FLASH_CTRL_MP_REGION_CFG_5_EN_5_MASK   0xfu

Definition at line 410 of file flash_ctrl_regs.h.

FLASH_CTRL_MP_REGION_CFG_5_EN_5_OFFSET

#define FLASH_CTRL_MP_REGION_CFG_5_EN_5_OFFSET   0

Definition at line 411 of file flash_ctrl_regs.h.

FLASH_CTRL_MP_REGION_CFG_5_ERASE_EN_5_FIELD

#define FLASH_CTRL_MP_REGION_CFG_5_ERASE_EN_5_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_MP_REGION_CFG_5_ERASE_EN_5_MASK, .index = FLASH_CTRL_MP_REGION_CFG_5_ERASE_EN_5_OFFSET })

Definition at line 424 of file flash_ctrl_regs.h.

FLASH_CTRL_MP_REGION_CFG_5_ERASE_EN_5_MASK

#define FLASH_CTRL_MP_REGION_CFG_5_ERASE_EN_5_MASK   0xfu

Definition at line 422 of file flash_ctrl_regs.h.

FLASH_CTRL_MP_REGION_CFG_5_ERASE_EN_5_OFFSET

#define FLASH_CTRL_MP_REGION_CFG_5_ERASE_EN_5_OFFSET   12

Definition at line 423 of file flash_ctrl_regs.h.

FLASH_CTRL_MP_REGION_CFG_5_HE_EN_5_FIELD

#define FLASH_CTRL_MP_REGION_CFG_5_HE_EN_5_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_MP_REGION_CFG_5_HE_EN_5_MASK, .index = FLASH_CTRL_MP_REGION_CFG_5_HE_EN_5_OFFSET })

Definition at line 436 of file flash_ctrl_regs.h.

FLASH_CTRL_MP_REGION_CFG_5_HE_EN_5_MASK

#define FLASH_CTRL_MP_REGION_CFG_5_HE_EN_5_MASK   0xfu

Definition at line 434 of file flash_ctrl_regs.h.

FLASH_CTRL_MP_REGION_CFG_5_HE_EN_5_OFFSET

#define FLASH_CTRL_MP_REGION_CFG_5_HE_EN_5_OFFSET   24

Definition at line 435 of file flash_ctrl_regs.h.

FLASH_CTRL_MP_REGION_CFG_5_PROG_EN_5_FIELD

#define FLASH_CTRL_MP_REGION_CFG_5_PROG_EN_5_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_MP_REGION_CFG_5_PROG_EN_5_MASK, .index = FLASH_CTRL_MP_REGION_CFG_5_PROG_EN_5_OFFSET })

Definition at line 420 of file flash_ctrl_regs.h.

FLASH_CTRL_MP_REGION_CFG_5_PROG_EN_5_MASK

#define FLASH_CTRL_MP_REGION_CFG_5_PROG_EN_5_MASK   0xfu

Definition at line 418 of file flash_ctrl_regs.h.

FLASH_CTRL_MP_REGION_CFG_5_PROG_EN_5_OFFSET

#define FLASH_CTRL_MP_REGION_CFG_5_PROG_EN_5_OFFSET   8

Definition at line 419 of file flash_ctrl_regs.h.

FLASH_CTRL_MP_REGION_CFG_5_RD_EN_5_FIELD

#define FLASH_CTRL_MP_REGION_CFG_5_RD_EN_5_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_MP_REGION_CFG_5_RD_EN_5_MASK, .index = FLASH_CTRL_MP_REGION_CFG_5_RD_EN_5_OFFSET })

Definition at line 416 of file flash_ctrl_regs.h.

FLASH_CTRL_MP_REGION_CFG_5_RD_EN_5_MASK

#define FLASH_CTRL_MP_REGION_CFG_5_RD_EN_5_MASK   0xfu

Definition at line 414 of file flash_ctrl_regs.h.

FLASH_CTRL_MP_REGION_CFG_5_RD_EN_5_OFFSET

#define FLASH_CTRL_MP_REGION_CFG_5_RD_EN_5_OFFSET   4

Definition at line 415 of file flash_ctrl_regs.h.

FLASH_CTRL_MP_REGION_CFG_5_REG_OFFSET

#define FLASH_CTRL_MP_REGION_CFG_5_REG_OFFSET   0x64

Definition at line 408 of file flash_ctrl_regs.h.

FLASH_CTRL_MP_REGION_CFG_5_REG_RESVAL

#define FLASH_CTRL_MP_REGION_CFG_5_REG_RESVAL   0x9999999u

Definition at line 409 of file flash_ctrl_regs.h.

FLASH_CTRL_MP_REGION_CFG_5_SCRAMBLE_EN_5_FIELD

#define FLASH_CTRL_MP_REGION_CFG_5_SCRAMBLE_EN_5_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_MP_REGION_CFG_5_SCRAMBLE_EN_5_MASK, .index = FLASH_CTRL_MP_REGION_CFG_5_SCRAMBLE_EN_5_OFFSET })

Definition at line 428 of file flash_ctrl_regs.h.

FLASH_CTRL_MP_REGION_CFG_5_SCRAMBLE_EN_5_MASK

#define FLASH_CTRL_MP_REGION_CFG_5_SCRAMBLE_EN_5_MASK   0xfu

Definition at line 426 of file flash_ctrl_regs.h.

FLASH_CTRL_MP_REGION_CFG_5_SCRAMBLE_EN_5_OFFSET

#define FLASH_CTRL_MP_REGION_CFG_5_SCRAMBLE_EN_5_OFFSET   16

Definition at line 427 of file flash_ctrl_regs.h.

FLASH_CTRL_MP_REGION_CFG_6_ECC_EN_6_FIELD

#define FLASH_CTRL_MP_REGION_CFG_6_ECC_EN_6_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_MP_REGION_CFG_6_ECC_EN_6_MASK, .index = FLASH_CTRL_MP_REGION_CFG_6_ECC_EN_6_OFFSET })

Definition at line 464 of file flash_ctrl_regs.h.

FLASH_CTRL_MP_REGION_CFG_6_ECC_EN_6_MASK

#define FLASH_CTRL_MP_REGION_CFG_6_ECC_EN_6_MASK   0xfu

Definition at line 462 of file flash_ctrl_regs.h.

FLASH_CTRL_MP_REGION_CFG_6_ECC_EN_6_OFFSET

#define FLASH_CTRL_MP_REGION_CFG_6_ECC_EN_6_OFFSET   20

Definition at line 463 of file flash_ctrl_regs.h.

FLASH_CTRL_MP_REGION_CFG_6_EN_6_FIELD

#define FLASH_CTRL_MP_REGION_CFG_6_EN_6_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_MP_REGION_CFG_6_EN_6_MASK, .index = FLASH_CTRL_MP_REGION_CFG_6_EN_6_OFFSET })

Definition at line 444 of file flash_ctrl_regs.h.

FLASH_CTRL_MP_REGION_CFG_6_EN_6_MASK

#define FLASH_CTRL_MP_REGION_CFG_6_EN_6_MASK   0xfu

Definition at line 442 of file flash_ctrl_regs.h.

FLASH_CTRL_MP_REGION_CFG_6_EN_6_OFFSET

#define FLASH_CTRL_MP_REGION_CFG_6_EN_6_OFFSET   0

Definition at line 443 of file flash_ctrl_regs.h.

FLASH_CTRL_MP_REGION_CFG_6_ERASE_EN_6_FIELD

#define FLASH_CTRL_MP_REGION_CFG_6_ERASE_EN_6_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_MP_REGION_CFG_6_ERASE_EN_6_MASK, .index = FLASH_CTRL_MP_REGION_CFG_6_ERASE_EN_6_OFFSET })

Definition at line 456 of file flash_ctrl_regs.h.

FLASH_CTRL_MP_REGION_CFG_6_ERASE_EN_6_MASK

#define FLASH_CTRL_MP_REGION_CFG_6_ERASE_EN_6_MASK   0xfu

Definition at line 454 of file flash_ctrl_regs.h.

FLASH_CTRL_MP_REGION_CFG_6_ERASE_EN_6_OFFSET

#define FLASH_CTRL_MP_REGION_CFG_6_ERASE_EN_6_OFFSET   12

Definition at line 455 of file flash_ctrl_regs.h.

FLASH_CTRL_MP_REGION_CFG_6_HE_EN_6_FIELD

#define FLASH_CTRL_MP_REGION_CFG_6_HE_EN_6_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_MP_REGION_CFG_6_HE_EN_6_MASK, .index = FLASH_CTRL_MP_REGION_CFG_6_HE_EN_6_OFFSET })

Definition at line 468 of file flash_ctrl_regs.h.

FLASH_CTRL_MP_REGION_CFG_6_HE_EN_6_MASK

#define FLASH_CTRL_MP_REGION_CFG_6_HE_EN_6_MASK   0xfu

Definition at line 466 of file flash_ctrl_regs.h.

FLASH_CTRL_MP_REGION_CFG_6_HE_EN_6_OFFSET

#define FLASH_CTRL_MP_REGION_CFG_6_HE_EN_6_OFFSET   24

Definition at line 467 of file flash_ctrl_regs.h.

FLASH_CTRL_MP_REGION_CFG_6_PROG_EN_6_FIELD

#define FLASH_CTRL_MP_REGION_CFG_6_PROG_EN_6_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_MP_REGION_CFG_6_PROG_EN_6_MASK, .index = FLASH_CTRL_MP_REGION_CFG_6_PROG_EN_6_OFFSET })

Definition at line 452 of file flash_ctrl_regs.h.

FLASH_CTRL_MP_REGION_CFG_6_PROG_EN_6_MASK

#define FLASH_CTRL_MP_REGION_CFG_6_PROG_EN_6_MASK   0xfu

Definition at line 450 of file flash_ctrl_regs.h.

FLASH_CTRL_MP_REGION_CFG_6_PROG_EN_6_OFFSET

#define FLASH_CTRL_MP_REGION_CFG_6_PROG_EN_6_OFFSET   8

Definition at line 451 of file flash_ctrl_regs.h.

FLASH_CTRL_MP_REGION_CFG_6_RD_EN_6_FIELD

#define FLASH_CTRL_MP_REGION_CFG_6_RD_EN_6_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_MP_REGION_CFG_6_RD_EN_6_MASK, .index = FLASH_CTRL_MP_REGION_CFG_6_RD_EN_6_OFFSET })

Definition at line 448 of file flash_ctrl_regs.h.

FLASH_CTRL_MP_REGION_CFG_6_RD_EN_6_MASK

#define FLASH_CTRL_MP_REGION_CFG_6_RD_EN_6_MASK   0xfu

Definition at line 446 of file flash_ctrl_regs.h.

FLASH_CTRL_MP_REGION_CFG_6_RD_EN_6_OFFSET

#define FLASH_CTRL_MP_REGION_CFG_6_RD_EN_6_OFFSET   4

Definition at line 447 of file flash_ctrl_regs.h.

FLASH_CTRL_MP_REGION_CFG_6_REG_OFFSET

#define FLASH_CTRL_MP_REGION_CFG_6_REG_OFFSET   0x68

Definition at line 440 of file flash_ctrl_regs.h.

FLASH_CTRL_MP_REGION_CFG_6_REG_RESVAL

#define FLASH_CTRL_MP_REGION_CFG_6_REG_RESVAL   0x9999999u

Definition at line 441 of file flash_ctrl_regs.h.

FLASH_CTRL_MP_REGION_CFG_6_SCRAMBLE_EN_6_FIELD

#define FLASH_CTRL_MP_REGION_CFG_6_SCRAMBLE_EN_6_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_MP_REGION_CFG_6_SCRAMBLE_EN_6_MASK, .index = FLASH_CTRL_MP_REGION_CFG_6_SCRAMBLE_EN_6_OFFSET })

Definition at line 460 of file flash_ctrl_regs.h.

FLASH_CTRL_MP_REGION_CFG_6_SCRAMBLE_EN_6_MASK

#define FLASH_CTRL_MP_REGION_CFG_6_SCRAMBLE_EN_6_MASK   0xfu

Definition at line 458 of file flash_ctrl_regs.h.

FLASH_CTRL_MP_REGION_CFG_6_SCRAMBLE_EN_6_OFFSET

#define FLASH_CTRL_MP_REGION_CFG_6_SCRAMBLE_EN_6_OFFSET   16

Definition at line 459 of file flash_ctrl_regs.h.

FLASH_CTRL_MP_REGION_CFG_7_ECC_EN_7_FIELD

#define FLASH_CTRL_MP_REGION_CFG_7_ECC_EN_7_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_MP_REGION_CFG_7_ECC_EN_7_MASK, .index = FLASH_CTRL_MP_REGION_CFG_7_ECC_EN_7_OFFSET })

Definition at line 496 of file flash_ctrl_regs.h.

FLASH_CTRL_MP_REGION_CFG_7_ECC_EN_7_MASK

#define FLASH_CTRL_MP_REGION_CFG_7_ECC_EN_7_MASK   0xfu

Definition at line 494 of file flash_ctrl_regs.h.

FLASH_CTRL_MP_REGION_CFG_7_ECC_EN_7_OFFSET

#define FLASH_CTRL_MP_REGION_CFG_7_ECC_EN_7_OFFSET   20

Definition at line 495 of file flash_ctrl_regs.h.

FLASH_CTRL_MP_REGION_CFG_7_EN_7_FIELD

#define FLASH_CTRL_MP_REGION_CFG_7_EN_7_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_MP_REGION_CFG_7_EN_7_MASK, .index = FLASH_CTRL_MP_REGION_CFG_7_EN_7_OFFSET })

Definition at line 476 of file flash_ctrl_regs.h.

FLASH_CTRL_MP_REGION_CFG_7_EN_7_MASK

#define FLASH_CTRL_MP_REGION_CFG_7_EN_7_MASK   0xfu

Definition at line 474 of file flash_ctrl_regs.h.

FLASH_CTRL_MP_REGION_CFG_7_EN_7_OFFSET

#define FLASH_CTRL_MP_REGION_CFG_7_EN_7_OFFSET   0

Definition at line 475 of file flash_ctrl_regs.h.

FLASH_CTRL_MP_REGION_CFG_7_ERASE_EN_7_FIELD

#define FLASH_CTRL_MP_REGION_CFG_7_ERASE_EN_7_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_MP_REGION_CFG_7_ERASE_EN_7_MASK, .index = FLASH_CTRL_MP_REGION_CFG_7_ERASE_EN_7_OFFSET })

Definition at line 488 of file flash_ctrl_regs.h.

FLASH_CTRL_MP_REGION_CFG_7_ERASE_EN_7_MASK

#define FLASH_CTRL_MP_REGION_CFG_7_ERASE_EN_7_MASK   0xfu

Definition at line 486 of file flash_ctrl_regs.h.

FLASH_CTRL_MP_REGION_CFG_7_ERASE_EN_7_OFFSET

#define FLASH_CTRL_MP_REGION_CFG_7_ERASE_EN_7_OFFSET   12

Definition at line 487 of file flash_ctrl_regs.h.

FLASH_CTRL_MP_REGION_CFG_7_HE_EN_7_FIELD

#define FLASH_CTRL_MP_REGION_CFG_7_HE_EN_7_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_MP_REGION_CFG_7_HE_EN_7_MASK, .index = FLASH_CTRL_MP_REGION_CFG_7_HE_EN_7_OFFSET })

Definition at line 500 of file flash_ctrl_regs.h.

FLASH_CTRL_MP_REGION_CFG_7_HE_EN_7_MASK

#define FLASH_CTRL_MP_REGION_CFG_7_HE_EN_7_MASK   0xfu

Definition at line 498 of file flash_ctrl_regs.h.

FLASH_CTRL_MP_REGION_CFG_7_HE_EN_7_OFFSET

#define FLASH_CTRL_MP_REGION_CFG_7_HE_EN_7_OFFSET   24

Definition at line 499 of file flash_ctrl_regs.h.

FLASH_CTRL_MP_REGION_CFG_7_PROG_EN_7_FIELD

#define FLASH_CTRL_MP_REGION_CFG_7_PROG_EN_7_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_MP_REGION_CFG_7_PROG_EN_7_MASK, .index = FLASH_CTRL_MP_REGION_CFG_7_PROG_EN_7_OFFSET })

Definition at line 484 of file flash_ctrl_regs.h.

FLASH_CTRL_MP_REGION_CFG_7_PROG_EN_7_MASK

#define FLASH_CTRL_MP_REGION_CFG_7_PROG_EN_7_MASK   0xfu

Definition at line 482 of file flash_ctrl_regs.h.

FLASH_CTRL_MP_REGION_CFG_7_PROG_EN_7_OFFSET

#define FLASH_CTRL_MP_REGION_CFG_7_PROG_EN_7_OFFSET   8

Definition at line 483 of file flash_ctrl_regs.h.

FLASH_CTRL_MP_REGION_CFG_7_RD_EN_7_FIELD

#define FLASH_CTRL_MP_REGION_CFG_7_RD_EN_7_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_MP_REGION_CFG_7_RD_EN_7_MASK, .index = FLASH_CTRL_MP_REGION_CFG_7_RD_EN_7_OFFSET })

Definition at line 480 of file flash_ctrl_regs.h.

FLASH_CTRL_MP_REGION_CFG_7_RD_EN_7_MASK

#define FLASH_CTRL_MP_REGION_CFG_7_RD_EN_7_MASK   0xfu

Definition at line 478 of file flash_ctrl_regs.h.

FLASH_CTRL_MP_REGION_CFG_7_RD_EN_7_OFFSET

#define FLASH_CTRL_MP_REGION_CFG_7_RD_EN_7_OFFSET   4

Definition at line 479 of file flash_ctrl_regs.h.

FLASH_CTRL_MP_REGION_CFG_7_REG_OFFSET

#define FLASH_CTRL_MP_REGION_CFG_7_REG_OFFSET   0x6c

Definition at line 472 of file flash_ctrl_regs.h.

FLASH_CTRL_MP_REGION_CFG_7_REG_RESVAL

#define FLASH_CTRL_MP_REGION_CFG_7_REG_RESVAL   0x9999999u

Definition at line 473 of file flash_ctrl_regs.h.

FLASH_CTRL_MP_REGION_CFG_7_SCRAMBLE_EN_7_FIELD

#define FLASH_CTRL_MP_REGION_CFG_7_SCRAMBLE_EN_7_FIELD    ((bitfield_field32_t) { .mask = FLASH_CTRL_MP_REGION_CFG_7_SCRAMBLE_EN_7_MASK, .index = FLASH_CTRL_MP_REGION_CFG_7_SCRAMBLE_EN_7_OFFSET })

Definition at line 492 of file flash_ctrl_regs.h.

FLASH_CTRL_MP_REGION_CFG_7_SCRAMBLE_EN_7_MASK

#define FLASH_CTRL_MP_REGION_CFG_7_SCRAMBLE_EN_7_MASK   0xfu

Definition at line 490 of file flash_ctrl_regs.h.

FLASH_CTRL_MP_REGION_CFG_7_SCRAMBLE_EN_7_OFFSET

#define FLASH_CTRL_MP_REGION_CFG_7_SCRAMBLE_EN_7_OFFSET   16

Definition at line 491 of file flash_ctrl_regs.h.

FLASH_CTRL_MP_REGION_CFG_ECC_EN_FIELD_WIDTH

#define FLASH_CTRL_MP_REGION_CFG_ECC_EN_FIELD_WIDTH   4

Definition at line 243 of file flash_ctrl_regs.h.

FLASH_CTRL_MP_REGION_CFG_EN_FIELD_WIDTH

#define FLASH_CTRL_MP_REGION_CFG_EN_FIELD_WIDTH   4

Definition at line 238 of file flash_ctrl_regs.h.

FLASH_CTRL_MP_REGION_CFG_ERASE_EN_FIELD_WIDTH

#define FLASH_CTRL_MP_REGION_CFG_ERASE_EN_FIELD_WIDTH   4

Definition at line 241 of file flash_ctrl_regs.h.

FLASH_CTRL_MP_REGION_CFG_HE_EN_FIELD_WIDTH

#define FLASH_CTRL_MP_REGION_CFG_HE_EN_FIELD_WIDTH   4

Definition at line 244 of file flash_ctrl_regs.h.

FLASH_CTRL_MP_REGION_CFG_MULTIREG_COUNT

#define FLASH_CTRL_MP_REGION_CFG_MULTIREG_COUNT   8

Definition at line 245 of file flash_ctrl_regs.h.

FLASH_CTRL_MP_REGION_CFG_PROG_EN_FIELD_WIDTH

#define FLASH_CTRL_MP_REGION_CFG_PROG_EN_FIELD_WIDTH   4

Definition at line 240 of file flash_ctrl_regs.h.

FLASH_CTRL_MP_REGION_CFG_RD_EN_FIELD_WIDTH

#define FLASH_CTRL_MP_REGION_CFG_RD_EN_FIELD_WIDTH   4

Definition at line 239 of file flash_ctrl_regs.h.

FLASH_CTRL_MP_REGION_CFG_SCRAMBLE_EN_FIELD_WIDTH

#define FLASH_CTRL_MP_REGION_CFG_SCRAMBLE_EN_FIELD_WIDTH   4

Definition at line 242 of file flash_ctrl_regs.h.

FLASH_CTRL_MP_REGION_MULTIREG_COUNT

#define FLASH_CTRL_MP_REGION_MULTIREG_COUNT   8

Definition at line 506 of file flash_ctrl_regs.h.

FLASH_CTRL_MP_REGION_SIZE_FIELD_WIDTH

#define FLASH_CTRL_MP_REGION_SIZE_FIELD_WIDTH   10

Definition at line 505 of file flash_ctrl_regs.h.

FLASH_CTRL_OP_STATUS_DONE_BIT

#define FLASH_CTRL_OP_STATUS_DONE_BIT   0

Definition at line 1722 of file flash_ctrl_regs.h.

FLASH_CTRL_OP_STATUS_ERR_BIT

#define FLASH_CTRL_OP_STATUS_ERR_BIT   1

Definition at line 1723 of file flash_ctrl_regs.h.

FLASH_CTRL_OP_STATUS_REG_OFFSET

#define FLASH_CTRL_OP_STATUS_REG_OFFSET   0x170

Definition at line 1720 of file flash_ctrl_regs.h.

FLASH_CTRL_OP_STATUS_REG_RESVAL

#define FLASH_CTRL_OP_STATUS_REG_RESVAL   0x0u

Definition at line 1721 of file flash_ctrl_regs.h.

FLASH_CTRL_PARAM_BYTES_PER_BANK

#define FLASH_CTRL_PARAM_BYTES_PER_BANK   524288

Definition at line 59 of file flash_ctrl_regs.h.

FLASH_CTRL_PARAM_BYTES_PER_PAGE

#define FLASH_CTRL_PARAM_BYTES_PER_PAGE   2048

Definition at line 56 of file flash_ctrl_regs.h.

FLASH_CTRL_PARAM_BYTES_PER_WORD

#define FLASH_CTRL_PARAM_BYTES_PER_WORD   8

Definition at line 53 of file flash_ctrl_regs.h.

FLASH_CTRL_PARAM_EXEC_EN

#define FLASH_CTRL_PARAM_EXEC_EN   2724870391

Definition at line 62 of file flash_ctrl_regs.h.

FLASH_CTRL_PARAM_MAX_FIFO_DEPTH

#define FLASH_CTRL_PARAM_MAX_FIFO_DEPTH   16

Definition at line 65 of file flash_ctrl_regs.h.

FLASH_CTRL_PARAM_MAX_FIFO_WIDTH

#define FLASH_CTRL_PARAM_MAX_FIFO_WIDTH   5

Definition at line 68 of file flash_ctrl_regs.h.

FLASH_CTRL_PARAM_NUM_ALERTS

#define FLASH_CTRL_PARAM_NUM_ALERTS   5

Definition at line 71 of file flash_ctrl_regs.h.

FLASH_CTRL_PARAM_NUM_INFO_TYPES

#define FLASH_CTRL_PARAM_NUM_INFO_TYPES   3

Definition at line 38 of file flash_ctrl_regs.h.

FLASH_CTRL_PARAM_NUM_INFOS0

#define FLASH_CTRL_PARAM_NUM_INFOS0   10

Definition at line 41 of file flash_ctrl_regs.h.

FLASH_CTRL_PARAM_NUM_INFOS1

#define FLASH_CTRL_PARAM_NUM_INFOS1   1

Definition at line 44 of file flash_ctrl_regs.h.

FLASH_CTRL_PARAM_NUM_INFOS2

#define FLASH_CTRL_PARAM_NUM_INFOS2   2

Definition at line 47 of file flash_ctrl_regs.h.

FLASH_CTRL_PARAM_NUM_REGIONS

#define FLASH_CTRL_PARAM_NUM_REGIONS   8

Definition at line 35 of file flash_ctrl_regs.h.

FLASH_CTRL_PARAM_REG_BANK_WIDTH

#define FLASH_CTRL_PARAM_REG_BANK_WIDTH   1

Definition at line 32 of file flash_ctrl_regs.h.

FLASH_CTRL_PARAM_REG_BUS_PGM_RES_BYTES

#define FLASH_CTRL_PARAM_REG_BUS_PGM_RES_BYTES   64

Definition at line 26 of file flash_ctrl_regs.h.

FLASH_CTRL_PARAM_REG_NUM_BANKS

#define FLASH_CTRL_PARAM_REG_NUM_BANKS   2

Definition at line 20 of file flash_ctrl_regs.h.

FLASH_CTRL_PARAM_REG_PAGE_WIDTH

#define FLASH_CTRL_PARAM_REG_PAGE_WIDTH   8

Definition at line 29 of file flash_ctrl_regs.h.

FLASH_CTRL_PARAM_REG_PAGES_PER_BANK

#define FLASH_CTRL_PARAM_REG_PAGES_PER_BANK   256

Definition at line 23 of file flash_ctrl_regs.h.

FLASH_CTRL_PARAM_REG_WIDTH

#define FLASH_CTRL_PARAM_REG_WIDTH   32

Definition at line 74 of file flash_ctrl_regs.h.

FLASH_CTRL_PARAM_WORDS_PER_PAGE

#define FLASH_CTRL_PARAM_WORDS_PER_PAGE   256

Definition at line 50 of file flash_ctrl_regs.h.

FLASH_CTRL_PHY_ALERT_CFG_ALERT_ACK_BIT

#define FLASH_CTRL_PHY_ALERT_CFG_ALERT_ACK_BIT   0

Definition at line 1831 of file flash_ctrl_regs.h.

FLASH_CTRL_PHY_ALERT_CFG_ALERT_TRIG_BIT

#define FLASH_CTRL_PHY_ALERT_CFG_ALERT_TRIG_BIT   1

Definition at line 1832 of file flash_ctrl_regs.h.

FLASH_CTRL_PHY_ALERT_CFG_REG_OFFSET

#define FLASH_CTRL_PHY_ALERT_CFG_REG_OFFSET   0x198

Definition at line 1829 of file flash_ctrl_regs.h.

FLASH_CTRL_PHY_ALERT_CFG_REG_RESVAL

#define FLASH_CTRL_PHY_ALERT_CFG_REG_RESVAL   0x0u

Definition at line 1830 of file flash_ctrl_regs.h.

FLASH_CTRL_PHY_STATUS_INIT_WIP_BIT

#define FLASH_CTRL_PHY_STATUS_INIT_WIP_BIT   0

Definition at line 1837 of file flash_ctrl_regs.h.

FLASH_CTRL_PHY_STATUS_PROG_NORMAL_AVAIL_BIT

#define FLASH_CTRL_PHY_STATUS_PROG_NORMAL_AVAIL_BIT   1

Definition at line 1838 of file flash_ctrl_regs.h.

FLASH_CTRL_PHY_STATUS_PROG_REPAIR_AVAIL_BIT

#define FLASH_CTRL_PHY_STATUS_PROG_REPAIR_AVAIL_BIT   2

Definition at line 1839 of file flash_ctrl_regs.h.

FLASH_CTRL_PHY_STATUS_REG_OFFSET

#define FLASH_CTRL_PHY_STATUS_REG_OFFSET   0x19c

Definition at line 1835 of file flash_ctrl_regs.h.

FLASH_CTRL_PHY_STATUS_REG_RESVAL

#define FLASH_CTRL_PHY_STATUS_REG_RESVAL   0x6u

Definition at line 1836 of file flash_ctrl_regs.h.

FLASH_CTRL_PROG_FIFO_REG_OFFSET

#define FLASH_CTRL_PROG_FIFO_REG_OFFSET   0x1b0

Definition at line 1875 of file flash_ctrl_regs.h.

FLASH_CTRL_PROG_FIFO_SIZE_BYTES

#define FLASH_CTRL_PROG_FIFO_SIZE_BYTES   4

Definition at line 1877 of file flash_ctrl_regs.h.

FLASH_CTRL_PROG_FIFO_SIZE_WORDS

#define FLASH_CTRL_PROG_FIFO_SIZE_WORDS   1

Definition at line 1876 of file flash_ctrl_regs.h.

FLASH_CTRL_PROG_TYPE_EN_NORMAL_BIT

#define FLASH_CTRL_PROG_TYPE_EN_NORMAL_BIT   0

Definition at line 183 of file flash_ctrl_regs.h.

FLASH_CTRL_PROG_TYPE_EN_REG_OFFSET

#define FLASH_CTRL_PROG_TYPE_EN_REG_OFFSET   0x28

Definition at line 181 of file flash_ctrl_regs.h.

FLASH_CTRL_PROG_TYPE_EN_REG_RESVAL

#define FLASH_CTRL_PROG_TYPE_EN_REG_RESVAL   0x3u

Definition at line 182 of file flash_ctrl_regs.h.

FLASH_CTRL_PROG_TYPE_EN_REPAIR_BIT

#define FLASH_CTRL_PROG_TYPE_EN_REPAIR_BIT   1

Definition at line 184 of file flash_ctrl_regs.h.

FLASH_CTRL_RD_FIFO_REG_OFFSET

#define FLASH_CTRL_RD_FIFO_REG_OFFSET   0x1b4

Definition at line 1879 of file flash_ctrl_regs.h.

FLASH_CTRL_RD_FIFO_SIZE_BYTES

#define FLASH_CTRL_RD_FIFO_SIZE_BYTES   4

Definition at line 1881 of file flash_ctrl_regs.h.

FLASH_CTRL_RD_FIFO_SIZE_WORDS

#define FLASH_CTRL_RD_FIFO_SIZE_WORDS   1

Definition at line 1880 of file flash_ctrl_regs.h.

FLASH_CTRL_REGION_CFG_REGWEN_0_REG_OFFSET

#define FLASH_CTRL_REGION_CFG_REGWEN_0_REG_OFFSET   0x30

Definition at line 196 of file flash_ctrl_regs.h.

FLASH_CTRL_REGION_CFG_REGWEN_0_REG_RESVAL

#define FLASH_CTRL_REGION_CFG_REGWEN_0_REG_RESVAL   0x1u

Definition at line 197 of file flash_ctrl_regs.h.

FLASH_CTRL_REGION_CFG_REGWEN_0_REGION_0_BIT

#define FLASH_CTRL_REGION_CFG_REGWEN_0_REGION_0_BIT   0

Definition at line 198 of file flash_ctrl_regs.h.

FLASH_CTRL_REGION_CFG_REGWEN_0_REGION_0_VALUE_REGION_ENABLED

#define FLASH_CTRL_REGION_CFG_REGWEN_0_REGION_0_VALUE_REGION_ENABLED   0x1

Definition at line 200 of file flash_ctrl_regs.h.

FLASH_CTRL_REGION_CFG_REGWEN_0_REGION_0_VALUE_REGION_LOCKED

#define FLASH_CTRL_REGION_CFG_REGWEN_0_REGION_0_VALUE_REGION_LOCKED   0x0

Definition at line 199 of file flash_ctrl_regs.h.

FLASH_CTRL_REGION_CFG_REGWEN_1_REG_OFFSET

#define FLASH_CTRL_REGION_CFG_REGWEN_1_REG_OFFSET   0x34

Definition at line 203 of file flash_ctrl_regs.h.

FLASH_CTRL_REGION_CFG_REGWEN_1_REG_RESVAL

#define FLASH_CTRL_REGION_CFG_REGWEN_1_REG_RESVAL   0x1u

Definition at line 204 of file flash_ctrl_regs.h.

FLASH_CTRL_REGION_CFG_REGWEN_1_REGION_1_BIT

#define FLASH_CTRL_REGION_CFG_REGWEN_1_REGION_1_BIT   0

Definition at line 205 of file flash_ctrl_regs.h.

FLASH_CTRL_REGION_CFG_REGWEN_2_REG_OFFSET

#define FLASH_CTRL_REGION_CFG_REGWEN_2_REG_OFFSET   0x38

Definition at line 208 of file flash_ctrl_regs.h.

FLASH_CTRL_REGION_CFG_REGWEN_2_REG_RESVAL

#define FLASH_CTRL_REGION_CFG_REGWEN_2_REG_RESVAL   0x1u

Definition at line 209 of file flash_ctrl_regs.h.

FLASH_CTRL_REGION_CFG_REGWEN_2_REGION_2_BIT

#define FLASH_CTRL_REGION_CFG_REGWEN_2_REGION_2_BIT   0

Definition at line 210 of file flash_ctrl_regs.h.

FLASH_CTRL_REGION_CFG_REGWEN_3_REG_OFFSET

#define FLASH_CTRL_REGION_CFG_REGWEN_3_REG_OFFSET   0x3c

Definition at line 213 of file flash_ctrl_regs.h.

FLASH_CTRL_REGION_CFG_REGWEN_3_REG_RESVAL

#define FLASH_CTRL_REGION_CFG_REGWEN_3_REG_RESVAL   0x1u

Definition at line 214 of file flash_ctrl_regs.h.

FLASH_CTRL_REGION_CFG_REGWEN_3_REGION_3_BIT

#define FLASH_CTRL_REGION_CFG_REGWEN_3_REGION_3_BIT   0

Definition at line 215 of file flash_ctrl_regs.h.

FLASH_CTRL_REGION_CFG_REGWEN_4_REG_OFFSET

#define FLASH_CTRL_REGION_CFG_REGWEN_4_REG_OFFSET   0x40

Definition at line 218 of file flash_ctrl_regs.h.

FLASH_CTRL_REGION_CFG_REGWEN_4_REG_RESVAL

#define FLASH_CTRL_REGION_CFG_REGWEN_4_REG_RESVAL   0x1u

Definition at line 219 of file flash_ctrl_regs.h.

FLASH_CTRL_REGION_CFG_REGWEN_4_REGION_4_BIT

#define FLASH_CTRL_REGION_CFG_REGWEN_4_REGION_4_BIT   0

Definition at line 220 of file flash_ctrl_regs.h.

FLASH_CTRL_REGION_CFG_REGWEN_5_REG_OFFSET

#define FLASH_CTRL_REGION_CFG_REGWEN_5_REG_OFFSET   0x44

Definition at line 223 of file flash_ctrl_regs.h.

FLASH_CTRL_REGION_CFG_REGWEN_5_REG_RESVAL

#define FLASH_CTRL_REGION_CFG_REGWEN_5_REG_RESVAL   0x1u

Definition at line 224 of file flash_ctrl_regs.h.

FLASH_CTRL_REGION_CFG_REGWEN_5_REGION_5_BIT

#define FLASH_CTRL_REGION_CFG_REGWEN_5_REGION_5_BIT   0

Definition at line 225 of file flash_ctrl_regs.h.

FLASH_CTRL_REGION_CFG_REGWEN_6_REG_OFFSET

#define FLASH_CTRL_REGION_CFG_REGWEN_6_REG_OFFSET   0x48

Definition at line 228 of file flash_ctrl_regs.h.

FLASH_CTRL_REGION_CFG_REGWEN_6_REG_RESVAL

#define FLASH_CTRL_REGION_CFG_REGWEN_6_REG_RESVAL   0x1u

Definition at line 229 of file flash_ctrl_regs.h.

FLASH_CTRL_REGION_CFG_REGWEN_6_REGION_6_BIT

#define FLASH_CTRL_REGION_CFG_REGWEN_6_REGION_6_BIT   0

Definition at line 230 of file flash_ctrl_regs.h.

FLASH_CTRL_REGION_CFG_REGWEN_7_REG_OFFSET

#define FLASH_CTRL_REGION_CFG_REGWEN_7_REG_OFFSET   0x4c

Definition at line 233 of file flash_ctrl_regs.h.

FLASH_CTRL_REGION_CFG_REGWEN_7_REG_RESVAL

#define FLASH_CTRL_REGION_CFG_REGWEN_7_REG_RESVAL   0x1u

Definition at line 234 of file flash_ctrl_regs.h.

FLASH_CTRL_REGION_CFG_REGWEN_7_REGION_7_BIT

#define FLASH_CTRL_REGION_CFG_REGWEN_7_REGION_7_BIT   0

Definition at line 235 of file flash_ctrl_regs.h.

FLASH_CTRL_REGION_CFG_REGWEN_MULTIREG_COUNT

#define FLASH_CTRL_REGION_CFG_REGWEN_MULTIREG_COUNT   8

Definition at line 193 of file flash_ctrl_regs.h.

FLASH_CTRL_REGION_CFG_REGWEN_REGION_FIELD_WIDTH

#define FLASH_CTRL_REGION_CFG_REGWEN_REGION_FIELD_WIDTH   1

Definition at line 192 of file flash_ctrl_regs.h.

FLASH_CTRL_SCRATCH_REG_OFFSET

#define FLASH_CTRL_SCRATCH_REG_OFFSET   0x1a0

Definition at line 1842 of file flash_ctrl_regs.h.

FLASH_CTRL_SCRATCH_REG_RESVAL

#define FLASH_CTRL_SCRATCH_REG_RESVAL   0x0u

Definition at line 1843 of file flash_ctrl_regs.h.

FLASH_CTRL_STATUS_INIT_WIP_BIT

#define FLASH_CTRL_STATUS_INIT_WIP_BIT   4

Definition at line 1732 of file flash_ctrl_regs.h.

FLASH_CTRL_STATUS_INITIALIZED_BIT

#define FLASH_CTRL_STATUS_INITIALIZED_BIT   5

Definition at line 1733 of file flash_ctrl_regs.h.

FLASH_CTRL_STATUS_PROG_EMPTY_BIT

#define FLASH_CTRL_STATUS_PROG_EMPTY_BIT   3

Definition at line 1731 of file flash_ctrl_regs.h.

FLASH_CTRL_STATUS_PROG_FULL_BIT

#define FLASH_CTRL_STATUS_PROG_FULL_BIT   2

Definition at line 1730 of file flash_ctrl_regs.h.

FLASH_CTRL_STATUS_RD_EMPTY_BIT

#define FLASH_CTRL_STATUS_RD_EMPTY_BIT   1

Definition at line 1729 of file flash_ctrl_regs.h.

FLASH_CTRL_STATUS_RD_FULL_BIT

#define FLASH_CTRL_STATUS_RD_FULL_BIT   0

Definition at line 1728 of file flash_ctrl_regs.h.

FLASH_CTRL_STATUS_REG_OFFSET

#define FLASH_CTRL_STATUS_REG_OFFSET   0x174

Definition at line 1726 of file flash_ctrl_regs.h.

FLASH_CTRL_STATUS_REG_RESVAL

#define FLASH_CTRL_STATUS_REG_RESVAL   0xau

Definition at line 1727 of file flash_ctrl_regs.h.

FLASH_CTRL_STD_FAULT_STATUS_ARB_FSM_ERR_BIT

#define FLASH_CTRL_STD_FAULT_STATUS_ARB_FSM_ERR_BIT   4

Definition at line 1762 of file flash_ctrl_regs.h.

FLASH_CTRL_STD_FAULT_STATUS_CTRL_CNT_ERR_BIT

#define FLASH_CTRL_STD_FAULT_STATUS_CTRL_CNT_ERR_BIT   7

Definition at line 1765 of file flash_ctrl_regs.h.

FLASH_CTRL_STD_FAULT_STATUS_FIFO_ERR_BIT

#define FLASH_CTRL_STD_FAULT_STATUS_FIFO_ERR_BIT   8

Definition at line 1766 of file flash_ctrl_regs.h.

FLASH_CTRL_STD_FAULT_STATUS_LCMGR_ERR_BIT

#define FLASH_CTRL_STD_FAULT_STATUS_LCMGR_ERR_BIT   2

Definition at line 1760 of file flash_ctrl_regs.h.

FLASH_CTRL_STD_FAULT_STATUS_LCMGR_INTG_ERR_BIT

#define FLASH_CTRL_STD_FAULT_STATUS_LCMGR_INTG_ERR_BIT   3

Definition at line 1761 of file flash_ctrl_regs.h.

FLASH_CTRL_STD_FAULT_STATUS_PHY_FSM_ERR_BIT

#define FLASH_CTRL_STD_FAULT_STATUS_PHY_FSM_ERR_BIT   6

Definition at line 1764 of file flash_ctrl_regs.h.

FLASH_CTRL_STD_FAULT_STATUS_PROG_INTG_ERR_BIT

#define FLASH_CTRL_STD_FAULT_STATUS_PROG_INTG_ERR_BIT   1

Definition at line 1759 of file flash_ctrl_regs.h.

FLASH_CTRL_STD_FAULT_STATUS_REG_INTG_ERR_BIT

#define FLASH_CTRL_STD_FAULT_STATUS_REG_INTG_ERR_BIT   0

Definition at line 1758 of file flash_ctrl_regs.h.

FLASH_CTRL_STD_FAULT_STATUS_REG_OFFSET

#define FLASH_CTRL_STD_FAULT_STATUS_REG_OFFSET   0x180

Definition at line 1756 of file flash_ctrl_regs.h.

FLASH_CTRL_STD_FAULT_STATUS_REG_RESVAL

#define FLASH_CTRL_STD_FAULT_STATUS_REG_RESVAL   0x0u

Definition at line 1757 of file flash_ctrl_regs.h.

FLASH_CTRL_STD_FAULT_STATUS_STORAGE_ERR_BIT

#define FLASH_CTRL_STD_FAULT_STATUS_STORAGE_ERR_BIT   5

Definition at line 1763 of file flash_ctrl_regs.h.