Software APIs
gpio.c
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1// Copyright lowRISC contributors (OpenTitan project).
2// Licensed under the Apache License, Version 2.0, see LICENSE for details.
3// SPDX-License-Identifier: Apache-2.0
4//
5// Device table API auto-generated by `dtgen`
6
7/**
8 * @file
9 * @brief Device Tables (DT) for IP gpio and top earlgrey.
10 */
11
12#include "hw/top/dt/gpio.h"
13
14
15
16
17
18/**
19 * Description of instances.
20 */
21typedef struct dt_desc_gpio {
22 dt_instance_id_t inst_id; /**< Instance ID */
23 uint32_t reg_addr[kDtGpioRegBlockCount]; /**< Base address of each register block */
24 /**
25 * PLIC ID of the first IRQ of this instance
26 *
27 * This can be `kDtPlicIrqIdNone` if the block is not connected to the PLIC.
28 */
29 top_earlgrey_plic_irq_id_t first_irq;
30 /**
31 * Alert ID of the first Alert of this instance.
32 *
33 * This value is undefined if the block is not connected to the Alert Handler.
34 */
35 top_earlgrey_alert_id_t first_alert;
36 dt_clock_t clock[kDtGpioClockCount]; /**< Clock signal connected to each clock port */
37 dt_reset_t reset[kDtGpioResetCount]; /**< Reset signal connected to each reset port */
38 dt_periph_io_t periph_io[kDtGpioPeriphIoCount]; /**< Description of each peripheral I/O */
39 struct {
40 uint8_t input_period_counter_count; /**< number of input period counters */
41 } ipgen_ext; /**< Extension */
42} dt_desc_gpio_t;
43
44
45
46
47static const dt_desc_gpio_t gpio_desc[kDtGpioCount] = {
48 [kDtGpio0] = {
49 .inst_id = kDtInstanceIdGpio0,
50 .reg_addr = {
51 [kDtGpioRegBlockCore] = 0x40040000,
52 },
53 .first_irq = kTopEarlgreyPlicIrqIdGpio0Gpio0,
54 .first_alert = kTopEarlgreyAlertIdGpio0FatalFault,
55 .clock = {
56 [kDtGpioClockClk] = kDtClockIoDiv4,
57 },
58 .reset = {
59 [kDtGpioResetRst] = kDtResetLcIoDiv4,
60 },
61 .periph_io = {
62 [kDtGpioPeriphIoGpio0] = {
63 .__internal = {
64 .type = kDtPeriphIoTypeMio,
65 .dir = kDtPeriphIoDirInout,
66 .periph_input_or_direct_pad = kTopEarlgreyPinmuxPeripheralInGpio0Gpio0,
67 .outsel_or_dt_pad = kTopEarlgreyPinmuxOutselGpio0Gpio0,
68 },
69 },
70 [kDtGpioPeriphIoGpio1] = {
71 .__internal = {
72 .type = kDtPeriphIoTypeMio,
73 .dir = kDtPeriphIoDirInout,
74 .periph_input_or_direct_pad = kTopEarlgreyPinmuxPeripheralInGpio0Gpio1,
75 .outsel_or_dt_pad = kTopEarlgreyPinmuxOutselGpio0Gpio1,
76 },
77 },
78 [kDtGpioPeriphIoGpio2] = {
79 .__internal = {
80 .type = kDtPeriphIoTypeMio,
81 .dir = kDtPeriphIoDirInout,
82 .periph_input_or_direct_pad = kTopEarlgreyPinmuxPeripheralInGpio0Gpio2,
83 .outsel_or_dt_pad = kTopEarlgreyPinmuxOutselGpio0Gpio2,
84 },
85 },
86 [kDtGpioPeriphIoGpio3] = {
87 .__internal = {
88 .type = kDtPeriphIoTypeMio,
89 .dir = kDtPeriphIoDirInout,
90 .periph_input_or_direct_pad = kTopEarlgreyPinmuxPeripheralInGpio0Gpio3,
91 .outsel_or_dt_pad = kTopEarlgreyPinmuxOutselGpio0Gpio3,
92 },
93 },
94 [kDtGpioPeriphIoGpio4] = {
95 .__internal = {
96 .type = kDtPeriphIoTypeMio,
97 .dir = kDtPeriphIoDirInout,
98 .periph_input_or_direct_pad = kTopEarlgreyPinmuxPeripheralInGpio0Gpio4,
99 .outsel_or_dt_pad = kTopEarlgreyPinmuxOutselGpio0Gpio4,
100 },
101 },
102 [kDtGpioPeriphIoGpio5] = {
103 .__internal = {
104 .type = kDtPeriphIoTypeMio,
105 .dir = kDtPeriphIoDirInout,
106 .periph_input_or_direct_pad = kTopEarlgreyPinmuxPeripheralInGpio0Gpio5,
107 .outsel_or_dt_pad = kTopEarlgreyPinmuxOutselGpio0Gpio5,
108 },
109 },
110 [kDtGpioPeriphIoGpio6] = {
111 .__internal = {
112 .type = kDtPeriphIoTypeMio,
113 .dir = kDtPeriphIoDirInout,
114 .periph_input_or_direct_pad = kTopEarlgreyPinmuxPeripheralInGpio0Gpio6,
115 .outsel_or_dt_pad = kTopEarlgreyPinmuxOutselGpio0Gpio6,
116 },
117 },
118 [kDtGpioPeriphIoGpio7] = {
119 .__internal = {
120 .type = kDtPeriphIoTypeMio,
121 .dir = kDtPeriphIoDirInout,
122 .periph_input_or_direct_pad = kTopEarlgreyPinmuxPeripheralInGpio0Gpio7,
123 .outsel_or_dt_pad = kTopEarlgreyPinmuxOutselGpio0Gpio7,
124 },
125 },
126 [kDtGpioPeriphIoGpio8] = {
127 .__internal = {
128 .type = kDtPeriphIoTypeMio,
129 .dir = kDtPeriphIoDirInout,
130 .periph_input_or_direct_pad = kTopEarlgreyPinmuxPeripheralInGpio0Gpio8,
131 .outsel_or_dt_pad = kTopEarlgreyPinmuxOutselGpio0Gpio8,
132 },
133 },
134 [kDtGpioPeriphIoGpio9] = {
135 .__internal = {
136 .type = kDtPeriphIoTypeMio,
137 .dir = kDtPeriphIoDirInout,
138 .periph_input_or_direct_pad = kTopEarlgreyPinmuxPeripheralInGpio0Gpio9,
139 .outsel_or_dt_pad = kTopEarlgreyPinmuxOutselGpio0Gpio9,
140 },
141 },
142 [kDtGpioPeriphIoGpio10] = {
143 .__internal = {
144 .type = kDtPeriphIoTypeMio,
145 .dir = kDtPeriphIoDirInout,
146 .periph_input_or_direct_pad = kTopEarlgreyPinmuxPeripheralInGpio0Gpio10,
147 .outsel_or_dt_pad = kTopEarlgreyPinmuxOutselGpio0Gpio10,
148 },
149 },
150 [kDtGpioPeriphIoGpio11] = {
151 .__internal = {
152 .type = kDtPeriphIoTypeMio,
153 .dir = kDtPeriphIoDirInout,
154 .periph_input_or_direct_pad = kTopEarlgreyPinmuxPeripheralInGpio0Gpio11,
155 .outsel_or_dt_pad = kTopEarlgreyPinmuxOutselGpio0Gpio11,
156 },
157 },
158 [kDtGpioPeriphIoGpio12] = {
159 .__internal = {
160 .type = kDtPeriphIoTypeMio,
161 .dir = kDtPeriphIoDirInout,
162 .periph_input_or_direct_pad = kTopEarlgreyPinmuxPeripheralInGpio0Gpio12,
163 .outsel_or_dt_pad = kTopEarlgreyPinmuxOutselGpio0Gpio12,
164 },
165 },
166 [kDtGpioPeriphIoGpio13] = {
167 .__internal = {
168 .type = kDtPeriphIoTypeMio,
169 .dir = kDtPeriphIoDirInout,
170 .periph_input_or_direct_pad = kTopEarlgreyPinmuxPeripheralInGpio0Gpio13,
171 .outsel_or_dt_pad = kTopEarlgreyPinmuxOutselGpio0Gpio13,
172 },
173 },
174 [kDtGpioPeriphIoGpio14] = {
175 .__internal = {
176 .type = kDtPeriphIoTypeMio,
177 .dir = kDtPeriphIoDirInout,
178 .periph_input_or_direct_pad = kTopEarlgreyPinmuxPeripheralInGpio0Gpio14,
179 .outsel_or_dt_pad = kTopEarlgreyPinmuxOutselGpio0Gpio14,
180 },
181 },
182 [kDtGpioPeriphIoGpio15] = {
183 .__internal = {
184 .type = kDtPeriphIoTypeMio,
185 .dir = kDtPeriphIoDirInout,
186 .periph_input_or_direct_pad = kTopEarlgreyPinmuxPeripheralInGpio0Gpio15,
187 .outsel_or_dt_pad = kTopEarlgreyPinmuxOutselGpio0Gpio15,
188 },
189 },
190 [kDtGpioPeriphIoGpio16] = {
191 .__internal = {
192 .type = kDtPeriphIoTypeMio,
193 .dir = kDtPeriphIoDirInout,
194 .periph_input_or_direct_pad = kTopEarlgreyPinmuxPeripheralInGpio0Gpio16,
195 .outsel_or_dt_pad = kTopEarlgreyPinmuxOutselGpio0Gpio16,
196 },
197 },
198 [kDtGpioPeriphIoGpio17] = {
199 .__internal = {
200 .type = kDtPeriphIoTypeMio,
201 .dir = kDtPeriphIoDirInout,
202 .periph_input_or_direct_pad = kTopEarlgreyPinmuxPeripheralInGpio0Gpio17,
203 .outsel_or_dt_pad = kTopEarlgreyPinmuxOutselGpio0Gpio17,
204 },
205 },
206 [kDtGpioPeriphIoGpio18] = {
207 .__internal = {
208 .type = kDtPeriphIoTypeMio,
209 .dir = kDtPeriphIoDirInout,
210 .periph_input_or_direct_pad = kTopEarlgreyPinmuxPeripheralInGpio0Gpio18,
211 .outsel_or_dt_pad = kTopEarlgreyPinmuxOutselGpio0Gpio18,
212 },
213 },
214 [kDtGpioPeriphIoGpio19] = {
215 .__internal = {
216 .type = kDtPeriphIoTypeMio,
217 .dir = kDtPeriphIoDirInout,
218 .periph_input_or_direct_pad = kTopEarlgreyPinmuxPeripheralInGpio0Gpio19,
219 .outsel_or_dt_pad = kTopEarlgreyPinmuxOutselGpio0Gpio19,
220 },
221 },
222 [kDtGpioPeriphIoGpio20] = {
223 .__internal = {
224 .type = kDtPeriphIoTypeMio,
225 .dir = kDtPeriphIoDirInout,
226 .periph_input_or_direct_pad = kTopEarlgreyPinmuxPeripheralInGpio0Gpio20,
227 .outsel_or_dt_pad = kTopEarlgreyPinmuxOutselGpio0Gpio20,
228 },
229 },
230 [kDtGpioPeriphIoGpio21] = {
231 .__internal = {
232 .type = kDtPeriphIoTypeMio,
233 .dir = kDtPeriphIoDirInout,
234 .periph_input_or_direct_pad = kTopEarlgreyPinmuxPeripheralInGpio0Gpio21,
235 .outsel_or_dt_pad = kTopEarlgreyPinmuxOutselGpio0Gpio21,
236 },
237 },
238 [kDtGpioPeriphIoGpio22] = {
239 .__internal = {
240 .type = kDtPeriphIoTypeMio,
241 .dir = kDtPeriphIoDirInout,
242 .periph_input_or_direct_pad = kTopEarlgreyPinmuxPeripheralInGpio0Gpio22,
243 .outsel_or_dt_pad = kTopEarlgreyPinmuxOutselGpio0Gpio22,
244 },
245 },
246 [kDtGpioPeriphIoGpio23] = {
247 .__internal = {
248 .type = kDtPeriphIoTypeMio,
249 .dir = kDtPeriphIoDirInout,
250 .periph_input_or_direct_pad = kTopEarlgreyPinmuxPeripheralInGpio0Gpio23,
251 .outsel_or_dt_pad = kTopEarlgreyPinmuxOutselGpio0Gpio23,
252 },
253 },
254 [kDtGpioPeriphIoGpio24] = {
255 .__internal = {
256 .type = kDtPeriphIoTypeMio,
257 .dir = kDtPeriphIoDirInout,
258 .periph_input_or_direct_pad = kTopEarlgreyPinmuxPeripheralInGpio0Gpio24,
259 .outsel_or_dt_pad = kTopEarlgreyPinmuxOutselGpio0Gpio24,
260 },
261 },
262 [kDtGpioPeriphIoGpio25] = {
263 .__internal = {
264 .type = kDtPeriphIoTypeMio,
265 .dir = kDtPeriphIoDirInout,
266 .periph_input_or_direct_pad = kTopEarlgreyPinmuxPeripheralInGpio0Gpio25,
267 .outsel_or_dt_pad = kTopEarlgreyPinmuxOutselGpio0Gpio25,
268 },
269 },
270 [kDtGpioPeriphIoGpio26] = {
271 .__internal = {
272 .type = kDtPeriphIoTypeMio,
273 .dir = kDtPeriphIoDirInout,
274 .periph_input_or_direct_pad = kTopEarlgreyPinmuxPeripheralInGpio0Gpio26,
275 .outsel_or_dt_pad = kTopEarlgreyPinmuxOutselGpio0Gpio26,
276 },
277 },
278 [kDtGpioPeriphIoGpio27] = {
279 .__internal = {
280 .type = kDtPeriphIoTypeMio,
281 .dir = kDtPeriphIoDirInout,
282 .periph_input_or_direct_pad = kTopEarlgreyPinmuxPeripheralInGpio0Gpio27,
283 .outsel_or_dt_pad = kTopEarlgreyPinmuxOutselGpio0Gpio27,
284 },
285 },
286 [kDtGpioPeriphIoGpio28] = {
287 .__internal = {
288 .type = kDtPeriphIoTypeMio,
289 .dir = kDtPeriphIoDirInout,
290 .periph_input_or_direct_pad = kTopEarlgreyPinmuxPeripheralInGpio0Gpio28,
291 .outsel_or_dt_pad = kTopEarlgreyPinmuxOutselGpio0Gpio28,
292 },
293 },
294 [kDtGpioPeriphIoGpio29] = {
295 .__internal = {
296 .type = kDtPeriphIoTypeMio,
297 .dir = kDtPeriphIoDirInout,
298 .periph_input_or_direct_pad = kTopEarlgreyPinmuxPeripheralInGpio0Gpio29,
299 .outsel_or_dt_pad = kTopEarlgreyPinmuxOutselGpio0Gpio29,
300 },
301 },
302 [kDtGpioPeriphIoGpio30] = {
303 .__internal = {
304 .type = kDtPeriphIoTypeMio,
305 .dir = kDtPeriphIoDirInout,
306 .periph_input_or_direct_pad = kTopEarlgreyPinmuxPeripheralInGpio0Gpio30,
307 .outsel_or_dt_pad = kTopEarlgreyPinmuxOutselGpio0Gpio30,
308 },
309 },
310 [kDtGpioPeriphIoGpio31] = {
311 .__internal = {
312 .type = kDtPeriphIoTypeMio,
313 .dir = kDtPeriphIoDirInout,
314 .periph_input_or_direct_pad = kTopEarlgreyPinmuxPeripheralInGpio0Gpio31,
315 .outsel_or_dt_pad = kTopEarlgreyPinmuxOutselGpio0Gpio31,
316 },
317 },
318 },
319 .ipgen_ext = {
320 .input_period_counter_count = 0,
321 },
322 },
323 [kDtGpio1] = {
324 .inst_id = kDtInstanceIdGpio1,
325 .reg_addr = {
326 [kDtGpioRegBlockCore] = 0x40050000,
327 },
328 .first_irq = kTopEarlgreyPlicIrqIdGpio1Gpio0,
329 .first_alert = kTopEarlgreyAlertIdGpio1FatalFault,
330 .clock = {
331 [kDtGpioClockClk] = kDtClockIoDiv4,
332 },
333 .reset = {
334 [kDtGpioResetRst] = kDtResetLcIoDiv4,
335 },
336 .periph_io = {
337 [kDtGpioPeriphIoGpio0] = {
338 .__internal = {
339 .type = kDtPeriphIoTypeMio,
340 .dir = kDtPeriphIoDirInout,
341 .periph_input_or_direct_pad = kTopEarlgreyPinmuxPeripheralInGpio1Gpio0,
342 .outsel_or_dt_pad = kTopEarlgreyPinmuxOutselGpio1Gpio0,
343 },
344 },
345 [kDtGpioPeriphIoGpio1] = {
346 .__internal = {
347 .type = kDtPeriphIoTypeMio,
348 .dir = kDtPeriphIoDirInout,
349 .periph_input_or_direct_pad = kTopEarlgreyPinmuxPeripheralInGpio1Gpio1,
350 .outsel_or_dt_pad = kTopEarlgreyPinmuxOutselGpio1Gpio1,
351 },
352 },
353 [kDtGpioPeriphIoGpio2] = {
354 .__internal = {
355 .type = kDtPeriphIoTypeMio,
356 .dir = kDtPeriphIoDirInout,
357 .periph_input_or_direct_pad = kTopEarlgreyPinmuxPeripheralInGpio1Gpio2,
358 .outsel_or_dt_pad = kTopEarlgreyPinmuxOutselGpio1Gpio2,
359 },
360 },
361 [kDtGpioPeriphIoGpio3] = {
362 .__internal = {
363 .type = kDtPeriphIoTypeMio,
364 .dir = kDtPeriphIoDirInout,
365 .periph_input_or_direct_pad = kTopEarlgreyPinmuxPeripheralInGpio1Gpio3,
366 .outsel_or_dt_pad = kTopEarlgreyPinmuxOutselGpio1Gpio3,
367 },
368 },
369 [kDtGpioPeriphIoGpio4] = {
370 .__internal = {
371 .type = kDtPeriphIoTypeMio,
372 .dir = kDtPeriphIoDirInout,
373 .periph_input_or_direct_pad = kTopEarlgreyPinmuxPeripheralInGpio1Gpio4,
374 .outsel_or_dt_pad = kTopEarlgreyPinmuxOutselGpio1Gpio4,
375 },
376 },
377 [kDtGpioPeriphIoGpio5] = {
378 .__internal = {
379 .type = kDtPeriphIoTypeMio,
380 .dir = kDtPeriphIoDirInout,
381 .periph_input_or_direct_pad = kTopEarlgreyPinmuxPeripheralInGpio1Gpio5,
382 .outsel_or_dt_pad = kTopEarlgreyPinmuxOutselGpio1Gpio5,
383 },
384 },
385 [kDtGpioPeriphIoGpio6] = {
386 .__internal = {
387 .type = kDtPeriphIoTypeMio,
388 .dir = kDtPeriphIoDirInout,
389 .periph_input_or_direct_pad = kTopEarlgreyPinmuxPeripheralInGpio1Gpio6,
390 .outsel_or_dt_pad = kTopEarlgreyPinmuxOutselGpio1Gpio6,
391 },
392 },
393 [kDtGpioPeriphIoGpio7] = {
394 .__internal = {
395 .type = kDtPeriphIoTypeMio,
396 .dir = kDtPeriphIoDirInout,
397 .periph_input_or_direct_pad = kTopEarlgreyPinmuxPeripheralInGpio1Gpio7,
398 .outsel_or_dt_pad = kTopEarlgreyPinmuxOutselGpio1Gpio7,
399 },
400 },
401 [kDtGpioPeriphIoGpio8] = {
402 .__internal = {
403 .type = kDtPeriphIoTypeMio,
404 .dir = kDtPeriphIoDirInout,
405 .periph_input_or_direct_pad = kTopEarlgreyPinmuxPeripheralInGpio1Gpio8,
406 .outsel_or_dt_pad = kTopEarlgreyPinmuxOutselGpio1Gpio8,
407 },
408 },
409 [kDtGpioPeriphIoGpio9] = {
410 .__internal = {
411 .type = kDtPeriphIoTypeMio,
412 .dir = kDtPeriphIoDirInout,
413 .periph_input_or_direct_pad = kTopEarlgreyPinmuxPeripheralInGpio1Gpio9,
414 .outsel_or_dt_pad = kTopEarlgreyPinmuxOutselGpio1Gpio9,
415 },
416 },
417 [kDtGpioPeriphIoGpio10] = {
418 .__internal = {
419 .type = kDtPeriphIoTypeMio,
420 .dir = kDtPeriphIoDirInout,
421 .periph_input_or_direct_pad = kTopEarlgreyPinmuxPeripheralInGpio1Gpio10,
422 .outsel_or_dt_pad = kTopEarlgreyPinmuxOutselGpio1Gpio10,
423 },
424 },
425 [kDtGpioPeriphIoGpio11] = {
426 .__internal = {
427 .type = kDtPeriphIoTypeMio,
428 .dir = kDtPeriphIoDirInout,
429 .periph_input_or_direct_pad = kTopEarlgreyPinmuxPeripheralInGpio1Gpio11,
430 .outsel_or_dt_pad = kTopEarlgreyPinmuxOutselGpio1Gpio11,
431 },
432 },
433 [kDtGpioPeriphIoGpio12] = {
434 .__internal = {
435 .type = kDtPeriphIoTypeMio,
436 .dir = kDtPeriphIoDirInout,
437 .periph_input_or_direct_pad = kTopEarlgreyPinmuxPeripheralInGpio1Gpio12,
438 .outsel_or_dt_pad = kTopEarlgreyPinmuxOutselGpio1Gpio12,
439 },
440 },
441 [kDtGpioPeriphIoGpio13] = {
442 .__internal = {
443 .type = kDtPeriphIoTypeMio,
444 .dir = kDtPeriphIoDirInout,
445 .periph_input_or_direct_pad = kTopEarlgreyPinmuxPeripheralInGpio1Gpio13,
446 .outsel_or_dt_pad = kTopEarlgreyPinmuxOutselGpio1Gpio13,
447 },
448 },
449 [kDtGpioPeriphIoGpio14] = {
450 .__internal = {
451 .type = kDtPeriphIoTypeMio,
452 .dir = kDtPeriphIoDirInout,
453 .periph_input_or_direct_pad = kTopEarlgreyPinmuxPeripheralInGpio1Gpio14,
454 .outsel_or_dt_pad = kTopEarlgreyPinmuxOutselGpio1Gpio14,
455 },
456 },
457 [kDtGpioPeriphIoGpio15] = {
458 .__internal = {
459 .type = kDtPeriphIoTypeMio,
460 .dir = kDtPeriphIoDirInout,
461 .periph_input_or_direct_pad = kTopEarlgreyPinmuxPeripheralInGpio1Gpio15,
462 .outsel_or_dt_pad = kTopEarlgreyPinmuxOutselGpio1Gpio15,
463 },
464 },
465 [kDtGpioPeriphIoGpio16] = {
466 .__internal = {
467 .type = kDtPeriphIoTypeMio,
468 .dir = kDtPeriphIoDirInout,
469 .periph_input_or_direct_pad = kTopEarlgreyPinmuxPeripheralInGpio1Gpio16,
470 .outsel_or_dt_pad = kTopEarlgreyPinmuxOutselGpio1Gpio16,
471 },
472 },
473 [kDtGpioPeriphIoGpio17] = {
474 .__internal = {
475 .type = kDtPeriphIoTypeMio,
476 .dir = kDtPeriphIoDirInout,
477 .periph_input_or_direct_pad = kTopEarlgreyPinmuxPeripheralInGpio1Gpio17,
478 .outsel_or_dt_pad = kTopEarlgreyPinmuxOutselGpio1Gpio17,
479 },
480 },
481 [kDtGpioPeriphIoGpio18] = {
482 .__internal = {
483 .type = kDtPeriphIoTypeMio,
484 .dir = kDtPeriphIoDirInout,
485 .periph_input_or_direct_pad = kTopEarlgreyPinmuxPeripheralInGpio1Gpio18,
486 .outsel_or_dt_pad = kTopEarlgreyPinmuxOutselGpio1Gpio18,
487 },
488 },
489 [kDtGpioPeriphIoGpio19] = {
490 .__internal = {
491 .type = kDtPeriphIoTypeMio,
492 .dir = kDtPeriphIoDirInout,
493 .periph_input_or_direct_pad = kTopEarlgreyPinmuxPeripheralInGpio1Gpio19,
494 .outsel_or_dt_pad = kTopEarlgreyPinmuxOutselGpio1Gpio19,
495 },
496 },
497 [kDtGpioPeriphIoGpio20] = {
498 .__internal = {
499 .type = kDtPeriphIoTypeMio,
500 .dir = kDtPeriphIoDirInout,
501 .periph_input_or_direct_pad = kTopEarlgreyPinmuxPeripheralInGpio1Gpio20,
502 .outsel_or_dt_pad = kTopEarlgreyPinmuxOutselGpio1Gpio20,
503 },
504 },
505 [kDtGpioPeriphIoGpio21] = {
506 .__internal = {
507 .type = kDtPeriphIoTypeMio,
508 .dir = kDtPeriphIoDirInout,
509 .periph_input_or_direct_pad = kTopEarlgreyPinmuxPeripheralInGpio1Gpio21,
510 .outsel_or_dt_pad = kTopEarlgreyPinmuxOutselGpio1Gpio21,
511 },
512 },
513 [kDtGpioPeriphIoGpio22] = {
514 .__internal = {
515 .type = kDtPeriphIoTypeMio,
516 .dir = kDtPeriphIoDirInout,
517 .periph_input_or_direct_pad = kTopEarlgreyPinmuxPeripheralInGpio1Gpio22,
518 .outsel_or_dt_pad = kTopEarlgreyPinmuxOutselGpio1Gpio22,
519 },
520 },
521 [kDtGpioPeriphIoGpio23] = {
522 .__internal = {
523 .type = kDtPeriphIoTypeMio,
524 .dir = kDtPeriphIoDirInout,
525 .periph_input_or_direct_pad = kTopEarlgreyPinmuxPeripheralInGpio1Gpio23,
526 .outsel_or_dt_pad = kTopEarlgreyPinmuxOutselGpio1Gpio23,
527 },
528 },
529 [kDtGpioPeriphIoGpio24] = {
530 .__internal = {
531 .type = kDtPeriphIoTypeMio,
532 .dir = kDtPeriphIoDirInout,
533 .periph_input_or_direct_pad = kTopEarlgreyPinmuxPeripheralInGpio1Gpio24,
534 .outsel_or_dt_pad = kTopEarlgreyPinmuxOutselGpio1Gpio24,
535 },
536 },
537 [kDtGpioPeriphIoGpio25] = {
538 .__internal = {
539 .type = kDtPeriphIoTypeMio,
540 .dir = kDtPeriphIoDirInout,
541 .periph_input_or_direct_pad = kTopEarlgreyPinmuxPeripheralInGpio1Gpio25,
542 .outsel_or_dt_pad = kTopEarlgreyPinmuxOutselGpio1Gpio25,
543 },
544 },
545 [kDtGpioPeriphIoGpio26] = {
546 .__internal = {
547 .type = kDtPeriphIoTypeMio,
548 .dir = kDtPeriphIoDirInout,
549 .periph_input_or_direct_pad = kTopEarlgreyPinmuxPeripheralInGpio1Gpio26,
550 .outsel_or_dt_pad = kTopEarlgreyPinmuxOutselGpio1Gpio26,
551 },
552 },
553 [kDtGpioPeriphIoGpio27] = {
554 .__internal = {
555 .type = kDtPeriphIoTypeMio,
556 .dir = kDtPeriphIoDirInout,
557 .periph_input_or_direct_pad = kTopEarlgreyPinmuxPeripheralInGpio1Gpio27,
558 .outsel_or_dt_pad = kTopEarlgreyPinmuxOutselGpio1Gpio27,
559 },
560 },
561 [kDtGpioPeriphIoGpio28] = {
562 .__internal = {
563 .type = kDtPeriphIoTypeMio,
564 .dir = kDtPeriphIoDirInout,
565 .periph_input_or_direct_pad = kTopEarlgreyPinmuxPeripheralInGpio1Gpio28,
566 .outsel_or_dt_pad = kTopEarlgreyPinmuxOutselGpio1Gpio28,
567 },
568 },
569 [kDtGpioPeriphIoGpio29] = {
570 .__internal = {
571 .type = kDtPeriphIoTypeMio,
572 .dir = kDtPeriphIoDirInout,
573 .periph_input_or_direct_pad = kTopEarlgreyPinmuxPeripheralInGpio1Gpio29,
574 .outsel_or_dt_pad = kTopEarlgreyPinmuxOutselGpio1Gpio29,
575 },
576 },
577 [kDtGpioPeriphIoGpio30] = {
578 .__internal = {
579 .type = kDtPeriphIoTypeMio,
580 .dir = kDtPeriphIoDirInout,
581 .periph_input_or_direct_pad = kTopEarlgreyPinmuxPeripheralInGpio1Gpio30,
582 .outsel_or_dt_pad = kTopEarlgreyPinmuxOutselGpio1Gpio30,
583 },
584 },
585 [kDtGpioPeriphIoGpio31] = {
586 .__internal = {
587 .type = kDtPeriphIoTypeMio,
588 .dir = kDtPeriphIoDirInout,
589 .periph_input_or_direct_pad = kTopEarlgreyPinmuxPeripheralInGpio1Gpio31,
590 .outsel_or_dt_pad = kTopEarlgreyPinmuxOutselGpio1Gpio31,
591 },
592 },
593 },
594 .ipgen_ext = {
595 .input_period_counter_count = 0,
596 },
597 },
598};
599
600/**
601 * Return a pointer to the `dt_gpio_desc_t` structure of the requested
602 * `dt` if it's a valid index. Otherwise, this macro will `return` (i.e. exit
603 * the function) with the provided default value.
604 */
605#define TRY_GET_DT(dt, default) ({ if ((dt) < (dt_gpio_t)0 || (int)(dt) >= kDtGpioCount) return (default); &gpio_desc[dt]; })
606
607dt_gpio_t dt_gpio_from_instance_id(dt_instance_id_t inst_id) {
608 if (inst_id >= kDtInstanceIdGpio0 && inst_id <= kDtInstanceIdGpio1) {
609 return (dt_gpio_t)(inst_id - kDtInstanceIdGpio0);
610 }
611 return (dt_gpio_t)0;
612}
613
618
619uint32_t dt_gpio_reg_block(
620 dt_gpio_t dt,
621 dt_gpio_reg_block_t reg_block) {
622 // Return a recognizable address in case of wrong argument.
623 return TRY_GET_DT(dt, 0xdeadbeef)->reg_addr[reg_block];
624}
625
626dt_plic_irq_id_t dt_gpio_irq_to_plic_id(
627 dt_gpio_t dt,
628 dt_gpio_irq_t irq) {
629 dt_plic_irq_id_t first_irq = TRY_GET_DT(dt, kDtPlicIrqIdNone)->first_irq;
630 if (first_irq == kDtPlicIrqIdNone) {
631 return kDtPlicIrqIdNone;
632 }
633 return (dt_plic_irq_id_t)((uint32_t)first_irq + (uint32_t)irq);
634}
635
636dt_gpio_irq_t dt_gpio_irq_from_plic_id(
637 dt_gpio_t dt,
638 dt_plic_irq_id_t irq) {
639 dt_gpio_irq_t count = kDtGpioIrqCount;
640 dt_plic_irq_id_t first_irq = TRY_GET_DT(dt, count)->first_irq;
641 if (first_irq == kDtPlicIrqIdNone) {
642 return count;
643 }
644 if (irq < first_irq || irq >= first_irq + (dt_plic_irq_id_t)count) {
645 return count;
646 }
647 return (dt_gpio_irq_t)(irq - first_irq);
648}
649
650
651dt_alert_id_t dt_gpio_alert_to_alert_id(
652 dt_gpio_t dt,
653 dt_gpio_alert_t alert) {
654 return (dt_alert_id_t)((uint32_t)gpio_desc[dt].first_alert + (uint32_t)alert);
655}
656
657dt_gpio_alert_t dt_gpio_alert_from_alert_id(
658 dt_gpio_t dt,
659 dt_alert_id_t alert) {
660 dt_gpio_alert_t count = kDtGpioAlertCount;
661 if (alert < gpio_desc[dt].first_alert || alert >= gpio_desc[dt].first_alert + (dt_alert_id_t)count) {
662 return count;
663 }
664 return (dt_gpio_alert_t)(alert - gpio_desc[dt].first_alert);
665}
666
667
668dt_periph_io_t dt_gpio_periph_io(
669 dt_gpio_t dt,
670 dt_gpio_periph_io_t sig) {
671 // Return a harmless value in case of wrong argument.
672 return TRY_GET_DT(dt, kDtPeriphIoConstantHighZ)->periph_io[sig];
673}
674
675dt_clock_t dt_gpio_clock(
676 dt_gpio_t dt,
677 dt_gpio_clock_t clk) {
678 // Return the first clock in case of invalid argument.
679 return TRY_GET_DT(dt, (dt_clock_t)0)->clock[clk];
680}
681
682dt_reset_t dt_gpio_reset(
683 dt_gpio_t dt,
684 dt_gpio_reset_t rst) {
685 const dt_gpio_reset_t count = kDtGpioResetCount;
686 if (rst >= count) {
687 return kDtResetUnknown;
688 }
689 return TRY_GET_DT(dt, kDtResetUnknown)->reset[rst];
690}
691
692
693
694uint8_t dt_gpio_input_period_counter_count(dt_gpio_t dt) {
695 return TRY_GET_DT(dt, 0)->ipgen_ext.input_period_counter_count;
696}
697
698