Software APIs
dt_rstmgr.c
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1// Copyright lowRISC contributors (OpenTitan project).
2// Licensed under the Apache License, Version 2.0, see LICENSE for details.
3// SPDX-License-Identifier: Apache-2.0
4//
5// Device table API auto-generated by `dtgen`
6
7/**
8 * @file
9 * @brief Device Tables (DT) for IP rstmgr and top earlgrey.
10 */
11
12#include "dt/dt_rstmgr.h"
13
14
15#include "dt_sysrst_ctrl.h"
16#include "dt_aon_timer.h"
17
18
19
20/**
21 * Description of instances.
22 */
23typedef struct dt_desc_rstmgr {
24 dt_instance_id_t inst_id; /**< Instance ID */
25 uint32_t base_addr[kDtRstmgrRegBlockCount]; /**< Base address of each register block */
26 /**
27 * Alert ID of the first Alert of this instance.
28 *
29 * This value is undefined if the block is not connected to the Alert Handler.
30 */
32 dt_clock_t clock[kDtRstmgrClockCount]; /**< Clock signal connected to each clock port */
33 dt_reset_t reset[kDtRstmgrResetCount]; /**< Reset signal connected to each reset port */
34 struct {
35 dt_reset_t sw_rst[8]; /**< List of software resets, in the order of the register fields */
36 dt_rstmgr_reset_req_src_t hw_req[5]; /**< List of hardware reset requests, in the order of the register fields */
37 } rstmgr_ext; /**< Extension */
39
40
41
42
43static const dt_desc_rstmgr_t rstmgr_desc[kDtRstmgrCount] = {
44 [kDtRstmgrAon] = {
45 .inst_id = kDtInstanceIdRstmgrAon,
46 .base_addr = {
47 [kDtRstmgrRegBlockCore] = 0x40410000,
48 },
50 .clock = {
59 },
60 .reset = {
63 },
64 .rstmgr_ext = {
65 .sw_rst = {
67 [1] = kDtResetSpiHost0,
68 [2] = kDtResetSpiHost1,
69 [3] = kDtResetUsb,
70 [4] = kDtResetUsbAon,
71 [5] = kDtResetI2c0,
72 [6] = kDtResetI2c1,
73 [7] = kDtResetI2c2,
74 },
75 .hw_req = {
76 [0] = {
78 .reset_req = kDtSysrstCtrlResetReqRstReq,
79 },
80 [1] = {
81 .inst_id = kDtInstanceIdAonTimerAon,
82 .reset_req = kDtAonTimerResetReqAonTimer,
83 },
84 [2] = {
85 .inst_id = kDtInstanceIdPwrmgrAon,
86 .reset_req = 0,
87 },
88 [3] = {
90 .reset_req = 0,
91 },
92 [4] = {
93 .inst_id = kDtInstanceIdRvDm,
94 .reset_req = 0,
95 },
96 },
97 },
98 },
99};
100
101/**
102 * Return a pointer to the `dt_rstmgr_desc_t` structure of the requested
103 * `dt` if it's a valid index. Otherwise, this macro will `return` (i.e. exit
104 * the function) with the provided default value.
105 */
106#define TRY_GET_DT(dt, default) ({ if ((dt) < (dt_rstmgr_t)0 || (dt) >= kDtRstmgrCount) return (default); &rstmgr_desc[dt]; })
107
109 if (inst_id >= kDtInstanceIdRstmgrAon && inst_id <= kDtInstanceIdRstmgrAon) {
110 return (dt_rstmgr_t)(inst_id - kDtInstanceIdRstmgrAon);
111 }
112 return (dt_rstmgr_t)0;
113}
114
119
121 dt_rstmgr_t dt,
122 dt_rstmgr_reg_block_t reg_block) {
123 // Return a recognizable address in case of wrong argument.
124 return TRY_GET_DT(dt, 0xdeadbeef)->base_addr[reg_block];
125}
126
127
129 dt_rstmgr_t dt,
130 dt_rstmgr_alert_t alert) {
131 return (dt_alert_id_t)((uint32_t)rstmgr_desc[dt].first_alert + (uint32_t)alert);
132}
133
135 dt_rstmgr_t dt,
136 dt_alert_id_t alert) {
137 dt_rstmgr_alert_t count = kDtRstmgrAlertCount;
138 if (alert < rstmgr_desc[dt].first_alert || alert >= rstmgr_desc[dt].first_alert + (dt_alert_id_t)count) {
139 return count;
140 }
141 return (dt_rstmgr_alert_t)(alert - rstmgr_desc[dt].first_alert);
142}
143
144
145
147 dt_rstmgr_t dt,
148 dt_rstmgr_clock_t clk) {
149 // Return the first clock in case of invalid argument.
150 return TRY_GET_DT(dt, (dt_clock_t)0)->clock[clk];
151}
152
154 dt_rstmgr_t dt,
155 dt_rstmgr_reset_t rst) {
156 const dt_rstmgr_reset_t count = kDtRstmgrResetCount;
157 if (rst >= count) {
158 return kDtResetUnknown;
159 }
160 return TRY_GET_DT(dt, kDtResetUnknown)->reset[rst];
161}
162
163
164
166 return 8;
167}
168
170 if (idx >= 8) {
171 return kDtResetUnknown;
172 }
173 return TRY_GET_DT(dt, kDtResetUnknown)->rstmgr_ext.sw_rst[idx];
174}
175
176