Software APIs
dt_pwrmgr.c
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1// Copyright lowRISC contributors (OpenTitan project).
2// Licensed under the Apache License, Version 2.0, see LICENSE for details.
3// SPDX-License-Identifier: Apache-2.0
4//
5// Device table API auto-generated by `dtgen`
6
7/**
8 * @file
9 * @brief Device Tables (DT) for IP pwrmgr and top earlgrey.
10 */
11
12#include "dt/dt_pwrmgr.h"
13
14
15#include "dt_sysrst_ctrl.h"
16#include "dt_adc_ctrl.h"
17#include "dt_pinmux.h"
18#include "dt_aon_timer.h"
19#include "dt_sensor_ctrl.h"
20
21
22
23/**
24 * Description of instances.
25 */
26typedef struct dt_desc_pwrmgr {
27 dt_instance_id_t inst_id; /**< Instance ID */
28 uint32_t base_addr[kDtPwrmgrRegBlockCount]; /**< Base address of each register block */
29 /**
30 * PLIC ID of the first IRQ of this instance
31 *
32 * This can be `kDtPlicIrqIdNone` if the block is not connected to the PLIC.
33 */
35 /**
36 * Alert ID of the first Alert of this instance.
37 *
38 * This value is undefined if the block is not connected to the Alert Handler.
39 */
41 dt_clock_t clock[kDtPwrmgrClockCount]; /**< Clock signal connected to each clock port */
42 dt_reset_t reset[kDtPwrmgrResetCount]; /**< Reset signal connected to each reset port */
43 struct {
44 dt_pwrmgr_wakeup_src_t wakeup_src[6]; /**< List of wakeup sources, in the order of the register fields */
45 dt_pwrmgr_reset_req_src_t rst_reqs[2]; /**< List of reset requests, in the order of the register fields */
46 } pwrmgr_ext; /**< Extension */
48
49
50
51
52static const dt_desc_pwrmgr_t pwrmgr_desc[kDtPwrmgrCount] = {
53 [kDtPwrmgrAon] = {
54 .inst_id = kDtInstanceIdPwrmgrAon,
55 .base_addr = {
56 [kDtPwrmgrRegBlockCore] = 0x40400000,
57 },
60 .clock = {
65 },
66 .reset = {
72 },
73 .pwrmgr_ext = {
74 .wakeup_src = {
75 [0] = {
78 },
79 [1] = {
80 .inst_id = kDtInstanceIdAdcCtrlAon,
82 },
83 [2] = {
84 .inst_id = kDtInstanceIdPinmuxAon,
86 },
87 [3] = {
88 .inst_id = kDtInstanceIdPinmuxAon,
90 },
91 [4] = {
92 .inst_id = kDtInstanceIdAonTimerAon,
94 },
95 [5] = {
98 },
99 },
100 .rst_reqs = {
101 [0] = {
103 .reset_req = kDtSysrstCtrlResetReqRstReq,
104 },
105 [1] = {
106 .inst_id = kDtInstanceIdAonTimerAon,
107 .reset_req = kDtAonTimerResetReqAonTimer,
108 },
109 },
110 },
111 },
112};
113
114/**
115 * Return a pointer to the `dt_pwrmgr_desc_t` structure of the requested
116 * `dt` if it's a valid index. Otherwise, this macro will `return` (i.e. exit
117 * the function) with the provided default value.
118 */
119#define TRY_GET_DT(dt, default) ({ if ((dt) < (dt_pwrmgr_t)0 || (dt) >= kDtPwrmgrCount) return (default); &pwrmgr_desc[dt]; })
120
122 if (inst_id >= kDtInstanceIdPwrmgrAon && inst_id <= kDtInstanceIdPwrmgrAon) {
123 return (dt_pwrmgr_t)(inst_id - kDtInstanceIdPwrmgrAon);
124 }
125 return (dt_pwrmgr_t)0;
126}
127
132
134 dt_pwrmgr_t dt,
135 dt_pwrmgr_reg_block_t reg_block) {
136 // Return a recognizable address in case of wrong argument.
137 return TRY_GET_DT(dt, 0xdeadbeef)->base_addr[reg_block];
138}
139
141 dt_pwrmgr_t dt,
142 dt_pwrmgr_irq_t irq) {
143 dt_plic_irq_id_t first_irq = TRY_GET_DT(dt, kDtPlicIrqIdNone)->first_irq;
144 if (first_irq == kDtPlicIrqIdNone) {
145 return kDtPlicIrqIdNone;
146 }
147 return (dt_plic_irq_id_t)((uint32_t)first_irq + (uint32_t)irq);
148}
149
151 dt_pwrmgr_t dt,
152 dt_plic_irq_id_t irq) {
153 dt_pwrmgr_irq_t count = kDtPwrmgrIrqCount;
154 dt_plic_irq_id_t first_irq = TRY_GET_DT(dt, count)->first_irq;
155 if (first_irq == kDtPlicIrqIdNone) {
156 return count;
157 }
158 if (irq < first_irq || irq >= first_irq + (dt_plic_irq_id_t)count) {
159 return count;
160 }
161 return (dt_pwrmgr_irq_t)(irq - first_irq);
162}
163
164
166 dt_pwrmgr_t dt,
167 dt_pwrmgr_alert_t alert) {
168 return (dt_alert_id_t)((uint32_t)pwrmgr_desc[dt].first_alert + (uint32_t)alert);
169}
170
172 dt_pwrmgr_t dt,
173 dt_alert_id_t alert) {
174 dt_pwrmgr_alert_t count = kDtPwrmgrAlertCount;
175 if (alert < pwrmgr_desc[dt].first_alert || alert >= pwrmgr_desc[dt].first_alert + (dt_alert_id_t)count) {
176 return count;
177 }
178 return (dt_pwrmgr_alert_t)(alert - pwrmgr_desc[dt].first_alert);
179}
180
181
182
184 dt_pwrmgr_t dt,
185 dt_pwrmgr_clock_t clk) {
186 // Return the first clock in case of invalid argument.
187 return TRY_GET_DT(dt, (dt_clock_t)0)->clock[clk];
188}
189
191 dt_pwrmgr_t dt,
192 dt_pwrmgr_reset_t rst) {
193 const dt_pwrmgr_reset_t count = kDtPwrmgrResetCount;
194 if (rst >= count) {
195 return kDtResetUnknown;
196 }
197 return TRY_GET_DT(dt, kDtResetUnknown)->reset[rst];
198}
199
200
201
203 return 6;
204}
205
207 dt_pwrmgr_wakeup_src_t invalid = {.inst_id = kDtInstanceIdUnknown, .wakeup = 0};
208 return TRY_GET_DT(dt, invalid)->pwrmgr_ext.wakeup_src[idx];
209}
210
212 return 2;
213}
214
216 dt_pwrmgr_reset_req_src_t invalid = {.inst_id = kDtInstanceIdUnknown, .reset_req = 0};
217 return TRY_GET_DT(dt, invalid)->pwrmgr_ext.rst_reqs[idx];
218}
219
220