Software APIs
dt_gpio.c
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1// Copyright lowRISC contributors (OpenTitan project).
2// Licensed under the Apache License, Version 2.0, see LICENSE for details.
3// SPDX-License-Identifier: Apache-2.0
4//
5// Device table API auto-generated by `dtgen`
6
7/**
8 * @file
9 * @brief Device Tables (DT) for IP gpio and top earlgrey.
10 */
11
12#include "dt/dt_gpio.h"
13
14
15
16
17
18/**
19 * Description of instances.
20 */
21typedef struct dt_desc_gpio {
22 dt_instance_id_t inst_id; /**< Instance ID */
23 uint32_t base_addr[kDtGpioRegBlockCount]; /**< Base address of each register block */
24 /**
25 * PLIC ID of the first IRQ of this instance
26 *
27 * This can be `kDtPlicIrqIdNone` if the block is not connected to the PLIC.
28 */
29 top_earlgrey_plic_irq_id_t first_irq;
30 /**
31 * Alert ID of the first Alert of this instance.
32 *
33 * This value is undefined if the block is not connected to the Alert Handler.
34 */
35 top_earlgrey_alert_id_t first_alert;
36 dt_clock_t clock[kDtGpioClockCount]; /**< Clock signal connected to each clock port */
37 dt_reset_t reset[kDtGpioResetCount]; /**< Reset signal connected to each reset port */
38 dt_periph_io_t periph_io[kDtGpioPeriphIoCount]; /**< Description of each peripheral I/O */
39 struct {
40 uint8_t input_period_counter_count; /**< number of input period counters */
41 } ipgen_ext; /**< Extension */
42} dt_desc_gpio_t;
43
44
45
46
47static const dt_desc_gpio_t gpio_desc[kDtGpioCount] = {
48 [kDtGpio] = {
49 .inst_id = kDtInstanceIdGpio,
50 .base_addr = {
51 [kDtGpioRegBlockCore] = 0x40040000,
52 },
53 .first_irq = kTopEarlgreyPlicIrqIdGpioGpio0,
54 .first_alert = kTopEarlgreyAlertIdGpioFatalFault,
55 .clock = {
56 [kDtGpioClockClk] = kDtClockIoDiv4,
57 },
58 .reset = {
59 [kDtGpioResetRst] = kDtResetLcIoDiv4,
60 },
61 .periph_io = {
62 [kDtGpioPeriphIoGpio0] = {
63 .__internal = {
64 .type = kDtPeriphIoTypeMio,
65 .dir = kDtPeriphIoDirInout,
66 .periph_input_or_direct_pad = kTopEarlgreyPinmuxPeripheralInGpioGpio0,
67 .outsel_or_dt_pad = kTopEarlgreyPinmuxOutselGpioGpio0,
68 },
69 },
70 [kDtGpioPeriphIoGpio1] = {
71 .__internal = {
72 .type = kDtPeriphIoTypeMio,
73 .dir = kDtPeriphIoDirInout,
74 .periph_input_or_direct_pad = kTopEarlgreyPinmuxPeripheralInGpioGpio1,
75 .outsel_or_dt_pad = kTopEarlgreyPinmuxOutselGpioGpio1,
76 },
77 },
78 [kDtGpioPeriphIoGpio2] = {
79 .__internal = {
80 .type = kDtPeriphIoTypeMio,
81 .dir = kDtPeriphIoDirInout,
82 .periph_input_or_direct_pad = kTopEarlgreyPinmuxPeripheralInGpioGpio2,
83 .outsel_or_dt_pad = kTopEarlgreyPinmuxOutselGpioGpio2,
84 },
85 },
86 [kDtGpioPeriphIoGpio3] = {
87 .__internal = {
88 .type = kDtPeriphIoTypeMio,
89 .dir = kDtPeriphIoDirInout,
90 .periph_input_or_direct_pad = kTopEarlgreyPinmuxPeripheralInGpioGpio3,
91 .outsel_or_dt_pad = kTopEarlgreyPinmuxOutselGpioGpio3,
92 },
93 },
94 [kDtGpioPeriphIoGpio4] = {
95 .__internal = {
96 .type = kDtPeriphIoTypeMio,
97 .dir = kDtPeriphIoDirInout,
98 .periph_input_or_direct_pad = kTopEarlgreyPinmuxPeripheralInGpioGpio4,
99 .outsel_or_dt_pad = kTopEarlgreyPinmuxOutselGpioGpio4,
100 },
101 },
102 [kDtGpioPeriphIoGpio5] = {
103 .__internal = {
104 .type = kDtPeriphIoTypeMio,
105 .dir = kDtPeriphIoDirInout,
106 .periph_input_or_direct_pad = kTopEarlgreyPinmuxPeripheralInGpioGpio5,
107 .outsel_or_dt_pad = kTopEarlgreyPinmuxOutselGpioGpio5,
108 },
109 },
110 [kDtGpioPeriphIoGpio6] = {
111 .__internal = {
112 .type = kDtPeriphIoTypeMio,
113 .dir = kDtPeriphIoDirInout,
114 .periph_input_or_direct_pad = kTopEarlgreyPinmuxPeripheralInGpioGpio6,
115 .outsel_or_dt_pad = kTopEarlgreyPinmuxOutselGpioGpio6,
116 },
117 },
118 [kDtGpioPeriphIoGpio7] = {
119 .__internal = {
120 .type = kDtPeriphIoTypeMio,
121 .dir = kDtPeriphIoDirInout,
122 .periph_input_or_direct_pad = kTopEarlgreyPinmuxPeripheralInGpioGpio7,
123 .outsel_or_dt_pad = kTopEarlgreyPinmuxOutselGpioGpio7,
124 },
125 },
126 [kDtGpioPeriphIoGpio8] = {
127 .__internal = {
128 .type = kDtPeriphIoTypeMio,
129 .dir = kDtPeriphIoDirInout,
130 .periph_input_or_direct_pad = kTopEarlgreyPinmuxPeripheralInGpioGpio8,
131 .outsel_or_dt_pad = kTopEarlgreyPinmuxOutselGpioGpio8,
132 },
133 },
134 [kDtGpioPeriphIoGpio9] = {
135 .__internal = {
136 .type = kDtPeriphIoTypeMio,
137 .dir = kDtPeriphIoDirInout,
138 .periph_input_or_direct_pad = kTopEarlgreyPinmuxPeripheralInGpioGpio9,
139 .outsel_or_dt_pad = kTopEarlgreyPinmuxOutselGpioGpio9,
140 },
141 },
142 [kDtGpioPeriphIoGpio10] = {
143 .__internal = {
144 .type = kDtPeriphIoTypeMio,
145 .dir = kDtPeriphIoDirInout,
146 .periph_input_or_direct_pad = kTopEarlgreyPinmuxPeripheralInGpioGpio10,
147 .outsel_or_dt_pad = kTopEarlgreyPinmuxOutselGpioGpio10,
148 },
149 },
150 [kDtGpioPeriphIoGpio11] = {
151 .__internal = {
152 .type = kDtPeriphIoTypeMio,
153 .dir = kDtPeriphIoDirInout,
154 .periph_input_or_direct_pad = kTopEarlgreyPinmuxPeripheralInGpioGpio11,
155 .outsel_or_dt_pad = kTopEarlgreyPinmuxOutselGpioGpio11,
156 },
157 },
158 [kDtGpioPeriphIoGpio12] = {
159 .__internal = {
160 .type = kDtPeriphIoTypeMio,
161 .dir = kDtPeriphIoDirInout,
162 .periph_input_or_direct_pad = kTopEarlgreyPinmuxPeripheralInGpioGpio12,
163 .outsel_or_dt_pad = kTopEarlgreyPinmuxOutselGpioGpio12,
164 },
165 },
166 [kDtGpioPeriphIoGpio13] = {
167 .__internal = {
168 .type = kDtPeriphIoTypeMio,
169 .dir = kDtPeriphIoDirInout,
170 .periph_input_or_direct_pad = kTopEarlgreyPinmuxPeripheralInGpioGpio13,
171 .outsel_or_dt_pad = kTopEarlgreyPinmuxOutselGpioGpio13,
172 },
173 },
174 [kDtGpioPeriphIoGpio14] = {
175 .__internal = {
176 .type = kDtPeriphIoTypeMio,
177 .dir = kDtPeriphIoDirInout,
178 .periph_input_or_direct_pad = kTopEarlgreyPinmuxPeripheralInGpioGpio14,
179 .outsel_or_dt_pad = kTopEarlgreyPinmuxOutselGpioGpio14,
180 },
181 },
182 [kDtGpioPeriphIoGpio15] = {
183 .__internal = {
184 .type = kDtPeriphIoTypeMio,
185 .dir = kDtPeriphIoDirInout,
186 .periph_input_or_direct_pad = kTopEarlgreyPinmuxPeripheralInGpioGpio15,
187 .outsel_or_dt_pad = kTopEarlgreyPinmuxOutselGpioGpio15,
188 },
189 },
190 [kDtGpioPeriphIoGpio16] = {
191 .__internal = {
192 .type = kDtPeriphIoTypeMio,
193 .dir = kDtPeriphIoDirInout,
194 .periph_input_or_direct_pad = kTopEarlgreyPinmuxPeripheralInGpioGpio16,
195 .outsel_or_dt_pad = kTopEarlgreyPinmuxOutselGpioGpio16,
196 },
197 },
198 [kDtGpioPeriphIoGpio17] = {
199 .__internal = {
200 .type = kDtPeriphIoTypeMio,
201 .dir = kDtPeriphIoDirInout,
202 .periph_input_or_direct_pad = kTopEarlgreyPinmuxPeripheralInGpioGpio17,
203 .outsel_or_dt_pad = kTopEarlgreyPinmuxOutselGpioGpio17,
204 },
205 },
206 [kDtGpioPeriphIoGpio18] = {
207 .__internal = {
208 .type = kDtPeriphIoTypeMio,
209 .dir = kDtPeriphIoDirInout,
210 .periph_input_or_direct_pad = kTopEarlgreyPinmuxPeripheralInGpioGpio18,
211 .outsel_or_dt_pad = kTopEarlgreyPinmuxOutselGpioGpio18,
212 },
213 },
214 [kDtGpioPeriphIoGpio19] = {
215 .__internal = {
216 .type = kDtPeriphIoTypeMio,
217 .dir = kDtPeriphIoDirInout,
218 .periph_input_or_direct_pad = kTopEarlgreyPinmuxPeripheralInGpioGpio19,
219 .outsel_or_dt_pad = kTopEarlgreyPinmuxOutselGpioGpio19,
220 },
221 },
222 [kDtGpioPeriphIoGpio20] = {
223 .__internal = {
224 .type = kDtPeriphIoTypeMio,
225 .dir = kDtPeriphIoDirInout,
226 .periph_input_or_direct_pad = kTopEarlgreyPinmuxPeripheralInGpioGpio20,
227 .outsel_or_dt_pad = kTopEarlgreyPinmuxOutselGpioGpio20,
228 },
229 },
230 [kDtGpioPeriphIoGpio21] = {
231 .__internal = {
232 .type = kDtPeriphIoTypeMio,
233 .dir = kDtPeriphIoDirInout,
234 .periph_input_or_direct_pad = kTopEarlgreyPinmuxPeripheralInGpioGpio21,
235 .outsel_or_dt_pad = kTopEarlgreyPinmuxOutselGpioGpio21,
236 },
237 },
238 [kDtGpioPeriphIoGpio22] = {
239 .__internal = {
240 .type = kDtPeriphIoTypeMio,
241 .dir = kDtPeriphIoDirInout,
242 .periph_input_or_direct_pad = kTopEarlgreyPinmuxPeripheralInGpioGpio22,
243 .outsel_or_dt_pad = kTopEarlgreyPinmuxOutselGpioGpio22,
244 },
245 },
246 [kDtGpioPeriphIoGpio23] = {
247 .__internal = {
248 .type = kDtPeriphIoTypeMio,
249 .dir = kDtPeriphIoDirInout,
250 .periph_input_or_direct_pad = kTopEarlgreyPinmuxPeripheralInGpioGpio23,
251 .outsel_or_dt_pad = kTopEarlgreyPinmuxOutselGpioGpio23,
252 },
253 },
254 [kDtGpioPeriphIoGpio24] = {
255 .__internal = {
256 .type = kDtPeriphIoTypeMio,
257 .dir = kDtPeriphIoDirInout,
258 .periph_input_or_direct_pad = kTopEarlgreyPinmuxPeripheralInGpioGpio24,
259 .outsel_or_dt_pad = kTopEarlgreyPinmuxOutselGpioGpio24,
260 },
261 },
262 [kDtGpioPeriphIoGpio25] = {
263 .__internal = {
264 .type = kDtPeriphIoTypeMio,
265 .dir = kDtPeriphIoDirInout,
266 .periph_input_or_direct_pad = kTopEarlgreyPinmuxPeripheralInGpioGpio25,
267 .outsel_or_dt_pad = kTopEarlgreyPinmuxOutselGpioGpio25,
268 },
269 },
270 [kDtGpioPeriphIoGpio26] = {
271 .__internal = {
272 .type = kDtPeriphIoTypeMio,
273 .dir = kDtPeriphIoDirInout,
274 .periph_input_or_direct_pad = kTopEarlgreyPinmuxPeripheralInGpioGpio26,
275 .outsel_or_dt_pad = kTopEarlgreyPinmuxOutselGpioGpio26,
276 },
277 },
278 [kDtGpioPeriphIoGpio27] = {
279 .__internal = {
280 .type = kDtPeriphIoTypeMio,
281 .dir = kDtPeriphIoDirInout,
282 .periph_input_or_direct_pad = kTopEarlgreyPinmuxPeripheralInGpioGpio27,
283 .outsel_or_dt_pad = kTopEarlgreyPinmuxOutselGpioGpio27,
284 },
285 },
286 [kDtGpioPeriphIoGpio28] = {
287 .__internal = {
288 .type = kDtPeriphIoTypeMio,
289 .dir = kDtPeriphIoDirInout,
290 .periph_input_or_direct_pad = kTopEarlgreyPinmuxPeripheralInGpioGpio28,
291 .outsel_or_dt_pad = kTopEarlgreyPinmuxOutselGpioGpio28,
292 },
293 },
294 [kDtGpioPeriphIoGpio29] = {
295 .__internal = {
296 .type = kDtPeriphIoTypeMio,
297 .dir = kDtPeriphIoDirInout,
298 .periph_input_or_direct_pad = kTopEarlgreyPinmuxPeripheralInGpioGpio29,
299 .outsel_or_dt_pad = kTopEarlgreyPinmuxOutselGpioGpio29,
300 },
301 },
302 [kDtGpioPeriphIoGpio30] = {
303 .__internal = {
304 .type = kDtPeriphIoTypeMio,
305 .dir = kDtPeriphIoDirInout,
306 .periph_input_or_direct_pad = kTopEarlgreyPinmuxPeripheralInGpioGpio30,
307 .outsel_or_dt_pad = kTopEarlgreyPinmuxOutselGpioGpio30,
308 },
309 },
310 [kDtGpioPeriphIoGpio31] = {
311 .__internal = {
312 .type = kDtPeriphIoTypeMio,
313 .dir = kDtPeriphIoDirInout,
314 .periph_input_or_direct_pad = kTopEarlgreyPinmuxPeripheralInGpioGpio31,
315 .outsel_or_dt_pad = kTopEarlgreyPinmuxOutselGpioGpio31,
316 },
317 },
318 },
319 .ipgen_ext = {
320 .input_period_counter_count = 0,
321 },
322 },
323};
324
325/**
326 * Return a pointer to the `dt_gpio_desc_t` structure of the requested
327 * `dt` if it's a valid index. Otherwise, this macro will `return` (i.e. exit
328 * the function) with the provided default value.
329 */
330#define TRY_GET_DT(dt, default) ({ if ((dt) < (dt_gpio_t)0 || (dt) >= kDtGpioCount) return (default); &gpio_desc[dt]; })
331
332dt_gpio_t dt_gpio_from_instance_id(dt_instance_id_t inst_id) {
333 if (inst_id >= kDtInstanceIdGpio && inst_id <= kDtInstanceIdGpio) {
334 return (dt_gpio_t)(inst_id - kDtInstanceIdGpio);
335 }
336 return (dt_gpio_t)0;
337}
338
343
344uint32_t dt_gpio_reg_block(
345 dt_gpio_t dt,
346 dt_gpio_reg_block_t reg_block) {
347 // Return a recognizable address in case of wrong argument.
348 return TRY_GET_DT(dt, 0xdeadbeef)->base_addr[reg_block];
349}
350
351dt_plic_irq_id_t dt_gpio_irq_to_plic_id(
352 dt_gpio_t dt,
353 dt_gpio_irq_t irq) {
354 dt_plic_irq_id_t first_irq = TRY_GET_DT(dt, kDtPlicIrqIdNone)->first_irq;
355 if (first_irq == kDtPlicIrqIdNone) {
356 return kDtPlicIrqIdNone;
357 }
358 return (dt_plic_irq_id_t)((uint32_t)first_irq + (uint32_t)irq);
359}
360
361dt_gpio_irq_t dt_gpio_irq_from_plic_id(
362 dt_gpio_t dt,
363 dt_plic_irq_id_t irq) {
364 dt_gpio_irq_t count = kDtGpioIrqCount;
365 dt_plic_irq_id_t first_irq = TRY_GET_DT(dt, count)->first_irq;
366 if (first_irq == kDtPlicIrqIdNone) {
367 return count;
368 }
369 if (irq < first_irq || irq >= first_irq + (dt_plic_irq_id_t)count) {
370 return count;
371 }
372 return (dt_gpio_irq_t)(irq - first_irq);
373}
374
375
376dt_alert_id_t dt_gpio_alert_to_alert_id(
377 dt_gpio_t dt,
378 dt_gpio_alert_t alert) {
379 return (dt_alert_id_t)((uint32_t)gpio_desc[dt].first_alert + (uint32_t)alert);
380}
381
382dt_gpio_alert_t dt_gpio_alert_from_alert_id(
383 dt_gpio_t dt,
384 dt_alert_id_t alert) {
385 dt_gpio_alert_t count = kDtGpioAlertCount;
386 if (alert < gpio_desc[dt].first_alert || alert >= gpio_desc[dt].first_alert + (dt_alert_id_t)count) {
387 return count;
388 }
389 return (dt_gpio_alert_t)(alert - gpio_desc[dt].first_alert);
390}
391
392
393dt_periph_io_t dt_gpio_periph_io(
394 dt_gpio_t dt,
395 dt_gpio_periph_io_t sig) {
396 // Return a harmless value in case of wrong argument.
397 return TRY_GET_DT(dt, kDtPeriphIoConstantHighZ)->periph_io[sig];
398}
399
400dt_clock_t dt_gpio_clock(
401 dt_gpio_t dt,
402 dt_gpio_clock_t clk) {
403 // Return the first clock in case of invalid argument.
404 return TRY_GET_DT(dt, (dt_clock_t)0)->clock[clk];
405}
406
407dt_reset_t dt_gpio_reset(
408 dt_gpio_t dt,
409 dt_gpio_reset_t rst) {
410 const dt_gpio_reset_t count = kDtGpioResetCount;
411 if (rst >= count) {
412 return kDtResetUnknown;
413 }
414 return TRY_GET_DT(dt, kDtResetUnknown)->reset[rst];
415}
416
417
418
419uint8_t dt_gpio_input_period_counter_count(dt_gpio_t dt) {
420 return TRY_GET_DT(dt, 0)->ipgen_ext.input_period_counter_count;
421}
422
423