Software APIs
dt_api.h
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1// Copyright lowRISC contributors (OpenTitan project).
2// Licensed under the Apache License, Version 2.0, see LICENSE for details.
3// SPDX-License-Identifier: Apache-2.0
4//
5// Device table API auto-generated by `dtgen`
6
7#ifndef OPENTITAN_TOP_EARLGREY_DT_API_H_
8#define OPENTITAN_TOP_EARLGREY_DT_API_H_
9
10#ifdef __cplusplus
11extern "C" {
12#endif // __cplusplus
13
14/**
15 * @file
16 * @brief Device Tables (DT) API for top earlgrey
17 *
18 * This file contains the type definitions and global functions of the DT.
19 *
20 * The DT models the chip as a collection of instances. Each instance has
21 * a type (the IP block) and a number of attributes such as I/Os, IRQs
22 * and so on. The DT also provides top-specific lists of global resources
23 * such as I/O pads, clocks and interrupts.
24 */
25
26#include <stddef.h>
27#include <stdint.h>
29
30/**
31 * List of device types.
32 *
33 * Device types are guaranteed to be numbered consecutively from 0.
34 */
35typedef enum dt_device_type {
36 kDtDeviceTypeUnknown = 0, /**< Instance of unknown type */
37 kDtDeviceTypeAdcCtrl = 1, /**< instance of adc_ctrl */
38 kDtDeviceTypeAes = 2, /**< instance of aes */
39 kDtDeviceTypeAlertHandler = 3, /**< instance of alert_handler */
40 kDtDeviceTypeAonTimer = 4, /**< instance of aon_timer */
41 kDtDeviceTypeAst = 5, /**< instance of ast */
42 kDtDeviceTypeClkmgr = 6, /**< instance of clkmgr */
43 kDtDeviceTypeCsrng = 7, /**< instance of csrng */
44 kDtDeviceTypeEdn = 8, /**< instance of edn */
45 kDtDeviceTypeEntropySrc = 9, /**< instance of entropy_src */
46 kDtDeviceTypeFlashCtrl = 10, /**< instance of flash_ctrl */
47 kDtDeviceTypeGpio = 11, /**< instance of gpio */
48 kDtDeviceTypeHmac = 12, /**< instance of hmac */
49 kDtDeviceTypeI2c = 13, /**< instance of i2c */
50 kDtDeviceTypeKeymgr = 14, /**< instance of keymgr */
51 kDtDeviceTypeKmac = 15, /**< instance of kmac */
52 kDtDeviceTypeLcCtrl = 16, /**< instance of lc_ctrl */
53 kDtDeviceTypeOtbn = 17, /**< instance of otbn */
54 kDtDeviceTypeOtpCtrl = 18, /**< instance of otp_ctrl */
55 kDtDeviceTypeOtpMacro = 19, /**< instance of otp_macro */
56 kDtDeviceTypePattgen = 20, /**< instance of pattgen */
57 kDtDeviceTypePinmux = 21, /**< instance of pinmux */
58 kDtDeviceTypePwm = 22, /**< instance of pwm */
59 kDtDeviceTypePwrmgr = 23, /**< instance of pwrmgr */
60 kDtDeviceTypeRomCtrl = 24, /**< instance of rom_ctrl */
61 kDtDeviceTypeRstmgr = 25, /**< instance of rstmgr */
62 kDtDeviceTypeRvCoreIbex = 26, /**< instance of rv_core_ibex */
63 kDtDeviceTypeRvDm = 27, /**< instance of rv_dm */
64 kDtDeviceTypeRvPlic = 28, /**< instance of rv_plic */
65 kDtDeviceTypeRvTimer = 29, /**< instance of rv_timer */
66 kDtDeviceTypeSensorCtrl = 30, /**< instance of sensor_ctrl */
67 kDtDeviceTypeSpiDevice = 31, /**< instance of spi_device */
68 kDtDeviceTypeSpiHost = 32, /**< instance of spi_host */
69 kDtDeviceTypeSramCtrl = 33, /**< instance of sram_ctrl */
70 kDtDeviceTypeSysrstCtrl = 34, /**< instance of sysrst_ctrl */
71 kDtDeviceTypeUart = 35, /**< instance of uart */
72 kDtDeviceTypeUsbdev = 36, /**< instance of usbdev */
73 kDtDeviceTypeCount = 37, /**< \internal Number of instance types */
75
76/**
77 * List of instance IDs.
78 *
79 * Instance IDs are guaranteed to be numbered consecutively from 0.
80 */
81typedef enum dt_instance_id {
82 kDtInstanceIdUnknown = 0, /**< Unknown instance */
83 kDtInstanceIdAdcCtrlAon = 1, /**< instance adc_ctrl_aon of adc_ctrl */
84 kDtInstanceIdAes = 2, /**< instance aes of aes */
85 kDtInstanceIdAlertHandler = 3, /**< instance alert_handler of alert_handler */
86 kDtInstanceIdAonTimerAon = 4, /**< instance aon_timer_aon of aon_timer */
87 kDtInstanceIdAst = 5, /**< instance ast of ast */
88 kDtInstanceIdClkmgrAon = 6, /**< instance clkmgr_aon of clkmgr */
89 kDtInstanceIdCsrng = 7, /**< instance csrng of csrng */
90 kDtInstanceIdEdn0 = 8, /**< instance edn0 of edn */
91 kDtInstanceIdEdn1 = 9, /**< instance edn1 of edn */
92 kDtInstanceIdEntropySrc = 10, /**< instance entropy_src of entropy_src */
93 kDtInstanceIdFlashCtrl = 11, /**< instance flash_ctrl of flash_ctrl */
94 kDtInstanceIdGpio = 12, /**< instance gpio of gpio */
95 kDtInstanceIdHmac = 13, /**< instance hmac of hmac */
96 kDtInstanceIdI2c0 = 14, /**< instance i2c0 of i2c */
97 kDtInstanceIdI2c1 = 15, /**< instance i2c1 of i2c */
98 kDtInstanceIdI2c2 = 16, /**< instance i2c2 of i2c */
99 kDtInstanceIdKeymgr = 17, /**< instance keymgr of keymgr */
100 kDtInstanceIdKmac = 18, /**< instance kmac of kmac */
101 kDtInstanceIdLcCtrl = 19, /**< instance lc_ctrl of lc_ctrl */
102 kDtInstanceIdOtbn = 20, /**< instance otbn of otbn */
103 kDtInstanceIdOtpCtrl = 21, /**< instance otp_ctrl of otp_ctrl */
104 kDtInstanceIdOtpMacro = 22, /**< instance otp_macro of otp_macro */
105 kDtInstanceIdPattgen = 23, /**< instance pattgen of pattgen */
106 kDtInstanceIdPinmuxAon = 24, /**< instance pinmux_aon of pinmux */
107 kDtInstanceIdPwmAon = 25, /**< instance pwm_aon of pwm */
108 kDtInstanceIdPwrmgrAon = 26, /**< instance pwrmgr_aon of pwrmgr */
109 kDtInstanceIdRomCtrl = 27, /**< instance rom_ctrl of rom_ctrl */
110 kDtInstanceIdRstmgrAon = 28, /**< instance rstmgr_aon of rstmgr */
111 kDtInstanceIdRvCoreIbex = 29, /**< instance rv_core_ibex of rv_core_ibex */
112 kDtInstanceIdRvDm = 30, /**< instance rv_dm of rv_dm */
113 kDtInstanceIdRvPlic = 31, /**< instance rv_plic of rv_plic */
114 kDtInstanceIdRvTimer = 32, /**< instance rv_timer of rv_timer */
115 kDtInstanceIdSensorCtrlAon = 33, /**< instance sensor_ctrl_aon of sensor_ctrl */
116 kDtInstanceIdSpiDevice = 34, /**< instance spi_device of spi_device */
117 kDtInstanceIdSpiHost0 = 35, /**< instance spi_host0 of spi_host */
118 kDtInstanceIdSpiHost1 = 36, /**< instance spi_host1 of spi_host */
119 kDtInstanceIdSramCtrlRetAon = 37, /**< instance sram_ctrl_ret_aon of sram_ctrl */
120 kDtInstanceIdSramCtrlMain = 38, /**< instance sram_ctrl_main of sram_ctrl */
121 kDtInstanceIdSysrstCtrlAon = 39, /**< instance sysrst_ctrl_aon of sysrst_ctrl */
122 kDtInstanceIdUart0 = 40, /**< instance uart0 of uart */
123 kDtInstanceIdUart1 = 41, /**< instance uart1 of uart */
124 kDtInstanceIdUart2 = 42, /**< instance uart2 of uart */
125 kDtInstanceIdUart3 = 43, /**< instance uart3 of uart */
126 kDtInstanceIdUsbdev = 44, /**< instance usbdev of usbdev */
127 kDtInstanceIdCount = 45, /**< \internal Number of instance IDs */
129
130/**
131 * Get the instance type of a device instance.
132 *
133 * For example the instance type of `kDtUart0` is `kDtInstanceTypeUart`.
134 *
135 * @param id An instance ID.
136 * @return The instance type, or `kDtInstanceIdUnknown` if the ID is not valid.
137 */
139
140/** PLIC IRQ ID type.
141 *
142 * This type represents a raw IRQ ID from the PLIC.
143 *
144 * This is an alias to the top's `plic_irq_id_t` type for backward compatibility
145 * with existing code.
146 */
148
149/** PLIC IRQ ID for no interrupt. */
150static const dt_plic_irq_id_t kDtPlicIrqIdNone = kTopEarlgreyPlicIrqIdNone;
151
152/**
153 * Get the instance ID for a given PLIC IRQ ID.
154 *
155 * For example, on earlgrey, the instance ID of `kTopEarlgreyPlicIrqIdUart0TxWatermark`
156 * is `kDtInstanceIdUart0`. One can then use the type specific function to retrieve the
157 * IRQ name, for example `dt_uart_irq_from_plic_id` for the UART.
158 *
159 * @param irq A PLIC ID.
160 * @return The instance ID, or `kDtInstanceIdUnknown` if the PLIC ID is not valid.
161 */
163
164/**
165 * Alert ID type.
166 *
167 * This type represents a raw alert ID from the Alert Handler.
168 *
169 * This is an alias to the top's `alert_id_t` type for backward compatibility
170 * with existing code.
171 */
173
174/** Number of alerts. */
175enum {
176 /** Total number of alert IDs. */
177 kDtAlertCount = kTopEarlgreyAlertIdLast + 1,
178};
179
180/**
181 * Get the instance ID for a given alert ID.
182 *
183 * For example, on earlgrey, the instance ID of `kTopEarlgreyAlertIdUart0FatalFault` is
184 * `kDtInstanceIdUart0`. One can then use the type specific function to retrieve the
185 * alert name, for example `dt_uart_alert_from_alert_id` for the UART.
186 *
187 * @param alert An alert ID.
188 * @return The instance ID, or `kDtInstanceIdUnknown` if the alert ID is not valid.
189 */
191
192/**
193 * List of clocks.
194 *
195 * Clocks are guaranteed to be numbered consecutively from 0.
196 */
197typedef enum dt_clock {
198 kDtClockMain = 0, /**< clock main */
199 kDtClockIo = 1, /**< clock io */
200 kDtClockUsb = 2, /**< clock usb */
201 kDtClockAon = 3, /**< clock aon */
202 kDtClockIoDiv2 = 4, /**< clock io_div2 */
203 kDtClockIoDiv4 = 5, /**< clock io_div4 */
204 kDtClockCount = 6, /**< \internal Number of clocks */
206
207/**
208 * Get the frequency of a clock.
209 *
210 * @param clk A clock ID.
211 * @return Clock frequency in Hz.
212 */
214
215/**
216 * List of resets.
217 *
218 * Resets are guaranteed to be numbered consecutively from 0.
219 */
220typedef enum dt_reset {
221 kDtResetUnknown = 0, /**< Unknown reset */
222 kDtResetPorAon = 1, /**< Reset node por_aon */
223 kDtResetLcSrc = 2, /**< Reset node lc_src */
224 kDtResetSysSrc = 3, /**< Reset node sys_src */
225 kDtResetPor = 4, /**< Reset node por */
226 kDtResetPorIo = 5, /**< Reset node por_io */
227 kDtResetPorIoDiv2 = 6, /**< Reset node por_io_div2 */
228 kDtResetPorIoDiv4 = 7, /**< Reset node por_io_div4 */
229 kDtResetPorUsb = 8, /**< Reset node por_usb */
230 kDtResetLc = 9, /**< Reset node lc */
231 kDtResetLcAon = 10, /**< Reset node lc_aon */
232 kDtResetLcIo = 11, /**< Reset node lc_io */
233 kDtResetLcIoDiv2 = 12, /**< Reset node lc_io_div2 */
234 kDtResetLcIoDiv4 = 13, /**< Reset node lc_io_div4 */
235 kDtResetLcUsb = 14, /**< Reset node lc_usb */
236 kDtResetSys = 15, /**< Reset node sys */
237 kDtResetSysIoDiv4 = 16, /**< Reset node sys_io_div4 */
238 kDtResetSpiDevice = 17, /**< Reset node spi_device */
239 kDtResetSpiHost0 = 18, /**< Reset node spi_host0 */
240 kDtResetSpiHost1 = 19, /**< Reset node spi_host1 */
241 kDtResetUsb = 20, /**< Reset node usb */
242 kDtResetUsbAon = 21, /**< Reset node usb_aon */
243 kDtResetI2c0 = 22, /**< Reset node i2c0 */
244 kDtResetI2c1 = 23, /**< Reset node i2c1 */
245 kDtResetI2c2 = 24, /**< Reset node i2c2 */
246 kDtResetCount = 25, /**< \internal Number of resets */
248
249/**
250 * List of pads names.
251 */
252typedef enum dt_pad {
253 kDtPadConstantZero = 0, /**< Pad that is constantly tied to zero (input) */
254 kDtPadConstantOne = 1, /**< Pad that is constantly tied to one (input) */
255 kDtPadIoa0 = 2, /**< Muxed IO pad */
256 kDtPadIoa1 = 3, /**< Muxed IO pad */
257 kDtPadIoa2 = 4, /**< Muxed IO pad */
258 kDtPadIoa3 = 5, /**< Muxed IO pad */
259 kDtPadIoa4 = 6, /**< Muxed IO pad */
260 kDtPadIoa5 = 7, /**< Muxed IO pad */
261 kDtPadIoa6 = 8, /**< Muxed IO pad */
262 kDtPadIoa7 = 9, /**< Muxed IO pad */
263 kDtPadIoa8 = 10, /**< Muxed IO pad */
264 kDtPadIob0 = 11, /**< Muxed IO pad */
265 kDtPadIob1 = 12, /**< Muxed IO pad */
266 kDtPadIob2 = 13, /**< Muxed IO pad */
267 kDtPadIob3 = 14, /**< Muxed IO pad */
268 kDtPadIob4 = 15, /**< Muxed IO pad */
269 kDtPadIob5 = 16, /**< Muxed IO pad */
270 kDtPadIob6 = 17, /**< Muxed IO pad */
271 kDtPadIob7 = 18, /**< Muxed IO pad */
272 kDtPadIob8 = 19, /**< Muxed IO pad */
273 kDtPadIob9 = 20, /**< Muxed IO pad */
274 kDtPadIob10 = 21, /**< Muxed IO pad */
275 kDtPadIob11 = 22, /**< Muxed IO pad */
276 kDtPadIob12 = 23, /**< Muxed IO pad */
277 kDtPadIoc0 = 24, /**< Muxed IO pad */
278 kDtPadIoc1 = 25, /**< Muxed IO pad */
279 kDtPadIoc2 = 26, /**< Muxed IO pad */
280 kDtPadIoc3 = 27, /**< Muxed IO pad */
281 kDtPadIoc4 = 28, /**< Muxed IO pad */
282 kDtPadIoc5 = 29, /**< Muxed IO pad */
283 kDtPadIoc6 = 30, /**< Muxed IO pad */
284 kDtPadIoc7 = 31, /**< Muxed IO pad */
285 kDtPadIoc8 = 32, /**< Muxed IO pad */
286 kDtPadIoc9 = 33, /**< Muxed IO pad */
287 kDtPadIoc10 = 34, /**< Muxed IO pad */
288 kDtPadIoc11 = 35, /**< Muxed IO pad */
289 kDtPadIoc12 = 36, /**< Muxed IO pad */
290 kDtPadIor0 = 37, /**< Muxed IO pad */
291 kDtPadIor1 = 38, /**< Muxed IO pad */
292 kDtPadIor2 = 39, /**< Muxed IO pad */
293 kDtPadIor3 = 40, /**< Muxed IO pad */
294 kDtPadIor4 = 41, /**< Muxed IO pad */
295 kDtPadIor5 = 42, /**< Muxed IO pad */
296 kDtPadIor6 = 43, /**< Muxed IO pad */
297 kDtPadIor7 = 44, /**< Muxed IO pad */
298 kDtPadIor10 = 45, /**< Muxed IO pad */
299 kDtPadIor11 = 46, /**< Muxed IO pad */
300 kDtPadIor12 = 47, /**< Muxed IO pad */
301 kDtPadIor13 = 48, /**< Muxed IO pad */
302 kDtPadUsbdevUsbDp = 49, /**< */
303 kDtPadUsbdevUsbDn = 50, /**< */
304 kDtPadSpiHost0Sd0 = 51, /**< SPI host data */
305 kDtPadSpiHost0Sd1 = 52, /**< SPI host data */
306 kDtPadSpiHost0Sd2 = 53, /**< SPI host data */
307 kDtPadSpiHost0Sd3 = 54, /**< SPI host data */
308 kDtPadSpiDeviceSd0 = 55, /**< SPI device data */
309 kDtPadSpiDeviceSd1 = 56, /**< SPI device data */
310 kDtPadSpiDeviceSd2 = 57, /**< SPI device data */
311 kDtPadSpiDeviceSd3 = 58, /**< SPI device data */
312 kDtPadSysrstCtrlAonEcRstL = 59, /**< Dedicated sysrst_ctrl output (ec_rst_l) */
313 kDtPadSysrstCtrlAonFlashWpL = 60, /**< Dedicated sysrst_ctrl output (flash_wp_l)) */
314 kDtPadSpiDeviceSck = 61, /**< SPI device clock */
315 kDtPadSpiDeviceCsb = 62, /**< SPI device chip select */
316 kDtPadSpiHost0Sck = 63, /**< SPI host clock */
317 kDtPadSpiHost0Csb = 64, /**< SPI host chip select */
318 kDtPadCount = 65, /**< \internal Number of pads */
320
321/** Type of peripheral I/O. */
322typedef enum dt_periph_io_type {
323 /** This peripheral I/O is connected to a muxed IO (MIO). */
325 /** This peripheral I/O is connected to a direct IO (DIO). */
327 /** This peripheral I/O is not connected to either a MIO or a DIO. */
330
331
332/** Direction of a peripheral I/O. */
333typedef enum dt_periph_io_dir {
334 /** This peripheral I/O is an input. */
336 /** This peripheral I/O is an output */
338 /** This peripheral I/O is an input-output */
341
342/** Peripheral I/O description.
343 *
344 * A `dt_periph_io_t` represents a HW IP block peripheral I/O, which can be an input, output or both.
345 * Importantly, this only represents how the block peripheral I/O is wired, i.e.
346 * whether it is connected a MIO or a direct IO on the pinmux, and the relevant information necessary to
347 * configure it.
348 *
349 * **Note:** The fields of this structure are internal, use the dt_periph_io_* functions to access them.
350 */
351typedef struct dt_periph_io {
352 struct {
353 dt_periph_io_type_t type; /**< Peripheral I/O type */
354 dt_periph_io_dir_t dir; /**< Peripheral I/O direction */
355 /**
356 * For `kDtPeriphIoTypeMio`: peripheral input number. This is the index of the MIO_PERIPH_INSEL register
357 * that controls this peripheral I/O.
358 *
359 * For `kDtPeriphIoTypeDio`: DIO pad number. This is the index of the various DIO_PAD_* registers
360 * that control this peripheral I/O.
361 */
362 uint16_t periph_input_or_direct_pad;
363 /**
364 * For `kDtPeriphIoTypeMio`: peripheral output number. This is the value to put in the MIO_OUTSEL registers
365 * to connect an output to this peripheral I/O. For `kDtPeriphIoTypeDio`: the pad index (`dt_pad_t`) to which this I/O is connected.
366 */
367 uint16_t outsel_or_dt_pad;
368 } __internal; /**< Private fields */
370
371
372/* Peripheral I/O that is constantly tied to high-Z (output only) */
373extern const dt_periph_io_t kDtPeriphIoConstantHighZ;
374
375/* Peripheral I/O that is constantly tied to one (output only) */
376extern const dt_periph_io_t kDtPeriphIoConstantZero;
377
378/* Peripheral I/O that is constantly tied to zero (output only) */
379extern const dt_periph_io_t kDtPeriphIoConstantOne;
380
381/**
382 * Return the type of a `dt_periph_io_t`.
383 *
384 * @param periph_io A peripheral I/O description.
385 * @return The peripheral I/O type (MIO, DIO, etc).
386 */
388 return periph_io.__internal.type;
389}
390
391/**
392 * Return the direction of a `dt_periph_io_t`.
393 *
394 * @param periph_io A peripheral I/O description.
395 * @return The peripheral I/O direction.
396 */
397static inline dt_periph_io_dir_t dt_periph_io_dir(dt_periph_io_t periph_io) {
398 return periph_io.__internal.dir;
399}
400
401/**
402 * Pinmux types.
403 *
404 * These types are aliases to top-level types for backward compatibility
405 * with existing code.
406 */
408typedef top_earlgrey_pinmux_insel_t dt_pinmux_insel_t;
409typedef top_earlgrey_pinmux_outsel_t dt_pinmux_outsel_t;
410typedef top_earlgrey_pinmux_mio_out_t dt_pinmux_mio_out_t;
411typedef top_earlgrey_direct_pads_t dt_pinmux_direct_pad_t;
412typedef top_earlgrey_muxed_pads_t dt_pinmux_muxed_pad_t;
413
414/** Tie constantly to zero. */
415static const dt_pinmux_outsel_t kDtPinmuxOutselConstantZero = kTopEarlgreyPinmuxOutselConstantZero;
416
417/** Tie constantly to one. */
418static const dt_pinmux_outsel_t kDtPinmuxOutselConstantOne = kTopEarlgreyPinmuxOutselConstantOne;
419
420/** Tie constantly to high-Z. */
421static const dt_pinmux_outsel_t kDtPinmuxOutselConstantHighZ = kTopEarlgreyPinmuxOutselConstantHighZ;
422
423/**
424 * Return the peripheral input for an MIO peripheral I/O.
425 *
426 * This is the index of the `MIO_PERIPH_INSEL` pinmux register that controls this peripheral I/O.
427 *
428 * @param periph_io A peripheral I/O of type `kDtPeriphIoTypeMio`.
429 * @return The peripheral input number of the MIO that this peripheral I/O is connected to.
430 *
431 * **Note:** This function only makes sense for peripheral I/Os of type `kDtPeriphIoTypeMio` which are
432 * inputs (`kDtPeriphIoDirIn`). For any other peripheral I/O, the return value is unspecified.
433 */
434static inline dt_pinmux_peripheral_in_t dt_periph_io_mio_periph_input(dt_periph_io_t periph_io) {
435 return (dt_pinmux_peripheral_in_t)periph_io.__internal.periph_input_or_direct_pad;
436}
437
438/**
439 * Return the outsel for an MIO peripheral I/O.
440 *
441 * This is the value to put in the `MIO_OUTSEL` pinmux registers to connect a pad to this peripheral I/O.
442 *
443 * @param periph_io A peripheral I/O of type `kDtPeriphIoTypeMio`.
444 * @return The outsel of the MIO that this peripheral I/O is connected to.
445 *
446 * **Note:** This function only makes sense for peripheral I/Os of type `kDtPeriphIoTypeMio` which are
447 * outputs (`kDtPeriphIoDirOut`). For any other peripheral I/O, the return value is unspecified.
448 */
449static inline dt_pinmux_outsel_t dt_periph_io_mio_outsel(dt_periph_io_t periph_io) {
450 return (dt_pinmux_outsel_t)periph_io.__internal.outsel_or_dt_pad;
451}
452
453/**
454 * Return the direct pad number of a DIO peripheral I/O.
455 *
456 * This is the index of the various `DIO_PAD_*` pinmux registers that control this peripheral I/O.
457 *
458 * @param periph_io A peripheral I/O of type `kDtPeriphIoTypeDio`.
459 * @return The direct pad number of the DIO that this peripheral I/O is connected to.
460 *
461 * **Note:** This function only makes sense for peripheral I/Os of type `kDtPeriphIoTypeDio` which are
462 * either outputs or inouts. For any other peripheral I/O type, the return value is unspecified.
463 */
464static inline dt_pinmux_direct_pad_t dt_periph_io_dio_pad_index(dt_periph_io_t periph_io) {
465 return (dt_pinmux_direct_pad_t)periph_io.__internal.periph_input_or_direct_pad;
466}
467
468/**
469 * Return the pad of a DIO peripheral I/O.
470 *
471 * @param periph_io A peripheral I/O of type `kDtPeriphIoTypeDio`.
472 * @return The pad to which this peripheral I/O is connected to.
473 *
474 * **Note:** This function only makes sense for peripheral I/Os of type `kDtPeriphIoTypeDio` which are
475 * either outputs or inouts. For any other peripheral I/O type, the return value is unspecified.
476 */
477static inline dt_pad_t dt_periph_io_dio_pad(dt_periph_io_t periph_io) {
478 return (dt_pad_t)periph_io.__internal.outsel_or_dt_pad;
479}
480
481/** Type of a pad. */
482typedef enum dt_pad_type {
483 /** This pad is a muxed IO (MIO). */
485 /** This pad is a direct IO (DIO). */
487 /** This pad is not an MIO or a DIO. */
490
491/**
492 * Return the type of a `dt_pad_t`.
493 *
494 * @param pad A pad description.
495 * @return The pad type (MIO, DIO, etc).
496 */
498
499/**
500 * Return the pad out number for an MIO pad.
501 *
502 * This is the index of the `MIO_OUT` registers that control this pad
503 * (or the output part of this pad).
504 *
505 * @param pad A pad of type `kDtPadTypeMio`.
506 * @return The pad out number of the MIO.
507 *
508 * **Note:** This function only makes sense for pads of type `kDtPadTypeMio` which are
509 * either inputs or inouts. For any other pad, the return value is unspecified.
510 */
511dt_pinmux_mio_out_t dt_pad_mio_out(dt_pad_t pad);
512
513/**
514 * Return the pad out number for an MIO pad.
515 *
516 * This is the index of the `MIO_PAD` registers that control this pad
517 * (or the output part of this pad).
518 *
519 * @param pad A pad of type `kDtPadTypeMio`.
520 * @return The pad out number of the MIO.
521 *
522 * **Note:** This function only makes sense for pads of type `kDtPadTypeMio`.
523 * For any other pad, the return value is unspecified.
524 */
525dt_pinmux_muxed_pad_t dt_pad_mio_pad_index(dt_pad_t pad);
526
527/**
528 * Return the insel for an MIO pad.
529 *
530 * This is the value to put in the `MIO_PERIPH_INSEL` registers to connect a peripheral I/O to this pad.
531 *
532 * @param pad A pad of type `kDtPadTypeMio`.
533 * @return The insel of the MIO that this pad is connected to.
534 *
535 * **Note:** This function only makes sense for pads of type `kDtPadTypeMio`.
536 * For any other pad, the return value is unspecified.
537 */
538dt_pinmux_insel_t dt_pad_mio_insel(dt_pad_t pad);
539
540/**
541 * Return the direct pad number of a DIO pad.
542 *
543 * This is the index of the various `DIO_PAD_*` registers that control this pad.
544 *
545 * @param pad A pad of type `kDtPadTypeDio`.
546 * @return The direct pad number of the DID that this pad is connected to.
547 *
548 * **Note:** This function only makes sense for pads of type `kDtPeriphIoTypeDio` which are
549 * either outputs or inouts. For any other pad type, the return value is unspecified.
550 */
551dt_pinmux_direct_pad_t dt_pad_dio_pad_index(dt_pad_t pad);
552
553#ifdef __cplusplus
554} // extern "C"
555#endif // __cplusplus
556
557#endif // OPENTITAN_TOP_EARLGREY_DT_API_H_