Software APIs
dt_api.h
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1// Copyright lowRISC contributors (OpenTitan project).
2// Licensed under the Apache License, Version 2.0, see LICENSE for details.
3// SPDX-License-Identifier: Apache-2.0
4//
5// Device table API auto-generated by `dtgen`
6
7#ifndef OPENTITAN_TOP_EARLGREY_DT_API_H_
8#define OPENTITAN_TOP_EARLGREY_DT_API_H_
9
10/**
11 * @file
12 * @brief Device Tables (DT) API for top earlgrey
13 *
14 * This file contains the type definitions and global functions of the DT.
15 *
16 * The DT models the chip as a collection of instances. Each instance has
17 * a type (the IP block) and a number of attributes such as I/Os, IRQs
18 * and so on. The DT also provides top-specific lists of global resources
19 * such as I/O pads, clocks and interrupts.
20 */
21
22#include <stddef.h>
23#include <stdint.h>
25
26/**
27 * List of device types.
28 *
29 * Device types are guaranteed to be numbered consecutively from 0.
30 */
31typedef enum dt_device_type {
32 kDtDeviceTypeUnknown = 0, /**< Instance of unknown type */
33 kDtDeviceTypeAdcCtrl = 1, /**< instance of adc_ctrl */
34 kDtDeviceTypeAes = 2, /**< instance of aes */
35 kDtDeviceTypeAlertHandler = 3, /**< instance of alert_handler */
36 kDtDeviceTypeAonTimer = 4, /**< instance of aon_timer */
37 kDtDeviceTypeAst = 5, /**< instance of ast */
38 kDtDeviceTypeClkmgr = 6, /**< instance of clkmgr */
39 kDtDeviceTypeCsrng = 7, /**< instance of csrng */
40 kDtDeviceTypeEdn = 8, /**< instance of edn */
41 kDtDeviceTypeEntropySrc = 9, /**< instance of entropy_src */
42 kDtDeviceTypeFlashCtrl = 10, /**< instance of flash_ctrl */
43 kDtDeviceTypeGpio = 11, /**< instance of gpio */
44 kDtDeviceTypeHmac = 12, /**< instance of hmac */
45 kDtDeviceTypeI2c = 13, /**< instance of i2c */
46 kDtDeviceTypeKeymgr = 14, /**< instance of keymgr */
47 kDtDeviceTypeKmac = 15, /**< instance of kmac */
48 kDtDeviceTypeLcCtrl = 16, /**< instance of lc_ctrl */
49 kDtDeviceTypeOtbn = 17, /**< instance of otbn */
50 kDtDeviceTypeOtpCtrl = 18, /**< instance of otp_ctrl */
51 kDtDeviceTypeOtpMacro = 19, /**< instance of otp_macro */
52 kDtDeviceTypePattgen = 20, /**< instance of pattgen */
53 kDtDeviceTypePinmux = 21, /**< instance of pinmux */
54 kDtDeviceTypePwm = 22, /**< instance of pwm */
55 kDtDeviceTypePwrmgr = 23, /**< instance of pwrmgr */
56 kDtDeviceTypeRomCtrl = 24, /**< instance of rom_ctrl */
57 kDtDeviceTypeRstmgr = 25, /**< instance of rstmgr */
58 kDtDeviceTypeRvCoreIbex = 26, /**< instance of rv_core_ibex */
59 kDtDeviceTypeRvDm = 27, /**< instance of rv_dm */
60 kDtDeviceTypeRvPlic = 28, /**< instance of rv_plic */
61 kDtDeviceTypeRvTimer = 29, /**< instance of rv_timer */
62 kDtDeviceTypeSensorCtrl = 30, /**< instance of sensor_ctrl */
63 kDtDeviceTypeSpiDevice = 31, /**< instance of spi_device */
64 kDtDeviceTypeSpiHost = 32, /**< instance of spi_host */
65 kDtDeviceTypeSramCtrl = 33, /**< instance of sram_ctrl */
66 kDtDeviceTypeSysrstCtrl = 34, /**< instance of sysrst_ctrl */
67 kDtDeviceTypeUart = 35, /**< instance of uart */
68 kDtDeviceTypeUsbdev = 36, /**< instance of usbdev */
69 kDtDeviceTypeCount = 37, /**< \internal Number of instance types */
71
72/**
73 * List of instance IDs.
74 *
75 * Instance IDs are guaranteed to be numbered consecutively from 0.
76 */
77typedef enum dt_instance_id {
78 kDtInstanceIdUnknown = 0, /**< Unknown instance */
79 kDtInstanceIdAdcCtrlAon = 1, /**< instance adc_ctrl_aon of adc_ctrl */
80 kDtInstanceIdAes = 2, /**< instance aes of aes */
81 kDtInstanceIdAlertHandler = 3, /**< instance alert_handler of alert_handler */
82 kDtInstanceIdAonTimerAon = 4, /**< instance aon_timer_aon of aon_timer */
83 kDtInstanceIdAst = 5, /**< instance ast of ast */
84 kDtInstanceIdClkmgrAon = 6, /**< instance clkmgr_aon of clkmgr */
85 kDtInstanceIdCsrng = 7, /**< instance csrng of csrng */
86 kDtInstanceIdEdn0 = 8, /**< instance edn0 of edn */
87 kDtInstanceIdEdn1 = 9, /**< instance edn1 of edn */
88 kDtInstanceIdEntropySrc = 10, /**< instance entropy_src of entropy_src */
89 kDtInstanceIdFlashCtrl = 11, /**< instance flash_ctrl of flash_ctrl */
90 kDtInstanceIdGpio = 12, /**< instance gpio of gpio */
91 kDtInstanceIdHmac = 13, /**< instance hmac of hmac */
92 kDtInstanceIdI2c0 = 14, /**< instance i2c0 of i2c */
93 kDtInstanceIdI2c1 = 15, /**< instance i2c1 of i2c */
94 kDtInstanceIdI2c2 = 16, /**< instance i2c2 of i2c */
95 kDtInstanceIdKeymgr = 17, /**< instance keymgr of keymgr */
96 kDtInstanceIdKmac = 18, /**< instance kmac of kmac */
97 kDtInstanceIdLcCtrl = 19, /**< instance lc_ctrl of lc_ctrl */
98 kDtInstanceIdOtbn = 20, /**< instance otbn of otbn */
99 kDtInstanceIdOtpCtrl = 21, /**< instance otp_ctrl of otp_ctrl */
100 kDtInstanceIdOtpMacro = 22, /**< instance otp_macro of otp_macro */
101 kDtInstanceIdPattgen = 23, /**< instance pattgen of pattgen */
102 kDtInstanceIdPinmuxAon = 24, /**< instance pinmux_aon of pinmux */
103 kDtInstanceIdPwmAon = 25, /**< instance pwm_aon of pwm */
104 kDtInstanceIdPwrmgrAon = 26, /**< instance pwrmgr_aon of pwrmgr */
105 kDtInstanceIdRomCtrl = 27, /**< instance rom_ctrl of rom_ctrl */
106 kDtInstanceIdRstmgrAon = 28, /**< instance rstmgr_aon of rstmgr */
107 kDtInstanceIdRvCoreIbex = 29, /**< instance rv_core_ibex of rv_core_ibex */
108 kDtInstanceIdRvDm = 30, /**< instance rv_dm of rv_dm */
109 kDtInstanceIdRvPlic = 31, /**< instance rv_plic of rv_plic */
110 kDtInstanceIdRvTimer = 32, /**< instance rv_timer of rv_timer */
111 kDtInstanceIdSensorCtrlAon = 33, /**< instance sensor_ctrl_aon of sensor_ctrl */
112 kDtInstanceIdSpiDevice = 34, /**< instance spi_device of spi_device */
113 kDtInstanceIdSpiHost0 = 35, /**< instance spi_host0 of spi_host */
114 kDtInstanceIdSpiHost1 = 36, /**< instance spi_host1 of spi_host */
115 kDtInstanceIdSramCtrlRetAon = 37, /**< instance sram_ctrl_ret_aon of sram_ctrl */
116 kDtInstanceIdSramCtrlMain = 38, /**< instance sram_ctrl_main of sram_ctrl */
117 kDtInstanceIdSysrstCtrlAon = 39, /**< instance sysrst_ctrl_aon of sysrst_ctrl */
118 kDtInstanceIdUart0 = 40, /**< instance uart0 of uart */
119 kDtInstanceIdUart1 = 41, /**< instance uart1 of uart */
120 kDtInstanceIdUart2 = 42, /**< instance uart2 of uart */
121 kDtInstanceIdUart3 = 43, /**< instance uart3 of uart */
122 kDtInstanceIdUsbdev = 44, /**< instance usbdev of usbdev */
123 kDtInstanceIdCount = 45, /**< \internal Number of instance IDs */
125
126/**
127 * Get the instance type of a device instance.
128 *
129 * For example the instance type of `kDtUart0` is `kDtInstanceTypeUart`.
130 *
131 * @param id An instance ID.
132 * @return The instance type, or `kDtInstanceIdUnknown` if the ID is not valid.
133 */
135
136/** PLIC IRQ ID type.
137 *
138 * This type represents a raw IRQ ID from the PLIC.
139 *
140 * This is an alias to the top's `plic_irq_id_t` type for backward compatibility
141 * with existing code.
142 */
144
145/** PLIC IRQ ID for no interrupt. */
146static const dt_plic_irq_id_t kDtPlicIrqIdNone=kTopEarlgreyPlicIrqIdNone;
147
148/**
149 * Get the instance ID for a given PLIC IRQ ID.
150 *
151 * For example, on earlgrey, the instance ID of `kTopEarlgreyPlicIrqIdUart0TxWatermark`
152 * is `kDtInstanceIdUart0`. One can then use the type specific function to retrieve the
153 * IRQ name, for example `dt_uart_irq_from_plic_id` for the UART.
154 *
155 * @param irq A PLIC ID.
156 * @return The instance ID, or `kDtInstanceIdUnknown` if the PLIC ID is not valid.
157 */
159
160/**
161 * Alert ID type.
162 *
163 * This type represents a raw alert ID from the Alert Handler.
164 *
165 * This is an alias to the top's `alert_id_t` type for backward compatability
166 * with existing code.
167 */
169
170/** Number of alerts. */
171enum {
172 /** Total number of alert IDs. */
173 kDtAlertCount = kTopEarlgreyAlertIdLast + 1,
174};
175
176/**
177 * Get the instance ID for a given alert ID.
178 *
179 * For example, on earlgrey, the instance ID of `kTopEarlgreyAlertIdUart0FatalFault` is
180 * `kDtInstanceIdUart0`. One can then use the type specific function to retrieve the
181 * alert name, for example `dt_uart_alert_from_alert_id` for the UART.
182 *
183 * @param alert An alert ID.
184 * @return The instance ID, or `kDtInstanceIdUnknown` if the alert ID is not valid.
185 */
187
188/**
189 * List of clocks.
190 *
191 * Clocks are guaranteed to be numbered consecutively from 0.
192 */
193typedef enum dt_clock {
194 kDtClockMain = 0, /**< clock main */
195 kDtClockIo = 1, /**< clock io */
196 kDtClockUsb = 2, /**< clock usb */
197 kDtClockAon = 3, /**< clock aon */
198 kDtClockIoDiv2 = 4, /**< clock io_div2 */
199 kDtClockIoDiv4 = 5, /**< clock io_div4 */
200 kDtClockCount = 6, /**< \internal Number of clocks */
202
203/**
204 * Get the frequency of a clock.
205 *
206 * @param clk A clock ID.
207 * @return Clock frequency in Hz.
208 */
210
211/**
212 * List of resets.
213 *
214 * Resets are guaranteed to be numbered consecutively from 0.
215 */
216typedef enum dt_reset {
217 kDtResetUnknown = 0, /**< Unknown reset */
218 kDtResetPorAon = 1, /**< Reset node por_aon */
219 kDtResetLcSrc = 2, /**< Reset node lc_src */
220 kDtResetSysSrc = 3, /**< Reset node sys_src */
221 kDtResetPor = 4, /**< Reset node por */
222 kDtResetPorIo = 5, /**< Reset node por_io */
223 kDtResetPorIoDiv2 = 6, /**< Reset node por_io_div2 */
224 kDtResetPorIoDiv4 = 7, /**< Reset node por_io_div4 */
225 kDtResetPorUsb = 8, /**< Reset node por_usb */
226 kDtResetLc = 9, /**< Reset node lc */
227 kDtResetLcAon = 10, /**< Reset node lc_aon */
228 kDtResetLcIo = 11, /**< Reset node lc_io */
229 kDtResetLcIoDiv2 = 12, /**< Reset node lc_io_div2 */
230 kDtResetLcIoDiv4 = 13, /**< Reset node lc_io_div4 */
231 kDtResetLcUsb = 14, /**< Reset node lc_usb */
232 kDtResetSys = 15, /**< Reset node sys */
233 kDtResetSysIoDiv4 = 16, /**< Reset node sys_io_div4 */
234 kDtResetSpiDevice = 17, /**< Reset node spi_device */
235 kDtResetSpiHost0 = 18, /**< Reset node spi_host0 */
236 kDtResetSpiHost1 = 19, /**< Reset node spi_host1 */
237 kDtResetUsb = 20, /**< Reset node usb */
238 kDtResetUsbAon = 21, /**< Reset node usb_aon */
239 kDtResetI2c0 = 22, /**< Reset node i2c0 */
240 kDtResetI2c1 = 23, /**< Reset node i2c1 */
241 kDtResetI2c2 = 24, /**< Reset node i2c2 */
242 kDtResetCount = 25, /**< \internal Number of resets */
244
245/**
246 * List of pads names.
247 */
248typedef enum dt_pad {
249 kDtPadIoa0 = 0, /**< Muxed IO pad */
250 kDtPadIoa1 = 1, /**< Muxed IO pad */
251 kDtPadIoa2 = 2, /**< Muxed IO pad */
252 kDtPadIoa3 = 3, /**< Muxed IO pad */
253 kDtPadIoa4 = 4, /**< Muxed IO pad */
254 kDtPadIoa5 = 5, /**< Muxed IO pad */
255 kDtPadIoa6 = 6, /**< Muxed IO pad */
256 kDtPadIoa7 = 7, /**< Muxed IO pad */
257 kDtPadIoa8 = 8, /**< Muxed IO pad */
258 kDtPadIob0 = 9, /**< Muxed IO pad */
259 kDtPadIob1 = 10, /**< Muxed IO pad */
260 kDtPadIob2 = 11, /**< Muxed IO pad */
261 kDtPadIob3 = 12, /**< Muxed IO pad */
262 kDtPadIob4 = 13, /**< Muxed IO pad */
263 kDtPadIob5 = 14, /**< Muxed IO pad */
264 kDtPadIob6 = 15, /**< Muxed IO pad */
265 kDtPadIob7 = 16, /**< Muxed IO pad */
266 kDtPadIob8 = 17, /**< Muxed IO pad */
267 kDtPadIob9 = 18, /**< Muxed IO pad */
268 kDtPadIob10 = 19, /**< Muxed IO pad */
269 kDtPadIob11 = 20, /**< Muxed IO pad */
270 kDtPadIob12 = 21, /**< Muxed IO pad */
271 kDtPadIoc0 = 22, /**< Muxed IO pad */
272 kDtPadIoc1 = 23, /**< Muxed IO pad */
273 kDtPadIoc2 = 24, /**< Muxed IO pad */
274 kDtPadIoc3 = 25, /**< Muxed IO pad */
275 kDtPadIoc4 = 26, /**< Muxed IO pad */
276 kDtPadIoc5 = 27, /**< Muxed IO pad */
277 kDtPadIoc6 = 28, /**< Muxed IO pad */
278 kDtPadIoc7 = 29, /**< Muxed IO pad */
279 kDtPadIoc8 = 30, /**< Muxed IO pad */
280 kDtPadIoc9 = 31, /**< Muxed IO pad */
281 kDtPadIoc10 = 32, /**< Muxed IO pad */
282 kDtPadIoc11 = 33, /**< Muxed IO pad */
283 kDtPadIoc12 = 34, /**< Muxed IO pad */
284 kDtPadIor0 = 35, /**< Muxed IO pad */
285 kDtPadIor1 = 36, /**< Muxed IO pad */
286 kDtPadIor2 = 37, /**< Muxed IO pad */
287 kDtPadIor3 = 38, /**< Muxed IO pad */
288 kDtPadIor4 = 39, /**< Muxed IO pad */
289 kDtPadIor5 = 40, /**< Muxed IO pad */
290 kDtPadIor6 = 41, /**< Muxed IO pad */
291 kDtPadIor7 = 42, /**< Muxed IO pad */
292 kDtPadIor10 = 43, /**< Muxed IO pad */
293 kDtPadIor11 = 44, /**< Muxed IO pad */
294 kDtPadIor12 = 45, /**< Muxed IO pad */
295 kDtPadIor13 = 46, /**< Muxed IO pad */
296 kDtPadUsbdevUsbDp = 47, /**< */
297 kDtPadUsbdevUsbDn = 48, /**< */
298 kDtPadSpiHost0Sd0 = 49, /**< SPI host data */
299 kDtPadSpiHost0Sd1 = 50, /**< SPI host data */
300 kDtPadSpiHost0Sd2 = 51, /**< SPI host data */
301 kDtPadSpiHost0Sd3 = 52, /**< SPI host data */
302 kDtPadSpiDeviceSd0 = 53, /**< SPI device data */
303 kDtPadSpiDeviceSd1 = 54, /**< SPI device data */
304 kDtPadSpiDeviceSd2 = 55, /**< SPI device data */
305 kDtPadSpiDeviceSd3 = 56, /**< SPI device data */
306 kDtPadSysrstCtrlAonEcRstL = 57, /**< Dedicated sysrst_ctrl output (ec_rst_l) */
307 kDtPadSysrstCtrlAonFlashWpL = 58, /**< Dedicated sysrst_ctrl output (flash_wp_l)) */
308 kDtPadSpiDeviceSck = 59, /**< SPI device clock */
309 kDtPadSpiDeviceCsb = 60, /**< SPI device chip select */
310 kDtPadSpiHost0Sck = 61, /**< SPI host clock */
311 kDtPadSpiHost0Csb = 62, /**< SPI host chip select */
312 kDtPadCount = 63, /**< \internal Number of pads */
314
315/**
316 * Pinmux types.
317 *
318 * These types are aliases to top-level types for backward compatibility
319 * with existing code.
320 */
322typedef top_earlgrey_pinmux_insel_t dt_pinmux_insel_t;
323typedef top_earlgrey_pinmux_outsel_t dt_pinmux_outsel_t;
324typedef top_earlgrey_pinmux_mio_out_t dt_pinmux_mio_out_t;
325typedef top_earlgrey_direct_pads_t dt_pinmux_direct_pad_t;
326typedef top_earlgrey_muxed_pads_t dt_pinmux_muxed_pad_t;
327
328/** Type of peripheral I/O. */
329typedef enum dt_periph_io_type {
330 /** This peripheral I/O is connected to a muxed IO (MIO). */
332 /** This peripheral I/O is connected to a direct IO (DIO). */
334 /** This peripheral I/O is not connected to either a MIO or a DIO. */
337
338
339/** Direction of a peripheral I/O. */
340typedef enum dt_periph_io_dir {
341 /** This peripheral I/O is an input. */
343 /** This peripheral I/O is an output */
345 /** This peripheral I/O is an input-output */
348
349/** Peripheral I/O description.
350 *
351 * A `dt_periph_io_t` represents a HW IP block peripheral I/O, which can be an input, output or both.
352 * Importantly, this only represents how the block peripheral I/O is wired, i.e.
353 * whether it is connected a MIO or a direct IO on the pinmux, and the relevant information necessary to
354 * configure it.
355 *
356 * **Note:** The fields of this structure are internal, use the dt_periph_io_* functions to access them.
357 */
358typedef struct dt_periph_io {
359 struct {
360 dt_periph_io_type_t type; /**< Peripheral I/O type */
361 dt_periph_io_dir_t dir; /**< Peripheral I/O direction */
362 /**
363 * For `kDtPeriphIoTypeMio`: peripheral input number. This is the index of the MIO_PERIPH_INSEL register
364 * that controls this peripheral I/O.
365 *
366 * For `kDtPeriphIoTypeDio`: DIO pad number. This is the index of the various DIO_PAD_* registers
367 * that control this peripheral I/O.
368 */
369 uint16_t periph_input_or_direct_pad;
370 /**
371 * For `kDtPeriphIoTypeMio`: peripheral output number. This is the value to put in the MIO_OUTSEL registers
372 * to connect an output to this peripheral I/O. For `kDtPeriphIoTypeDio`: the pad index (`dt_pad_t`) to which this I/O is connected.
373 */
374 uint16_t outsel_or_dt_pad;
375 } __internal; /**< Private fields */
377
378
379/** Tie constantly to zero. */
380static const dt_pinmux_outsel_t kDtPinmuxOutselConstantZero = kTopEarlgreyPinmuxOutselConstantZero;
381
382/** Tie constantly to one. */
383static const dt_pinmux_outsel_t kDtPinmuxOutselConstantOne = kTopEarlgreyPinmuxOutselConstantOne;
384
385/** Tie constantly to high-Z. */
386static const dt_pinmux_outsel_t kDtPinmuxOutselConstantHighZ = kTopEarlgreyPinmuxOutselConstantHighZ;
387
388/* Peripheral I/O that is constantly tied to high-Z (output only) */
389extern const dt_periph_io_t kDtPeriphIoConstantHighZ;
390
391/* Peripheral I/O that is constantly tied to one (output only) */
392extern const dt_periph_io_t kDtPeriphIoConstantZero;
393
394/* Peripheral I/O that is constantly tied to zero (output only) */
395extern const dt_periph_io_t kDtPeriphIoConstantOne;
396
397/**
398 * Return the type of a `dt_periph_io_t`.
399 *
400 * @param periph_io A peripheral I/O description.
401 * @return The peripheral I/O type (MIO, DIO, etc).
402 */
404 return periph_io.__internal.type;
405}
406
407/**
408 * Return the direction of a `dt_periph_io_t`.
409 *
410 * @param periph_io A peripheral I/O description.
411 * @return The peripheral I/O direction.
412 */
413static inline dt_periph_io_dir_t dt_periph_io_dir(dt_periph_io_t periph_io) {
414 return periph_io.__internal.dir;
415}
416
417/**
418 * Return the peripheral input for an MIO peripheral I/O.
419 *
420 * This is the index of the `MIO_PERIPH_INSEL` pinmux register that controls this peripheral I/O.
421 *
422 * @param periph_io A peripheral I/O of type `kDtPeriphIoTypeMio`.
423 * @return The peripheral input number of the MIO that this peripheral I/O is connected to.
424 *
425 * **Note:** This function only makes sense for peripheral I/Os of type `kDtPeriphIoTypeMio` which are
426 * inputs (`kDtPeriphIoDirIn`). For any other peripheral I/O, the return value is unspecified.
427 */
428static inline dt_pinmux_peripheral_in_t dt_periph_io_mio_periph_input(dt_periph_io_t periph_io) {
429 return (dt_pinmux_peripheral_in_t)periph_io.__internal.periph_input_or_direct_pad;
430}
431
432/**
433 * Return the outsel for an MIO peripheral I/O.
434 *
435 * This is the value to put in the `MIO_OUTSEL` pinmux registers to connect a pad to this peripheral I/O.
436 *
437 * @param periph_io A peripheral I/O of type `kDtPeriphIoTypeMio`.
438 * @return The outsel of the MIO that this peripheral I/O is connected to.
439 *
440 * **Note:** This function only makes sense for peripheral I/Os of type `kDtPeriphIoTypeMio` which are
441 * outputs (`kDtPeriphIoDirOut`). For any other peripheral I/O, the return value is unspecified.
442 */
443static inline dt_pinmux_outsel_t dt_periph_io_mio_outsel(dt_periph_io_t periph_io) {
444 return (dt_pinmux_outsel_t)periph_io.__internal.outsel_or_dt_pad;
445}
446
447/**
448 * Return the direct pad number of a DIO peripheral I/O.
449 *
450 * This is the index of the various `DIO_PAD_*` pinmux registers that control this peripheral I/O.
451 *
452 * @param periph_io A peripheral I/O of type `kDtPeriphIoTypeDio`.
453 * @return The direct pad number of the DIO that this peripheral I/O is connected to.
454 *
455 * **Note:** This function only makes sense for peripheral I/Os of type `kDtPeriphIoTypeDio` which are
456 * either outputs or inouts. For any other peripheral I/O type, the return value is unspecified.
457 */
458static inline dt_pinmux_direct_pad_t dt_periph_io_dio_pad_index(dt_periph_io_t periph_io) {
459 return (dt_pinmux_direct_pad_t)periph_io.__internal.periph_input_or_direct_pad;
460}
461
462/**
463 * Return the pad of a DIO peripheral I/O.
464 *
465 * @param periph_io A peripheral I/O of type `kDtPeriphIoTypeDio`.
466 * @return The pad to which this peripheral I/O is connected to.
467 *
468 * **Note:** This function only makes sense for peripheral I/Os of type `kDtPeriphIoTypeDio` which are
469 * either outputs or inouts. For any other peripheral I/O type, the return value is unspecified.
470 */
471static inline dt_pad_t dt_periph_io_dio_pad(dt_periph_io_t periph_io) {
472 return (dt_pad_t)periph_io.__internal.outsel_or_dt_pad;
473}
474
475/** Type of a pad. */
476typedef enum dt_pad_type {
477 /** This pad is a muxed IO (MIO). */
479 /** This pad is a direct IO (DIO). */
481 /** This pad is not an MIO or a DIO. */
484
485/**
486 * Return the type of a `dt_pad_t`.
487 *
488 * @param pad A pad description.
489 * @return The pad type (MIO, DIO, etc).
490 */
492
493/**
494 * Return the pad out number for an MIO pad.
495 *
496 * This is the index of the `MIO_OUT` registers that control this pad
497 * (or the output part of this pad).
498 *
499 * @param pad A pad of type `kDtPadTypeMio`.
500 * @return The pad out number of the MIO.
501 *
502 * **Note:** This function only makes sense for pads of type `kDtPadTypeMio` which are
503 * either inputs or inouts. For any other pad, the return value is unspecified.
504 */
505dt_pinmux_mio_out_t dt_pad_mio_out(dt_pad_t pad);
506
507/**
508 * Return the pad out number for an MIO pad.
509 *
510 * This is the index of the `MIO_PAD` registers that control this pad
511 * (or the output part of this pad).
512 *
513 * @param pad A pad of type `kDtPadTypeMio`.
514 * @return The pad out number of the MIO.
515 *
516 * **Note:** This function only makes sense for pads of type `kDtPadTypeMio`.
517 * For any other pad, the return value is unspecified.
518 */
519dt_pinmux_muxed_pad_t dt_pad_mio_pad_index(dt_pad_t pad);
520
521/**
522 * Return the insel for an MIO pad.
523 *
524 * This is the value to put in the `MIO_PERIPH_INSEL` registers to connect a peripheral I/O to this pad.
525 *
526 * @param pad A pad of type `kDtPadTypeMio`.
527 * @return The insel of the MIO that this pad is connected to.
528 *
529 * **Note:** This function only makes sense for pads of type `kDtPadTypeMio`.
530 * For any other pad, the return value is unspecified.
531 */
532dt_pinmux_insel_t dt_pad_mio_insel(dt_pad_t pad);
533
534/**
535 * Return the direct pad number of a DIO pad.
536 *
537 * This is the index of the various `DIO_PAD_*` registers that control this pad.
538 *
539 * @param pad A pad of type `kDtPadTypeDio`.
540 * @return The direct pad number of the DID that this pad is connected to.
541 *
542 * **Note:** This function only makes sense for pads of type `kDtPeriphIoTypeDio` which are
543 * either outputs or inouts. For any other pad type, the return value is unspecified.
544 */
545dt_pinmux_direct_pad_t dt_pad_dio_pad_index(dt_pad_t pad);
546
547#endif // OPENTITAN_TOP_EARLGREY_DT_API_H_