Software APIs
api.h
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1// Copyright lowRISC contributors (OpenTitan project).
2// Licensed under the Apache License, Version 2.0, see LICENSE for details.
3// SPDX-License-Identifier: Apache-2.0
4//
5// Device table API auto-generated by `dtgen`
6
7#ifndef OPENTITAN_TOP_EARLGREY_DT_API_H_
8#define OPENTITAN_TOP_EARLGREY_DT_API_H_
9
10#ifdef __cplusplus
11extern "C" {
12#endif // __cplusplus
13
14/**
15 * @file
16 * @brief Device Tables (DT) API for top earlgrey
17 *
18 * This file contains the type definitions and global functions of the DT.
19 *
20 * The DT models the chip as a collection of instances. Each instance has
21 * a type (the IP block) and a number of attributes such as I/Os, IRQs
22 * and so on. The DT also provides top-specific lists of global resources
23 * such as I/O pads, clocks and interrupts.
24 */
25
26#include <stddef.h>
27#include <stdint.h>
29
30/**
31 * List of device types.
32 *
33 * Device types are guaranteed to be numbered consecutively from 0.
34 */
35typedef enum dt_device_type {
36 kDtDeviceTypeUnknown = 0, /**< Instance of unknown type */
37 kDtDeviceTypeAdcCtrl = 1, /**< instance of adc_ctrl */
38 kDtDeviceTypeAes = 2, /**< instance of aes */
39 kDtDeviceTypeAlertHandler = 3, /**< instance of alert_handler */
40 kDtDeviceTypeAonTimer = 4, /**< instance of aon_timer */
41 kDtDeviceTypeAst = 5, /**< instance of ast */
42 kDtDeviceTypeClkmgr = 6, /**< instance of clkmgr */
43 kDtDeviceTypeCsrng = 7, /**< instance of csrng */
44 kDtDeviceTypeEdn = 8, /**< instance of edn */
45 kDtDeviceTypeEntropySrc = 9, /**< instance of entropy_src */
46 kDtDeviceTypeFlashCtrl = 10, /**< instance of flash_ctrl */
47 kDtDeviceTypeGpio = 11, /**< instance of gpio */
48 kDtDeviceTypeHmac = 12, /**< instance of hmac */
49 kDtDeviceTypeI2c = 13, /**< instance of i2c */
50 kDtDeviceTypeKeymgr = 14, /**< instance of keymgr */
51 kDtDeviceTypeKmac = 15, /**< instance of kmac */
52 kDtDeviceTypeLcCtrl = 16, /**< instance of lc_ctrl */
53 kDtDeviceTypeOtbn = 17, /**< instance of otbn */
54 kDtDeviceTypeOtpCtrl = 18, /**< instance of otp_ctrl */
55 kDtDeviceTypeOtpMacro = 19, /**< instance of otp_macro */
56 kDtDeviceTypePinmux = 20, /**< instance of pinmux */
57 kDtDeviceTypePwrmgr = 21, /**< instance of pwrmgr */
58 kDtDeviceTypeRomCtrl = 22, /**< instance of rom_ctrl */
59 kDtDeviceTypeRstmgr = 23, /**< instance of rstmgr */
60 kDtDeviceTypeRvCoreIbex = 24, /**< instance of rv_core_ibex */
61 kDtDeviceTypeRvDm = 25, /**< instance of rv_dm */
62 kDtDeviceTypeRvPlic = 26, /**< instance of rv_plic */
63 kDtDeviceTypeRvTimer = 27, /**< instance of rv_timer */
64 kDtDeviceTypeSensorCtrl = 28, /**< instance of sensor_ctrl */
65 kDtDeviceTypeSpiDevice = 29, /**< instance of spi_device */
66 kDtDeviceTypeSpiHost = 30, /**< instance of spi_host */
67 kDtDeviceTypeSramCtrl = 31, /**< instance of sram_ctrl */
68 kDtDeviceTypeSysrstCtrl = 32, /**< instance of sysrst_ctrl */
69 kDtDeviceTypeUart = 33, /**< instance of uart */
70 kDtDeviceTypeUsbdev = 34, /**< instance of usbdev */
72
73enum {
74 kDtDeviceTypeCount = 35, /**< Number of instance types */
75};
76
77
78/**
79 * List of instance IDs.
80 *
81 * Instance IDs are guaranteed to be numbered consecutively from 0.
82 */
83typedef enum dt_instance_id {
84 kDtInstanceIdUnknown = 0, /**< Unknown instance */
85 kDtInstanceIdAdcCtrl = 1, /**< instance adc_ctrl of adc_ctrl */
86 kDtInstanceIdAes = 2, /**< instance aes of aes */
87 kDtInstanceIdAlertHandler = 3, /**< instance alert_handler of alert_handler */
88 kDtInstanceIdAonTimer = 4, /**< instance aon_timer of aon_timer */
89 kDtInstanceIdAst = 5, /**< instance ast of ast */
90 kDtInstanceIdClkmgr = 6, /**< instance clkmgr of clkmgr */
91 kDtInstanceIdCsrng = 7, /**< instance csrng of csrng */
92 kDtInstanceIdEdn0 = 8, /**< instance edn0 of edn */
93 kDtInstanceIdEdn1 = 9, /**< instance edn1 of edn */
94 kDtInstanceIdEntropySrc = 10, /**< instance entropy_src of entropy_src */
95 kDtInstanceIdFlashCtrl = 11, /**< instance flash_ctrl of flash_ctrl */
96 kDtInstanceIdGpio = 12, /**< instance gpio of gpio */
97 kDtInstanceIdHmac = 13, /**< instance hmac of hmac */
98 kDtInstanceIdI2c0 = 14, /**< instance i2c0 of i2c */
99 kDtInstanceIdI2c1 = 15, /**< instance i2c1 of i2c */
100 kDtInstanceIdI2c2 = 16, /**< instance i2c2 of i2c */
101 kDtInstanceIdKeymgr = 17, /**< instance keymgr of keymgr */
102 kDtInstanceIdKmac = 18, /**< instance kmac of kmac */
103 kDtInstanceIdLcCtrl = 19, /**< instance lc_ctrl of lc_ctrl */
104 kDtInstanceIdOtbn = 20, /**< instance otbn of otbn */
105 kDtInstanceIdOtpCtrl = 21, /**< instance otp_ctrl of otp_ctrl */
106 kDtInstanceIdOtpMacro = 22, /**< instance otp_macro of otp_macro */
107 kDtInstanceIdPinmux = 23, /**< instance pinmux of pinmux */
108 kDtInstanceIdPwrmgr = 24, /**< instance pwrmgr of pwrmgr */
109 kDtInstanceIdRomCtrl = 25, /**< instance rom_ctrl of rom_ctrl */
110 kDtInstanceIdRstmgr = 26, /**< instance rstmgr of rstmgr */
111 kDtInstanceIdRvCoreIbex = 27, /**< instance rv_core_ibex of rv_core_ibex */
112 kDtInstanceIdRvDm = 28, /**< instance rv_dm of rv_dm */
113 kDtInstanceIdRvPlic = 29, /**< instance rv_plic of rv_plic */
114 kDtInstanceIdRvTimer = 30, /**< instance rv_timer of rv_timer */
115 kDtInstanceIdSensorCtrl = 31, /**< instance sensor_ctrl of sensor_ctrl */
116 kDtInstanceIdSpiDevice = 32, /**< instance spi_device of spi_device */
117 kDtInstanceIdSpiHost0 = 33, /**< instance spi_host0 of spi_host */
118 kDtInstanceIdSpiHost1 = 34, /**< instance spi_host1 of spi_host */
119 kDtInstanceIdSramCtrlRet = 35, /**< instance sram_ctrl_ret of sram_ctrl */
120 kDtInstanceIdSramCtrlMain = 36, /**< instance sram_ctrl_main of sram_ctrl */
121 kDtInstanceIdSramCtrlSec = 37, /**< instance sram_ctrl_sec of sram_ctrl */
122 kDtInstanceIdSysrstCtrl = 38, /**< instance sysrst_ctrl of sysrst_ctrl */
123 kDtInstanceIdUart0 = 39, /**< instance uart0 of uart */
124 kDtInstanceIdUart1 = 40, /**< instance uart1 of uart */
125 kDtInstanceIdUart2 = 41, /**< instance uart2 of uart */
126 kDtInstanceIdUart3 = 42, /**< instance uart3 of uart */
127 kDtInstanceIdUsbdev = 43, /**< instance usbdev of usbdev */
129
130enum {
131 kDtInstanceIdCount = 44, /**< Number of instance IDs */
132};
133
134
135/**
136 * Get the instance type of a device instance.
137 *
138 * For example the instance type of `kDtUart0` is `kDtInstanceTypeUart`.
139 *
140 * @param id An instance ID.
141 * @return The instance type, or `kDtInstanceIdUnknown` if the ID is not valid.
142 */
144
145/** PLIC IRQ ID type.
146 *
147 * This type represents a raw IRQ ID from the PLIC.
148 *
149 * This is an alias to the top's `plic_irq_id_t` type for backward compatibility
150 * with existing code.
151 */
153
154/** PLIC IRQ ID for no interrupt. */
155static const dt_plic_irq_id_t kDtPlicIrqIdNone = kTopEarlgreyPlicIrqIdNone;
156
157/**
158 * Get the instance ID for a given PLIC IRQ ID.
159 *
160 * For example, on earlgrey, the instance ID of `kTopEarlgreyPlicIrqIdUart0TxWatermark`
161 * is `kDtInstanceIdUart0`. One can then use the type specific function to retrieve the
162 * IRQ name, for example `dt_uart_irq_from_plic_id` for the UART.
163 *
164 * @param irq A PLIC ID.
165 * @return The instance ID, or `kDtInstanceIdUnknown` if the PLIC ID is not valid.
166 */
168
169/**
170 * Alert ID type.
171 *
172 * This type represents a raw alert ID from the Alert Handler.
173 *
174 * This is an alias to the top's `alert_id_t` type for backward compatibility
175 * with existing code.
176 */
178
179/** Number of alerts. */
180enum {
181 /** Total number of alert IDs. */
182 kDtAlertCount = kTopEarlgreyAlertIdLast + 1,
183};
184
185/**
186 * Get the instance ID for a given alert ID.
187 *
188 * For example, on earlgrey, the instance ID of `kTopEarlgreyAlertIdUart0FatalFault` is
189 * `kDtInstanceIdUart0`. One can then use the type specific function to retrieve the
190 * alert name, for example `dt_uart_alert_from_alert_id` for the UART.
191 *
192 * @param alert An alert ID.
193 * @return The instance ID, or `kDtInstanceIdUnknown` if the alert ID is not valid.
194 */
196
197/**
198 * List of clocks.
199 *
200 * Clocks are guaranteed to be numbered consecutively from 0.
201 */
202typedef enum dt_clock {
203 kDtClockMain = 0, /**< clock main */
204 kDtClockIo = 1, /**< clock io */
205 kDtClockUsb = 2, /**< clock usb */
206 kDtClockAon = 3, /**< clock aon */
207 kDtClockIoDiv2 = 4, /**< clock io_div2 */
208 kDtClockIoDiv4 = 5, /**< clock io_div4 */
210
211enum {
212 kDtClockCount = 6, /**< Number of clocks */
213};
214
215
216/**
217 * Get the frequency of a clock.
218 *
219 * @param clk A clock ID.
220 * @return Clock frequency in Hz.
221 */
223
224/**
225 * List of resets.
226 *
227 * Resets are guaranteed to be numbered consecutively from 0.
228 */
229typedef enum dt_reset {
230 kDtResetUnknown = 0, /**< Unknown reset */
231 kDtResetPorAon = 1, /**< Reset node por_aon */
232 kDtResetLcSrc = 2, /**< Reset node lc_src */
233 kDtResetSysSrc = 3, /**< Reset node sys_src */
234 kDtResetPor = 4, /**< Reset node por */
235 kDtResetPorIo = 5, /**< Reset node por_io */
236 kDtResetPorIoDiv2 = 6, /**< Reset node por_io_div2 */
237 kDtResetPorIoDiv4 = 7, /**< Reset node por_io_div4 */
238 kDtResetPorUsb = 8, /**< Reset node por_usb */
239 kDtResetLc = 9, /**< Reset node lc */
240 kDtResetLcAon = 10, /**< Reset node lc_aon */
241 kDtResetLcIo = 11, /**< Reset node lc_io */
242 kDtResetLcIoDiv2 = 12, /**< Reset node lc_io_div2 */
243 kDtResetLcIoDiv4 = 13, /**< Reset node lc_io_div4 */
244 kDtResetLcUsb = 14, /**< Reset node lc_usb */
245 kDtResetSys = 15, /**< Reset node sys */
246 kDtResetSysIoDiv4 = 16, /**< Reset node sys_io_div4 */
247 kDtResetSpiDevice = 17, /**< Reset node spi_device */
248 kDtResetSpiHost0 = 18, /**< Reset node spi_host0 */
249 kDtResetSpiHost1 = 19, /**< Reset node spi_host1 */
250 kDtResetUsb = 20, /**< Reset node usb */
251 kDtResetUsbAon = 21, /**< Reset node usb_aon */
252 kDtResetI2c0 = 22, /**< Reset node i2c0 */
253 kDtResetI2c1 = 23, /**< Reset node i2c1 */
254 kDtResetI2c2 = 24, /**< Reset node i2c2 */
256
257enum {
258 kDtResetCount = 25, /**< Number of resets */
259};
260
261
262/**
263 * List of pads names.
264 */
265typedef enum dt_pad {
266 kDtPadConstantZero = 0, /**< Pad that is constantly tied to zero (input) */
267 kDtPadConstantOne = 1, /**< Pad that is constantly tied to one (input) */
268 kDtPadIoa0 = 2, /**< Muxed IO pad */
269 kDtPadIoa1 = 3, /**< Muxed IO pad */
270 kDtPadIoa2 = 4, /**< Muxed IO pad */
271 kDtPadIoa3 = 5, /**< Muxed IO pad */
272 kDtPadIoa4 = 6, /**< Muxed IO pad */
273 kDtPadIoa5 = 7, /**< Muxed IO pad */
274 kDtPadIoa6 = 8, /**< Muxed IO pad */
275 kDtPadIoa7 = 9, /**< Muxed IO pad */
276 kDtPadIoa8 = 10, /**< Muxed IO pad */
277 kDtPadIob0 = 11, /**< Muxed IO pad */
278 kDtPadIob1 = 12, /**< Muxed IO pad */
279 kDtPadIob2 = 13, /**< Muxed IO pad */
280 kDtPadIob3 = 14, /**< Muxed IO pad */
281 kDtPadIob4 = 15, /**< Muxed IO pad */
282 kDtPadIob5 = 16, /**< Muxed IO pad */
283 kDtPadIob6 = 17, /**< Muxed IO pad */
284 kDtPadIob7 = 18, /**< Muxed IO pad */
285 kDtPadIob8 = 19, /**< Muxed IO pad */
286 kDtPadIob9 = 20, /**< Muxed IO pad */
287 kDtPadIob10 = 21, /**< Muxed IO pad */
288 kDtPadIob11 = 22, /**< Muxed IO pad */
289 kDtPadIob12 = 23, /**< Muxed IO pad */
290 kDtPadIoc0 = 24, /**< Muxed IO pad */
291 kDtPadIoc1 = 25, /**< Muxed IO pad */
292 kDtPadIoc2 = 26, /**< Muxed IO pad */
293 kDtPadIoc3 = 27, /**< Muxed IO pad */
294 kDtPadIoc4 = 28, /**< Muxed IO pad */
295 kDtPadIoc5 = 29, /**< Muxed IO pad */
296 kDtPadIoc6 = 30, /**< Muxed IO pad */
297 kDtPadIoc7 = 31, /**< Muxed IO pad */
298 kDtPadIoc8 = 32, /**< Muxed IO pad */
299 kDtPadIoc9 = 33, /**< Muxed IO pad */
300 kDtPadIoc10 = 34, /**< Muxed IO pad */
301 kDtPadIoc11 = 35, /**< Muxed IO pad */
302 kDtPadIoc12 = 36, /**< Muxed IO pad */
303 kDtPadIor0 = 37, /**< Muxed IO pad */
304 kDtPadIor1 = 38, /**< Muxed IO pad */
305 kDtPadIor2 = 39, /**< Muxed IO pad */
306 kDtPadIor3 = 40, /**< Muxed IO pad */
307 kDtPadIor4 = 41, /**< Muxed IO pad */
308 kDtPadIor5 = 42, /**< Muxed IO pad */
309 kDtPadIor6 = 43, /**< Muxed IO pad */
310 kDtPadIor7 = 44, /**< Muxed IO pad */
311 kDtPadIor10 = 45, /**< Muxed IO pad */
312 kDtPadIor11 = 46, /**< Muxed IO pad */
313 kDtPadIor12 = 47, /**< Muxed IO pad */
314 kDtPadIor13 = 48, /**< Muxed IO pad */
315 kDtPadUsbdevUsbDp = 49, /**< */
316 kDtPadUsbdevUsbDn = 50, /**< */
317 kDtPadSpiHost0Sd0 = 51, /**< SPI host data */
318 kDtPadSpiHost0Sd1 = 52, /**< SPI host data */
319 kDtPadSpiHost0Sd2 = 53, /**< SPI host data */
320 kDtPadSpiHost0Sd3 = 54, /**< SPI host data */
321 kDtPadSpiDeviceSd0 = 55, /**< SPI device data */
322 kDtPadSpiDeviceSd1 = 56, /**< SPI device data */
323 kDtPadSpiDeviceSd2 = 57, /**< SPI device data */
324 kDtPadSpiDeviceSd3 = 58, /**< SPI device data */
325 kDtPadSysrstCtrlEcRstL = 59, /**< Dedicated sysrst_ctrl output (ec_rst_l) */
326 kDtPadSysrstCtrlFlashWpL = 60, /**< Dedicated sysrst_ctrl output (flash_wp_l)) */
327 kDtPadSpiDeviceSck = 61, /**< SPI device clock */
328 kDtPadSpiDeviceCsb = 62, /**< SPI device chip select */
329 kDtPadSpiHost0Sck = 63, /**< SPI host clock */
330 kDtPadSpiHost0Csb = 64, /**< SPI host chip select */
332
333enum {
334 kDtPadCount = 65, /**< Number of pads */
335};
336
337
338/** Type of peripheral I/O. */
339typedef enum dt_periph_io_type {
340 /** This peripheral I/O is connected to a muxed IO (MIO). */
342 /** This peripheral I/O is connected to a direct IO (DIO). */
344 /** This peripheral I/O is not connected to either a MIO or a DIO. */
347
348
349/** Direction of a peripheral I/O. */
350typedef enum dt_periph_io_dir {
351 /** This peripheral I/O is an input. */
353 /** This peripheral I/O is an output */
355 /** This peripheral I/O is an input-output */
358
359/** Peripheral I/O description.
360 *
361 * A `dt_periph_io_t` represents a HW IP block peripheral I/O, which can be an input, output or both.
362 * Importantly, this only represents how the block peripheral I/O is wired, i.e.
363 * whether it is connected a MIO or a direct IO on the pinmux, and the relevant information necessary to
364 * configure it.
365 *
366 * **Note:** The fields of this structure are internal, use the dt_periph_io_* functions to access them.
367 */
368typedef struct dt_periph_io {
369 struct {
370 dt_periph_io_type_t type; /**< Peripheral I/O type */
371 dt_periph_io_dir_t dir; /**< Peripheral I/O direction */
372 /**
373 * For `kDtPeriphIoTypeMio`: peripheral input number. This is the index of the MIO_PERIPH_INSEL register
374 * that controls this peripheral I/O.
375 *
376 * For `kDtPeriphIoTypeDio`: DIO pad number. This is the index of the various DIO_PAD_* registers
377 * that control this peripheral I/O.
378 */
379 uint16_t periph_input_or_direct_pad;
380 /**
381 * For `kDtPeriphIoTypeMio`: peripheral output number. This is the value to put in the MIO_OUTSEL registers
382 * to connect an output to this peripheral I/O. For `kDtPeriphIoTypeDio`: the pad index (`dt_pad_t`) to which this I/O is connected.
383 */
384 uint16_t outsel_or_dt_pad;
385 } __internal; /**< Private fields */
387
388
389/* Peripheral I/O that is constantly tied to high-Z (output only) */
390extern const dt_periph_io_t kDtPeriphIoConstantHighZ;
391
392/* Peripheral I/O that is constantly tied to one (output only) */
393extern const dt_periph_io_t kDtPeriphIoConstantZero;
394
395/* Peripheral I/O that is constantly tied to zero (output only) */
396extern const dt_periph_io_t kDtPeriphIoConstantOne;
397
398/**
399 * Return the type of a `dt_periph_io_t`.
400 *
401 * @param periph_io A peripheral I/O description.
402 * @return The peripheral I/O type (MIO, DIO, etc).
403 */
405 return periph_io.__internal.type;
406}
407
408/**
409 * Return the direction of a `dt_periph_io_t`.
410 *
411 * @param periph_io A peripheral I/O description.
412 * @return The peripheral I/O direction.
413 */
414static inline dt_periph_io_dir_t dt_periph_io_dir(dt_periph_io_t periph_io) {
415 return periph_io.__internal.dir;
416}
417
418/**
419 * Pinmux types.
420 *
421 * These types are aliases to top-level types for backward compatibility
422 * with existing code.
423 */
425typedef top_earlgrey_pinmux_insel_t dt_pinmux_insel_t;
426typedef top_earlgrey_pinmux_outsel_t dt_pinmux_outsel_t;
427typedef top_earlgrey_pinmux_mio_out_t dt_pinmux_mio_out_t;
428typedef top_earlgrey_direct_pads_t dt_pinmux_direct_pad_t;
429typedef top_earlgrey_muxed_pads_t dt_pinmux_muxed_pad_t;
430
431/** Tie constantly to zero. */
432static const dt_pinmux_outsel_t kDtPinmuxOutselConstantZero = kTopEarlgreyPinmuxOutselConstantZero;
433
434/** Tie constantly to one. */
435static const dt_pinmux_outsel_t kDtPinmuxOutselConstantOne = kTopEarlgreyPinmuxOutselConstantOne;
436
437/** Tie constantly to high-Z. */
438static const dt_pinmux_outsel_t kDtPinmuxOutselConstantHighZ = kTopEarlgreyPinmuxOutselConstantHighZ;
439
440/**
441 * Return the peripheral input for an MIO peripheral I/O.
442 *
443 * This is the index of the `MIO_PERIPH_INSEL` pinmux register that controls this peripheral I/O.
444 *
445 * @param periph_io A peripheral I/O of type `kDtPeriphIoTypeMio`.
446 * @return The peripheral input number of the MIO that this peripheral I/O is connected to.
447 *
448 * **Note:** This function only makes sense for peripheral I/Os of type `kDtPeriphIoTypeMio` which are
449 * inputs (`kDtPeriphIoDirIn`). For any other peripheral I/O, the return value is unspecified.
450 */
451static inline dt_pinmux_peripheral_in_t dt_periph_io_mio_periph_input(dt_periph_io_t periph_io) {
452 return (dt_pinmux_peripheral_in_t)periph_io.__internal.periph_input_or_direct_pad;
453}
454
455/**
456 * Return the outsel for an MIO peripheral I/O.
457 *
458 * This is the value to put in the `MIO_OUTSEL` pinmux registers to connect a pad to this peripheral I/O.
459 *
460 * @param periph_io A peripheral I/O of type `kDtPeriphIoTypeMio`.
461 * @return The outsel of the MIO that this peripheral I/O is connected to.
462 *
463 * **Note:** This function only makes sense for peripheral I/Os of type `kDtPeriphIoTypeMio` which are
464 * outputs (`kDtPeriphIoDirOut`). For any other peripheral I/O, the return value is unspecified.
465 */
466static inline dt_pinmux_outsel_t dt_periph_io_mio_outsel(dt_periph_io_t periph_io) {
467 return (dt_pinmux_outsel_t)periph_io.__internal.outsel_or_dt_pad;
468}
469
470/**
471 * Return the direct pad number of a DIO peripheral I/O.
472 *
473 * This is the index of the various `DIO_PAD_*` pinmux registers that control this peripheral I/O.
474 *
475 * @param periph_io A peripheral I/O of type `kDtPeriphIoTypeDio`.
476 * @return The direct pad number of the DIO that this peripheral I/O is connected to.
477 *
478 * **Note:** This function only makes sense for peripheral I/Os of type `kDtPeriphIoTypeDio` which are
479 * either outputs or inouts. For any other peripheral I/O type, the return value is unspecified.
480 */
481static inline dt_pinmux_direct_pad_t dt_periph_io_dio_pad_index(dt_periph_io_t periph_io) {
482 return (dt_pinmux_direct_pad_t)periph_io.__internal.periph_input_or_direct_pad;
483}
484
485/**
486 * Return the pad of a DIO peripheral I/O.
487 *
488 * @param periph_io A peripheral I/O of type `kDtPeriphIoTypeDio`.
489 * @return The pad to which this peripheral I/O is connected to.
490 *
491 * **Note:** This function only makes sense for peripheral I/Os of type `kDtPeriphIoTypeDio` which are
492 * either outputs or inouts. For any other peripheral I/O type, the return value is unspecified.
493 */
494static inline dt_pad_t dt_periph_io_dio_pad(dt_periph_io_t periph_io) {
495 return (dt_pad_t)periph_io.__internal.outsel_or_dt_pad;
496}
497
498/** Type of a pad. */
499typedef enum dt_pad_type {
500 /** This pad is a muxed IO (MIO). */
502 /** This pad is a direct IO (DIO). */
504 /** This pad is not an MIO or a DIO. */
507
508/**
509 * Return the type of a `dt_pad_t`.
510 *
511 * @param pad A pad description.
512 * @return The pad type (MIO, DIO, etc).
513 */
515
516/**
517 * Return the pad out number for an MIO pad.
518 *
519 * This is the index of the `MIO_OUT` registers that control this pad
520 * (or the output part of this pad).
521 *
522 * @param pad A pad of type `kDtPadTypeMio`.
523 * @return The pad out number of the MIO.
524 *
525 * **Note:** This function only makes sense for pads of type `kDtPadTypeMio` which are
526 * either inputs or inouts. For any other pad, the return value is unspecified.
527 */
528dt_pinmux_mio_out_t dt_pad_mio_out(dt_pad_t pad);
529
530/**
531 * Return the pad out number for an MIO pad.
532 *
533 * This is the index of the `MIO_PAD` registers that control this pad
534 * (or the output part of this pad).
535 *
536 * @param pad A pad of type `kDtPadTypeMio`.
537 * @return The pad out number of the MIO.
538 *
539 * **Note:** This function only makes sense for pads of type `kDtPadTypeMio`.
540 * For any other pad, the return value is unspecified.
541 */
542dt_pinmux_muxed_pad_t dt_pad_mio_pad_index(dt_pad_t pad);
543
544/**
545 * Return the insel for an MIO pad.
546 *
547 * This is the value to put in the `MIO_PERIPH_INSEL` registers to connect a peripheral I/O to this pad.
548 *
549 * @param pad A pad of type `kDtPadTypeMio`.
550 * @return The insel of the MIO that this pad is connected to.
551 *
552 * **Note:** This function only makes sense for pads of type `kDtPadTypeMio`.
553 * For any other pad, the return value is unspecified.
554 */
555dt_pinmux_insel_t dt_pad_mio_insel(dt_pad_t pad);
556
557/**
558 * Return the direct pad number of a DIO pad.
559 *
560 * This is the index of the various `DIO_PAD_*` registers that control this pad.
561 *
562 * @param pad A pad of type `kDtPadTypeDio`.
563 * @return The direct pad number of the DID that this pad is connected to.
564 *
565 * **Note:** This function only makes sense for pads of type `kDtPeriphIoTypeDio` which are
566 * either outputs or inouts. For any other pad type, the return value is unspecified.
567 */
568dt_pinmux_direct_pad_t dt_pad_dio_pad_index(dt_pad_t pad);
569
570#ifdef __cplusplus
571} // extern "C"
572#endif // __cplusplus
573
574#endif // OPENTITAN_TOP_EARLGREY_DT_API_H_