Software APIs
api.h
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1// Copyright lowRISC contributors (OpenTitan project).
2// Licensed under the Apache License, Version 2.0, see LICENSE for details.
3// SPDX-License-Identifier: Apache-2.0
4//
5// Device table API auto-generated by `dtgen`
6
7#ifndef OPENTITAN_TOP_EARLGREY_DT_API_H_
8#define OPENTITAN_TOP_EARLGREY_DT_API_H_
9
10#ifdef __cplusplus
11extern "C" {
12#endif // __cplusplus
13
14/**
15 * @file
16 * @brief Device Tables (DT) API for top earlgrey
17 *
18 * This file contains the type definitions and global functions of the DT.
19 *
20 * The DT models the chip as a collection of instances. Each instance has
21 * a type (the IP block) and a number of attributes such as I/Os, IRQs
22 * and so on. The DT also provides top-specific lists of global resources
23 * such as I/O pads, clocks and interrupts.
24 */
25
26#include <stddef.h>
27#include <stdint.h>
29
30/**
31 * List of device types.
32 *
33 * Device types are guaranteed to be numbered consecutively from 0.
34 */
35typedef enum dt_device_type {
36 kDtDeviceTypeUnknown = 0, /**< Instance of unknown type */
37 kDtDeviceTypeAdcCtrl = 1, /**< instance of adc_ctrl */
38 kDtDeviceTypeAes = 2, /**< instance of aes */
39 kDtDeviceTypeAlertHandler = 3, /**< instance of alert_handler */
40 kDtDeviceTypeAonTimer = 4, /**< instance of aon_timer */
41 kDtDeviceTypeAst = 5, /**< instance of ast */
42 kDtDeviceTypeCheriotMemSys = 6, /**< instance of cheriot_mem_sys */
43 kDtDeviceTypeClkmgr = 7, /**< instance of clkmgr */
44 kDtDeviceTypeCsrng = 8, /**< instance of csrng */
45 kDtDeviceTypeEdn = 9, /**< instance of edn */
46 kDtDeviceTypeEntropySrc = 10, /**< instance of entropy_src */
47 kDtDeviceTypeGpio = 11, /**< instance of gpio */
48 kDtDeviceTypeHmac = 12, /**< instance of hmac */
49 kDtDeviceTypeI2c = 13, /**< instance of i2c */
50 kDtDeviceTypeI3c = 14, /**< instance of i3c */
51 kDtDeviceTypeKeymgrDpe = 15, /**< instance of keymgr_dpe */
52 kDtDeviceTypeKmac = 16, /**< instance of kmac */
53 kDtDeviceTypeLcCtrl = 17, /**< instance of lc_ctrl */
54 kDtDeviceTypeOtbn = 18, /**< instance of otbn */
55 kDtDeviceTypeOtpCtrl = 19, /**< instance of otp_ctrl */
56 kDtDeviceTypePinmux = 20, /**< instance of pinmux */
57 kDtDeviceTypePwrmgr = 21, /**< instance of pwrmgr */
58 kDtDeviceTypeRomCtrl = 22, /**< instance of rom_ctrl */
59 kDtDeviceTypeRramCtrl = 23, /**< instance of rram_ctrl */
60 kDtDeviceTypeRramMacro = 24, /**< instance of rram_macro */
61 kDtDeviceTypeRstmgr = 25, /**< instance of rstmgr */
62 kDtDeviceTypeRvCoreIbex = 26, /**< instance of rv_core_ibex */
63 kDtDeviceTypeRvDm = 27, /**< instance of rv_dm */
64 kDtDeviceTypeRvPlic = 28, /**< instance of rv_plic */
65 kDtDeviceTypeRvTimer = 29, /**< instance of rv_timer */
66 kDtDeviceTypeSensorCtrl = 30, /**< instance of sensor_ctrl */
67 kDtDeviceTypeSpiDevice = 31, /**< instance of spi_device */
68 kDtDeviceTypeSpiHost = 32, /**< instance of spi_host */
69 kDtDeviceTypeSramCtrl = 33, /**< instance of sram_ctrl */
70 kDtDeviceTypeSysrstCtrl = 34, /**< instance of sysrst_ctrl */
71 kDtDeviceTypeUart = 35, /**< instance of uart */
72 kDtDeviceTypeUsbdev = 36, /**< instance of usbdev */
74
75enum {
76 kDtDeviceTypeCount = 37, /**< Number of instance types */
77};
78
79
80/**
81 * List of instance IDs.
82 *
83 * Instance IDs are guaranteed to be numbered consecutively from 0.
84 */
85typedef enum dt_instance_id {
86 kDtInstanceIdUnknown = 0, /**< Unknown instance */
87 kDtInstanceIdAdcCtrl = 1, /**< instance adc_ctrl of adc_ctrl */
88 kDtInstanceIdAes = 2, /**< instance aes of aes */
89 kDtInstanceIdAlertHandler = 3, /**< instance alert_handler of alert_handler */
90 kDtInstanceIdAonTimer = 4, /**< instance aon_timer of aon_timer */
91 kDtInstanceIdAst = 5, /**< instance ast of ast */
92 kDtInstanceIdCheriotMemSys = 6, /**< instance cheriot_mem_sys of cheriot_mem_sys */
93 kDtInstanceIdClkmgr = 7, /**< instance clkmgr of clkmgr */
94 kDtInstanceIdCsrng = 8, /**< instance csrng of csrng */
95 kDtInstanceIdEdn0 = 9, /**< instance edn0 of edn */
96 kDtInstanceIdEdn1 = 10, /**< instance edn1 of edn */
97 kDtInstanceIdEntropySrc = 11, /**< instance entropy_src of entropy_src */
98 kDtInstanceIdGpio = 12, /**< instance gpio of gpio */
99 kDtInstanceIdHmac = 13, /**< instance hmac of hmac */
100 kDtInstanceIdI2c0 = 14, /**< instance i2c0 of i2c */
101 kDtInstanceIdI2c1 = 15, /**< instance i2c1 of i2c */
102 kDtInstanceIdI2c2 = 16, /**< instance i2c2 of i2c */
103 kDtInstanceIdI3c0 = 17, /**< instance i3c0 of i3c */
104 kDtInstanceIdI3c1 = 18, /**< instance i3c1 of i3c */
105 kDtInstanceIdKeymgrDpe = 19, /**< instance keymgr_dpe of keymgr_dpe */
106 kDtInstanceIdKmac = 20, /**< instance kmac of kmac */
107 kDtInstanceIdLcCtrl = 21, /**< instance lc_ctrl of lc_ctrl */
108 kDtInstanceIdOtbn = 22, /**< instance otbn of otbn */
109 kDtInstanceIdOtpCtrl = 23, /**< instance otp_ctrl of otp_ctrl */
110 kDtInstanceIdPinmux = 24, /**< instance pinmux of pinmux */
111 kDtInstanceIdPwrmgr = 25, /**< instance pwrmgr of pwrmgr */
112 kDtInstanceIdRomCtrl = 26, /**< instance rom_ctrl of rom_ctrl */
113 kDtInstanceIdRramCtrl = 27, /**< instance rram_ctrl of rram_ctrl */
114 kDtInstanceIdRramMacro = 28, /**< instance rram_macro of rram_macro */
115 kDtInstanceIdRstmgr = 29, /**< instance rstmgr of rstmgr */
116 kDtInstanceIdRvCoreIbex = 30, /**< instance rv_core_ibex of rv_core_ibex */
117 kDtInstanceIdRvDm = 31, /**< instance rv_dm of rv_dm */
118 kDtInstanceIdRvPlic = 32, /**< instance rv_plic of rv_plic */
119 kDtInstanceIdRvTimer = 33, /**< instance rv_timer of rv_timer */
120 kDtInstanceIdSensorCtrl = 34, /**< instance sensor_ctrl of sensor_ctrl */
121 kDtInstanceIdSpiDevice = 35, /**< instance spi_device of spi_device */
122 kDtInstanceIdSpiHost0 = 36, /**< instance spi_host0 of spi_host */
123 kDtInstanceIdSpiHost1 = 37, /**< instance spi_host1 of spi_host */
124 kDtInstanceIdSramCtrlRet = 38, /**< instance sram_ctrl_ret of sram_ctrl */
125 kDtInstanceIdSramCtrlMain = 39, /**< instance sram_ctrl_main of sram_ctrl */
126 kDtInstanceIdSramCtrlSec = 40, /**< instance sram_ctrl_sec of sram_ctrl */
127 kDtInstanceIdSramCtrlMeta = 41, /**< instance sram_ctrl_meta of sram_ctrl */
128 kDtInstanceIdSysrstCtrl = 42, /**< instance sysrst_ctrl of sysrst_ctrl */
129 kDtInstanceIdUart0 = 43, /**< instance uart0 of uart */
130 kDtInstanceIdUart1 = 44, /**< instance uart1 of uart */
131 kDtInstanceIdUart2 = 45, /**< instance uart2 of uart */
132 kDtInstanceIdUart3 = 46, /**< instance uart3 of uart */
133 kDtInstanceIdUsbdev = 47, /**< instance usbdev of usbdev */
135
136enum {
137 kDtInstanceIdCount = 48, /**< Number of instance IDs */
138};
139
140
141/**
142 * Get the instance type of a device instance.
143 *
144 * For example the instance type of `kDtUart0` is `kDtInstanceTypeUart`.
145 *
146 * @param id An instance ID.
147 * @return The instance type, or `kDtInstanceIdUnknown` if the ID is not valid.
148 */
150
151/** PLIC IRQ ID type.
152 *
153 * This type represents a raw IRQ ID from the PLIC.
154 *
155 * This is an alias to the top's `plic_irq_id_t` type for backward compatibility
156 * with existing code.
157 */
159
160/** PLIC IRQ ID for no interrupt. */
161static const dt_plic_irq_id_t kDtPlicIrqIdNone = kTopEarlgreyPlicIrqIdNone;
162
163/**
164 * Get the instance ID for a given PLIC IRQ ID.
165 *
166 * For example, on earlgrey, the instance ID of `kTopEarlgreyPlicIrqIdUart0TxWatermark`
167 * is `kDtInstanceIdUart0`. One can then use the type specific function to retrieve the
168 * IRQ name, for example `dt_uart_irq_from_plic_id` for the UART.
169 *
170 * @param irq A PLIC ID.
171 * @return The instance ID, or `kDtInstanceIdUnknown` if the PLIC ID is not valid.
172 */
174
175/**
176 * Alert ID type.
177 *
178 * This type represents a raw alert ID from the Alert Handler.
179 *
180 * This is an alias to the top's `alert_id_t` type for backward compatibility
181 * with existing code.
182 */
184
185/** Number of alerts. */
186enum {
187 /** Total number of alert IDs. */
188 kDtAlertCount = kTopEarlgreyAlertIdLast + 1,
189};
190
191/**
192 * Get the instance ID for a given alert ID.
193 *
194 * For example, on earlgrey, the instance ID of `kTopEarlgreyAlertIdUart0FatalFault` is
195 * `kDtInstanceIdUart0`. One can then use the type specific function to retrieve the
196 * alert name, for example `dt_uart_alert_from_alert_id` for the UART.
197 *
198 * @param alert An alert ID.
199 * @return The instance ID, or `kDtInstanceIdUnknown` if the alert ID is not valid.
200 */
202
203/**
204 * List of clocks.
205 *
206 * Clocks are guaranteed to be numbered consecutively from 0.
207 */
208typedef enum dt_clock {
209 kDtClockMain = 0, /**< clock main */
210 kDtClockIo = 1, /**< clock io */
211 kDtClockUsb = 2, /**< clock usb */
212 kDtClockAon = 3, /**< clock aon */
213 kDtClockIoDiv2 = 4, /**< clock io_div2 */
214 kDtClockIoDiv4 = 5, /**< clock io_div4 */
215 kDtClockAstExt = 6, /**< */
217
218enum {
219 kDtClockCount = 7, /**< Number of clocks */
220};
221
222
223/**
224 * Get the frequency of a clock.
225 *
226 * @param clk A clock ID.
227 * @return Clock frequency in Hz.
228 */
230
231/**
232 * List of resets.
233 *
234 * Resets are guaranteed to be numbered consecutively from 0.
235 */
236typedef enum dt_reset {
237 kDtResetUnknown = 0, /**< Unknown reset */
238 kDtResetPorAon = 1, /**< Reset node por_aon */
239 kDtResetLcSrc = 2, /**< Reset node lc_src */
240 kDtResetSysSrc = 3, /**< Reset node sys_src */
241 kDtResetPor = 4, /**< Reset node por */
242 kDtResetPorIo = 5, /**< Reset node por_io */
243 kDtResetPorIoDiv2 = 6, /**< Reset node por_io_div2 */
244 kDtResetPorIoDiv4 = 7, /**< Reset node por_io_div4 */
245 kDtResetPorUsb = 8, /**< Reset node por_usb */
246 kDtResetLc = 9, /**< Reset node lc */
247 kDtResetLcAon = 10, /**< Reset node lc_aon */
248 kDtResetLcIo = 11, /**< Reset node lc_io */
249 kDtResetLcIoDiv2 = 12, /**< Reset node lc_io_div2 */
250 kDtResetLcIoDiv4 = 13, /**< Reset node lc_io_div4 */
251 kDtResetLcUsb = 14, /**< Reset node lc_usb */
252 kDtResetSys = 15, /**< Reset node sys */
253 kDtResetSysIoDiv4 = 16, /**< Reset node sys_io_div4 */
254 kDtResetSpiDevice = 17, /**< Reset node spi_device */
255 kDtResetSpiHost0 = 18, /**< Reset node spi_host0 */
256 kDtResetSpiHost1 = 19, /**< Reset node spi_host1 */
257 kDtResetUsb = 20, /**< Reset node usb */
258 kDtResetUsbAon = 21, /**< Reset node usb_aon */
259 kDtResetI2c0 = 22, /**< Reset node i2c0 */
260 kDtResetI2c1 = 23, /**< Reset node i2c1 */
261 kDtResetI2c2 = 24, /**< Reset node i2c2 */
262 kDtResetI3c0 = 25, /**< Reset node i3c0 */
263 kDtResetI3c1 = 26, /**< Reset node i3c1 */
265
266enum {
267 kDtResetCount = 27, /**< Number of resets */
268};
269
270
271/**
272 * List of pads names.
273 */
274typedef enum dt_pad {
275 kDtPadConstantZero = 0, /**< Pad that is constantly tied to zero (input) */
276 kDtPadConstantOne = 1, /**< Pad that is constantly tied to one (input) */
277 kDtPadIoa0 = 2, /**< Muxed IO pad */
278 kDtPadIoa1 = 3, /**< Muxed IO pad */
279 kDtPadIoa2 = 4, /**< Muxed IO pad */
280 kDtPadIoa3 = 5, /**< Muxed IO pad */
281 kDtPadIoa4 = 6, /**< Muxed IO pad */
282 kDtPadIoa5 = 7, /**< Muxed IO pad */
283 kDtPadIoa6 = 8, /**< Muxed IO pad */
284 kDtPadIoa7 = 9, /**< Muxed IO pad */
285 kDtPadIoa8 = 10, /**< Muxed IO pad */
286 kDtPadIob0 = 11, /**< Muxed IO pad */
287 kDtPadIob1 = 12, /**< Muxed IO pad */
288 kDtPadIob2 = 13, /**< Muxed IO pad */
289 kDtPadIob3 = 14, /**< Muxed IO pad */
290 kDtPadIob4 = 15, /**< Muxed IO pad */
291 kDtPadIob5 = 16, /**< Muxed IO pad */
292 kDtPadIob6 = 17, /**< Muxed IO pad */
293 kDtPadIob7 = 18, /**< Muxed IO pad */
294 kDtPadIob8 = 19, /**< Muxed IO pad */
295 kDtPadIob9 = 20, /**< Muxed IO pad */
296 kDtPadIob10 = 21, /**< Muxed IO pad */
297 kDtPadIob11 = 22, /**< Muxed IO pad */
298 kDtPadIob12 = 23, /**< Muxed IO pad */
299 kDtPadIoc0 = 24, /**< Muxed IO pad */
300 kDtPadIoc1 = 25, /**< Muxed IO pad */
301 kDtPadIoc2 = 26, /**< Muxed IO pad */
302 kDtPadIoc3 = 27, /**< Muxed IO pad */
303 kDtPadIoc4 = 28, /**< Muxed IO pad */
304 kDtPadIoc5 = 29, /**< Muxed IO pad */
305 kDtPadIoc6 = 30, /**< Muxed IO pad */
306 kDtPadIoc7 = 31, /**< Muxed IO pad */
307 kDtPadIoc8 = 32, /**< Muxed IO pad */
308 kDtPadIoc9 = 33, /**< Muxed IO pad */
309 kDtPadIoc10 = 34, /**< Muxed IO pad */
310 kDtPadIoc11 = 35, /**< Muxed IO pad */
311 kDtPadIoc12 = 36, /**< Muxed IO pad */
312 kDtPadIor0 = 37, /**< Muxed IO pad */
313 kDtPadIor1 = 38, /**< Muxed IO pad */
314 kDtPadIor2 = 39, /**< Muxed IO pad */
315 kDtPadIor3 = 40, /**< Muxed IO pad */
316 kDtPadIor4 = 41, /**< Muxed IO pad */
317 kDtPadIor5 = 42, /**< Muxed IO pad */
318 kDtPadIor6 = 43, /**< Muxed IO pad */
319 kDtPadIor7 = 44, /**< Muxed IO pad */
320 kDtPadIor10 = 45, /**< Muxed IO pad */
321 kDtPadIor11 = 46, /**< Muxed IO pad */
322 kDtPadIor12 = 47, /**< Muxed IO pad */
323 kDtPadIor13 = 48, /**< Muxed IO pad */
324 kDtPadUsbdevUsbDp = 49, /**< */
325 kDtPadUsbdevUsbDn = 50, /**< */
326 kDtPadSpiHost0Sd0 = 51, /**< SPI host data */
327 kDtPadSpiHost0Sd1 = 52, /**< SPI host data */
328 kDtPadSpiHost0Sd2 = 53, /**< SPI host data */
329 kDtPadSpiHost0Sd3 = 54, /**< SPI host data */
330 kDtPadSpiDeviceSd0 = 55, /**< SPI device data */
331 kDtPadSpiDeviceSd1 = 56, /**< SPI device data */
332 kDtPadSpiDeviceSd2 = 57, /**< SPI device data */
333 kDtPadSpiDeviceSd3 = 58, /**< SPI device data */
334 kDtPadSysrstCtrlEcRstL = 59, /**< Dedicated sysrst_ctrl output (ec_rst_l) */
335 kDtPadSysrstCtrlFlashWpL = 60, /**< Dedicated sysrst_ctrl output (flash_wp_l)) */
336 kDtPadSpiDeviceSck = 61, /**< SPI device clock */
337 kDtPadSpiDeviceCsb = 62, /**< SPI device chip select */
338 kDtPadSpiHost0Sck = 63, /**< SPI host clock */
339 kDtPadSpiHost0Csb = 64, /**< SPI host chip select */
341
342enum {
343 kDtPadCount = 65, /**< Number of pads */
344};
345
346
347/** Type of peripheral I/O. */
348typedef enum dt_periph_io_type {
349 /** This peripheral I/O is connected to a muxed IO (MIO). */
351 /** This peripheral I/O is connected to a direct IO (DIO). */
353 /** This peripheral I/O is not connected to either a MIO or a DIO. */
356
357
358/** Direction of a peripheral I/O. */
359typedef enum dt_periph_io_dir {
360 /** This peripheral I/O is an input. */
362 /** This peripheral I/O is an output */
364 /** This peripheral I/O is an input-output */
367
368/** Peripheral I/O description.
369 *
370 * A `dt_periph_io_t` represents a HW IP block peripheral I/O, which can be an input, output or both.
371 * Importantly, this only represents how the block peripheral I/O is wired, i.e.
372 * whether it is connected a MIO or a direct IO on the pinmux, and the relevant information necessary to
373 * configure it.
374 *
375 * **Note:** The fields of this structure are internal, use the dt_periph_io_* functions to access them.
376 */
377typedef struct dt_periph_io {
378 struct {
379 dt_periph_io_type_t type; /**< Peripheral I/O type */
380 dt_periph_io_dir_t dir; /**< Peripheral I/O direction */
381 /**
382 * For `kDtPeriphIoTypeMio`: peripheral input number. This is the index of the MIO_PERIPH_INSEL register
383 * that controls this peripheral I/O.
384 *
385 * For `kDtPeriphIoTypeDio`: DIO pad number. This is the index of the various DIO_PAD_* registers
386 * that control this peripheral I/O.
387 */
388 uint16_t periph_input_or_direct_pad;
389 /**
390 * For `kDtPeriphIoTypeMio`: peripheral output number. This is the value to put in the MIO_OUTSEL registers
391 * to connect an output to this peripheral I/O. For `kDtPeriphIoTypeDio`: the pad index (`dt_pad_t`) to which this I/O is connected.
392 */
393 uint16_t outsel_or_dt_pad;
394 } __internal; /**< Private fields */
396
397
398/* Peripheral I/O that is constantly tied to high-Z (output only) */
399extern const dt_periph_io_t kDtPeriphIoConstantHighZ;
400
401/* Peripheral I/O that is constantly tied to one (output only) */
402extern const dt_periph_io_t kDtPeriphIoConstantZero;
403
404/* Peripheral I/O that is constantly tied to zero (output only) */
405extern const dt_periph_io_t kDtPeriphIoConstantOne;
406
407/**
408 * Return the type of a `dt_periph_io_t`.
409 *
410 * @param periph_io A peripheral I/O description.
411 * @return The peripheral I/O type (MIO, DIO, etc).
412 */
414 return periph_io.__internal.type;
415}
416
417/**
418 * Return the direction of a `dt_periph_io_t`.
419 *
420 * @param periph_io A peripheral I/O description.
421 * @return The peripheral I/O direction.
422 */
423static inline dt_periph_io_dir_t dt_periph_io_dir(dt_periph_io_t periph_io) {
424 return periph_io.__internal.dir;
425}
426
427/**
428 * Pinmux types.
429 *
430 * These types are aliases to top-level types for backward compatibility
431 * with existing code.
432 */
434typedef top_earlgrey_pinmux_insel_t dt_pinmux_insel_t;
435typedef top_earlgrey_pinmux_outsel_t dt_pinmux_outsel_t;
436typedef top_earlgrey_pinmux_mio_out_t dt_pinmux_mio_out_t;
437typedef top_earlgrey_direct_pads_t dt_pinmux_direct_pad_t;
438typedef top_earlgrey_muxed_pads_t dt_pinmux_muxed_pad_t;
439
440/** Tie constantly to zero. */
441static const dt_pinmux_outsel_t kDtPinmuxOutselConstantZero = kTopEarlgreyPinmuxOutselConstantZero;
442
443/** Tie constantly to one. */
444static const dt_pinmux_outsel_t kDtPinmuxOutselConstantOne = kTopEarlgreyPinmuxOutselConstantOne;
445
446/** Tie constantly to high-Z. */
447static const dt_pinmux_outsel_t kDtPinmuxOutselConstantHighZ = kTopEarlgreyPinmuxOutselConstantHighZ;
448
449/**
450 * Return the peripheral input for an MIO peripheral I/O.
451 *
452 * This is the index of the `MIO_PERIPH_INSEL` pinmux register that controls this peripheral I/O.
453 *
454 * @param periph_io A peripheral I/O of type `kDtPeriphIoTypeMio`.
455 * @return The peripheral input number of the MIO that this peripheral I/O is connected to.
456 *
457 * **Note:** This function only makes sense for peripheral I/Os of type `kDtPeriphIoTypeMio` which are
458 * inputs (`kDtPeriphIoDirIn`). For any other peripheral I/O, the return value is unspecified.
459 */
460static inline dt_pinmux_peripheral_in_t dt_periph_io_mio_periph_input(dt_periph_io_t periph_io) {
461 return (dt_pinmux_peripheral_in_t)periph_io.__internal.periph_input_or_direct_pad;
462}
463
464/**
465 * Return the outsel for an MIO peripheral I/O.
466 *
467 * This is the value to put in the `MIO_OUTSEL` pinmux registers to connect a pad to this peripheral I/O.
468 *
469 * @param periph_io A peripheral I/O of type `kDtPeriphIoTypeMio`.
470 * @return The outsel of the MIO that this peripheral I/O is connected to.
471 *
472 * **Note:** This function only makes sense for peripheral I/Os of type `kDtPeriphIoTypeMio` which are
473 * outputs (`kDtPeriphIoDirOut`). For any other peripheral I/O, the return value is unspecified.
474 */
475static inline dt_pinmux_outsel_t dt_periph_io_mio_outsel(dt_periph_io_t periph_io) {
476 return (dt_pinmux_outsel_t)periph_io.__internal.outsel_or_dt_pad;
477}
478
479/**
480 * Return the direct pad number of a DIO peripheral I/O.
481 *
482 * This is the index of the various `DIO_PAD_*` pinmux registers that control this peripheral I/O.
483 *
484 * @param periph_io A peripheral I/O of type `kDtPeriphIoTypeDio`.
485 * @return The direct pad number of the DIO that this peripheral I/O is connected to.
486 *
487 * **Note:** This function only makes sense for peripheral I/Os of type `kDtPeriphIoTypeDio` which are
488 * either outputs or inouts. For any other peripheral I/O type, the return value is unspecified.
489 */
490static inline dt_pinmux_direct_pad_t dt_periph_io_dio_pad_index(dt_periph_io_t periph_io) {
491 return (dt_pinmux_direct_pad_t)periph_io.__internal.periph_input_or_direct_pad;
492}
493
494/**
495 * Return the pad of a DIO peripheral I/O.
496 *
497 * @param periph_io A peripheral I/O of type `kDtPeriphIoTypeDio`.
498 * @return The pad to which this peripheral I/O is connected to.
499 *
500 * **Note:** This function only makes sense for peripheral I/Os of type `kDtPeriphIoTypeDio` which are
501 * either outputs or inouts. For any other peripheral I/O type, the return value is unspecified.
502 */
503static inline dt_pad_t dt_periph_io_dio_pad(dt_periph_io_t periph_io) {
504 return (dt_pad_t)periph_io.__internal.outsel_or_dt_pad;
505}
506
507/** Type of a pad. */
508typedef enum dt_pad_type {
509 /** This pad is a muxed IO (MIO). */
511 /** This pad is a direct IO (DIO). */
513 /** This pad is not an MIO or a DIO. */
516
517/**
518 * Return the type of a `dt_pad_t`.
519 *
520 * @param pad A pad description.
521 * @return The pad type (MIO, DIO, etc).
522 */
524
525/**
526 * Return the pad out number for an MIO pad.
527 *
528 * This is the index of the `MIO_OUT` registers that control this pad
529 * (or the output part of this pad).
530 *
531 * @param pad A pad of type `kDtPadTypeMio`.
532 * @return The pad out number of the MIO.
533 *
534 * **Note:** This function only makes sense for pads of type `kDtPadTypeMio` which are
535 * either inputs or inouts. For any other pad, the return value is unspecified.
536 */
537dt_pinmux_mio_out_t dt_pad_mio_out(dt_pad_t pad);
538
539/**
540 * Return the pad out number for an MIO pad.
541 *
542 * This is the index of the `MIO_PAD` registers that control this pad
543 * (or the output part of this pad).
544 *
545 * @param pad A pad of type `kDtPadTypeMio`.
546 * @return The pad out number of the MIO.
547 *
548 * **Note:** This function only makes sense for pads of type `kDtPadTypeMio`.
549 * For any other pad, the return value is unspecified.
550 */
551dt_pinmux_muxed_pad_t dt_pad_mio_pad_index(dt_pad_t pad);
552
553/**
554 * Return the insel for an MIO pad.
555 *
556 * This is the value to put in the `MIO_PERIPH_INSEL` registers to connect a peripheral I/O to this pad.
557 *
558 * @param pad A pad of type `kDtPadTypeMio`.
559 * @return The insel of the MIO that this pad is connected to.
560 *
561 * **Note:** This function only makes sense for pads of type `kDtPadTypeMio`.
562 * For any other pad, the return value is unspecified.
563 */
564dt_pinmux_insel_t dt_pad_mio_insel(dt_pad_t pad);
565
566/**
567 * Return the direct pad number of a DIO pad.
568 *
569 * This is the index of the various `DIO_PAD_*` registers that control this pad.
570 *
571 * @param pad A pad of type `kDtPadTypeDio`.
572 * @return The direct pad number of the DID that this pad is connected to.
573 *
574 * **Note:** This function only makes sense for pads of type `kDtPeriphIoTypeDio` which are
575 * either outputs or inouts. For any other pad type, the return value is unspecified.
576 */
577dt_pinmux_direct_pad_t dt_pad_dio_pad_index(dt_pad_t pad);
578
579#ifdef __cplusplus
580} // extern "C"
581#endif // __cplusplus
582
583#endif // OPENTITAN_TOP_EARLGREY_DT_API_H_