Software APIs
api.h
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1// Copyright lowRISC contributors (OpenTitan project).
2// Licensed under the Apache License, Version 2.0, see LICENSE for details.
3// SPDX-License-Identifier: Apache-2.0
4//
5// Device table API auto-generated by `dtgen`
6
7#ifndef OPENTITAN_TOP_EARLGREY_DT_API_H_
8#define OPENTITAN_TOP_EARLGREY_DT_API_H_
9
10#ifdef __cplusplus
11extern "C" {
12#endif // __cplusplus
13
14/**
15 * @file
16 * @brief Device Tables (DT) API for top earlgrey
17 *
18 * This file contains the type definitions and global functions of the DT.
19 *
20 * The DT models the chip as a collection of instances. Each instance has
21 * a type (the IP block) and a number of attributes such as I/Os, IRQs
22 * and so on. The DT also provides top-specific lists of global resources
23 * such as I/O pads, clocks and interrupts.
24 */
25
26#include <stddef.h>
27#include <stdint.h>
29
30/**
31 * List of device types.
32 *
33 * Device types are guaranteed to be numbered consecutively from 0.
34 */
35typedef enum dt_device_type {
36 kDtDeviceTypeUnknown = 0, /**< Instance of unknown type */
37 kDtDeviceTypeAdcCtrl = 1, /**< instance of adc_ctrl */
38 kDtDeviceTypeAes = 2, /**< instance of aes */
39 kDtDeviceTypeAlertHandler = 3, /**< instance of alert_handler */
40 kDtDeviceTypeAonTimer = 4, /**< instance of aon_timer */
41 kDtDeviceTypeAst = 5, /**< instance of ast */
42 kDtDeviceTypeCheriotMemSys = 6, /**< instance of cheriot_mem_sys */
43 kDtDeviceTypeClkmgr = 7, /**< instance of clkmgr */
44 kDtDeviceTypeCsrng = 8, /**< instance of csrng */
45 kDtDeviceTypeEdn = 9, /**< instance of edn */
46 kDtDeviceTypeEntropySrc = 10, /**< instance of entropy_src */
47 kDtDeviceTypeGpio = 11, /**< instance of gpio */
48 kDtDeviceTypeHmac = 12, /**< instance of hmac */
49 kDtDeviceTypeI2c = 13, /**< instance of i2c */
50 kDtDeviceTypeI3c = 14, /**< instance of i3c */
51 kDtDeviceTypeKeymgrDpe = 15, /**< instance of keymgr_dpe */
52 kDtDeviceTypeKmac = 16, /**< instance of kmac */
53 kDtDeviceTypeLcCtrl = 17, /**< instance of lc_ctrl */
54 kDtDeviceTypeOtbn = 18, /**< instance of otbn */
55 kDtDeviceTypeOtpCtrl = 19, /**< instance of otp_ctrl */
56 kDtDeviceTypePinmux = 20, /**< instance of pinmux */
57 kDtDeviceTypePwrmgr = 21, /**< instance of pwrmgr */
58 kDtDeviceTypeRomCtrl = 22, /**< instance of rom_ctrl */
59 kDtDeviceTypeRramCtrl = 23, /**< instance of rram_ctrl */
60 kDtDeviceTypeRramMacro = 24, /**< instance of rram_macro */
61 kDtDeviceTypeRstmgr = 25, /**< instance of rstmgr */
62 kDtDeviceTypeRvCoreIbex = 26, /**< instance of rv_core_ibex */
63 kDtDeviceTypeRvDm = 27, /**< instance of rv_dm */
64 kDtDeviceTypeRvPlic = 28, /**< instance of rv_plic */
65 kDtDeviceTypeRvTimer = 29, /**< instance of rv_timer */
66 kDtDeviceTypeSensorCtrl = 30, /**< instance of sensor_ctrl */
67 kDtDeviceTypeSpiDevice = 31, /**< instance of spi_device */
68 kDtDeviceTypeSpiHost = 32, /**< instance of spi_host */
69 kDtDeviceTypeSramCtrl = 33, /**< instance of sram_ctrl */
70 kDtDeviceTypeSysrstCtrl = 34, /**< instance of sysrst_ctrl */
71 kDtDeviceTypeUart = 35, /**< instance of uart */
72 kDtDeviceTypeUsbdev = 36, /**< instance of usbdev */
74
75enum {
76 kDtDeviceTypeCount = 37, /**< Number of instance types */
77};
78
79
80/**
81 * List of instance IDs.
82 *
83 * Instance IDs are guaranteed to be numbered consecutively from 0.
84 */
85typedef enum dt_instance_id {
86 kDtInstanceIdUnknown = 0, /**< Unknown instance */
87 kDtInstanceIdAdcCtrl = 1, /**< instance adc_ctrl of adc_ctrl */
88 kDtInstanceIdAes = 2, /**< instance aes of aes */
89 kDtInstanceIdAlertHandler = 3, /**< instance alert_handler of alert_handler */
90 kDtInstanceIdAonTimer = 4, /**< instance aon_timer of aon_timer */
91 kDtInstanceIdAst = 5, /**< instance ast of ast */
92 kDtInstanceIdCheriotMemSys = 6, /**< instance cheriot_mem_sys of cheriot_mem_sys */
93 kDtInstanceIdClkmgr = 7, /**< instance clkmgr of clkmgr */
94 kDtInstanceIdCsrng = 8, /**< instance csrng of csrng */
95 kDtInstanceIdEdn0 = 9, /**< instance edn0 of edn */
96 kDtInstanceIdEdn1 = 10, /**< instance edn1 of edn */
97 kDtInstanceIdEntropySrc = 11, /**< instance entropy_src of entropy_src */
98 kDtInstanceIdGpio0 = 12, /**< instance gpio0 of gpio */
99 kDtInstanceIdGpio1 = 13, /**< instance gpio1 of gpio */
100 kDtInstanceIdHmac = 14, /**< instance hmac of hmac */
101 kDtInstanceIdI2c0 = 15, /**< instance i2c0 of i2c */
102 kDtInstanceIdI2c1 = 16, /**< instance i2c1 of i2c */
103 kDtInstanceIdI2c2 = 17, /**< instance i2c2 of i2c */
104 kDtInstanceIdI3c0 = 18, /**< instance i3c0 of i3c */
105 kDtInstanceIdI3c1 = 19, /**< instance i3c1 of i3c */
106 kDtInstanceIdKeymgrDpe = 20, /**< instance keymgr_dpe of keymgr_dpe */
107 kDtInstanceIdKmac = 21, /**< instance kmac of kmac */
108 kDtInstanceIdLcCtrl = 22, /**< instance lc_ctrl of lc_ctrl */
109 kDtInstanceIdOtbn = 23, /**< instance otbn of otbn */
110 kDtInstanceIdOtpCtrl = 24, /**< instance otp_ctrl of otp_ctrl */
111 kDtInstanceIdPinmux = 25, /**< instance pinmux of pinmux */
112 kDtInstanceIdPwrmgr = 26, /**< instance pwrmgr of pwrmgr */
113 kDtInstanceIdRomCtrl = 27, /**< instance rom_ctrl of rom_ctrl */
114 kDtInstanceIdRramCtrl = 28, /**< instance rram_ctrl of rram_ctrl */
115 kDtInstanceIdRramMacro = 29, /**< instance rram_macro of rram_macro */
116 kDtInstanceIdRstmgr = 30, /**< instance rstmgr of rstmgr */
117 kDtInstanceIdRvCoreIbex = 31, /**< instance rv_core_ibex of rv_core_ibex */
118 kDtInstanceIdRvDm = 32, /**< instance rv_dm of rv_dm */
119 kDtInstanceIdRvPlic = 33, /**< instance rv_plic of rv_plic */
120 kDtInstanceIdRvTimer = 34, /**< instance rv_timer of rv_timer */
121 kDtInstanceIdSensorCtrl = 35, /**< instance sensor_ctrl of sensor_ctrl */
122 kDtInstanceIdSpiDevice = 36, /**< instance spi_device of spi_device */
123 kDtInstanceIdSpiHost0 = 37, /**< instance spi_host0 of spi_host */
124 kDtInstanceIdSpiHost1 = 38, /**< instance spi_host1 of spi_host */
125 kDtInstanceIdSramCtrlRet = 39, /**< instance sram_ctrl_ret of sram_ctrl */
126 kDtInstanceIdSramCtrlMain = 40, /**< instance sram_ctrl_main of sram_ctrl */
127 kDtInstanceIdSramCtrlSec = 41, /**< instance sram_ctrl_sec of sram_ctrl */
128 kDtInstanceIdSramCtrlMeta = 42, /**< instance sram_ctrl_meta of sram_ctrl */
129 kDtInstanceIdSysrstCtrl = 43, /**< instance sysrst_ctrl of sysrst_ctrl */
130 kDtInstanceIdUart0 = 44, /**< instance uart0 of uart */
131 kDtInstanceIdUart1 = 45, /**< instance uart1 of uart */
132 kDtInstanceIdUart2 = 46, /**< instance uart2 of uart */
133 kDtInstanceIdUart3 = 47, /**< instance uart3 of uart */
134 kDtInstanceIdUsbdev = 48, /**< instance usbdev of usbdev */
136
137enum {
138 kDtInstanceIdCount = 49, /**< Number of instance IDs */
139};
140
141
142/**
143 * Get the instance type of a device instance.
144 *
145 * For example the instance type of `kDtUart0` is `kDtInstanceTypeUart`.
146 *
147 * @param id An instance ID.
148 * @return The instance type, or `kDtInstanceIdUnknown` if the ID is not valid.
149 */
151
152/** PLIC IRQ ID type.
153 *
154 * This type represents a raw IRQ ID from the PLIC.
155 *
156 * This is an alias to the top's `plic_irq_id_t` type for backward compatibility
157 * with existing code.
158 */
160
161/** PLIC IRQ ID for no interrupt. */
162static const dt_plic_irq_id_t kDtPlicIrqIdNone = kTopEarlgreyPlicIrqIdNone;
163
164/**
165 * Get the instance ID for a given PLIC IRQ ID.
166 *
167 * For example, on earlgrey, the instance ID of `kTopEarlgreyPlicIrqIdUart0TxWatermark`
168 * is `kDtInstanceIdUart0`. One can then use the type specific function to retrieve the
169 * IRQ name, for example `dt_uart_irq_from_plic_id` for the UART.
170 *
171 * @param irq A PLIC ID.
172 * @return The instance ID, or `kDtInstanceIdUnknown` if the PLIC ID is not valid.
173 */
175
176/**
177 * Alert ID type.
178 *
179 * This type represents a raw alert ID from the Alert Handler.
180 *
181 * This is an alias to the top's `alert_id_t` type for backward compatibility
182 * with existing code.
183 */
185
186/** Number of alerts. */
187enum {
188 /** Total number of alert IDs. */
189 kDtAlertCount = kTopEarlgreyAlertIdLast + 1,
190};
191
192/**
193 * Get the instance ID for a given alert ID.
194 *
195 * For example, on earlgrey, the instance ID of `kTopEarlgreyAlertIdUart0FatalFault` is
196 * `kDtInstanceIdUart0`. One can then use the type specific function to retrieve the
197 * alert name, for example `dt_uart_alert_from_alert_id` for the UART.
198 *
199 * @param alert An alert ID.
200 * @return The instance ID, or `kDtInstanceIdUnknown` if the alert ID is not valid.
201 */
203
204/**
205 * List of clocks.
206 *
207 * Clocks are guaranteed to be numbered consecutively from 0.
208 */
209typedef enum dt_clock {
210 kDtClockMain = 0, /**< clock main */
211 kDtClockIo = 1, /**< clock io */
212 kDtClockUsb = 2, /**< clock usb */
213 kDtClockAon = 3, /**< clock aon */
214 kDtClockIoDiv4 = 4, /**< clock io_div4 */
215 kDtClockAstExt = 5, /**< */
217
218enum {
219 kDtClockCount = 6, /**< Number of clocks */
220};
221
222
223/**
224 * Get the frequency of a clock.
225 *
226 * @param clk A clock ID.
227 * @return Clock frequency in Hz.
228 */
230
231/**
232 * List of resets.
233 *
234 * Resets are guaranteed to be numbered consecutively from 0.
235 */
236typedef enum dt_reset {
237 kDtResetUnknown = 0, /**< Unknown reset */
238 kDtResetPorAon = 1, /**< Reset node por_aon */
239 kDtResetLcSrc = 2, /**< Reset node lc_src */
240 kDtResetSysSrc = 3, /**< Reset node sys_src */
241 kDtResetPor = 4, /**< Reset node por */
242 kDtResetPorIo = 5, /**< Reset node por_io */
243 kDtResetPorIoDiv4 = 6, /**< Reset node por_io_div4 */
244 kDtResetPorUsb = 7, /**< Reset node por_usb */
245 kDtResetLc = 8, /**< Reset node lc */
246 kDtResetLcAon = 9, /**< Reset node lc_aon */
247 kDtResetLcIo = 10, /**< Reset node lc_io */
248 kDtResetLcIoDiv4 = 11, /**< Reset node lc_io_div4 */
249 kDtResetLcUsb = 12, /**< Reset node lc_usb */
250 kDtResetSys = 13, /**< Reset node sys */
251 kDtResetSysIoDiv4 = 14, /**< Reset node sys_io_div4 */
252 kDtResetSpiDevice = 15, /**< Reset node spi_device */
253 kDtResetSpiHost0 = 16, /**< Reset node spi_host0 */
254 kDtResetSpiHost1 = 17, /**< Reset node spi_host1 */
255 kDtResetUsb = 18, /**< Reset node usb */
256 kDtResetUsbAon = 19, /**< Reset node usb_aon */
257 kDtResetI2c0 = 20, /**< Reset node i2c0 */
258 kDtResetI2c1 = 21, /**< Reset node i2c1 */
259 kDtResetI2c2 = 22, /**< Reset node i2c2 */
260 kDtResetI3c0 = 23, /**< Reset node i3c0 */
261 kDtResetI3c1 = 24, /**< Reset node i3c1 */
263
264enum {
265 kDtResetCount = 25, /**< Number of resets */
266};
267
268
269/**
270 * List of pads names.
271 */
272typedef enum dt_pad {
273 kDtPadConstantZero = 0, /**< Pad that is constantly tied to zero (input) */
274 kDtPadConstantOne = 1, /**< Pad that is constantly tied to one (input) */
275 kDtPadIoa0 = 2, /**< Muxed IO pad */
276 kDtPadIoa1 = 3, /**< Muxed IO pad */
277 kDtPadIoa2 = 4, /**< Muxed IO pad */
278 kDtPadIoa3 = 5, /**< Muxed IO pad */
279 kDtPadIoa4 = 6, /**< Muxed IO pad */
280 kDtPadIoa5 = 7, /**< Muxed IO pad */
281 kDtPadIoa6 = 8, /**< Muxed IO pad */
282 kDtPadIoa7 = 9, /**< Muxed IO pad */
283 kDtPadIoa8 = 10, /**< Muxed IO pad */
284 kDtPadIob0 = 11, /**< Muxed IO pad */
285 kDtPadIob1 = 12, /**< Muxed IO pad */
286 kDtPadIob2 = 13, /**< Muxed IO pad */
287 kDtPadIob3 = 14, /**< Muxed IO pad */
288 kDtPadIob4 = 15, /**< Muxed IO pad */
289 kDtPadIob5 = 16, /**< Muxed IO pad */
290 kDtPadIob6 = 17, /**< Muxed IO pad */
291 kDtPadIob7 = 18, /**< Muxed IO pad */
292 kDtPadIob8 = 19, /**< Muxed IO pad */
293 kDtPadIob9 = 20, /**< Muxed IO pad */
294 kDtPadIob10 = 21, /**< Muxed IO pad */
295 kDtPadIob11 = 22, /**< Muxed IO pad */
296 kDtPadIob12 = 23, /**< Muxed IO pad */
297 kDtPadIoc0 = 24, /**< Muxed IO pad */
298 kDtPadIoc1 = 25, /**< Muxed IO pad */
299 kDtPadIoc2 = 26, /**< Muxed IO pad */
300 kDtPadIoc3 = 27, /**< Muxed IO pad */
301 kDtPadIoc4 = 28, /**< Muxed IO pad */
302 kDtPadIoc5 = 29, /**< Muxed IO pad */
303 kDtPadIoc6 = 30, /**< Muxed IO pad */
304 kDtPadIoc7 = 31, /**< Muxed IO pad */
305 kDtPadIoc8 = 32, /**< Muxed IO pad */
306 kDtPadIoc9 = 33, /**< Muxed IO pad */
307 kDtPadIoc10 = 34, /**< Muxed IO pad */
308 kDtPadIoc11 = 35, /**< Muxed IO pad */
309 kDtPadIoc12 = 36, /**< Muxed IO pad */
310 kDtPadIor0 = 37, /**< Muxed IO pad */
311 kDtPadIor1 = 38, /**< Muxed IO pad */
312 kDtPadIor2 = 39, /**< Muxed IO pad */
313 kDtPadIor3 = 40, /**< Muxed IO pad */
314 kDtPadIor4 = 41, /**< Muxed IO pad */
315 kDtPadIor5 = 42, /**< Muxed IO pad */
316 kDtPadIor6 = 43, /**< Muxed IO pad */
317 kDtPadIor7 = 44, /**< Muxed IO pad */
318 kDtPadIor10 = 45, /**< Muxed IO pad */
319 kDtPadIor11 = 46, /**< Muxed IO pad */
320 kDtPadIor12 = 47, /**< Muxed IO pad */
321 kDtPadIor13 = 48, /**< Muxed IO pad */
322 kDtPadUsbdevUsbDp = 49, /**< */
323 kDtPadUsbdevUsbDn = 50, /**< */
324 kDtPadSpiHost0Sd0 = 51, /**< SPI host data */
325 kDtPadSpiHost0Sd1 = 52, /**< SPI host data */
326 kDtPadSpiHost0Sd2 = 53, /**< SPI host data */
327 kDtPadSpiHost0Sd3 = 54, /**< SPI host data */
328 kDtPadSpiDeviceSd0 = 55, /**< SPI device data */
329 kDtPadSpiDeviceSd1 = 56, /**< SPI device data */
330 kDtPadSpiDeviceSd2 = 57, /**< SPI device data */
331 kDtPadSpiDeviceSd3 = 58, /**< SPI device data */
332 kDtPadSysrstCtrlEcRstL = 59, /**< Dedicated sysrst_ctrl output (ec_rst_l) */
333 kDtPadSysrstCtrlFlashWpL = 60, /**< Dedicated sysrst_ctrl output (flash_wp_l)) */
334 kDtPadSpiDeviceSck = 61, /**< SPI device clock */
335 kDtPadSpiDeviceCsb = 62, /**< SPI device chip select */
336 kDtPadSpiHost0Sck = 63, /**< SPI host clock */
337 kDtPadSpiHost0Csb0 = 64, /**< SPI host chip select */
339
340enum {
341 kDtPadCount = 65, /**< Number of pads */
342};
343
344
345/** Type of peripheral I/O. */
346typedef enum dt_periph_io_type {
347 /** This peripheral I/O is connected to a muxed IO (MIO). */
349 /** This peripheral I/O is connected to a direct IO (DIO). */
351 /** This peripheral I/O is not connected to either a MIO or a DIO. */
354
355
356/** Direction of a peripheral I/O. */
357typedef enum dt_periph_io_dir {
358 /** This peripheral I/O is an input. */
360 /** This peripheral I/O is an output */
362 /** This peripheral I/O is an input-output */
365
366/** Peripheral I/O description.
367 *
368 * A `dt_periph_io_t` represents a HW IP block peripheral I/O, which can be an input, output or both.
369 * Importantly, this only represents how the block peripheral I/O is wired, i.e.
370 * whether it is connected a MIO or a direct IO on the pinmux, and the relevant information necessary to
371 * configure it.
372 *
373 * **Note:** The fields of this structure are internal, use the dt_periph_io_* functions to access them.
374 */
375typedef struct dt_periph_io {
376 struct {
377 dt_periph_io_type_t type; /**< Peripheral I/O type */
378 dt_periph_io_dir_t dir; /**< Peripheral I/O direction */
379 /**
380 * For `kDtPeriphIoTypeMio`: peripheral input number. This is the index of the MIO_PERIPH_INSEL register
381 * that controls this peripheral I/O.
382 *
383 * For `kDtPeriphIoTypeDio`: DIO pad number. This is the index of the various DIO_PAD_* registers
384 * that control this peripheral I/O.
385 */
386 uint16_t periph_input_or_direct_pad;
387 /**
388 * For `kDtPeriphIoTypeMio`: peripheral output number. This is the value to put in the MIO_OUTSEL registers
389 * to connect an output to this peripheral I/O. For `kDtPeriphIoTypeDio`: the pad index (`dt_pad_t`) to which this I/O is connected.
390 */
391 uint16_t outsel_or_dt_pad;
392 } __internal; /**< Private fields */
394
395
396/* Peripheral I/O that is constantly tied to high-Z (output only) */
397extern const dt_periph_io_t kDtPeriphIoConstantHighZ;
398
399/* Peripheral I/O that is constantly tied to one (output only) */
400extern const dt_periph_io_t kDtPeriphIoConstantZero;
401
402/* Peripheral I/O that is constantly tied to zero (output only) */
403extern const dt_periph_io_t kDtPeriphIoConstantOne;
404
405/**
406 * Return the type of a `dt_periph_io_t`.
407 *
408 * @param periph_io A peripheral I/O description.
409 * @return The peripheral I/O type (MIO, DIO, etc).
410 */
412 return periph_io.__internal.type;
413}
414
415/**
416 * Return the direction of a `dt_periph_io_t`.
417 *
418 * @param periph_io A peripheral I/O description.
419 * @return The peripheral I/O direction.
420 */
421static inline dt_periph_io_dir_t dt_periph_io_dir(dt_periph_io_t periph_io) {
422 return periph_io.__internal.dir;
423}
424
425/**
426 * Pinmux types.
427 *
428 * These types are aliases to top-level types for backward compatibility
429 * with existing code.
430 */
432typedef top_earlgrey_pinmux_insel_t dt_pinmux_insel_t;
433typedef top_earlgrey_pinmux_outsel_t dt_pinmux_outsel_t;
434typedef top_earlgrey_pinmux_mio_out_t dt_pinmux_mio_out_t;
435typedef top_earlgrey_direct_pads_t dt_pinmux_direct_pad_t;
436typedef top_earlgrey_muxed_pads_t dt_pinmux_muxed_pad_t;
437
438/** Tie constantly to zero. */
439static const dt_pinmux_outsel_t kDtPinmuxOutselConstantZero = kTopEarlgreyPinmuxOutselConstantZero;
440
441/** Tie constantly to one. */
442static const dt_pinmux_outsel_t kDtPinmuxOutselConstantOne = kTopEarlgreyPinmuxOutselConstantOne;
443
444/** Tie constantly to high-Z. */
445static const dt_pinmux_outsel_t kDtPinmuxOutselConstantHighZ = kTopEarlgreyPinmuxOutselConstantHighZ;
446
447/**
448 * Return the peripheral input for an MIO peripheral I/O.
449 *
450 * This is the index of the `MIO_PERIPH_INSEL` pinmux register that controls this peripheral I/O.
451 *
452 * @param periph_io A peripheral I/O of type `kDtPeriphIoTypeMio`.
453 * @return The peripheral input number of the MIO that this peripheral I/O is connected to.
454 *
455 * **Note:** This function only makes sense for peripheral I/Os of type `kDtPeriphIoTypeMio` which are
456 * inputs (`kDtPeriphIoDirIn`). For any other peripheral I/O, the return value is unspecified.
457 */
458static inline dt_pinmux_peripheral_in_t dt_periph_io_mio_periph_input(dt_periph_io_t periph_io) {
459 return (dt_pinmux_peripheral_in_t)periph_io.__internal.periph_input_or_direct_pad;
460}
461
462/**
463 * Return the outsel for an MIO peripheral I/O.
464 *
465 * This is the value to put in the `MIO_OUTSEL` pinmux registers to connect a pad to this peripheral I/O.
466 *
467 * @param periph_io A peripheral I/O of type `kDtPeriphIoTypeMio`.
468 * @return The outsel of the MIO that this peripheral I/O is connected to.
469 *
470 * **Note:** This function only makes sense for peripheral I/Os of type `kDtPeriphIoTypeMio` which are
471 * outputs (`kDtPeriphIoDirOut`). For any other peripheral I/O, the return value is unspecified.
472 */
473static inline dt_pinmux_outsel_t dt_periph_io_mio_outsel(dt_periph_io_t periph_io) {
474 return (dt_pinmux_outsel_t)periph_io.__internal.outsel_or_dt_pad;
475}
476
477/**
478 * Return the direct pad number of a DIO peripheral I/O.
479 *
480 * This is the index of the various `DIO_PAD_*` pinmux registers that control this peripheral I/O.
481 *
482 * @param periph_io A peripheral I/O of type `kDtPeriphIoTypeDio`.
483 * @return The direct pad number of the DIO that this peripheral I/O is connected to.
484 *
485 * **Note:** This function only makes sense for peripheral I/Os of type `kDtPeriphIoTypeDio` which are
486 * either outputs or inouts. For any other peripheral I/O type, the return value is unspecified.
487 */
488static inline dt_pinmux_direct_pad_t dt_periph_io_dio_pad_index(dt_periph_io_t periph_io) {
489 return (dt_pinmux_direct_pad_t)periph_io.__internal.periph_input_or_direct_pad;
490}
491
492/**
493 * Return the pad of a DIO peripheral I/O.
494 *
495 * @param periph_io A peripheral I/O of type `kDtPeriphIoTypeDio`.
496 * @return The pad to which this peripheral I/O is connected to.
497 *
498 * **Note:** This function only makes sense for peripheral I/Os of type `kDtPeriphIoTypeDio` which are
499 * either outputs or inouts. For any other peripheral I/O type, the return value is unspecified.
500 */
501static inline dt_pad_t dt_periph_io_dio_pad(dt_periph_io_t periph_io) {
502 return (dt_pad_t)periph_io.__internal.outsel_or_dt_pad;
503}
504
505/** Type of a pad. */
506typedef enum dt_pad_type {
507 /** This pad is a muxed IO (MIO). */
509 /** This pad is a direct IO (DIO). */
511 /** This pad is not an MIO or a DIO. */
514
515/**
516 * Return the type of a `dt_pad_t`.
517 *
518 * @param pad A pad description.
519 * @return The pad type (MIO, DIO, etc).
520 */
522
523/**
524 * Return the pad out number for an MIO pad.
525 *
526 * This is the index of the `MIO_OUT` registers that control this pad
527 * (or the output part of this pad).
528 *
529 * @param pad A pad of type `kDtPadTypeMio`.
530 * @return The pad out number of the MIO.
531 *
532 * **Note:** This function only makes sense for pads of type `kDtPadTypeMio` which are
533 * either inputs or inouts. For any other pad, the return value is unspecified.
534 */
535dt_pinmux_mio_out_t dt_pad_mio_out(dt_pad_t pad);
536
537/**
538 * Return the pad out number for an MIO pad.
539 *
540 * This is the index of the `MIO_PAD` registers that control this pad
541 * (or the output part of this pad).
542 *
543 * @param pad A pad of type `kDtPadTypeMio`.
544 * @return The pad out number of the MIO.
545 *
546 * **Note:** This function only makes sense for pads of type `kDtPadTypeMio`.
547 * For any other pad, the return value is unspecified.
548 */
549dt_pinmux_muxed_pad_t dt_pad_mio_pad_index(dt_pad_t pad);
550
551/**
552 * Return the insel for an MIO pad.
553 *
554 * This is the value to put in the `MIO_PERIPH_INSEL` registers to connect a peripheral I/O to this pad.
555 *
556 * @param pad A pad of type `kDtPadTypeMio`.
557 * @return The insel of the MIO that this pad is connected to.
558 *
559 * **Note:** This function only makes sense for pads of type `kDtPadTypeMio`.
560 * For any other pad, the return value is unspecified.
561 */
562dt_pinmux_insel_t dt_pad_mio_insel(dt_pad_t pad);
563
564/**
565 * Return the direct pad number of a DIO pad.
566 *
567 * This is the index of the various `DIO_PAD_*` registers that control this pad.
568 *
569 * @param pad A pad of type `kDtPadTypeDio`.
570 * @return The direct pad number of the DID that this pad is connected to.
571 *
572 * **Note:** This function only makes sense for pads of type `kDtPeriphIoTypeDio` which are
573 * either outputs or inouts. For any other pad type, the return value is unspecified.
574 */
575dt_pinmux_direct_pad_t dt_pad_dio_pad_index(dt_pad_t pad);
576
577#ifdef __cplusplus
578} // extern "C"
579#endif // __cplusplus
580
581#endif // OPENTITAN_TOP_EARLGREY_DT_API_H_