Software APIs
api.h
Go to the documentation of this file.
1// Copyright lowRISC contributors (OpenTitan project).
2// Licensed under the Apache License, Version 2.0, see LICENSE for details.
3// SPDX-License-Identifier: Apache-2.0
4//
5// Device table API auto-generated by `dtgen`
6
7#ifndef OPENTITAN_TOP_EARLGREY_DT_API_H_
8#define OPENTITAN_TOP_EARLGREY_DT_API_H_
9
10#ifdef __cplusplus
11extern "C" {
12#endif // __cplusplus
13
14/**
15 * @file
16 * @brief Device Tables (DT) API for top earlgrey
17 *
18 * This file contains the type definitions and global functions of the DT.
19 *
20 * The DT models the chip as a collection of instances. Each instance has
21 * a type (the IP block) and a number of attributes such as I/Os, IRQs
22 * and so on. The DT also provides top-specific lists of global resources
23 * such as I/O pads, clocks and interrupts.
24 */
25
26#include <stddef.h>
27#include <stdint.h>
29
30/**
31 * List of device types.
32 *
33 * Device types are guaranteed to be numbered consecutively from 0.
34 */
35typedef enum dt_device_type {
36 kDtDeviceTypeUnknown = 0, /**< Instance of unknown type */
37 kDtDeviceTypeAdcCtrl = 1, /**< instance of adc_ctrl */
38 kDtDeviceTypeAes = 2, /**< instance of aes */
39 kDtDeviceTypeAlertHandler = 3, /**< instance of alert_handler */
40 kDtDeviceTypeAonTimer = 4, /**< instance of aon_timer */
41 kDtDeviceTypeAst = 5, /**< instance of ast */
42 kDtDeviceTypeClkmgr = 6, /**< instance of clkmgr */
43 kDtDeviceTypeCsrng = 7, /**< instance of csrng */
44 kDtDeviceTypeEdn = 8, /**< instance of edn */
45 kDtDeviceTypeEntropySrc = 9, /**< instance of entropy_src */
46 kDtDeviceTypeFlashCtrl = 10, /**< instance of flash_ctrl */
47 kDtDeviceTypeGpio = 11, /**< instance of gpio */
48 kDtDeviceTypeHmac = 12, /**< instance of hmac */
49 kDtDeviceTypeI2c = 13, /**< instance of i2c */
50 kDtDeviceTypeKeymgr = 14, /**< instance of keymgr */
51 kDtDeviceTypeKmac = 15, /**< instance of kmac */
52 kDtDeviceTypeLcCtrl = 16, /**< instance of lc_ctrl */
53 kDtDeviceTypeOtbn = 17, /**< instance of otbn */
54 kDtDeviceTypeOtpCtrl = 18, /**< instance of otp_ctrl */
55 kDtDeviceTypeOtpMacro = 19, /**< instance of otp_macro */
56 kDtDeviceTypePattgen = 20, /**< instance of pattgen */
57 kDtDeviceTypePinmux = 21, /**< instance of pinmux */
58 kDtDeviceTypePwm = 22, /**< instance of pwm */
59 kDtDeviceTypePwrmgr = 23, /**< instance of pwrmgr */
60 kDtDeviceTypeRomCtrl = 24, /**< instance of rom_ctrl */
61 kDtDeviceTypeRstmgr = 25, /**< instance of rstmgr */
62 kDtDeviceTypeRvCoreIbex = 26, /**< instance of rv_core_ibex */
63 kDtDeviceTypeRvDm = 27, /**< instance of rv_dm */
64 kDtDeviceTypeRvPlic = 28, /**< instance of rv_plic */
65 kDtDeviceTypeRvTimer = 29, /**< instance of rv_timer */
66 kDtDeviceTypeSensorCtrl = 30, /**< instance of sensor_ctrl */
67 kDtDeviceTypeSpiDevice = 31, /**< instance of spi_device */
68 kDtDeviceTypeSpiHost = 32, /**< instance of spi_host */
69 kDtDeviceTypeSramCtrl = 33, /**< instance of sram_ctrl */
70 kDtDeviceTypeSysrstCtrl = 34, /**< instance of sysrst_ctrl */
71 kDtDeviceTypeUart = 35, /**< instance of uart */
72 kDtDeviceTypeUsbdev = 36, /**< instance of usbdev */
74
75enum {
76 kDtDeviceTypeCount = 37, /**< Number of instance types */
77};
78
79
80/**
81 * List of instance IDs.
82 *
83 * Instance IDs are guaranteed to be numbered consecutively from 0.
84 */
85typedef enum dt_instance_id {
86 kDtInstanceIdUnknown = 0, /**< Unknown instance */
87 kDtInstanceIdAdcCtrlAon = 1, /**< instance adc_ctrl_aon of adc_ctrl */
88 kDtInstanceIdAes = 2, /**< instance aes of aes */
89 kDtInstanceIdAlertHandler = 3, /**< instance alert_handler of alert_handler */
90 kDtInstanceIdAonTimerAon = 4, /**< instance aon_timer_aon of aon_timer */
91 kDtInstanceIdAst = 5, /**< instance ast of ast */
92 kDtInstanceIdClkmgrAon = 6, /**< instance clkmgr_aon of clkmgr */
93 kDtInstanceIdCsrng = 7, /**< instance csrng of csrng */
94 kDtInstanceIdEdn0 = 8, /**< instance edn0 of edn */
95 kDtInstanceIdEdn1 = 9, /**< instance edn1 of edn */
96 kDtInstanceIdEntropySrc = 10, /**< instance entropy_src of entropy_src */
97 kDtInstanceIdFlashCtrl = 11, /**< instance flash_ctrl of flash_ctrl */
98 kDtInstanceIdGpio = 12, /**< instance gpio of gpio */
99 kDtInstanceIdHmac = 13, /**< instance hmac of hmac */
100 kDtInstanceIdI2c0 = 14, /**< instance i2c0 of i2c */
101 kDtInstanceIdI2c1 = 15, /**< instance i2c1 of i2c */
102 kDtInstanceIdI2c2 = 16, /**< instance i2c2 of i2c */
103 kDtInstanceIdKeymgr = 17, /**< instance keymgr of keymgr */
104 kDtInstanceIdKmac = 18, /**< instance kmac of kmac */
105 kDtInstanceIdLcCtrl = 19, /**< instance lc_ctrl of lc_ctrl */
106 kDtInstanceIdOtbn = 20, /**< instance otbn of otbn */
107 kDtInstanceIdOtpCtrl = 21, /**< instance otp_ctrl of otp_ctrl */
108 kDtInstanceIdOtpMacro = 22, /**< instance otp_macro of otp_macro */
109 kDtInstanceIdPattgen = 23, /**< instance pattgen of pattgen */
110 kDtInstanceIdPinmuxAon = 24, /**< instance pinmux_aon of pinmux */
111 kDtInstanceIdPwmAon = 25, /**< instance pwm_aon of pwm */
112 kDtInstanceIdPwrmgrAon = 26, /**< instance pwrmgr_aon of pwrmgr */
113 kDtInstanceIdRomCtrl = 27, /**< instance rom_ctrl of rom_ctrl */
114 kDtInstanceIdRstmgrAon = 28, /**< instance rstmgr_aon of rstmgr */
115 kDtInstanceIdRvCoreIbex = 29, /**< instance rv_core_ibex of rv_core_ibex */
116 kDtInstanceIdRvDm = 30, /**< instance rv_dm of rv_dm */
117 kDtInstanceIdRvPlic = 31, /**< instance rv_plic of rv_plic */
118 kDtInstanceIdRvTimer = 32, /**< instance rv_timer of rv_timer */
119 kDtInstanceIdSensorCtrlAon = 33, /**< instance sensor_ctrl_aon of sensor_ctrl */
120 kDtInstanceIdSpiDevice = 34, /**< instance spi_device of spi_device */
121 kDtInstanceIdSpiHost0 = 35, /**< instance spi_host0 of spi_host */
122 kDtInstanceIdSpiHost1 = 36, /**< instance spi_host1 of spi_host */
123 kDtInstanceIdSramCtrlRetAon = 37, /**< instance sram_ctrl_ret_aon of sram_ctrl */
124 kDtInstanceIdSramCtrlMain = 38, /**< instance sram_ctrl_main of sram_ctrl */
125 kDtInstanceIdSysrstCtrlAon = 39, /**< instance sysrst_ctrl_aon of sysrst_ctrl */
126 kDtInstanceIdUart0 = 40, /**< instance uart0 of uart */
127 kDtInstanceIdUart1 = 41, /**< instance uart1 of uart */
128 kDtInstanceIdUart2 = 42, /**< instance uart2 of uart */
129 kDtInstanceIdUart3 = 43, /**< instance uart3 of uart */
130 kDtInstanceIdUsbdev = 44, /**< instance usbdev of usbdev */
132
133enum {
134 kDtInstanceIdCount = 45, /**< Number of instance IDs */
135};
136
137
138/**
139 * Get the instance type of a device instance.
140 *
141 * For example the instance type of `kDtUart0` is `kDtInstanceTypeUart`.
142 *
143 * @param id An instance ID.
144 * @return The instance type, or `kDtInstanceIdUnknown` if the ID is not valid.
145 */
147
148/** PLIC IRQ ID type.
149 *
150 * This type represents a raw IRQ ID from the PLIC.
151 *
152 * This is an alias to the top's `plic_irq_id_t` type for backward compatibility
153 * with existing code.
154 */
156
157/** PLIC IRQ ID for no interrupt. */
158static const dt_plic_irq_id_t kDtPlicIrqIdNone = kTopEarlgreyPlicIrqIdNone;
159
160/**
161 * Get the instance ID for a given PLIC IRQ ID.
162 *
163 * For example, on earlgrey, the instance ID of `kTopEarlgreyPlicIrqIdUart0TxWatermark`
164 * is `kDtInstanceIdUart0`. One can then use the type specific function to retrieve the
165 * IRQ name, for example `dt_uart_irq_from_plic_id` for the UART.
166 *
167 * @param irq A PLIC ID.
168 * @return The instance ID, or `kDtInstanceIdUnknown` if the PLIC ID is not valid.
169 */
171
172/**
173 * Alert ID type.
174 *
175 * This type represents a raw alert ID from the Alert Handler.
176 *
177 * This is an alias to the top's `alert_id_t` type for backward compatibility
178 * with existing code.
179 */
181
182/** Number of alerts. */
183enum {
184 /** Total number of alert IDs. */
185 kDtAlertCount = kTopEarlgreyAlertIdLast + 1,
186};
187
188/**
189 * Get the instance ID for a given alert ID.
190 *
191 * For example, on earlgrey, the instance ID of `kTopEarlgreyAlertIdUart0FatalFault` is
192 * `kDtInstanceIdUart0`. One can then use the type specific function to retrieve the
193 * alert name, for example `dt_uart_alert_from_alert_id` for the UART.
194 *
195 * @param alert An alert ID.
196 * @return The instance ID, or `kDtInstanceIdUnknown` if the alert ID is not valid.
197 */
199
200/**
201 * List of clocks.
202 *
203 * Clocks are guaranteed to be numbered consecutively from 0.
204 */
205typedef enum dt_clock {
206 kDtClockMain = 0, /**< clock main */
207 kDtClockIo = 1, /**< clock io */
208 kDtClockUsb = 2, /**< clock usb */
209 kDtClockAon = 3, /**< clock aon */
210 kDtClockIoDiv2 = 4, /**< clock io_div2 */
211 kDtClockIoDiv4 = 5, /**< clock io_div4 */
213
214enum {
215 kDtClockCount = 6, /**< Number of clocks */
216};
217
218
219/**
220 * Get the frequency of a clock.
221 *
222 * @param clk A clock ID.
223 * @return Clock frequency in Hz.
224 */
226
227/**
228 * List of resets.
229 *
230 * Resets are guaranteed to be numbered consecutively from 0.
231 */
232typedef enum dt_reset {
233 kDtResetUnknown = 0, /**< Unknown reset */
234 kDtResetPorAon = 1, /**< Reset node por_aon */
235 kDtResetLcSrc = 2, /**< Reset node lc_src */
236 kDtResetSysSrc = 3, /**< Reset node sys_src */
237 kDtResetPor = 4, /**< Reset node por */
238 kDtResetPorIo = 5, /**< Reset node por_io */
239 kDtResetPorIoDiv2 = 6, /**< Reset node por_io_div2 */
240 kDtResetPorIoDiv4 = 7, /**< Reset node por_io_div4 */
241 kDtResetPorUsb = 8, /**< Reset node por_usb */
242 kDtResetLc = 9, /**< Reset node lc */
243 kDtResetLcAon = 10, /**< Reset node lc_aon */
244 kDtResetLcIo = 11, /**< Reset node lc_io */
245 kDtResetLcIoDiv2 = 12, /**< Reset node lc_io_div2 */
246 kDtResetLcIoDiv4 = 13, /**< Reset node lc_io_div4 */
247 kDtResetLcUsb = 14, /**< Reset node lc_usb */
248 kDtResetSys = 15, /**< Reset node sys */
249 kDtResetSysIoDiv4 = 16, /**< Reset node sys_io_div4 */
250 kDtResetSpiDevice = 17, /**< Reset node spi_device */
251 kDtResetSpiHost0 = 18, /**< Reset node spi_host0 */
252 kDtResetSpiHost1 = 19, /**< Reset node spi_host1 */
253 kDtResetUsb = 20, /**< Reset node usb */
254 kDtResetUsbAon = 21, /**< Reset node usb_aon */
255 kDtResetI2c0 = 22, /**< Reset node i2c0 */
256 kDtResetI2c1 = 23, /**< Reset node i2c1 */
257 kDtResetI2c2 = 24, /**< Reset node i2c2 */
259
260enum {
261 kDtResetCount = 25, /**< Number of resets */
262};
263
264
265/**
266 * List of pads names.
267 */
268typedef enum dt_pad {
269 kDtPadConstantZero = 0, /**< Pad that is constantly tied to zero (input) */
270 kDtPadConstantOne = 1, /**< Pad that is constantly tied to one (input) */
271 kDtPadIoa0 = 2, /**< Muxed IO pad */
272 kDtPadIoa1 = 3, /**< Muxed IO pad */
273 kDtPadIoa2 = 4, /**< Muxed IO pad */
274 kDtPadIoa3 = 5, /**< Muxed IO pad */
275 kDtPadIoa4 = 6, /**< Muxed IO pad */
276 kDtPadIoa5 = 7, /**< Muxed IO pad */
277 kDtPadIoa6 = 8, /**< Muxed IO pad */
278 kDtPadIoa7 = 9, /**< Muxed IO pad */
279 kDtPadIoa8 = 10, /**< Muxed IO pad */
280 kDtPadIob0 = 11, /**< Muxed IO pad */
281 kDtPadIob1 = 12, /**< Muxed IO pad */
282 kDtPadIob2 = 13, /**< Muxed IO pad */
283 kDtPadIob3 = 14, /**< Muxed IO pad */
284 kDtPadIob4 = 15, /**< Muxed IO pad */
285 kDtPadIob5 = 16, /**< Muxed IO pad */
286 kDtPadIob6 = 17, /**< Muxed IO pad */
287 kDtPadIob7 = 18, /**< Muxed IO pad */
288 kDtPadIob8 = 19, /**< Muxed IO pad */
289 kDtPadIob9 = 20, /**< Muxed IO pad */
290 kDtPadIob10 = 21, /**< Muxed IO pad */
291 kDtPadIob11 = 22, /**< Muxed IO pad */
292 kDtPadIob12 = 23, /**< Muxed IO pad */
293 kDtPadIoc0 = 24, /**< Muxed IO pad */
294 kDtPadIoc1 = 25, /**< Muxed IO pad */
295 kDtPadIoc2 = 26, /**< Muxed IO pad */
296 kDtPadIoc3 = 27, /**< Muxed IO pad */
297 kDtPadIoc4 = 28, /**< Muxed IO pad */
298 kDtPadIoc5 = 29, /**< Muxed IO pad */
299 kDtPadIoc6 = 30, /**< Muxed IO pad */
300 kDtPadIoc7 = 31, /**< Muxed IO pad */
301 kDtPadIoc8 = 32, /**< Muxed IO pad */
302 kDtPadIoc9 = 33, /**< Muxed IO pad */
303 kDtPadIoc10 = 34, /**< Muxed IO pad */
304 kDtPadIoc11 = 35, /**< Muxed IO pad */
305 kDtPadIoc12 = 36, /**< Muxed IO pad */
306 kDtPadIor0 = 37, /**< Muxed IO pad */
307 kDtPadIor1 = 38, /**< Muxed IO pad */
308 kDtPadIor2 = 39, /**< Muxed IO pad */
309 kDtPadIor3 = 40, /**< Muxed IO pad */
310 kDtPadIor4 = 41, /**< Muxed IO pad */
311 kDtPadIor5 = 42, /**< Muxed IO pad */
312 kDtPadIor6 = 43, /**< Muxed IO pad */
313 kDtPadIor7 = 44, /**< Muxed IO pad */
314 kDtPadIor10 = 45, /**< Muxed IO pad */
315 kDtPadIor11 = 46, /**< Muxed IO pad */
316 kDtPadIor12 = 47, /**< Muxed IO pad */
317 kDtPadIor13 = 48, /**< Muxed IO pad */
318 kDtPadUsbdevUsbDp = 49, /**< */
319 kDtPadUsbdevUsbDn = 50, /**< */
320 kDtPadSpiHost0Sd0 = 51, /**< SPI host data */
321 kDtPadSpiHost0Sd1 = 52, /**< SPI host data */
322 kDtPadSpiHost0Sd2 = 53, /**< SPI host data */
323 kDtPadSpiHost0Sd3 = 54, /**< SPI host data */
324 kDtPadSpiDeviceSd0 = 55, /**< SPI device data */
325 kDtPadSpiDeviceSd1 = 56, /**< SPI device data */
326 kDtPadSpiDeviceSd2 = 57, /**< SPI device data */
327 kDtPadSpiDeviceSd3 = 58, /**< SPI device data */
328 kDtPadSysrstCtrlAonEcRstL = 59, /**< Dedicated sysrst_ctrl output (ec_rst_l) */
329 kDtPadSysrstCtrlAonFlashWpL = 60, /**< Dedicated sysrst_ctrl output (flash_wp_l)) */
330 kDtPadSpiDeviceSck = 61, /**< SPI device clock */
331 kDtPadSpiDeviceCsb = 62, /**< SPI device chip select */
332 kDtPadSpiHost0Sck = 63, /**< SPI host clock */
333 kDtPadSpiHost0Csb = 64, /**< SPI host chip select */
335
336enum {
337 kDtPadCount = 65, /**< Number of pads */
338};
339
340
341/** Type of peripheral I/O. */
342typedef enum dt_periph_io_type {
343 /** This peripheral I/O is connected to a muxed IO (MIO). */
345 /** This peripheral I/O is connected to a direct IO (DIO). */
347 /** This peripheral I/O is not connected to either a MIO or a DIO. */
350
351
352/** Direction of a peripheral I/O. */
353typedef enum dt_periph_io_dir {
354 /** This peripheral I/O is an input. */
356 /** This peripheral I/O is an output */
358 /** This peripheral I/O is an input-output */
361
362/** Peripheral I/O description.
363 *
364 * A `dt_periph_io_t` represents a HW IP block peripheral I/O, which can be an input, output or both.
365 * Importantly, this only represents how the block peripheral I/O is wired, i.e.
366 * whether it is connected a MIO or a direct IO on the pinmux, and the relevant information necessary to
367 * configure it.
368 *
369 * **Note:** The fields of this structure are internal, use the dt_periph_io_* functions to access them.
370 */
371typedef struct dt_periph_io {
372 struct {
373 dt_periph_io_type_t type; /**< Peripheral I/O type */
374 dt_periph_io_dir_t dir; /**< Peripheral I/O direction */
375 /**
376 * For `kDtPeriphIoTypeMio`: peripheral input number. This is the index of the MIO_PERIPH_INSEL register
377 * that controls this peripheral I/O.
378 *
379 * For `kDtPeriphIoTypeDio`: DIO pad number. This is the index of the various DIO_PAD_* registers
380 * that control this peripheral I/O.
381 */
382 uint16_t periph_input_or_direct_pad;
383 /**
384 * For `kDtPeriphIoTypeMio`: peripheral output number. This is the value to put in the MIO_OUTSEL registers
385 * to connect an output to this peripheral I/O. For `kDtPeriphIoTypeDio`: the pad index (`dt_pad_t`) to which this I/O is connected.
386 */
387 uint16_t outsel_or_dt_pad;
388 } __internal; /**< Private fields */
390
391
392/* Peripheral I/O that is constantly tied to high-Z (output only) */
393extern const dt_periph_io_t kDtPeriphIoConstantHighZ;
394
395/* Peripheral I/O that is constantly tied to one (output only) */
396extern const dt_periph_io_t kDtPeriphIoConstantZero;
397
398/* Peripheral I/O that is constantly tied to zero (output only) */
399extern const dt_periph_io_t kDtPeriphIoConstantOne;
400
401/**
402 * Return the type of a `dt_periph_io_t`.
403 *
404 * @param periph_io A peripheral I/O description.
405 * @return The peripheral I/O type (MIO, DIO, etc).
406 */
408 return periph_io.__internal.type;
409}
410
411/**
412 * Return the direction of a `dt_periph_io_t`.
413 *
414 * @param periph_io A peripheral I/O description.
415 * @return The peripheral I/O direction.
416 */
417static inline dt_periph_io_dir_t dt_periph_io_dir(dt_periph_io_t periph_io) {
418 return periph_io.__internal.dir;
419}
420
421/**
422 * Pinmux types.
423 *
424 * These types are aliases to top-level types for backward compatibility
425 * with existing code.
426 */
428typedef top_earlgrey_pinmux_insel_t dt_pinmux_insel_t;
429typedef top_earlgrey_pinmux_outsel_t dt_pinmux_outsel_t;
430typedef top_earlgrey_pinmux_mio_out_t dt_pinmux_mio_out_t;
431typedef top_earlgrey_direct_pads_t dt_pinmux_direct_pad_t;
432typedef top_earlgrey_muxed_pads_t dt_pinmux_muxed_pad_t;
433
434/** Tie constantly to zero. */
435static const dt_pinmux_outsel_t kDtPinmuxOutselConstantZero = kTopEarlgreyPinmuxOutselConstantZero;
436
437/** Tie constantly to one. */
438static const dt_pinmux_outsel_t kDtPinmuxOutselConstantOne = kTopEarlgreyPinmuxOutselConstantOne;
439
440/** Tie constantly to high-Z. */
441static const dt_pinmux_outsel_t kDtPinmuxOutselConstantHighZ = kTopEarlgreyPinmuxOutselConstantHighZ;
442
443/**
444 * Return the peripheral input for an MIO peripheral I/O.
445 *
446 * This is the index of the `MIO_PERIPH_INSEL` pinmux register that controls this peripheral I/O.
447 *
448 * @param periph_io A peripheral I/O of type `kDtPeriphIoTypeMio`.
449 * @return The peripheral input number of the MIO that this peripheral I/O is connected to.
450 *
451 * **Note:** This function only makes sense for peripheral I/Os of type `kDtPeriphIoTypeMio` which are
452 * inputs (`kDtPeriphIoDirIn`). For any other peripheral I/O, the return value is unspecified.
453 */
454static inline dt_pinmux_peripheral_in_t dt_periph_io_mio_periph_input(dt_periph_io_t periph_io) {
455 return (dt_pinmux_peripheral_in_t)periph_io.__internal.periph_input_or_direct_pad;
456}
457
458/**
459 * Return the outsel for an MIO peripheral I/O.
460 *
461 * This is the value to put in the `MIO_OUTSEL` pinmux registers to connect a pad to this peripheral I/O.
462 *
463 * @param periph_io A peripheral I/O of type `kDtPeriphIoTypeMio`.
464 * @return The outsel of the MIO that this peripheral I/O is connected to.
465 *
466 * **Note:** This function only makes sense for peripheral I/Os of type `kDtPeriphIoTypeMio` which are
467 * outputs (`kDtPeriphIoDirOut`). For any other peripheral I/O, the return value is unspecified.
468 */
469static inline dt_pinmux_outsel_t dt_periph_io_mio_outsel(dt_periph_io_t periph_io) {
470 return (dt_pinmux_outsel_t)periph_io.__internal.outsel_or_dt_pad;
471}
472
473/**
474 * Return the direct pad number of a DIO peripheral I/O.
475 *
476 * This is the index of the various `DIO_PAD_*` pinmux registers that control this peripheral I/O.
477 *
478 * @param periph_io A peripheral I/O of type `kDtPeriphIoTypeDio`.
479 * @return The direct pad number of the DIO that this peripheral I/O is connected to.
480 *
481 * **Note:** This function only makes sense for peripheral I/Os of type `kDtPeriphIoTypeDio` which are
482 * either outputs or inouts. For any other peripheral I/O type, the return value is unspecified.
483 */
484static inline dt_pinmux_direct_pad_t dt_periph_io_dio_pad_index(dt_periph_io_t periph_io) {
485 return (dt_pinmux_direct_pad_t)periph_io.__internal.periph_input_or_direct_pad;
486}
487
488/**
489 * Return the pad of a DIO peripheral I/O.
490 *
491 * @param periph_io A peripheral I/O of type `kDtPeriphIoTypeDio`.
492 * @return The pad to which this peripheral I/O is connected to.
493 *
494 * **Note:** This function only makes sense for peripheral I/Os of type `kDtPeriphIoTypeDio` which are
495 * either outputs or inouts. For any other peripheral I/O type, the return value is unspecified.
496 */
497static inline dt_pad_t dt_periph_io_dio_pad(dt_periph_io_t periph_io) {
498 return (dt_pad_t)periph_io.__internal.outsel_or_dt_pad;
499}
500
501/** Type of a pad. */
502typedef enum dt_pad_type {
503 /** This pad is a muxed IO (MIO). */
505 /** This pad is a direct IO (DIO). */
507 /** This pad is not an MIO or a DIO. */
510
511/**
512 * Return the type of a `dt_pad_t`.
513 *
514 * @param pad A pad description.
515 * @return The pad type (MIO, DIO, etc).
516 */
518
519/**
520 * Return the pad out number for an MIO pad.
521 *
522 * This is the index of the `MIO_OUT` registers that control this pad
523 * (or the output part of this pad).
524 *
525 * @param pad A pad of type `kDtPadTypeMio`.
526 * @return The pad out number of the MIO.
527 *
528 * **Note:** This function only makes sense for pads of type `kDtPadTypeMio` which are
529 * either inputs or inouts. For any other pad, the return value is unspecified.
530 */
531dt_pinmux_mio_out_t dt_pad_mio_out(dt_pad_t pad);
532
533/**
534 * Return the pad out number for an MIO pad.
535 *
536 * This is the index of the `MIO_PAD` registers that control this pad
537 * (or the output part of this pad).
538 *
539 * @param pad A pad of type `kDtPadTypeMio`.
540 * @return The pad out number of the MIO.
541 *
542 * **Note:** This function only makes sense for pads of type `kDtPadTypeMio`.
543 * For any other pad, the return value is unspecified.
544 */
545dt_pinmux_muxed_pad_t dt_pad_mio_pad_index(dt_pad_t pad);
546
547/**
548 * Return the insel for an MIO pad.
549 *
550 * This is the value to put in the `MIO_PERIPH_INSEL` registers to connect a peripheral I/O to this pad.
551 *
552 * @param pad A pad of type `kDtPadTypeMio`.
553 * @return The insel of the MIO that this pad is connected to.
554 *
555 * **Note:** This function only makes sense for pads of type `kDtPadTypeMio`.
556 * For any other pad, the return value is unspecified.
557 */
558dt_pinmux_insel_t dt_pad_mio_insel(dt_pad_t pad);
559
560/**
561 * Return the direct pad number of a DIO pad.
562 *
563 * This is the index of the various `DIO_PAD_*` registers that control this pad.
564 *
565 * @param pad A pad of type `kDtPadTypeDio`.
566 * @return The direct pad number of the DID that this pad is connected to.
567 *
568 * **Note:** This function only makes sense for pads of type `kDtPeriphIoTypeDio` which are
569 * either outputs or inouts. For any other pad type, the return value is unspecified.
570 */
571dt_pinmux_direct_pad_t dt_pad_dio_pad_index(dt_pad_t pad);
572
573#ifdef __cplusplus
574} // extern "C"
575#endif // __cplusplus
576
577#endif // OPENTITAN_TOP_EARLGREY_DT_API_H_