Software APIs
dt_uart.c
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// Copyright lowRISC contributors (OpenTitan project).
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// Licensed under the Apache License, Version 2.0, see LICENSE for details.
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// SPDX-License-Identifier: Apache-2.0
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//
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// Device table API auto-generated by `dtgen`
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/**
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* @file
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* @brief Device Tables (DT) for IP uart and top darjeeling.
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*/
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#include "hw/top/dt/dt_uart.h"
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/**
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* Description of instances.
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*/
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typedef
struct
dt_desc_uart
{
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dt_instance_id_t
inst_id
;
/**< Instance ID */
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uint32_t
reg_addr
[kDtUartRegBlockCount];
/**< Base address of each register block */
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uint32_t
mem_addr
[kDtUartMemoryCount];
/**< Base address of each memory */
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uint32_t
mem_size
[kDtUartMemoryCount];
/**< Size in bytes of each memory */
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/**
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* PLIC ID of the first IRQ of this instance
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*
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* This can be `kDtPlicIrqIdNone` if the block is not connected to the PLIC.
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*/
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top_darjeeling_plic_irq_id_t
first_irq
;
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/**
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* Alert ID of the first Alert of this instance.
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*
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* This value is undefined if the block is not connected to the Alert Handler.
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*/
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top_darjeeling_alert_id_t
first_alert
;
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dt_clock_t
clock
[kDtUartClockCount];
/**< Clock signal connected to each clock port */
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dt_reset_t
reset
[kDtUartResetCount];
/**< Reset signal connected to each reset port */
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dt_periph_io_t
periph_io
[kDtUartPeriphIoCount];
/**< Description of each peripheral I/O */
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}
dt_desc_uart_t
;
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static
const
dt_desc_uart_t
uart_desc[kDtUartCount] = {
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[
kDtUart0
] = {
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.inst_id =
kDtInstanceIdUart0
,
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.reg_addr = {
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[kDtUartRegBlockCore] = 0x30010000,
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},
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.mem_addr = {
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},
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.mem_size = {
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},
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.first_irq =
kTopDarjeelingPlicIrqIdUart0TxWatermark
,
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.first_alert =
kTopDarjeelingAlertIdUart0FatalFault
,
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.clock = {
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[
kDtUartClockClk
] =
kDtClockIoDiv4
,
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},
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.reset = {
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[
kDtUartResetRst
] =
kDtResetLcIoDiv4
,
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},
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.periph_io = {
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[kDtUartPeriphIoRx] = {
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.__internal = {
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.type =
kDtPeriphIoTypeDio
,
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.dir =
kDtPeriphIoDirIn
,
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.periph_input_or_direct_pad = kTopDarjeelingDirectPadsUart0Rx,
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.outsel_or_dt_pad =
kDtPadUart0Rx
,
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},
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},
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[kDtUartPeriphIoTx] = {
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.__internal = {
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.type =
kDtPeriphIoTypeDio
,
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.dir =
kDtPeriphIoDirOut
,
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.periph_input_or_direct_pad = kTopDarjeelingDirectPadsUart0Tx,
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.outsel_or_dt_pad =
kDtPadUart0Tx
,
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},
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},
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},
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},
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};
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/**
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* Return a pointer to the `dt_uart_desc_t` structure of the requested
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* `dt` if it's a valid index. Otherwise, this macro will `return` (i.e. exit
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* the function) with the provided default value.
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*/
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#define TRY_GET_DT(dt, default) ({ if ((dt) < (dt_uart_t)0 || (dt) >= kDtUartCount) return (default); &uart_desc[dt]; })
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dt_uart_t
dt_uart_from_instance_id
(
dt_instance_id_t
inst_id) {
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if
(inst_id >=
kDtInstanceIdUart0
&& inst_id <=
kDtInstanceIdUart0
) {
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return
(
dt_uart_t
)(inst_id -
kDtInstanceIdUart0
);
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}
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return
(
dt_uart_t
)0;
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}
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dt_instance_id_t
dt_uart_instance_id
(
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dt_uart_t
dt) {
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return
TRY_GET_DT
(dt,
kDtInstanceIdUnknown
)->inst_id;
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}
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uint32_t
dt_uart_reg_block
(
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dt_uart_t
dt,
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dt_uart_reg_block_t
reg_block) {
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// Return a recognizable address in case of wrong argument.
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return
TRY_GET_DT
(dt, 0xdeadbeef)->reg_addr[reg_block];
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}
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uint32_t
dt_uart_memory_base
(
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dt_uart_t
dt,
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dt_uart_memory_t
mem) {
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// Return a recognizable address in case of wrong argument.
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return
TRY_GET_DT
(dt, 0xdeadbeef)->mem_addr[mem];
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}
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uint32_t
dt_uart_memory_size
(
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dt_uart_t
dt,
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dt_uart_memory_t
mem) {
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// Return an empty size in case of wrong argument.
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return
TRY_GET_DT
(dt, 0)->mem_size[mem];
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}
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dt_plic_irq_id_t
dt_uart_irq_to_plic_id
(
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dt_uart_t
dt,
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dt_uart_irq_t
irq) {
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dt_plic_irq_id_t
first_irq =
TRY_GET_DT
(dt, kDtPlicIrqIdNone)->first_irq;
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if
(first_irq == kDtPlicIrqIdNone) {
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return
kDtPlicIrqIdNone;
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}
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return
(
dt_plic_irq_id_t
)((uint32_t)first_irq + (uint32_t)irq);
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}
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dt_uart_irq_t
dt_uart_irq_from_plic_id
(
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dt_uart_t
dt,
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dt_plic_irq_id_t
irq) {
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dt_uart_irq_t
count = kDtUartIrqCount;
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dt_plic_irq_id_t
first_irq =
TRY_GET_DT
(dt, count)->first_irq;
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if
(first_irq == kDtPlicIrqIdNone) {
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return
count;
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}
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if
(irq < first_irq || irq >= first_irq + (
dt_plic_irq_id_t
)count) {
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return
count;
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}
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return
(
dt_uart_irq_t
)(irq - first_irq);
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}
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dt_alert_id_t
dt_uart_alert_to_alert_id
(
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dt_uart_t
dt,
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dt_uart_alert_t
alert) {
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return
(
dt_alert_id_t
)((uint32_t)uart_desc[dt].first_alert + (uint32_t)alert);
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}
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dt_uart_alert_t
dt_uart_alert_from_alert_id
(
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dt_uart_t
dt,
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dt_alert_id_t
alert) {
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dt_uart_alert_t
count = kDtUartAlertCount;
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if
(alert < uart_desc[dt].first_alert || alert >= uart_desc[dt].first_alert + (
dt_alert_id_t
)count) {
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return
count;
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}
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return
(
dt_uart_alert_t
)(alert - uart_desc[dt].first_alert);
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}
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dt_periph_io_t
dt_uart_periph_io
(
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dt_uart_t
dt,
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dt_uart_periph_io_t
sig) {
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// Return a harmless value in case of wrong argument.
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return
TRY_GET_DT
(dt, kDtPeriphIoConstantHighZ)->periph_io[sig];
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}
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dt_clock_t
dt_uart_clock
(
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dt_uart_t
dt,
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dt_uart_clock_t
clk) {
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// Return the first clock in case of invalid argument.
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return
TRY_GET_DT
(dt, (
dt_clock_t
)0)->clock[clk];
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}
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dt_reset_t
dt_uart_reset
(
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dt_uart_t
dt,
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dt_uart_reset_t
rst) {
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const
dt_uart_reset_t
count = kDtUartResetCount;
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if
(rst >= count) {
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return
kDtResetUnknown
;
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}
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return
TRY_GET_DT
(dt,
kDtResetUnknown
)->reset[rst];
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}
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(darjeeling)
hw
top
dt
dt_uart.c
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