Software APIs
dt_rom_ctrl.c
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1// Copyright lowRISC contributors (OpenTitan project).
2// Licensed under the Apache License, Version 2.0, see LICENSE for details.
3// SPDX-License-Identifier: Apache-2.0
4//
5// Device table API auto-generated by `dtgen`
6
7/**
8 * @file
9 * @brief Device Tables (DT) for IP rom_ctrl and top darjeeling.
10 */
11
12#include "hw/top/dt/dt_rom_ctrl.h"
13
14
15
16/**
17 * Description of instances.
18 */
19typedef struct dt_desc_rom_ctrl {
20 dt_instance_id_t inst_id; /**< Instance ID */
21 uint32_t reg_addr[kDtRomCtrlRegBlockCount]; /**< Base address of each register block */
22 uint32_t mem_addr[kDtRomCtrlMemoryCount]; /**< Base address of each memory */
23 uint32_t mem_size[kDtRomCtrlMemoryCount]; /**< Size in bytes of each memory */
24 /**
25 * Alert ID of the first Alert of this instance.
26 *
27 * This value is undefined if the block is not connected to the Alert Handler.
28 */
30 dt_clock_t clock[kDtRomCtrlClockCount]; /**< Clock signal connected to each clock port */
31 dt_reset_t reset[kDtRomCtrlResetCount]; /**< Reset signal connected to each reset port */
33
34
35
36
37static const dt_desc_rom_ctrl_t rom_ctrl_desc[kDtRomCtrlCount] = {
38 [kDtRomCtrl0] = {
39 .inst_id = kDtInstanceIdRomCtrl0,
40 .reg_addr = {
41 [kDtRomCtrlRegBlockRegs] = 0x211e0000,
42 },
43 .mem_addr = {
44 [kDtRomCtrlMemoryRom] = 0x00008000,
45 },
46 .mem_size = {
47 [kDtRomCtrlMemoryRom] = 0x8000,
48 },
50 .clock = {
52 },
53 .reset = {
55 },
56 },
57 [kDtRomCtrl1] = {
58 .inst_id = kDtInstanceIdRomCtrl1,
59 .reg_addr = {
60 [kDtRomCtrlRegBlockRegs] = 0x211e1000,
61 },
62 .mem_addr = {
63 [kDtRomCtrlMemoryRom] = 0x00020000,
64 },
65 .mem_size = {
66 [kDtRomCtrlMemoryRom] = 0x10000,
67 },
69 .clock = {
71 },
72 .reset = {
74 },
75 },
76};
77
78/**
79 * Return a pointer to the `dt_rom_ctrl_desc_t` structure of the requested
80 * `dt` if it's a valid index. Otherwise, this macro will `return` (i.e. exit
81 * the function) with the provided default value.
82 */
83#define TRY_GET_DT(dt, default) ({ if ((dt) < (dt_rom_ctrl_t)0 || (dt) >= kDtRomCtrlCount) return (default); &rom_ctrl_desc[dt]; })
84
86 if (inst_id >= kDtInstanceIdRomCtrl0 && inst_id <= kDtInstanceIdRomCtrl1) {
87 return (dt_rom_ctrl_t)(inst_id - kDtInstanceIdRomCtrl0);
88 }
89 return (dt_rom_ctrl_t)0;
90}
91
96
99 dt_rom_ctrl_reg_block_t reg_block) {
100 // Return a recognizable address in case of wrong argument.
101 return TRY_GET_DT(dt, 0xdeadbeef)->reg_addr[reg_block];
102}
103
105 dt_rom_ctrl_t dt,
107 // Return a recognizable address in case of wrong argument.
108 return TRY_GET_DT(dt, 0xdeadbeef)->mem_addr[mem];
109}
110
112 dt_rom_ctrl_t dt,
114 // Return an empty size in case of wrong argument.
115 return TRY_GET_DT(dt, 0)->mem_size[mem];
116}
117
118
120 dt_rom_ctrl_t dt,
121 dt_rom_ctrl_alert_t alert) {
122 return (dt_alert_id_t)((uint32_t)rom_ctrl_desc[dt].first_alert + (uint32_t)alert);
123}
124
126 dt_rom_ctrl_t dt,
127 dt_alert_id_t alert) {
128 dt_rom_ctrl_alert_t count = kDtRomCtrlAlertCount;
129 if (alert < rom_ctrl_desc[dt].first_alert || alert >= rom_ctrl_desc[dt].first_alert + (dt_alert_id_t)count) {
130 return count;
131 }
132 return (dt_rom_ctrl_alert_t)(alert - rom_ctrl_desc[dt].first_alert);
133}
134
135
136
138 dt_rom_ctrl_t dt,
140 // Return the first clock in case of invalid argument.
141 return TRY_GET_DT(dt, (dt_clock_t)0)->clock[clk];
142}
143
145 dt_rom_ctrl_t dt,
147 const dt_rom_ctrl_reset_t count = kDtRomCtrlResetCount;
148 if (rst >= count) {
149 return kDtResetUnknown;
150 }
151 return TRY_GET_DT(dt, kDtResetUnknown)->reset[rst];
152}
153
154