Software APIs
dt_gpio.c
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1// Copyright lowRISC contributors (OpenTitan project).
2// Licensed under the Apache License, Version 2.0, see LICENSE for details.
3// SPDX-License-Identifier: Apache-2.0
4//
5// Device table API auto-generated by `dtgen`
6
7/**
8 * @file
9 * @brief Device Tables (DT) for IP gpio and top darjeeling.
10 */
11
12#include "dt/dt_gpio.h"
13
14
15
16/**
17 * Description of instances.
18 */
19typedef struct dt_desc_gpio {
20 dt_instance_id_t inst_id; /**< Instance ID */
21 uint32_t base_addr[kDtGpioRegBlockCount]; /**< Base address of each register block */
22 /**
23 * PLIC ID of the first IRQ of this instance
24 *
25 * This can be `kDtPlicIrqIdNone` if the block is not connected to the PLIC.
26 */
27 top_darjeeling_plic_irq_id_t first_irq;
28 /**
29 * Alert ID of the first Alert of this instance.
30 *
31 * This value is undefined if the block is not connected to the Alert Handler.
32 */
33 top_darjeeling_alert_id_t first_alert;
34 dt_clock_t clock[kDtGpioClockCount]; /**< Clock signal connected to each clock port */
35 dt_reset_t reset[kDtGpioResetCount]; /**< Reset signal connected to each reset port */
36 dt_periph_io_t periph_io[kDtGpioPeriphIoCount]; /**< Description of each peripheral I/O */
37} dt_desc_gpio_t;
38
39
40
41
42static const dt_desc_gpio_t gpio_desc[kDtGpioCount] = {
43 [kDtGpio] = {
44 .inst_id = kDtInstanceIdGpio,
45 .base_addr = {
46 [kDtGpioRegBlockCore] = 0x30000000,
47 },
48 .first_irq = kTopDarjeelingPlicIrqIdGpioGpio0,
49 .first_alert = kTopDarjeelingAlertIdGpioFatalFault,
50 .clock = {
51 [kDtGpioClockClk] = kDtClockIoDiv4,
52 },
53 .reset = {
54 [kDtGpioResetRst] = kDtResetLcIoDiv4,
55 },
56 .periph_io = {
57 [kDtGpioPeriphIoGpio0] = {
58 .__internal = {
59 .type = kDtPeriphIoTypeDio,
60 .dir = kDtPeriphIoDirInout,
61 .periph_input_or_direct_pad = kTopDarjeelingDirectPadsGpioGpio0,
62 .outsel_or_dt_pad = kDtPadGpioGpio0,
63 },
64 },
65 [kDtGpioPeriphIoGpio1] = {
66 .__internal = {
67 .type = kDtPeriphIoTypeDio,
68 .dir = kDtPeriphIoDirInout,
69 .periph_input_or_direct_pad = kTopDarjeelingDirectPadsGpioGpio1,
70 .outsel_or_dt_pad = kDtPadGpioGpio1,
71 },
72 },
73 [kDtGpioPeriphIoGpio2] = {
74 .__internal = {
75 .type = kDtPeriphIoTypeDio,
76 .dir = kDtPeriphIoDirInout,
77 .periph_input_or_direct_pad = kTopDarjeelingDirectPadsGpioGpio2,
78 .outsel_or_dt_pad = kDtPadGpioGpio2,
79 },
80 },
81 [kDtGpioPeriphIoGpio3] = {
82 .__internal = {
83 .type = kDtPeriphIoTypeDio,
84 .dir = kDtPeriphIoDirInout,
85 .periph_input_or_direct_pad = kTopDarjeelingDirectPadsGpioGpio3,
86 .outsel_or_dt_pad = kDtPadGpioGpio3,
87 },
88 },
89 [kDtGpioPeriphIoGpio4] = {
90 .__internal = {
91 .type = kDtPeriphIoTypeDio,
92 .dir = kDtPeriphIoDirInout,
93 .periph_input_or_direct_pad = kTopDarjeelingDirectPadsGpioGpio4,
94 .outsel_or_dt_pad = kDtPadGpioGpio4,
95 },
96 },
97 [kDtGpioPeriphIoGpio5] = {
98 .__internal = {
99 .type = kDtPeriphIoTypeDio,
100 .dir = kDtPeriphIoDirInout,
101 .periph_input_or_direct_pad = kTopDarjeelingDirectPadsGpioGpio5,
102 .outsel_or_dt_pad = kDtPadGpioGpio5,
103 },
104 },
105 [kDtGpioPeriphIoGpio6] = {
106 .__internal = {
107 .type = kDtPeriphIoTypeDio,
108 .dir = kDtPeriphIoDirInout,
109 .periph_input_or_direct_pad = kTopDarjeelingDirectPadsGpioGpio6,
110 .outsel_or_dt_pad = kDtPadGpioGpio6,
111 },
112 },
113 [kDtGpioPeriphIoGpio7] = {
114 .__internal = {
115 .type = kDtPeriphIoTypeDio,
116 .dir = kDtPeriphIoDirInout,
117 .periph_input_or_direct_pad = kTopDarjeelingDirectPadsGpioGpio7,
118 .outsel_or_dt_pad = kDtPadGpioGpio7,
119 },
120 },
121 [kDtGpioPeriphIoGpio8] = {
122 .__internal = {
123 .type = kDtPeriphIoTypeDio,
124 .dir = kDtPeriphIoDirInout,
125 .periph_input_or_direct_pad = kTopDarjeelingDirectPadsGpioGpio8,
126 .outsel_or_dt_pad = kDtPadGpioGpio8,
127 },
128 },
129 [kDtGpioPeriphIoGpio9] = {
130 .__internal = {
131 .type = kDtPeriphIoTypeDio,
132 .dir = kDtPeriphIoDirInout,
133 .periph_input_or_direct_pad = kTopDarjeelingDirectPadsGpioGpio9,
134 .outsel_or_dt_pad = kDtPadGpioGpio9,
135 },
136 },
137 [kDtGpioPeriphIoGpio10] = {
138 .__internal = {
139 .type = kDtPeriphIoTypeDio,
140 .dir = kDtPeriphIoDirInout,
141 .periph_input_or_direct_pad = kTopDarjeelingDirectPadsGpioGpio10,
142 .outsel_or_dt_pad = kDtPadGpioGpio10,
143 },
144 },
145 [kDtGpioPeriphIoGpio11] = {
146 .__internal = {
147 .type = kDtPeriphIoTypeDio,
148 .dir = kDtPeriphIoDirInout,
149 .periph_input_or_direct_pad = kTopDarjeelingDirectPadsGpioGpio11,
150 .outsel_or_dt_pad = kDtPadGpioGpio11,
151 },
152 },
153 [kDtGpioPeriphIoGpio12] = {
154 .__internal = {
155 .type = kDtPeriphIoTypeDio,
156 .dir = kDtPeriphIoDirInout,
157 .periph_input_or_direct_pad = kTopDarjeelingDirectPadsGpioGpio12,
158 .outsel_or_dt_pad = kDtPadGpioGpio12,
159 },
160 },
161 [kDtGpioPeriphIoGpio13] = {
162 .__internal = {
163 .type = kDtPeriphIoTypeDio,
164 .dir = kDtPeriphIoDirInout,
165 .periph_input_or_direct_pad = kTopDarjeelingDirectPadsGpioGpio13,
166 .outsel_or_dt_pad = kDtPadGpioGpio13,
167 },
168 },
169 [kDtGpioPeriphIoGpio14] = {
170 .__internal = {
171 .type = kDtPeriphIoTypeDio,
172 .dir = kDtPeriphIoDirInout,
173 .periph_input_or_direct_pad = kTopDarjeelingDirectPadsGpioGpio14,
174 .outsel_or_dt_pad = kDtPadGpioGpio14,
175 },
176 },
177 [kDtGpioPeriphIoGpio15] = {
178 .__internal = {
179 .type = kDtPeriphIoTypeDio,
180 .dir = kDtPeriphIoDirInout,
181 .periph_input_or_direct_pad = kTopDarjeelingDirectPadsGpioGpio15,
182 .outsel_or_dt_pad = kDtPadGpioGpio15,
183 },
184 },
185 [kDtGpioPeriphIoGpio16] = {
186 .__internal = {
187 .type = kDtPeriphIoTypeDio,
188 .dir = kDtPeriphIoDirInout,
189 .periph_input_or_direct_pad = kTopDarjeelingDirectPadsGpioGpio16,
190 .outsel_or_dt_pad = kDtPadGpioGpio16,
191 },
192 },
193 [kDtGpioPeriphIoGpio17] = {
194 .__internal = {
195 .type = kDtPeriphIoTypeDio,
196 .dir = kDtPeriphIoDirInout,
197 .periph_input_or_direct_pad = kTopDarjeelingDirectPadsGpioGpio17,
198 .outsel_or_dt_pad = kDtPadGpioGpio17,
199 },
200 },
201 [kDtGpioPeriphIoGpio18] = {
202 .__internal = {
203 .type = kDtPeriphIoTypeDio,
204 .dir = kDtPeriphIoDirInout,
205 .periph_input_or_direct_pad = kTopDarjeelingDirectPadsGpioGpio18,
206 .outsel_or_dt_pad = kDtPadGpioGpio18,
207 },
208 },
209 [kDtGpioPeriphIoGpio19] = {
210 .__internal = {
211 .type = kDtPeriphIoTypeDio,
212 .dir = kDtPeriphIoDirInout,
213 .periph_input_or_direct_pad = kTopDarjeelingDirectPadsGpioGpio19,
214 .outsel_or_dt_pad = kDtPadGpioGpio19,
215 },
216 },
217 [kDtGpioPeriphIoGpio20] = {
218 .__internal = {
219 .type = kDtPeriphIoTypeDio,
220 .dir = kDtPeriphIoDirInout,
221 .periph_input_or_direct_pad = kTopDarjeelingDirectPadsGpioGpio20,
222 .outsel_or_dt_pad = kDtPadGpioGpio20,
223 },
224 },
225 [kDtGpioPeriphIoGpio21] = {
226 .__internal = {
227 .type = kDtPeriphIoTypeDio,
228 .dir = kDtPeriphIoDirInout,
229 .periph_input_or_direct_pad = kTopDarjeelingDirectPadsGpioGpio21,
230 .outsel_or_dt_pad = kDtPadGpioGpio21,
231 },
232 },
233 [kDtGpioPeriphIoGpio22] = {
234 .__internal = {
235 .type = kDtPeriphIoTypeDio,
236 .dir = kDtPeriphIoDirInout,
237 .periph_input_or_direct_pad = kTopDarjeelingDirectPadsGpioGpio22,
238 .outsel_or_dt_pad = kDtPadGpioGpio22,
239 },
240 },
241 [kDtGpioPeriphIoGpio23] = {
242 .__internal = {
243 .type = kDtPeriphIoTypeDio,
244 .dir = kDtPeriphIoDirInout,
245 .periph_input_or_direct_pad = kTopDarjeelingDirectPadsGpioGpio23,
246 .outsel_or_dt_pad = kDtPadGpioGpio23,
247 },
248 },
249 [kDtGpioPeriphIoGpio24] = {
250 .__internal = {
251 .type = kDtPeriphIoTypeDio,
252 .dir = kDtPeriphIoDirInout,
253 .periph_input_or_direct_pad = kTopDarjeelingDirectPadsGpioGpio24,
254 .outsel_or_dt_pad = kDtPadGpioGpio24,
255 },
256 },
257 [kDtGpioPeriphIoGpio25] = {
258 .__internal = {
259 .type = kDtPeriphIoTypeDio,
260 .dir = kDtPeriphIoDirInout,
261 .periph_input_or_direct_pad = kTopDarjeelingDirectPadsGpioGpio25,
262 .outsel_or_dt_pad = kDtPadGpioGpio25,
263 },
264 },
265 [kDtGpioPeriphIoGpio26] = {
266 .__internal = {
267 .type = kDtPeriphIoTypeDio,
268 .dir = kDtPeriphIoDirInout,
269 .periph_input_or_direct_pad = kTopDarjeelingDirectPadsGpioGpio26,
270 .outsel_or_dt_pad = kDtPadGpioGpio26,
271 },
272 },
273 [kDtGpioPeriphIoGpio27] = {
274 .__internal = {
275 .type = kDtPeriphIoTypeDio,
276 .dir = kDtPeriphIoDirInout,
277 .periph_input_or_direct_pad = kTopDarjeelingDirectPadsGpioGpio27,
278 .outsel_or_dt_pad = kDtPadGpioGpio27,
279 },
280 },
281 [kDtGpioPeriphIoGpio28] = {
282 .__internal = {
283 .type = kDtPeriphIoTypeDio,
284 .dir = kDtPeriphIoDirInout,
285 .periph_input_or_direct_pad = kTopDarjeelingDirectPadsGpioGpio28,
286 .outsel_or_dt_pad = kDtPadGpioGpio28,
287 },
288 },
289 [kDtGpioPeriphIoGpio29] = {
290 .__internal = {
291 .type = kDtPeriphIoTypeDio,
292 .dir = kDtPeriphIoDirInout,
293 .periph_input_or_direct_pad = kTopDarjeelingDirectPadsGpioGpio29,
294 .outsel_or_dt_pad = kDtPadGpioGpio29,
295 },
296 },
297 [kDtGpioPeriphIoGpio30] = {
298 .__internal = {
299 .type = kDtPeriphIoTypeDio,
300 .dir = kDtPeriphIoDirInout,
301 .periph_input_or_direct_pad = kTopDarjeelingDirectPadsGpioGpio30,
302 .outsel_or_dt_pad = kDtPadGpioGpio30,
303 },
304 },
305 [kDtGpioPeriphIoGpio31] = {
306 .__internal = {
307 .type = kDtPeriphIoTypeDio,
308 .dir = kDtPeriphIoDirInout,
309 .periph_input_or_direct_pad = kTopDarjeelingDirectPadsGpioGpio31,
310 .outsel_or_dt_pad = kDtPadGpioGpio31,
311 },
312 },
313 },
314 },
315};
316
317/**
318 * Return a pointer to the `dt_gpio_desc_t` structure of the requested
319 * `dt` if it's a valid index. Otherwise, this macro will `return` (i.e. exit
320 * the function) with the provided default value.
321 */
322#define TRY_GET_DT(dt, default) ({ if ((dt) < (dt_gpio_t)0 || (dt) >= kDtGpioCount) return (default); &gpio_desc[dt]; })
323
324dt_gpio_t dt_gpio_from_instance_id(dt_instance_id_t inst_id) {
325 if (inst_id >= kDtInstanceIdGpio && inst_id <= kDtInstanceIdGpio) {
326 return (dt_gpio_t)(inst_id - kDtInstanceIdGpio);
327 }
328 return (dt_gpio_t)0;
329}
330
335
336uint32_t dt_gpio_reg_block(
337 dt_gpio_t dt,
338 dt_gpio_reg_block_t reg_block) {
339 // Return a recognizable address in case of wrong argument.
340 return TRY_GET_DT(dt, 0xdeadbeef)->base_addr[reg_block];
341}
342
343dt_plic_irq_id_t dt_gpio_irq_to_plic_id(
344 dt_gpio_t dt,
345 dt_gpio_irq_t irq) {
346 dt_plic_irq_id_t first_irq = TRY_GET_DT(dt, kDtPlicIrqIdNone)->first_irq;
347 if (first_irq == kDtPlicIrqIdNone) {
348 return kDtPlicIrqIdNone;
349 }
350 return (dt_plic_irq_id_t)((uint32_t)first_irq + (uint32_t)irq);
351}
352
353dt_gpio_irq_t dt_gpio_irq_from_plic_id(
354 dt_gpio_t dt,
355 dt_plic_irq_id_t irq) {
356 dt_gpio_irq_t count = kDtGpioIrqCount;
357 dt_plic_irq_id_t first_irq = TRY_GET_DT(dt, count)->first_irq;
358 if (first_irq == kDtPlicIrqIdNone) {
359 return count;
360 }
361 if (irq < first_irq || irq >= first_irq + (dt_plic_irq_id_t)count) {
362 return count;
363 }
364 return (dt_gpio_irq_t)(irq - first_irq);
365}
366
367
368dt_alert_id_t dt_gpio_alert_to_alert_id(
369 dt_gpio_t dt,
370 dt_gpio_alert_t alert) {
371 return (dt_alert_id_t)((uint32_t)gpio_desc[dt].first_alert + (uint32_t)alert);
372}
373
374dt_gpio_alert_t dt_gpio_alert_from_alert_id(
375 dt_gpio_t dt,
376 dt_alert_id_t alert) {
377 dt_gpio_alert_t count = kDtGpioAlertCount;
378 if (alert < gpio_desc[dt].first_alert || alert >= gpio_desc[dt].first_alert + (dt_alert_id_t)count) {
379 return count;
380 }
381 return (dt_gpio_alert_t)(alert - gpio_desc[dt].first_alert);
382}
383
384
385dt_periph_io_t dt_gpio_periph_io(
386 dt_gpio_t dt,
387 dt_gpio_periph_io_t sig) {
388 // Return a harmless value in case of wrong argument.
389 return TRY_GET_DT(dt, kDtPeriphIoConstantHighZ)->periph_io[sig];
390}
391
392dt_clock_t dt_gpio_clock(
393 dt_gpio_t dt,
394 dt_gpio_clock_t clk) {
395 // Return the first clock in case of invalid argument.
396 return TRY_GET_DT(dt, (dt_clock_t)0)->clock[clk];
397}
398
399dt_reset_t dt_gpio_reset(
400 dt_gpio_t dt,
401 dt_gpio_reset_t rst) {
402 const dt_gpio_reset_t count = kDtGpioResetCount;
403 if (rst >= count) {
404 return kDtResetUnknown;
405 }
406 return TRY_GET_DT(dt, kDtResetUnknown)->reset[rst];
407}
408
409