Software APIs
dt_api.h
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1// Copyright lowRISC contributors (OpenTitan project).
2// Licensed under the Apache License, Version 2.0, see LICENSE for details.
3// SPDX-License-Identifier: Apache-2.0
4//
5// Device table API auto-generated by `dtgen`
6
7#ifndef OPENTITAN_TOP_DARJEELING_DT_API_H_
8#define OPENTITAN_TOP_DARJEELING_DT_API_H_
9
10/**
11 * @file
12 * @brief Device Tables (DT) API for top darjeeling
13 *
14 * This file contains the type definitions and global functions of the DT.
15 *
16 * The DT models the chip as a collection of instances. Each instance has
17 * a type (the IP block) and a number of attributes such as I/Os, IRQs
18 * and so on. The DT also provides top-specific lists of global resources
19 * such as I/O pads, clocks and interrupts.
20 */
21
22#include <stddef.h>
23#include <stdint.h>
25
26/**
27 * List of device types.
28 *
29 * Device types are guaranteed to be numbered consecutively from 0.
30 */
31typedef enum dt_device_type {
32 kDtDeviceTypeUnknown = 0, /**< Instance of unknown type */
33 kDtDeviceTypeAcRangeCheck = 1, /**< instance of ac_range_check */
34 kDtDeviceTypeAes = 2, /**< instance of aes */
35 kDtDeviceTypeAlertHandler = 3, /**< instance of alert_handler */
36 kDtDeviceTypeAonTimer = 4, /**< instance of aon_timer */
37 kDtDeviceTypeAst = 5, /**< instance of ast */
38 kDtDeviceTypeClkmgr = 6, /**< instance of clkmgr */
39 kDtDeviceTypeCsrng = 7, /**< instance of csrng */
40 kDtDeviceTypeDma = 8, /**< instance of dma */
41 kDtDeviceTypeEdn = 9, /**< instance of edn */
42 kDtDeviceTypeEntropySrc = 10, /**< instance of entropy_src */
43 kDtDeviceTypeGpio = 11, /**< instance of gpio */
44 kDtDeviceTypeHmac = 12, /**< instance of hmac */
45 kDtDeviceTypeI2c = 13, /**< instance of i2c */
46 kDtDeviceTypeKeymgrDpe = 14, /**< instance of keymgr_dpe */
47 kDtDeviceTypeKmac = 15, /**< instance of kmac */
48 kDtDeviceTypeLcCtrl = 16, /**< instance of lc_ctrl */
49 kDtDeviceTypeMbx = 17, /**< instance of mbx */
50 kDtDeviceTypeOtbn = 18, /**< instance of otbn */
51 kDtDeviceTypeOtpCtrl = 19, /**< instance of otp_ctrl */
52 kDtDeviceTypeOtpMacro = 20, /**< instance of otp_macro */
53 kDtDeviceTypePinmux = 21, /**< instance of pinmux */
54 kDtDeviceTypePwrmgr = 22, /**< instance of pwrmgr */
55 kDtDeviceTypeRaclCtrl = 23, /**< instance of racl_ctrl */
56 kDtDeviceTypeRomCtrl = 24, /**< instance of rom_ctrl */
57 kDtDeviceTypeRstmgr = 25, /**< instance of rstmgr */
58 kDtDeviceTypeRvCoreIbex = 26, /**< instance of rv_core_ibex */
59 kDtDeviceTypeRvDm = 27, /**< instance of rv_dm */
60 kDtDeviceTypeRvPlic = 28, /**< instance of rv_plic */
61 kDtDeviceTypeRvTimer = 29, /**< instance of rv_timer */
62 kDtDeviceTypeSocDbgCtrl = 30, /**< instance of soc_dbg_ctrl */
63 kDtDeviceTypeSocProxy = 31, /**< instance of soc_proxy */
64 kDtDeviceTypeSpiDevice = 32, /**< instance of spi_device */
65 kDtDeviceTypeSpiHost = 33, /**< instance of spi_host */
66 kDtDeviceTypeSramCtrl = 34, /**< instance of sram_ctrl */
67 kDtDeviceTypeUart = 35, /**< instance of uart */
68 kDtDeviceTypeCount = 36, /**< \internal Number of instance types */
70
71/**
72 * List of instance IDs.
73 *
74 * Instance IDs are guaranteed to be numbered consecutively from 0.
75 */
76typedef enum dt_instance_id {
77 kDtInstanceIdUnknown = 0, /**< Unknown instance */
78 kDtInstanceIdAcRangeCheck = 1, /**< instance ac_range_check of ac_range_check */
79 kDtInstanceIdAes = 2, /**< instance aes of aes */
80 kDtInstanceIdAlertHandler = 3, /**< instance alert_handler of alert_handler */
81 kDtInstanceIdAonTimerAon = 4, /**< instance aon_timer_aon of aon_timer */
82 kDtInstanceIdAst = 5, /**< instance ast of ast */
83 kDtInstanceIdClkmgrAon = 6, /**< instance clkmgr_aon of clkmgr */
84 kDtInstanceIdCsrng = 7, /**< instance csrng of csrng */
85 kDtInstanceIdDma = 8, /**< instance dma of dma */
86 kDtInstanceIdEdn0 = 9, /**< instance edn0 of edn */
87 kDtInstanceIdEdn1 = 10, /**< instance edn1 of edn */
88 kDtInstanceIdEntropySrc = 11, /**< instance entropy_src of entropy_src */
89 kDtInstanceIdGpio = 12, /**< instance gpio of gpio */
90 kDtInstanceIdHmac = 13, /**< instance hmac of hmac */
91 kDtInstanceIdI2c0 = 14, /**< instance i2c0 of i2c */
92 kDtInstanceIdKeymgrDpe = 15, /**< instance keymgr_dpe of keymgr_dpe */
93 kDtInstanceIdKmac = 16, /**< instance kmac of kmac */
94 kDtInstanceIdLcCtrl = 17, /**< instance lc_ctrl of lc_ctrl */
95 kDtInstanceIdMbx0 = 18, /**< instance mbx0 of mbx */
96 kDtInstanceIdMbx1 = 19, /**< instance mbx1 of mbx */
97 kDtInstanceIdMbx2 = 20, /**< instance mbx2 of mbx */
98 kDtInstanceIdMbx3 = 21, /**< instance mbx3 of mbx */
99 kDtInstanceIdMbx4 = 22, /**< instance mbx4 of mbx */
100 kDtInstanceIdMbx5 = 23, /**< instance mbx5 of mbx */
101 kDtInstanceIdMbx6 = 24, /**< instance mbx6 of mbx */
102 kDtInstanceIdMbxJtag = 25, /**< instance mbx_jtag of mbx */
103 kDtInstanceIdMbxPcie0 = 26, /**< instance mbx_pcie0 of mbx */
104 kDtInstanceIdMbxPcie1 = 27, /**< instance mbx_pcie1 of mbx */
105 kDtInstanceIdOtbn = 28, /**< instance otbn of otbn */
106 kDtInstanceIdOtpCtrl = 29, /**< instance otp_ctrl of otp_ctrl */
107 kDtInstanceIdOtpMacro = 30, /**< instance otp_macro of otp_macro */
108 kDtInstanceIdPinmuxAon = 31, /**< instance pinmux_aon of pinmux */
109 kDtInstanceIdPwrmgrAon = 32, /**< instance pwrmgr_aon of pwrmgr */
110 kDtInstanceIdRaclCtrl = 33, /**< instance racl_ctrl of racl_ctrl */
111 kDtInstanceIdRomCtrl0 = 34, /**< instance rom_ctrl0 of rom_ctrl */
112 kDtInstanceIdRomCtrl1 = 35, /**< instance rom_ctrl1 of rom_ctrl */
113 kDtInstanceIdRstmgrAon = 36, /**< instance rstmgr_aon of rstmgr */
114 kDtInstanceIdRvCoreIbex = 37, /**< instance rv_core_ibex of rv_core_ibex */
115 kDtInstanceIdRvDm = 38, /**< instance rv_dm of rv_dm */
116 kDtInstanceIdRvPlic = 39, /**< instance rv_plic of rv_plic */
117 kDtInstanceIdRvTimer = 40, /**< instance rv_timer of rv_timer */
118 kDtInstanceIdSocDbgCtrl = 41, /**< instance soc_dbg_ctrl of soc_dbg_ctrl */
119 kDtInstanceIdSocProxy = 42, /**< instance soc_proxy of soc_proxy */
120 kDtInstanceIdSpiDevice = 43, /**< instance spi_device of spi_device */
121 kDtInstanceIdSpiHost0 = 44, /**< instance spi_host0 of spi_host */
122 kDtInstanceIdSramCtrlRetAon = 45, /**< instance sram_ctrl_ret_aon of sram_ctrl */
123 kDtInstanceIdSramCtrlMain = 46, /**< instance sram_ctrl_main of sram_ctrl */
124 kDtInstanceIdSramCtrlMbox = 47, /**< instance sram_ctrl_mbox of sram_ctrl */
125 kDtInstanceIdUart0 = 48, /**< instance uart0 of uart */
126 kDtInstanceIdCount = 49, /**< \internal Number of instance IDs */
128
129/**
130 * Get the instance type of a device instance.
131 *
132 * For example the instance type of `kDtUart0` is `kDtInstanceTypeUart`.
133 *
134 * @param id An instance ID.
135 * @return The instance type, or `kDtInstanceIdUnknown` if the ID is not valid.
136 */
138
139/** PLIC IRQ ID type.
140 *
141 * This type represents a raw IRQ ID from the PLIC.
142 *
143 * This is an alias to the top's `plic_irq_id_t` type for backward compatibility
144 * with existing code.
145 */
147
148/** PLIC IRQ ID for no interrupt. */
149static const dt_plic_irq_id_t kDtPlicIrqIdNone=kTopDarjeelingPlicIrqIdNone;
150
151/**
152 * Get the instance ID for a given PLIC IRQ ID.
153 *
154 * For example, on earlgrey, the instance ID of `kTopEarlgreyPlicIrqIdUart0TxWatermark`
155 * is `kDtInstanceIdUart0`. One can then use the type specific function to retrieve the
156 * IRQ name, for example `dt_uart_irq_from_plic_id` for the UART.
157 *
158 * @param irq A PLIC ID.
159 * @return The instance ID, or `kDtInstanceIdUnknown` if the PLIC ID is not valid.
160 */
162
163/**
164 * Alert ID type.
165 *
166 * This type represents a raw alert ID from the Alert Handler.
167 *
168 * This is an alias to the top's `alert_id_t` type for backward compatibility
169 * with existing code.
170 */
172
173/** Number of alerts. */
174enum {
175 /** Total number of alert IDs. */
176 kDtAlertCount = kTopDarjeelingAlertIdLast + 1,
177};
178
179/**
180 * Get the instance ID for a given alert ID.
181 *
182 * For example, on earlgrey, the instance ID of `kTopEarlgreyAlertIdUart0FatalFault` is
183 * `kDtInstanceIdUart0`. One can then use the type specific function to retrieve the
184 * alert name, for example `dt_uart_alert_from_alert_id` for the UART.
185 *
186 * @param alert An alert ID.
187 * @return The instance ID, or `kDtInstanceIdUnknown` if the alert ID is not valid.
188 */
190
191/**
192 * List of clocks.
193 *
194 * Clocks are guaranteed to be numbered consecutively from 0.
195 */
196typedef enum dt_clock {
197 kDtClockMain = 0, /**< clock main */
198 kDtClockIo = 1, /**< clock io */
199 kDtClockAon = 2, /**< clock aon */
200 kDtClockIoDiv2 = 3, /**< clock io_div2 */
201 kDtClockIoDiv4 = 4, /**< clock io_div4 */
202 kDtClockCount = 5, /**< \internal Number of clocks */
204
205/**
206 * Get the frequency of a clock.
207 *
208 * @param clk A clock ID.
209 * @return Clock frequency in Hz.
210 */
212
213/**
214 * List of resets.
215 *
216 * Resets are guaranteed to be numbered consecutively from 0.
217 */
218typedef enum dt_reset {
219 kDtResetUnknown = 0, /**< Unknown reset */
220 kDtResetPorAon = 1, /**< Reset node por_aon */
221 kDtResetLcSrc = 2, /**< Reset node lc_src */
222 kDtResetSysSrc = 3, /**< Reset node sys_src */
223 kDtResetPor = 4, /**< Reset node por */
224 kDtResetPorIo = 5, /**< Reset node por_io */
225 kDtResetPorIoDiv2 = 6, /**< Reset node por_io_div2 */
226 kDtResetPorIoDiv4 = 7, /**< Reset node por_io_div4 */
227 kDtResetLc = 8, /**< Reset node lc */
228 kDtResetLcAon = 9, /**< Reset node lc_aon */
229 kDtResetLcIo = 10, /**< Reset node lc_io */
230 kDtResetLcIoDiv2 = 11, /**< Reset node lc_io_div2 */
231 kDtResetLcIoDiv4 = 12, /**< Reset node lc_io_div4 */
232 kDtResetSys = 13, /**< Reset node sys */
233 kDtResetSysIoDiv4 = 14, /**< Reset node sys_io_div4 */
234 kDtResetSpiDevice = 15, /**< Reset node spi_device */
235 kDtResetSpiHost0 = 16, /**< Reset node spi_host0 */
236 kDtResetI2c0 = 17, /**< Reset node i2c0 */
237 kDtResetCount = 18, /**< \internal Number of resets */
239
240/**
241 * List of pads names.
242 */
243typedef enum dt_pad {
244 kDtPadMio0 = 0, /**< Muxed IO pad */
245 kDtPadMio1 = 1, /**< Muxed IO pad */
246 kDtPadMio2 = 2, /**< Muxed IO pad */
247 kDtPadMio3 = 3, /**< Muxed IO pad */
248 kDtPadMio4 = 4, /**< Muxed IO pad */
249 kDtPadMio5 = 5, /**< Muxed IO pad */
250 kDtPadMio6 = 6, /**< Muxed IO pad */
251 kDtPadMio7 = 7, /**< Muxed IO pad */
252 kDtPadMio8 = 8, /**< Muxed IO pad */
253 kDtPadMio9 = 9, /**< Muxed IO pad */
254 kDtPadMio10 = 10, /**< Muxed IO pad */
255 kDtPadMio11 = 11, /**< Muxed IO pad */
256 kDtPadSpiHost0Sd0 = 12, /**< SPI host data */
257 kDtPadSpiHost0Sd1 = 13, /**< SPI host data */
258 kDtPadSpiHost0Sd2 = 14, /**< SPI host data */
259 kDtPadSpiHost0Sd3 = 15, /**< SPI host data */
260 kDtPadSpiDeviceSd0 = 16, /**< SPI device data */
261 kDtPadSpiDeviceSd1 = 17, /**< SPI device data */
262 kDtPadSpiDeviceSd2 = 18, /**< SPI device data */
263 kDtPadSpiDeviceSd3 = 19, /**< SPI device data */
264 kDtPadI2c0Scl = 20, /**< I2C clock */
265 kDtPadI2c0Sda = 21, /**< I2C data */
266 kDtPadGpioGpio0 = 22, /**< GPIO pad */
267 kDtPadGpioGpio1 = 23, /**< GPIO pad */
268 kDtPadGpioGpio2 = 24, /**< GPIO pad */
269 kDtPadGpioGpio3 = 25, /**< GPIO pad */
270 kDtPadGpioGpio4 = 26, /**< GPIO pad */
271 kDtPadGpioGpio5 = 27, /**< GPIO pad */
272 kDtPadGpioGpio6 = 28, /**< GPIO pad */
273 kDtPadGpioGpio7 = 29, /**< GPIO pad */
274 kDtPadGpioGpio8 = 30, /**< GPIO pad */
275 kDtPadGpioGpio9 = 31, /**< GPIO pad */
276 kDtPadGpioGpio10 = 32, /**< GPIO pad */
277 kDtPadGpioGpio11 = 33, /**< GPIO pad */
278 kDtPadGpioGpio12 = 34, /**< GPIO pad */
279 kDtPadGpioGpio13 = 35, /**< GPIO pad */
280 kDtPadGpioGpio14 = 36, /**< GPIO pad */
281 kDtPadGpioGpio15 = 37, /**< GPIO pad */
282 kDtPadGpioGpio16 = 38, /**< GPIO pad */
283 kDtPadGpioGpio17 = 39, /**< GPIO pad */
284 kDtPadGpioGpio18 = 40, /**< GPIO pad */
285 kDtPadGpioGpio19 = 41, /**< GPIO pad */
286 kDtPadGpioGpio20 = 42, /**< GPIO pad */
287 kDtPadGpioGpio21 = 43, /**< GPIO pad */
288 kDtPadGpioGpio22 = 44, /**< GPIO pad */
289 kDtPadGpioGpio23 = 45, /**< GPIO pad */
290 kDtPadGpioGpio24 = 46, /**< GPIO pad */
291 kDtPadGpioGpio25 = 47, /**< GPIO pad */
292 kDtPadGpioGpio26 = 48, /**< GPIO pad */
293 kDtPadGpioGpio27 = 49, /**< GPIO pad */
294 kDtPadGpioGpio28 = 50, /**< GPIO pad */
295 kDtPadGpioGpio29 = 51, /**< GPIO pad */
296 kDtPadGpioGpio30 = 52, /**< GPIO pad */
297 kDtPadGpioGpio31 = 53, /**< GPIO pad */
298 kDtPadSpiDeviceSck = 54, /**< SPI device clock */
299 kDtPadSpiDeviceCsb = 55, /**< SPI device chip select */
300 kDtPadSpiDeviceTpmCsb = 56, /**< SPI device TPM chip select */
301 kDtPadUart0Rx = 57, /**< UART receive */
302 kDtPadSocProxySocGpi0 = 58, /**< SoC general purpose input */
303 kDtPadSocProxySocGpi1 = 59, /**< SoC general purpose input */
304 kDtPadSocProxySocGpi2 = 60, /**< SoC general purpose input */
305 kDtPadSocProxySocGpi3 = 61, /**< SoC general purpose input */
306 kDtPadSocProxySocGpi4 = 62, /**< SoC general purpose input */
307 kDtPadSocProxySocGpi5 = 63, /**< SoC general purpose input */
308 kDtPadSocProxySocGpi6 = 64, /**< SoC general purpose input */
309 kDtPadSocProxySocGpi7 = 65, /**< SoC general purpose input */
310 kDtPadSocProxySocGpi8 = 66, /**< SoC general purpose input */
311 kDtPadSocProxySocGpi9 = 67, /**< SoC general purpose input */
312 kDtPadSocProxySocGpi10 = 68, /**< SoC general purpose input */
313 kDtPadSocProxySocGpi11 = 69, /**< SoC general purpose input */
314 kDtPadSpiHost0Sck = 70, /**< SPI host clock */
315 kDtPadSpiHost0Csb = 71, /**< SPI host chip select */
316 kDtPadUart0Tx = 72, /**< UART transmit */
317 kDtPadSocProxySocGpo0 = 73, /**< SoC general purpose output */
318 kDtPadSocProxySocGpo1 = 74, /**< SoC general purpose output */
319 kDtPadSocProxySocGpo2 = 75, /**< SoC general purpose output */
320 kDtPadSocProxySocGpo3 = 76, /**< SoC general purpose output */
321 kDtPadSocProxySocGpo4 = 77, /**< SoC general purpose output */
322 kDtPadSocProxySocGpo5 = 78, /**< SoC general purpose output */
323 kDtPadSocProxySocGpo6 = 79, /**< SoC general purpose output */
324 kDtPadSocProxySocGpo7 = 80, /**< SoC general purpose output */
325 kDtPadSocProxySocGpo8 = 81, /**< SoC general purpose output */
326 kDtPadSocProxySocGpo9 = 82, /**< SoC general purpose output */
327 kDtPadSocProxySocGpo10 = 83, /**< SoC general purpose output */
328 kDtPadSocProxySocGpo11 = 84, /**< SoC general purpose output */
329 kDtPadCount = 85, /**< \internal Number of pads */
331
332/**
333 * Pinmux types.
334 *
335 * These types are aliases to top-level types for backward compatibility
336 * with existing code.
337 */
339typedef top_darjeeling_pinmux_insel_t dt_pinmux_insel_t;
340typedef top_darjeeling_pinmux_outsel_t dt_pinmux_outsel_t;
341typedef top_darjeeling_pinmux_mio_out_t dt_pinmux_mio_out_t;
342typedef top_darjeeling_direct_pads_t dt_pinmux_direct_pad_t;
343typedef top_darjeeling_muxed_pads_t dt_pinmux_muxed_pad_t;
344
345/** Type of peripheral I/O. */
346typedef enum dt_periph_io_type {
347 /** This peripheral I/O is connected to a muxed IO (MIO). */
349 /** This peripheral I/O is connected to a direct IO (DIO). */
351 /** This peripheral I/O is not connected to either a MIO or a DIO. */
354
355
356/** Direction of a peripheral I/O. */
357typedef enum dt_periph_io_dir {
358 /** This peripheral I/O is an input. */
360 /** This peripheral I/O is an output */
362 /** This peripheral I/O is an input-output */
365
366/** Peripheral I/O description.
367 *
368 * A `dt_periph_io_t` represents a HW IP block peripheral I/O, which can be an input, output or both.
369 * Importantly, this only represents how the block peripheral I/O is wired, i.e.
370 * whether it is connected a MIO or a direct IO on the pinmux, and the relevant information necessary to
371 * configure it.
372 *
373 * **Note:** The fields of this structure are internal, use the dt_periph_io_* functions to access them.
374 */
375typedef struct dt_periph_io {
376 struct {
377 dt_periph_io_type_t type; /**< Peripheral I/O type */
378 dt_periph_io_dir_t dir; /**< Peripheral I/O direction */
379 /**
380 * For `kDtPeriphIoTypeMio`: peripheral input number. This is the index of the MIO_PERIPH_INSEL register
381 * that controls this peripheral I/O.
382 *
383 * For `kDtPeriphIoTypeDio`: DIO pad number. This is the index of the various DIO_PAD_* registers
384 * that control this peripheral I/O.
385 */
386 uint16_t periph_input_or_direct_pad;
387 /**
388 * For `kDtPeriphIoTypeMio`: peripheral output number. This is the value to put in the MIO_OUTSEL registers
389 * to connect an output to this peripheral I/O. For `kDtPeriphIoTypeDio`: the pad index (`dt_pad_t`) to which this I/O is connected.
390 */
391 uint16_t outsel_or_dt_pad;
392 } __internal; /**< Private fields */
394
395
396/** Tie constantly to zero. */
397static const dt_pinmux_outsel_t kDtPinmuxOutselConstantZero = kTopDarjeelingPinmuxOutselConstantZero;
398
399/** Tie constantly to one. */
400static const dt_pinmux_outsel_t kDtPinmuxOutselConstantOne = kTopDarjeelingPinmuxOutselConstantOne;
401
402/** Tie constantly to high-Z. */
403static const dt_pinmux_outsel_t kDtPinmuxOutselConstantHighZ = kTopDarjeelingPinmuxOutselConstantHighZ;
404
405/* Peripheral I/O that is constantly tied to high-Z (output only) */
406extern const dt_periph_io_t kDtPeriphIoConstantHighZ;
407
408/* Peripheral I/O that is constantly tied to one (output only) */
409extern const dt_periph_io_t kDtPeriphIoConstantZero;
410
411/* Peripheral I/O that is constantly tied to zero (output only) */
412extern const dt_periph_io_t kDtPeriphIoConstantOne;
413
414/**
415 * Return the type of a `dt_periph_io_t`.
416 *
417 * @param periph_io A peripheral I/O description.
418 * @return The peripheral I/O type (MIO, DIO, etc).
419 */
421 return periph_io.__internal.type;
422}
423
424/**
425 * Return the direction of a `dt_periph_io_t`.
426 *
427 * @param periph_io A peripheral I/O description.
428 * @return The peripheral I/O direction.
429 */
430static inline dt_periph_io_dir_t dt_periph_io_dir(dt_periph_io_t periph_io) {
431 return periph_io.__internal.dir;
432}
433
434/**
435 * Return the peripheral input for an MIO peripheral I/O.
436 *
437 * This is the index of the `MIO_PERIPH_INSEL` pinmux register that controls this peripheral I/O.
438 *
439 * @param periph_io A peripheral I/O of type `kDtPeriphIoTypeMio`.
440 * @return The peripheral input number of the MIO that this peripheral I/O is connected to.
441 *
442 * **Note:** This function only makes sense for peripheral I/Os of type `kDtPeriphIoTypeMio` which are
443 * inputs (`kDtPeriphIoDirIn`). For any other peripheral I/O, the return value is unspecified.
444 */
445static inline dt_pinmux_peripheral_in_t dt_periph_io_mio_periph_input(dt_periph_io_t periph_io) {
446 return (dt_pinmux_peripheral_in_t)periph_io.__internal.periph_input_or_direct_pad;
447}
448
449/**
450 * Return the outsel for an MIO peripheral I/O.
451 *
452 * This is the value to put in the `MIO_OUTSEL` pinmux registers to connect a pad to this peripheral I/O.
453 *
454 * @param periph_io A peripheral I/O of type `kDtPeriphIoTypeMio`.
455 * @return The outsel of the MIO that this peripheral I/O is connected to.
456 *
457 * **Note:** This function only makes sense for peripheral I/Os of type `kDtPeriphIoTypeMio` which are
458 * outputs (`kDtPeriphIoDirOut`). For any other peripheral I/O, the return value is unspecified.
459 */
460static inline dt_pinmux_outsel_t dt_periph_io_mio_outsel(dt_periph_io_t periph_io) {
461 return (dt_pinmux_outsel_t)periph_io.__internal.outsel_or_dt_pad;
462}
463
464/**
465 * Return the direct pad number of a DIO peripheral I/O.
466 *
467 * This is the index of the various `DIO_PAD_*` pinmux registers that control this peripheral I/O.
468 *
469 * @param periph_io A peripheral I/O of type `kDtPeriphIoTypeDio`.
470 * @return The direct pad number of the DIO that this peripheral I/O is connected to.
471 *
472 * **Note:** This function only makes sense for peripheral I/Os of type `kDtPeriphIoTypeDio` which are
473 * either outputs or inouts. For any other peripheral I/O type, the return value is unspecified.
474 */
475static inline dt_pinmux_direct_pad_t dt_periph_io_dio_pad_index(dt_periph_io_t periph_io) {
476 return (dt_pinmux_direct_pad_t)periph_io.__internal.periph_input_or_direct_pad;
477}
478
479/**
480 * Return the pad of a DIO peripheral I/O.
481 *
482 * @param periph_io A peripheral I/O of type `kDtPeriphIoTypeDio`.
483 * @return The pad to which this peripheral I/O is connected to.
484 *
485 * **Note:** This function only makes sense for peripheral I/Os of type `kDtPeriphIoTypeDio` which are
486 * either outputs or inouts. For any other peripheral I/O type, the return value is unspecified.
487 */
488static inline dt_pad_t dt_periph_io_dio_pad(dt_periph_io_t periph_io) {
489 return (dt_pad_t)periph_io.__internal.outsel_or_dt_pad;
490}
491
492/** Type of a pad. */
493typedef enum dt_pad_type {
494 /** This pad is a muxed IO (MIO). */
496 /** This pad is a direct IO (DIO). */
498 /** This pad is not an MIO or a DIO. */
501
502/**
503 * Return the type of a `dt_pad_t`.
504 *
505 * @param pad A pad description.
506 * @return The pad type (MIO, DIO, etc).
507 */
509
510/**
511 * Return the pad out number for an MIO pad.
512 *
513 * This is the index of the `MIO_OUT` registers that control this pad
514 * (or the output part of this pad).
515 *
516 * @param pad A pad of type `kDtPadTypeMio`.
517 * @return The pad out number of the MIO.
518 *
519 * **Note:** This function only makes sense for pads of type `kDtPadTypeMio` which are
520 * either inputs or inouts. For any other pad, the return value is unspecified.
521 */
522dt_pinmux_mio_out_t dt_pad_mio_out(dt_pad_t pad);
523
524/**
525 * Return the pad out number for an MIO pad.
526 *
527 * This is the index of the `MIO_PAD` registers that control this pad
528 * (or the output part of this pad).
529 *
530 * @param pad A pad of type `kDtPadTypeMio`.
531 * @return The pad out number of the MIO.
532 *
533 * **Note:** This function only makes sense for pads of type `kDtPadTypeMio`.
534 * For any other pad, the return value is unspecified.
535 */
536dt_pinmux_muxed_pad_t dt_pad_mio_pad_index(dt_pad_t pad);
537
538/**
539 * Return the insel for an MIO pad.
540 *
541 * This is the value to put in the `MIO_PERIPH_INSEL` registers to connect a peripheral I/O to this pad.
542 *
543 * @param pad A pad of type `kDtPadTypeMio`.
544 * @return The insel of the MIO that this pad is connected to.
545 *
546 * **Note:** This function only makes sense for pads of type `kDtPadTypeMio`.
547 * For any other pad, the return value is unspecified.
548 */
549dt_pinmux_insel_t dt_pad_mio_insel(dt_pad_t pad);
550
551/**
552 * Return the direct pad number of a DIO pad.
553 *
554 * This is the index of the various `DIO_PAD_*` registers that control this pad.
555 *
556 * @param pad A pad of type `kDtPadTypeDio`.
557 * @return The direct pad number of the DID that this pad is connected to.
558 *
559 * **Note:** This function only makes sense for pads of type `kDtPeriphIoTypeDio` which are
560 * either outputs or inouts. For any other pad type, the return value is unspecified.
561 */
562dt_pinmux_direct_pad_t dt_pad_dio_pad_index(dt_pad_t pad);
563
564#endif // OPENTITAN_TOP_DARJEELING_DT_API_H_