Software APIs
dt_api.h
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1// Copyright lowRISC contributors (OpenTitan project).
2// Licensed under the Apache License, Version 2.0, see LICENSE for details.
3// SPDX-License-Identifier: Apache-2.0
4//
5// Device table API auto-generated by `dtgen`
6
7#ifndef OPENTITAN_TOP_DARJEELING_DT_API_H_
8#define OPENTITAN_TOP_DARJEELING_DT_API_H_
9
10#ifdef __cplusplus
11extern "C" {
12#endif // __cplusplus
13
14/**
15 * @file
16 * @brief Device Tables (DT) API for top darjeeling
17 *
18 * This file contains the type definitions and global functions of the DT.
19 *
20 * The DT models the chip as a collection of instances. Each instance has
21 * a type (the IP block) and a number of attributes such as I/Os, IRQs
22 * and so on. The DT also provides top-specific lists of global resources
23 * such as I/O pads, clocks and interrupts.
24 */
25
26#include <stddef.h>
27#include <stdint.h>
28#include "hw/top_darjeeling/sw/autogen/top_darjeeling.h"
29
30/**
31 * List of device types.
32 *
33 * Device types are guaranteed to be numbered consecutively from 0.
34 */
35typedef enum dt_device_type {
36 kDtDeviceTypeUnknown = 0, /**< Instance of unknown type */
37 kDtDeviceTypeAcRangeCheck = 1, /**< instance of ac_range_check */
38 kDtDeviceTypeAes = 2, /**< instance of aes */
39 kDtDeviceTypeAlertHandler = 3, /**< instance of alert_handler */
40 kDtDeviceTypeAonTimer = 4, /**< instance of aon_timer */
41 kDtDeviceTypeAst = 5, /**< instance of ast */
42 kDtDeviceTypeClkmgr = 6, /**< instance of clkmgr */
43 kDtDeviceTypeCsrng = 7, /**< instance of csrng */
44 kDtDeviceTypeDma = 8, /**< instance of dma */
45 kDtDeviceTypeEdn = 9, /**< instance of edn */
46 kDtDeviceTypeEntropySrc = 10, /**< instance of entropy_src */
47 kDtDeviceTypeGpio = 11, /**< instance of gpio */
48 kDtDeviceTypeHmac = 12, /**< instance of hmac */
49 kDtDeviceTypeI2c = 13, /**< instance of i2c */
50 kDtDeviceTypeKeymgrDpe = 14, /**< instance of keymgr_dpe */
51 kDtDeviceTypeKmac = 15, /**< instance of kmac */
52 kDtDeviceTypeLcCtrl = 16, /**< instance of lc_ctrl */
53 kDtDeviceTypeMbx = 17, /**< instance of mbx */
54 kDtDeviceTypeOtbn = 18, /**< instance of otbn */
55 kDtDeviceTypeOtpCtrl = 19, /**< instance of otp_ctrl */
56 kDtDeviceTypeOtpMacro = 20, /**< instance of otp_macro */
57 kDtDeviceTypePinmux = 21, /**< instance of pinmux */
58 kDtDeviceTypePwrmgr = 22, /**< instance of pwrmgr */
59 kDtDeviceTypeRaclCtrl = 23, /**< instance of racl_ctrl */
60 kDtDeviceTypeRomCtrl = 24, /**< instance of rom_ctrl */
61 kDtDeviceTypeRstmgr = 25, /**< instance of rstmgr */
62 kDtDeviceTypeRvCoreIbex = 26, /**< instance of rv_core_ibex */
63 kDtDeviceTypeRvDm = 27, /**< instance of rv_dm */
64 kDtDeviceTypeRvPlic = 28, /**< instance of rv_plic */
65 kDtDeviceTypeRvTimer = 29, /**< instance of rv_timer */
66 kDtDeviceTypeSocDbgCtrl = 30, /**< instance of soc_dbg_ctrl */
67 kDtDeviceTypeSocProxy = 31, /**< instance of soc_proxy */
68 kDtDeviceTypeSpiDevice = 32, /**< instance of spi_device */
69 kDtDeviceTypeSpiHost = 33, /**< instance of spi_host */
70 kDtDeviceTypeSramCtrl = 34, /**< instance of sram_ctrl */
71 kDtDeviceTypeUart = 35, /**< instance of uart */
72 kDtDeviceTypeCount = 36, /**< \internal Number of instance types */
73} dt_device_type_t;
74
75/**
76 * List of instance IDs.
77 *
78 * Instance IDs are guaranteed to be numbered consecutively from 0.
79 */
80typedef enum dt_instance_id {
81 kDtInstanceIdUnknown = 0, /**< Unknown instance */
82 kDtInstanceIdAcRangeCheck = 1, /**< instance ac_range_check of ac_range_check */
83 kDtInstanceIdAes = 2, /**< instance aes of aes */
84 kDtInstanceIdAlertHandler = 3, /**< instance alert_handler of alert_handler */
85 kDtInstanceIdAonTimerAon = 4, /**< instance aon_timer_aon of aon_timer */
86 kDtInstanceIdAst = 5, /**< instance ast of ast */
87 kDtInstanceIdClkmgrAon = 6, /**< instance clkmgr_aon of clkmgr */
88 kDtInstanceIdCsrng = 7, /**< instance csrng of csrng */
89 kDtInstanceIdDma = 8, /**< instance dma of dma */
90 kDtInstanceIdEdn0 = 9, /**< instance edn0 of edn */
91 kDtInstanceIdEdn1 = 10, /**< instance edn1 of edn */
92 kDtInstanceIdEntropySrc = 11, /**< instance entropy_src of entropy_src */
93 kDtInstanceIdGpio = 12, /**< instance gpio of gpio */
94 kDtInstanceIdHmac = 13, /**< instance hmac of hmac */
95 kDtInstanceIdI2c0 = 14, /**< instance i2c0 of i2c */
96 kDtInstanceIdKeymgrDpe = 15, /**< instance keymgr_dpe of keymgr_dpe */
97 kDtInstanceIdKmac = 16, /**< instance kmac of kmac */
98 kDtInstanceIdLcCtrl = 17, /**< instance lc_ctrl of lc_ctrl */
99 kDtInstanceIdMbx0 = 18, /**< instance mbx0 of mbx */
100 kDtInstanceIdMbx1 = 19, /**< instance mbx1 of mbx */
101 kDtInstanceIdMbx2 = 20, /**< instance mbx2 of mbx */
102 kDtInstanceIdMbx3 = 21, /**< instance mbx3 of mbx */
103 kDtInstanceIdMbx4 = 22, /**< instance mbx4 of mbx */
104 kDtInstanceIdMbx5 = 23, /**< instance mbx5 of mbx */
105 kDtInstanceIdMbx6 = 24, /**< instance mbx6 of mbx */
106 kDtInstanceIdMbxJtag = 25, /**< instance mbx_jtag of mbx */
107 kDtInstanceIdMbxPcie0 = 26, /**< instance mbx_pcie0 of mbx */
108 kDtInstanceIdMbxPcie1 = 27, /**< instance mbx_pcie1 of mbx */
109 kDtInstanceIdOtbn = 28, /**< instance otbn of otbn */
110 kDtInstanceIdOtpCtrl = 29, /**< instance otp_ctrl of otp_ctrl */
111 kDtInstanceIdOtpMacro = 30, /**< instance otp_macro of otp_macro */
112 kDtInstanceIdPinmuxAon = 31, /**< instance pinmux_aon of pinmux */
113 kDtInstanceIdPwrmgrAon = 32, /**< instance pwrmgr_aon of pwrmgr */
114 kDtInstanceIdRaclCtrl = 33, /**< instance racl_ctrl of racl_ctrl */
115 kDtInstanceIdRomCtrl0 = 34, /**< instance rom_ctrl0 of rom_ctrl */
116 kDtInstanceIdRomCtrl1 = 35, /**< instance rom_ctrl1 of rom_ctrl */
117 kDtInstanceIdRstmgrAon = 36, /**< instance rstmgr_aon of rstmgr */
118 kDtInstanceIdRvCoreIbex = 37, /**< instance rv_core_ibex of rv_core_ibex */
119 kDtInstanceIdRvDm = 38, /**< instance rv_dm of rv_dm */
120 kDtInstanceIdRvPlic = 39, /**< instance rv_plic of rv_plic */
121 kDtInstanceIdRvTimer = 40, /**< instance rv_timer of rv_timer */
122 kDtInstanceIdSocDbgCtrl = 41, /**< instance soc_dbg_ctrl of soc_dbg_ctrl */
123 kDtInstanceIdSocProxy = 42, /**< instance soc_proxy of soc_proxy */
124 kDtInstanceIdSpiDevice = 43, /**< instance spi_device of spi_device */
125 kDtInstanceIdSpiHost0 = 44, /**< instance spi_host0 of spi_host */
126 kDtInstanceIdSramCtrlRetAon = 45, /**< instance sram_ctrl_ret_aon of sram_ctrl */
127 kDtInstanceIdSramCtrlMain = 46, /**< instance sram_ctrl_main of sram_ctrl */
128 kDtInstanceIdSramCtrlMbox = 47, /**< instance sram_ctrl_mbox of sram_ctrl */
129 kDtInstanceIdUart0 = 48, /**< instance uart0 of uart */
130 kDtInstanceIdCount = 49, /**< \internal Number of instance IDs */
131} dt_instance_id_t;
132
133/**
134 * Get the instance type of a device instance.
135 *
136 * For example the instance type of `kDtUart0` is `kDtInstanceTypeUart`.
137 *
138 * @param id An instance ID.
139 * @return The instance type, or `kDtInstanceIdUnknown` if the ID is not valid.
140 */
141dt_device_type_t dt_device_type(dt_instance_id_t id);
142
143/** PLIC IRQ ID type.
144 *
145 * This type represents a raw IRQ ID from the PLIC.
146 *
147 * This is an alias to the top's `plic_irq_id_t` type for backward compatibility
148 * with existing code.
149 */
150typedef top_darjeeling_plic_irq_id_t dt_plic_irq_id_t;
151
152/** PLIC IRQ ID for no interrupt. */
153static const dt_plic_irq_id_t kDtPlicIrqIdNone = kTopDarjeelingPlicIrqIdNone;
154
155/**
156 * Get the instance ID for a given PLIC IRQ ID.
157 *
158 * For example, on earlgrey, the instance ID of `kTopEarlgreyPlicIrqIdUart0TxWatermark`
159 * is `kDtInstanceIdUart0`. One can then use the type specific function to retrieve the
160 * IRQ name, for example `dt_uart_irq_from_plic_id` for the UART.
161 *
162 * @param irq A PLIC ID.
163 * @return The instance ID, or `kDtInstanceIdUnknown` if the PLIC ID is not valid.
164 */
165dt_instance_id_t dt_plic_id_to_instance_id(dt_plic_irq_id_t irq);
166
167/**
168 * Alert ID type.
169 *
170 * This type represents a raw alert ID from the Alert Handler.
171 *
172 * This is an alias to the top's `alert_id_t` type for backward compatibility
173 * with existing code.
174 */
175typedef top_darjeeling_alert_id_t dt_alert_id_t;
176
177/** Number of alerts. */
178enum {
179 /** Total number of alert IDs. */
180 kDtAlertCount = kTopDarjeelingAlertIdLast + 1,
181};
182
183/**
184 * Get the instance ID for a given alert ID.
185 *
186 * For example, on earlgrey, the instance ID of `kTopEarlgreyAlertIdUart0FatalFault` is
187 * `kDtInstanceIdUart0`. One can then use the type specific function to retrieve the
188 * alert name, for example `dt_uart_alert_from_alert_id` for the UART.
189 *
190 * @param alert An alert ID.
191 * @return The instance ID, or `kDtInstanceIdUnknown` if the alert ID is not valid.
192 */
193dt_instance_id_t dt_alert_id_to_instance_id(dt_alert_id_t alert);
194
195/**
196 * List of clocks.
197 *
198 * Clocks are guaranteed to be numbered consecutively from 0.
199 */
200typedef enum dt_clock {
201 kDtClockMain = 0, /**< clock main */
202 kDtClockIo = 1, /**< clock io */
203 kDtClockAon = 2, /**< clock aon */
204 kDtClockCount = 3, /**< \internal Number of clocks */
205} dt_clock_t;
206
207/**
208 * Get the frequency of a clock.
209 *
210 * @param clk A clock ID.
211 * @return Clock frequency in Hz.
212 */
213uint32_t dt_clock_frequency(dt_clock_t clk);
214
215/**
216 * List of resets.
217 *
218 * Resets are guaranteed to be numbered consecutively from 0.
219 */
220typedef enum dt_reset {
221 kDtResetUnknown = 0, /**< Unknown reset */
222 kDtResetPorAon = 1, /**< Reset node por_aon */
223 kDtResetLcSrc = 2, /**< Reset node lc_src */
224 kDtResetSysSrc = 3, /**< Reset node sys_src */
225 kDtResetPor = 4, /**< Reset node por */
226 kDtResetPorIo = 5, /**< Reset node por_io */
227 kDtResetLc = 6, /**< Reset node lc */
228 kDtResetLcAon = 7, /**< Reset node lc_aon */
229 kDtResetLcIo = 8, /**< Reset node lc_io */
230 kDtResetSys = 9, /**< Reset node sys */
231 kDtResetSpiDevice = 10, /**< Reset node spi_device */
232 kDtResetSpiHost0 = 11, /**< Reset node spi_host0 */
233 kDtResetI2c0 = 12, /**< Reset node i2c0 */
234 kDtResetCount = 13, /**< \internal Number of resets */
235} dt_reset_t;
236
237/**
238 * List of pads names.
239 */
240typedef enum dt_pad {
241 kDtPadConstantZero = 0, /**< Pad that is constantly tied to zero (input) */
242 kDtPadConstantOne = 1, /**< Pad that is constantly tied to one (input) */
243 kDtPadMio0 = 2, /**< Muxed IO pad */
244 kDtPadMio1 = 3, /**< Muxed IO pad */
245 kDtPadMio2 = 4, /**< Muxed IO pad */
246 kDtPadMio3 = 5, /**< Muxed IO pad */
247 kDtPadMio4 = 6, /**< Muxed IO pad */
248 kDtPadMio5 = 7, /**< Muxed IO pad */
249 kDtPadMio6 = 8, /**< Muxed IO pad */
250 kDtPadMio7 = 9, /**< Muxed IO pad */
251 kDtPadMio8 = 10, /**< Muxed IO pad */
252 kDtPadMio9 = 11, /**< Muxed IO pad */
253 kDtPadMio10 = 12, /**< Muxed IO pad */
254 kDtPadMio11 = 13, /**< Muxed IO pad */
255 kDtPadSpiHost0Sd0 = 14, /**< SPI host data */
256 kDtPadSpiHost0Sd1 = 15, /**< SPI host data */
257 kDtPadSpiHost0Sd2 = 16, /**< SPI host data */
258 kDtPadSpiHost0Sd3 = 17, /**< SPI host data */
259 kDtPadSpiDeviceSd0 = 18, /**< SPI device data */
260 kDtPadSpiDeviceSd1 = 19, /**< SPI device data */
261 kDtPadSpiDeviceSd2 = 20, /**< SPI device data */
262 kDtPadSpiDeviceSd3 = 21, /**< SPI device data */
263 kDtPadI2c0Scl = 22, /**< I2C clock */
264 kDtPadI2c0Sda = 23, /**< I2C data */
265 kDtPadGpioGpio0 = 24, /**< GPIO pad */
266 kDtPadGpioGpio1 = 25, /**< GPIO pad */
267 kDtPadGpioGpio2 = 26, /**< GPIO pad */
268 kDtPadGpioGpio3 = 27, /**< GPIO pad */
269 kDtPadGpioGpio4 = 28, /**< GPIO pad */
270 kDtPadGpioGpio5 = 29, /**< GPIO pad */
271 kDtPadGpioGpio6 = 30, /**< GPIO pad */
272 kDtPadGpioGpio7 = 31, /**< GPIO pad */
273 kDtPadGpioGpio8 = 32, /**< GPIO pad */
274 kDtPadGpioGpio9 = 33, /**< GPIO pad */
275 kDtPadGpioGpio10 = 34, /**< GPIO pad */
276 kDtPadGpioGpio11 = 35, /**< GPIO pad */
277 kDtPadGpioGpio12 = 36, /**< GPIO pad */
278 kDtPadGpioGpio13 = 37, /**< GPIO pad */
279 kDtPadGpioGpio14 = 38, /**< GPIO pad */
280 kDtPadGpioGpio15 = 39, /**< GPIO pad */
281 kDtPadGpioGpio16 = 40, /**< GPIO pad */
282 kDtPadGpioGpio17 = 41, /**< GPIO pad */
283 kDtPadGpioGpio18 = 42, /**< GPIO pad */
284 kDtPadGpioGpio19 = 43, /**< GPIO pad */
285 kDtPadGpioGpio20 = 44, /**< GPIO pad */
286 kDtPadGpioGpio21 = 45, /**< GPIO pad */
287 kDtPadGpioGpio22 = 46, /**< GPIO pad */
288 kDtPadGpioGpio23 = 47, /**< GPIO pad */
289 kDtPadGpioGpio24 = 48, /**< GPIO pad */
290 kDtPadGpioGpio25 = 49, /**< GPIO pad */
291 kDtPadGpioGpio26 = 50, /**< GPIO pad */
292 kDtPadGpioGpio27 = 51, /**< GPIO pad */
293 kDtPadGpioGpio28 = 52, /**< GPIO pad */
294 kDtPadGpioGpio29 = 53, /**< GPIO pad */
295 kDtPadGpioGpio30 = 54, /**< GPIO pad */
296 kDtPadGpioGpio31 = 55, /**< GPIO pad */
297 kDtPadSpiDeviceSck = 56, /**< SPI device clock */
298 kDtPadSpiDeviceCsb = 57, /**< SPI device chip select */
299 kDtPadSpiDeviceTpmCsb = 58, /**< SPI device TPM chip select */
300 kDtPadUart0Rx = 59, /**< UART receive */
301 kDtPadSocProxySocGpi0 = 60, /**< SoC general purpose input */
302 kDtPadSocProxySocGpi1 = 61, /**< SoC general purpose input */
303 kDtPadSocProxySocGpi2 = 62, /**< SoC general purpose input */
304 kDtPadSocProxySocGpi3 = 63, /**< SoC general purpose input */
305 kDtPadSocProxySocGpi4 = 64, /**< SoC general purpose input */
306 kDtPadSocProxySocGpi5 = 65, /**< SoC general purpose input */
307 kDtPadSocProxySocGpi6 = 66, /**< SoC general purpose input */
308 kDtPadSocProxySocGpi7 = 67, /**< SoC general purpose input */
309 kDtPadSocProxySocGpi8 = 68, /**< SoC general purpose input */
310 kDtPadSocProxySocGpi9 = 69, /**< SoC general purpose input */
311 kDtPadSocProxySocGpi10 = 70, /**< SoC general purpose input */
312 kDtPadSocProxySocGpi11 = 71, /**< SoC general purpose input */
313 kDtPadSpiHost0Sck = 72, /**< SPI host clock */
314 kDtPadSpiHost0Csb = 73, /**< SPI host chip select */
315 kDtPadUart0Tx = 74, /**< UART transmit */
316 kDtPadSocProxySocGpo0 = 75, /**< SoC general purpose output */
317 kDtPadSocProxySocGpo1 = 76, /**< SoC general purpose output */
318 kDtPadSocProxySocGpo2 = 77, /**< SoC general purpose output */
319 kDtPadSocProxySocGpo3 = 78, /**< SoC general purpose output */
320 kDtPadSocProxySocGpo4 = 79, /**< SoC general purpose output */
321 kDtPadSocProxySocGpo5 = 80, /**< SoC general purpose output */
322 kDtPadSocProxySocGpo6 = 81, /**< SoC general purpose output */
323 kDtPadSocProxySocGpo7 = 82, /**< SoC general purpose output */
324 kDtPadSocProxySocGpo8 = 83, /**< SoC general purpose output */
325 kDtPadSocProxySocGpo9 = 84, /**< SoC general purpose output */
326 kDtPadSocProxySocGpo10 = 85, /**< SoC general purpose output */
327 kDtPadSocProxySocGpo11 = 86, /**< SoC general purpose output */
328 kDtPadCount = 87, /**< \internal Number of pads */
329} dt_pad_t;
330
331/** Type of peripheral I/O. */
332typedef enum dt_periph_io_type {
333 /** This peripheral I/O is connected to a muxed IO (MIO). */
334 kDtPeriphIoTypeMio,
335 /** This peripheral I/O is connected to a direct IO (DIO). */
336 kDtPeriphIoTypeDio,
337 /** This peripheral I/O is not connected to either a MIO or a DIO. */
338 kDtPeriphIoTypeUnspecified,
339} dt_periph_io_type_t;
340
341
342/** Direction of a peripheral I/O. */
343typedef enum dt_periph_io_dir {
344 /** This peripheral I/O is an input. */
345 kDtPeriphIoDirIn,
346 /** This peripheral I/O is an output */
347 kDtPeriphIoDirOut,
348 /** This peripheral I/O is an input-output */
349 kDtPeriphIoDirInout,
350} dt_periph_io_dir_t;
351
352/** Peripheral I/O description.
353 *
354 * A `dt_periph_io_t` represents a HW IP block peripheral I/O, which can be an input, output or both.
355 * Importantly, this only represents how the block peripheral I/O is wired, i.e.
356 * whether it is connected a MIO or a direct IO on the pinmux, and the relevant information necessary to
357 * configure it.
358 *
359 * **Note:** The fields of this structure are internal, use the dt_periph_io_* functions to access them.
360 */
361typedef struct dt_periph_io {
362 struct {
363 dt_periph_io_type_t type; /**< Peripheral I/O type */
364 dt_periph_io_dir_t dir; /**< Peripheral I/O direction */
365 /**
366 * For `kDtPeriphIoTypeMio`: peripheral input number. This is the index of the MIO_PERIPH_INSEL register
367 * that controls this peripheral I/O.
368 *
369 * For `kDtPeriphIoTypeDio`: DIO pad number. This is the index of the various DIO_PAD_* registers
370 * that control this peripheral I/O.
371 */
372 uint16_t periph_input_or_direct_pad;
373 /**
374 * For `kDtPeriphIoTypeMio`: peripheral output number. This is the value to put in the MIO_OUTSEL registers
375 * to connect an output to this peripheral I/O. For `kDtPeriphIoTypeDio`: the pad index (`dt_pad_t`) to which this I/O is connected.
376 */
377 uint16_t outsel_or_dt_pad;
378 } __internal; /**< Private fields */
379} dt_periph_io_t;
380
381
382/* Peripheral I/O that is constantly tied to high-Z (output only) */
383extern const dt_periph_io_t kDtPeriphIoConstantHighZ;
384
385/* Peripheral I/O that is constantly tied to one (output only) */
386extern const dt_periph_io_t kDtPeriphIoConstantZero;
387
388/* Peripheral I/O that is constantly tied to zero (output only) */
389extern const dt_periph_io_t kDtPeriphIoConstantOne;
390
391/**
392 * Return the type of a `dt_periph_io_t`.
393 *
394 * @param periph_io A peripheral I/O description.
395 * @return The peripheral I/O type (MIO, DIO, etc).
396 */
397static inline dt_periph_io_type_t dt_periph_io_type(dt_periph_io_t periph_io) {
398 return periph_io.__internal.type;
399}
400
401/**
402 * Return the direction of a `dt_periph_io_t`.
403 *
404 * @param periph_io A peripheral I/O description.
405 * @return The peripheral I/O direction.
406 */
407static inline dt_periph_io_dir_t dt_periph_io_dir(dt_periph_io_t periph_io) {
408 return periph_io.__internal.dir;
409}
410
411/**
412 * Pinmux types.
413 *
414 * These types are aliases to top-level types for backward compatibility
415 * with existing code.
416 */
417typedef top_darjeeling_pinmux_peripheral_in_t dt_pinmux_peripheral_in_t;
418typedef top_darjeeling_pinmux_insel_t dt_pinmux_insel_t;
419typedef top_darjeeling_pinmux_outsel_t dt_pinmux_outsel_t;
420typedef top_darjeeling_pinmux_mio_out_t dt_pinmux_mio_out_t;
421typedef top_darjeeling_direct_pads_t dt_pinmux_direct_pad_t;
422typedef top_darjeeling_muxed_pads_t dt_pinmux_muxed_pad_t;
423
424/** Tie constantly to zero. */
425static const dt_pinmux_outsel_t kDtPinmuxOutselConstantZero = kTopDarjeelingPinmuxOutselConstantZero;
426
427/** Tie constantly to one. */
428static const dt_pinmux_outsel_t kDtPinmuxOutselConstantOne = kTopDarjeelingPinmuxOutselConstantOne;
429
430/** Tie constantly to high-Z. */
431static const dt_pinmux_outsel_t kDtPinmuxOutselConstantHighZ = kTopDarjeelingPinmuxOutselConstantHighZ;
432
433/**
434 * Return the peripheral input for an MIO peripheral I/O.
435 *
436 * This is the index of the `MIO_PERIPH_INSEL` pinmux register that controls this peripheral I/O.
437 *
438 * @param periph_io A peripheral I/O of type `kDtPeriphIoTypeMio`.
439 * @return The peripheral input number of the MIO that this peripheral I/O is connected to.
440 *
441 * **Note:** This function only makes sense for peripheral I/Os of type `kDtPeriphIoTypeMio` which are
442 * inputs (`kDtPeriphIoDirIn`). For any other peripheral I/O, the return value is unspecified.
443 */
444static inline dt_pinmux_peripheral_in_t dt_periph_io_mio_periph_input(dt_periph_io_t periph_io) {
445 return (dt_pinmux_peripheral_in_t)periph_io.__internal.periph_input_or_direct_pad;
446}
447
448/**
449 * Return the outsel for an MIO peripheral I/O.
450 *
451 * This is the value to put in the `MIO_OUTSEL` pinmux registers to connect a pad to this peripheral I/O.
452 *
453 * @param periph_io A peripheral I/O of type `kDtPeriphIoTypeMio`.
454 * @return The outsel of the MIO that this peripheral I/O is connected to.
455 *
456 * **Note:** This function only makes sense for peripheral I/Os of type `kDtPeriphIoTypeMio` which are
457 * outputs (`kDtPeriphIoDirOut`). For any other peripheral I/O, the return value is unspecified.
458 */
459static inline dt_pinmux_outsel_t dt_periph_io_mio_outsel(dt_periph_io_t periph_io) {
460 return (dt_pinmux_outsel_t)periph_io.__internal.outsel_or_dt_pad;
461}
462
463/**
464 * Return the direct pad number of a DIO peripheral I/O.
465 *
466 * This is the index of the various `DIO_PAD_*` pinmux registers that control this peripheral I/O.
467 *
468 * @param periph_io A peripheral I/O of type `kDtPeriphIoTypeDio`.
469 * @return The direct pad number of the DIO that this peripheral I/O is connected to.
470 *
471 * **Note:** This function only makes sense for peripheral I/Os of type `kDtPeriphIoTypeDio` which are
472 * either outputs or inouts. For any other peripheral I/O type, the return value is unspecified.
473 */
474static inline dt_pinmux_direct_pad_t dt_periph_io_dio_pad_index(dt_periph_io_t periph_io) {
475 return (dt_pinmux_direct_pad_t)periph_io.__internal.periph_input_or_direct_pad;
476}
477
478/**
479 * Return the pad of a DIO peripheral I/O.
480 *
481 * @param periph_io A peripheral I/O of type `kDtPeriphIoTypeDio`.
482 * @return The pad to which this peripheral I/O is connected to.
483 *
484 * **Note:** This function only makes sense for peripheral I/Os of type `kDtPeriphIoTypeDio` which are
485 * either outputs or inouts. For any other peripheral I/O type, the return value is unspecified.
486 */
487static inline dt_pad_t dt_periph_io_dio_pad(dt_periph_io_t periph_io) {
488 return (dt_pad_t)periph_io.__internal.outsel_or_dt_pad;
489}
490
491/** Type of a pad. */
492typedef enum dt_pad_type {
493 /** This pad is a muxed IO (MIO). */
494 kDtPadTypeMio,
495 /** This pad is a direct IO (DIO). */
496 kDtPadTypeDio,
497 /** This pad is not an MIO or a DIO. */
498 kDtPadTypeUnspecified,
499} dt_pad_type_t;
500
501/**
502 * Return the type of a `dt_pad_t`.
503 *
504 * @param pad A pad description.
505 * @return The pad type (MIO, DIO, etc).
506 */
507dt_pad_type_t dt_pad_type(dt_pad_t pad);
508
509/**
510 * Return the pad out number for an MIO pad.
511 *
512 * This is the index of the `MIO_OUT` registers that control this pad
513 * (or the output part of this pad).
514 *
515 * @param pad A pad of type `kDtPadTypeMio`.
516 * @return The pad out number of the MIO.
517 *
518 * **Note:** This function only makes sense for pads of type `kDtPadTypeMio` which are
519 * either inputs or inouts. For any other pad, the return value is unspecified.
520 */
521dt_pinmux_mio_out_t dt_pad_mio_out(dt_pad_t pad);
522
523/**
524 * Return the pad out number for an MIO pad.
525 *
526 * This is the index of the `MIO_PAD` registers that control this pad
527 * (or the output part of this pad).
528 *
529 * @param pad A pad of type `kDtPadTypeMio`.
530 * @return The pad out number of the MIO.
531 *
532 * **Note:** This function only makes sense for pads of type `kDtPadTypeMio`.
533 * For any other pad, the return value is unspecified.
534 */
535dt_pinmux_muxed_pad_t dt_pad_mio_pad_index(dt_pad_t pad);
536
537/**
538 * Return the insel for an MIO pad.
539 *
540 * This is the value to put in the `MIO_PERIPH_INSEL` registers to connect a peripheral I/O to this pad.
541 *
542 * @param pad A pad of type `kDtPadTypeMio`.
543 * @return The insel of the MIO that this pad is connected to.
544 *
545 * **Note:** This function only makes sense for pads of type `kDtPadTypeMio`.
546 * For any other pad, the return value is unspecified.
547 */
548dt_pinmux_insel_t dt_pad_mio_insel(dt_pad_t pad);
549
550/**
551 * Return the direct pad number of a DIO pad.
552 *
553 * This is the index of the various `DIO_PAD_*` registers that control this pad.
554 *
555 * @param pad A pad of type `kDtPadTypeDio`.
556 * @return The direct pad number of the DID that this pad is connected to.
557 *
558 * **Note:** This function only makes sense for pads of type `kDtPeriphIoTypeDio` which are
559 * either outputs or inouts. For any other pad type, the return value is unspecified.
560 */
561dt_pinmux_direct_pad_t dt_pad_dio_pad_index(dt_pad_t pad);
562
563#ifdef __cplusplus
564} // extern "C"
565#endif // __cplusplus
566
567#endif // OPENTITAN_TOP_DARJEELING_DT_API_H_