12#include "hw/top/dt/clkmgr.h"
15#include "hw/top/clkmgr_regs.h"
23 uint32_t
reg_addr[kDtClkmgrRegBlockCount];
46 [kDtClkmgrRegBlockCore] = 0x30420000,
77 .meas_ctrl_en_off = CLKMGR_IO_MEAS_CTRL_EN_REG_OFFSET,
78 .meas_ctrl_en_en_field = CLKMGR_IO_MEAS_CTRL_EN_EN_FIELD,
79 .meas_ctrl_shadowed_off = CLKMGR_IO_MEAS_CTRL_SHADOWED_REG_OFFSET,
80 .meas_ctrl_shadowed_lo_field = CLKMGR_IO_MEAS_CTRL_SHADOWED_LO_FIELD,
81 .meas_ctrl_shadowed_hi_field = CLKMGR_IO_MEAS_CTRL_SHADOWED_HI_FIELD,
85 .meas_ctrl_en_off = CLKMGR_MAIN_MEAS_CTRL_EN_REG_OFFSET,
86 .meas_ctrl_en_en_field = CLKMGR_MAIN_MEAS_CTRL_EN_EN_FIELD,
87 .meas_ctrl_shadowed_off = CLKMGR_MAIN_MEAS_CTRL_SHADOWED_REG_OFFSET,
88 .meas_ctrl_shadowed_lo_field = CLKMGR_MAIN_MEAS_CTRL_SHADOWED_LO_FIELD,
89 .meas_ctrl_shadowed_hi_field = CLKMGR_MAIN_MEAS_CTRL_SHADOWED_HI_FIELD,
101#define TRY_GET_DT(dt, default) ({ if ((dt) < (dt_clkmgr_t)0 || (dt) >= kDtClkmgrCount) return (default); &clkmgr_desc[dt]; })
119 return TRY_GET_DT(dt, 0xdeadbeef)->reg_addr[reg_block];
126 return (
dt_alert_id_t)((uint32_t)clkmgr_desc[dt].first_alert + (uint32_t)alert);
133 if (alert < clkmgr_desc[dt].first_alert || alert >= clkmgr_desc[dt].first_alert + (
dt_alert_id_t)count) {
182 .clock = kDtClockCount,
183 .meas_ctrl_en_off = 0xdead,
185 .meas_ctrl_shadowed_off = 0xdead,
189 return TRY_GET_DT(dt, invalid_clk)->clkmgr_ext.measurable_clks[idx];