Darjeeling Memory Map

Hart Address Space

The main address space, shared between the CPU and DM

IP Memory Regions

Module	Interface	Base Address	Size (bytes)	Size (words)	Description
uart0	default	`0x30010000`	`0x40`	`0x10`	uart0
gpio	default	`0x30000000`	`0x100`	`0x40`	gpio
spi_device	default	`0x30310000`	`0x2000`	`0x800`	spi_device
i2c0	default	`0x30080000`	`0x80`	`0x20`	i2c0
rv_timer	default	`0x30100000`	`0x200`	`0x80`	rv_timer
otp_ctrl	core	`0x30130000`	`0x8000`	`0x2000`	core device on otp_ctrl
otp_macro	prim	`0x30140000`	`0x20`	`0x8`	prim device on otp_macro
lc_ctrl	regs	`0x30150000`	`0x100`	`0x40`	regs device on lc_ctrl
alert_handler	default	`0x30160000`	`0x800`	`0x200`	alert_handler
spi_host0	default	`0x30300000`	`0x40`	`0x10`	spi_host0
pwrmgr_aon	default	`0x30400000`	`0x80`	`0x20`	pwrmgr_aon
rstmgr_aon	default	`0x30410000`	`0x80`	`0x20`	rstmgr_aon
clkmgr_aon	default	`0x30420000`	`0x40`	`0x10`	clkmgr_aon
pinmux_aon	default	`0x30460000`	`0x800`	`0x200`	pinmux_aon
aon_timer_aon	default	`0x30470000`	`0x40`	`0x10`	aon_timer_aon
ast	default	`0x30480000`	`0x400`	`0x100`	ast
soc_proxy	core	`0x22030000`	`0x8`	`0x2`	core device on soc_proxy
sram_ctrl_ret_aon	regs	`0x30500000`	`0x40`	`0x10`	regs device on sram_ctrl_ret_aon
rv_dm	regs	`0x21200000`	`0x10`	`0x4`	regs device on rv_dm
rv_dm	mem	`0x40000`	`0x1000`	`0x400`	mem device on rv_dm
rv_plic	default	`0x28000000`	`0x8000000`	`0x2000000`	rv_plic
aes	default	`0x21100000`	`0x100`	`0x40`	aes
hmac	default	`0x21110000`	`0x2000`	`0x800`	hmac
kmac	default	`0x21120000`	`0x1000`	`0x400`	kmac
otbn	default	`0x21130000`	`0x10000`	`0x4000`	otbn
keymgr_dpe	default	`0x21140000`	`0x100`	`0x40`	keymgr_dpe
csrng	default	`0x21150000`	`0x80`	`0x20`	csrng
entropy_src	default	`0x21160000`	`0x100`	`0x40`	entropy_src
edn0	default	`0x21170000`	`0x80`	`0x20`	edn0
edn1	default	`0x21180000`	`0x80`	`0x20`	edn1
sram_ctrl_main	regs	`0x211C0000`	`0x40`	`0x10`	regs device on sram_ctrl_main
sram_ctrl_mbox	regs	`0x211D0000`	`0x40`	`0x10`	regs device on sram_ctrl_mbox
rom_ctrl0	regs	`0x211E0000`	`0x80`	`0x20`	regs device on rom_ctrl0
rom_ctrl1	regs	`0x211E1000`	`0x80`	`0x20`	regs device on rom_ctrl1
dma	default	`0x22010000`	`0x200`	`0x80`	dma
mbx0	core	`0x22000000`	`0x80`	`0x20`	core device on mbx0
mbx1	core	`0x22000100`	`0x80`	`0x20`	core device on mbx1
mbx2	core	`0x22000200`	`0x80`	`0x20`	core device on mbx2
mbx3	core	`0x22000300`	`0x80`	`0x20`	core device on mbx3
mbx4	core	`0x22000400`	`0x80`	`0x20`	core device on mbx4
mbx5	core	`0x22000500`	`0x80`	`0x20`	core device on mbx5
mbx6	core	`0x22000600`	`0x80`	`0x20`	core device on mbx6
mbx_jtag	core	`0x22000800`	`0x80`	`0x20`	core device on mbx_jtag
mbx_pcie0	core	`0x22040000`	`0x80`	`0x20`	core device on mbx_pcie0
mbx_pcie1	core	`0x22040100`	`0x80`	`0x20`	core device on mbx_pcie1
soc_dbg_ctrl	core	`0x30170000`	`0x20`	`0x8`	core device on soc_dbg_ctrl
rv_core_ibex	cfg	`0x211F0000`	`0x800`	`0x200`	cfg device on rv_core_ibex

Memory Blocks

Memory	Interface	Base Address	Size (bytes)	Size (words)
soc_proxy	ctn	`0x40000000`	`0x80000000`	`0x20000000`
sram_ctrl_ret_aon	ram	`0x30600000`	`0x1000`	`0x400`
sram_ctrl_main	ram	`0x10000000`	`0x10000`	`0x4000`
sram_ctrl_mbox	ram	`0x11000000`	`0x1000`	`0x400`
rom_ctrl0	rom	`0x8000`	`0x8000`	`0x2000`
rom_ctrl1	rom	`0x20000`	`0x10000`	`0x4000`

Soc_mbx Address Space

SoC address space for mailbox access

IP Memory Regions

Module	Interface	Base Address	Size (bytes)	Size (words)	Description
mbx0	soc	`0x1465000`	`0x20`	`0x8`	soc device on mbx0
mbx1	soc	`0x1465100`	`0x20`	`0x8`	soc device on mbx1
mbx2	soc	`0x1465200`	`0x20`	`0x8`	soc device on mbx2
mbx3	soc	`0x1465300`	`0x20`	`0x8`	soc device on mbx3
mbx4	soc	`0x1465400`	`0x20`	`0x8`	soc device on mbx4
mbx5	soc	`0x1465500`	`0x20`	`0x8`	soc device on mbx5
mbx6	soc	`0x1496000`	`0x20`	`0x8`	soc device on mbx6
mbx_pcie0	soc	`0x1460100`	`0x20`	`0x8`	soc device on mbx_pcie0
mbx_pcie1	soc	`0x1460200`	`0x20`	`0x8`	soc device on mbx_pcie1
racl_ctrl	default	`0x1461F00`	`0x100`	`0x40`	racl_ctrl
ac_range_check	default	`0x1464000`	`0x400`	`0x100`	ac_range_check

Soc_dbg Address Space

SoC address space for debug module interfaces

IP Memory Regions

Module	Interface	Base Address	Size (bytes)	Size (words)	Description
lc_ctrl	dmi	`0x3000`	`0x1000`	`0x400`	dmi device on lc_ctrl
rv_dm	dbg	`0x0`	`0x200`	`0x80`	dbg device on rv_dm
mbx_jtag	soc	`0x2200`	`0x20`	`0x8`	soc device on mbx_jtag
soc_dbg_ctrl	jtag	`0x2300`	`0x20`	`0x8`	jtag device on soc_dbg_ctrl