Hardware Interfaces

Referring to the Comportable guideline for peripheral device functionality, the module gpio has the following hardware interfaces defined

  • Primary Clock: clk_i
  • Other Clocks: none
  • Bus Device Interfaces (TL-UL): tl
  • Bus Host Interfaces (TL-UL): none

Peripheral Pins for Chip IO

Pin nameDirectionDescription
gpio[31:0]inoutGPIO inout to/from PAD

Inter-Module Signals

Port NamePackage::StructTypeActWidthDescription
strap_enlogicunircv1This signal is pulsed high by the power manager after reset in order to sample the HW straps.
sampled_strapsgpio_pkg::gpio_strapsunireq1This vector contains the sampled strap values.
tltlul_pkg::tlreq_rsprsp1

Interrupts

Interrupt NameTypeDescription
gpio[31:0]Eventraised if any of GPIO pin detects configured interrupt mode

Security Alerts

Alert NameDescription
fatal_faultThis fatal alert is triggered when a fatal TL-UL bus integrity fault is detected.

Security Countermeasures

Countermeasure IDDescription
GPIO.BUS.INTEGRITYEnd-to-end bus integrity scheme.