Hardware Interfaces

Referring to the Comportable guideline for peripheral device functionality, the module gpio has the following hardware interfaces defined

  • Primary Clock: clk_i
  • Other Clocks: none
  • Bus Device Interfaces (TL-UL): tl
  • Bus Host Interfaces (TL-UL): none

Peripheral Pins for Chip IO

Pin nameDirectionDescription
gpio[31:0]inoutGPIO inout to/from PAD

Inter-Module Signals

Port NamePackage::StructTypeActWidthDescription
strap_enlogicunircv1The strap enable signal tells gpio to take a snapshot of the input pins. The behaviour of this signal after that event will have no effect.
sampled_strapsgpio_pkg::gpio_strapsunireq1This vector contains the sampled strap values.
racl_policiestop_racl_pkg::racl_policy_vecunircv1Incoming RACL policy vector from a racl_ctrl instance. The policy selection vector (parameter) selects the policy for each register.
racl_errortop_racl_pkg::racl_error_logunireq1RACL error log information of this module.
tltlul_pkg::tlreq_rsprsp1

Interrupts

Interrupt NameTypeDescription
gpio[31:0]Eventraised if any of GPIO pin detects configured interrupt mode

Security Alerts

Alert NameDescription
fatal_faultThis fatal alert is triggered when a fatal TL-UL bus integrity fault is detected.

Security Countermeasures

Countermeasure IDDescription
GPIO.BUS.INTEGRITYEnd-to-end bus integrity scheme.