opentitanlib/dif/
clkmgr.rs

1// Copyright lowRISC contributors (OpenTitan project).
2// Licensed under the Apache License, Version 2.0, see LICENSE for details.
3// SPDX-License-Identifier: Apache-2.0
4
5use bitflags::bitflags;
6
7use bindgen::dif;
8
9use crate::util::bitfield::BitField;
10
11#[derive(Clone, Copy, Debug, PartialEq, Eq)]
12#[repr(u32)]
13pub enum ClkmgrReg {
14    AlertTest = dif::CLKMGR_ALERT_TEST_REG_OFFSET,
15    ExtclkCtrlRegwen = dif::CLKMGR_EXTCLK_CTRL_REGWEN_REG_OFFSET,
16    ExtclkCtrl = dif::CLKMGR_EXTCLK_CTRL_REG_OFFSET,
17    ExtclkStatus = dif::CLKMGR_EXTCLK_STATUS_REG_OFFSET,
18    JitterRegwen = dif::CLKMGR_JITTER_REGWEN_REG_OFFSET,
19    JitterEnable = dif::CLKMGR_JITTER_ENABLE_REG_OFFSET,
20    ClkEnables = dif::CLKMGR_CLK_ENABLES_REG_OFFSET,
21    ClkHints = dif::CLKMGR_CLK_HINTS_REG_OFFSET,
22    ClkHintsStatus = dif::CLKMGR_CLK_HINTS_STATUS_REG_OFFSET,
23    MeasureCtrlRegwen = dif::CLKMGR_MEASURE_CTRL_REGWEN_REG_OFFSET,
24    IoMeasCtrlEn = dif::CLKMGR_IO_MEAS_CTRL_EN_REG_OFFSET,
25    IoMeasCtrlShadowed = dif::CLKMGR_IO_MEAS_CTRL_SHADOWED_REG_OFFSET,
26    IoDiv2MeasCtrlEn = dif::CLKMGR_IO_DIV2_MEAS_CTRL_EN_REG_OFFSET,
27    IoDiv2MeasCtrlShadowed = dif::CLKMGR_IO_DIV2_MEAS_CTRL_SHADOWED_REG_OFFSET,
28    IoDiv4MeasCtrlEn = dif::CLKMGR_IO_DIV4_MEAS_CTRL_EN_REG_OFFSET,
29    IoDiv4MeasCtrlShadowed = dif::CLKMGR_IO_DIV4_MEAS_CTRL_SHADOWED_REG_OFFSET,
30    MainMeasCtrlEn = dif::CLKMGR_MAIN_MEAS_CTRL_EN_REG_OFFSET,
31    MainMeasCtrlShadowed = dif::CLKMGR_MAIN_MEAS_CTRL_SHADOWED_REG_OFFSET,
32    UsbMeasCtrlEn = dif::CLKMGR_USB_MEAS_CTRL_EN_REG_OFFSET,
33    UsbMeasCtrlShadowed = dif::CLKMGR_USB_MEAS_CTRL_SHADOWED_REG_OFFSET,
34    RecovErrCode = dif::CLKMGR_RECOV_ERR_CODE_REG_OFFSET,
35    FatalErrCode = dif::CLKMGR_FATAL_ERR_CODE_REG_OFFSET,
36}
37
38bitflags! {
39    #[derive(Clone, Copy, Debug, PartialEq, Eq, Hash)]
40    pub struct ClkmgrExtclkCtrlRegwen: u32 {
41        const EN = 0b1 << dif::CLKMGR_EXTCLK_CTRL_REGWEN_EN_BIT;
42    }
43}
44
45/// BitFields for the CLKMGR_EXTCLK_CTRL register.
46pub struct ClkmgrExtclkCtrl;
47
48impl ClkmgrExtclkCtrl {
49    pub const HI_SPEED_SEL: BitField = BitField {
50        offset: dif::CLKMGR_EXTCLK_CTRL_HI_SPEED_SEL_OFFSET,
51        // Relies on mask being continuous
52        size: dif::CLKMGR_EXTCLK_CTRL_HI_SPEED_SEL_MASK.count_ones(),
53    };
54
55    pub const SEL: BitField = BitField {
56        offset: dif::CLKMGR_EXTCLK_CTRL_SEL_OFFSET,
57        // Relies on mask being continuous
58        size: dif::CLKMGR_EXTCLK_CTRL_SEL_MASK.count_ones(),
59    };
60}
opentitanlib/dif/clkmgr.rs

opentitanlib/dif/
clkmgr.rs
